All of lore.kernel.org
 help / color / mirror / Atom feed
From: Anshuamn Gupta <anshuman.gupta@intel.com>
To: Matt Atwood <matthew.s.atwood@intel.com>
Cc: intel-gfx@freedesktop.org
Subject: Re: [Intel-gfx] [PATCH] drm/i915: add Wa_14010594013: icl,ehl
Date: Fri, 10 Jan 2020 14:33:04 +0530	[thread overview]
Message-ID: <20200110090303.GA23528@intel.com> (raw)
In-Reply-To: <20200110085149.843-1-matthew.s.atwood@intel.com>

On 2020-01-10 at 03:51:49 -0500, Matt Atwood wrote:
> The bspec tells us we need to set this bit to avoid potential underruns.
> 
> Bspec: 33450
> Bspec: 33451
> Bspec: 33452
It would be nice to add index 7386 which is having the bit for PMRSP.
> 
> Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_reg.h | 1 +
>  drivers/gpu/drm/i915/intel_pm.c | 4 ++++
>  2 files changed, 5 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index cf770793be54..b9dc5e2ea606 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -7785,6 +7785,7 @@ enum {
>  
>  #define GEN8_CHICKEN_DCPR_1		_MMIO(0x46430)
>  #define   SKL_SELECT_ALTERNATE_DC_EXIT	(1 << 30)
> +#define   CNL_DELAY_PMRSP		(1 << 22)
>  #define   MASK_WAKEMEM			(1 << 13)
>  #define   CNL_DDI_CLOCK_REG_ACCESS_ON	(1 << 7)
>  
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 148ac455dfa7..10714d43e8a3 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -6610,6 +6610,10 @@ static void icl_init_clock_gating(struct drm_i915_private *dev_priv)
>  	/* Wa_1407352427:icl,ehl */
>  	intel_uncore_rmw(&dev_priv->uncore, UNSLICE_UNIT_LEVEL_CLKGATE2,
>  			 0, PSDUNIT_CLKGATE_DIS);
> +
> +	/*Wa_14010594013:icl, ehl */
> +	I915_WRITE(GEN8_CHICKEN_DCPR_1,
> +		   I915_READ(GEN8_CHICKEN_DCPR_1) | CNL_DELAY_PMRSP);
Is there any functional difference between Wa_14010594013 and above Wa_1407352427
using different family of writes, may be not related to this patch.
Thanks,
Anshuman Gupta.
>  }
>  
>  static void tgl_init_clock_gating(struct drm_i915_private *dev_priv)
> -- 
> 2.21.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2020-01-10  9:11 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-10  8:51 [Intel-gfx] [PATCH] drm/i915: add Wa_14010594013: icl,ehl Matt Atwood
2020-01-10  1:50 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2020-01-10  9:03 ` Anshuamn Gupta [this message]
2020-01-10 18:54   ` [Intel-gfx] [PATCH] " Rodrigo Vivi
2020-01-13 11:51 ` [Intel-gfx] ✓ Fi.CI.IGT: success for " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20200110090303.GA23528@intel.com \
    --to=anshuman.gupta@intel.com \
    --cc=intel-gfx@freedesktop.org \
    --cc=matthew.s.atwood@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.