From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 317B3C33CA9 for ; Tue, 14 Jan 2020 06:31:00 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0D71020678 for ; Tue, 14 Jan 2020 06:30:59 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0D71020678 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A61F56E264; Tue, 14 Jan 2020 06:30:59 +0000 (UTC) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7EC226E264 for ; Tue, 14 Jan 2020 06:30:58 +0000 (UTC) X-Amp-Result: UNKNOWN X-Amp-Original-Verdict: FILE UNKNOWN X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 13 Jan 2020 22:30:58 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,431,1571727600"; d="scan'208";a="423050959" Received: from unknown (HELO intel.com) ([10.223.74.178]) by fmsmga005.fm.intel.com with ESMTP; 13 Jan 2020 22:30:56 -0800 Date: Tue, 14 Jan 2020 11:52:12 +0530 From: Anshuman Gupta To: Matt Atwood Message-ID: <20200114062212.GB23601@intel.com> References: <20200114041128.11211-1-matthew.s.atwood@intel.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200114041128.11211-1-matthew.s.atwood@intel.com> User-Agent: Mutt/1.5.24 (2015-08-30) Subject: Re: [Intel-gfx] [PATCH v2] drm/i915: add Wa_14010594013: icl,ehl X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On 2020-01-13 at 23:11:28 -0500, Matt Atwood wrote: > The bspec tells us we need to set this bit to avoid potential underruns. > > v2: use new register write convention (Anshuman) add bspec 7386 ref. > > Bspec: 7386 > Bspec: 33450 > Bspec: 33451 > > Cc: Anshuman Gupta > Reviewed-by: Rodrigo Vivi Reviewed-by: Anshuman Gupta > Signed-off-by: Matt Atwood > --- > drivers/gpu/drm/i915/i915_reg.h | 1 + > drivers/gpu/drm/i915/intel_pm.c | 4 ++++ > 2 files changed, 5 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index cf770793be54..b9dc5e2ea606 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -7785,6 +7785,7 @@ enum { > > #define GEN8_CHICKEN_DCPR_1 _MMIO(0x46430) > #define SKL_SELECT_ALTERNATE_DC_EXIT (1 << 30) > +#define CNL_DELAY_PMRSP (1 << 22) > #define MASK_WAKEMEM (1 << 13) > #define CNL_DDI_CLOCK_REG_ACCESS_ON (1 << 7) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 148ac455dfa7..de585e670496 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -6610,6 +6610,10 @@ static void icl_init_clock_gating(struct drm_i915_private *dev_priv) > /* Wa_1407352427:icl,ehl */ > intel_uncore_rmw(&dev_priv->uncore, UNSLICE_UNIT_LEVEL_CLKGATE2, > 0, PSDUNIT_CLKGATE_DIS); > + > + /*Wa_14010594013:icl, ehl */ > + intel_uncore_rmw(&dev_priv->uncore, GEN8_CHICKEN_DCPR_1, > + 0, CNL_DELAY_PMRSP); > } > > static void tgl_init_clock_gating(struct drm_i915_private *dev_priv) > -- > 2.21.1 > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx