From: Stephen Boyd <sboyd@kernel.org>
To: Michael Walle <michael@walle.cc>,
devicetree@vger.kernel.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org
Cc: Michael Turquette <mturquette@baylibre.com>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Michael Walle <michael@walle.cc>
Subject: Re: [PATCH v3 3/3] clk: fsl-sai: new driver
Date: Tue, 28 Jan 2020 14:04:55 -0800 [thread overview]
Message-ID: <20200128220455.D99CD21739@mail.kernel.org> (raw)
In-Reply-To: <20200102231101.11834-3-michael@walle.cc>
Quoting Michael Walle (2020-01-02 15:11:01)
> With this driver it is possible to use the BCLK pin of the SAI module as
> a generic clock output. This is esp. useful if you want to drive a clock
> to an audio codec. Because the output only allows integer divider values
> the audio codec needs an integrated PLL.
>
> Signed-off-by: Michael Walle <michael@walle.cc>
> ---
Applied to clk-next
next prev parent reply other threads:[~2020-01-28 22:04 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-02 23:10 [PATCH v3 1/3] clk: composite: add _register_composite_pdata() variants Michael Walle
2020-01-02 23:11 ` [PATCH v3 2/3] dt-bindings: clock: document the fsl-sai driver Michael Walle
2020-01-28 22:04 ` Stephen Boyd
2020-01-02 23:11 ` [PATCH v3 3/3] clk: fsl-sai: new driver Michael Walle
2020-01-14 15:55 ` Michael Walle
2020-01-28 22:04 ` Stephen Boyd [this message]
2020-01-28 22:04 ` [PATCH v3 1/3] clk: composite: add _register_composite_pdata() variants Stephen Boyd
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