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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 6/9] drm/i915/dsb: Inline DSB_CTRL writes into intel_dsb_commit()
Date: Wed, 29 Jan 2020 20:44:14 +0200	[thread overview]
Message-ID: <20200129184414.GX13686@intel.com> (raw)
In-Reply-To: <158032272436.13511.14294498438655990456@skylake-alporthouse-com>

On Wed, Jan 29, 2020 at 06:32:04PM +0000, Chris Wilson wrote:
> Quoting Ville Syrjala (2020-01-29 18:20:31)
> > +       intel_de_write(dev_priv, DSB_CTRL(pipe, dsb->id),
> > +                      DSB_ENABLE);
> > +       intel_de_write(dev_priv, DSB_HEAD(pipe, dsb->id),
> > +                      i915_ggtt_offset(dsb->vma));
> >         intel_de_write(dev_priv, DSB_TAIL(pipe, dsb->id),
> >                        i915_ggtt_offset(dsb->vma) + tail);
> 
> I still say this order looks dodgy for a ringbuffer. Is it all truly
> latched by DSB_TAIL or might it start passing on being enabled and HEAD
> != TAIL?

My initial thoughts as well, but indeed it's the tail write that
makes it go (or at least that's what the docs say).

-- 
Ville Syrjälä
Intel
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Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2020-01-29 19:01 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-29 18:20 [Intel-gfx] [PATCH 1/9] drm/i915/dsb: Replace HAS_DSB check with dsb->cmd_buf check Ville Syrjala
2020-01-29 18:20 ` [Intel-gfx] [PATCH 2/9] drm/i915/dsb: Disable DSB until fixed Ville Syrjala
2020-01-30 18:13   ` Souza, Jose
2020-01-29 18:20 ` [Intel-gfx] [PATCH 3/9] drm/i915/dsb: Turn the "DSB is busy" into an error Ville Syrjala
2020-02-03 12:36   ` Sharma, Swati2
2020-01-29 18:20 ` [Intel-gfx] [PATCH 4/9] drm/i915/dsb: Stop with the RMW Ville Syrjala
2020-01-29 18:20 ` [Intel-gfx] [PATCH 5/9] drm/i915/dsb: Unwind on map error Ville Syrjala
2020-01-29 18:20 ` [Intel-gfx] [PATCH 6/9] drm/i915/dsb: Inline DSB_CTRL writes into intel_dsb_commit() Ville Syrjala
2020-01-29 18:32   ` Chris Wilson
2020-01-29 18:44     ` Ville Syrjälä [this message]
2020-01-29 18:20 ` [Intel-gfx] [PATCH 7/9] drm/i915/dsb: Wait for DSB to idle after disabling it Ville Syrjala
2020-01-29 18:20 ` [Intel-gfx] [PATCH 8/9] drm/i915/dsb: Introduce intel_dsb_align_tail() Ville Syrjala
2020-01-29 18:20 ` [Intel-gfx] [PATCH 9/9] drm/i915/dsb: Nuke the 'dev' variables Ville Syrjala
2020-02-03 12:32   ` Sharma, Swati2
2020-01-30  0:47 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/9] drm/i915/dsb: Replace HAS_DSB check with dsb->cmd_buf check Patchwork
2020-01-30  1:09 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2020-01-30 15:11 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/9] drm/i915/dsb: Replace HAS_DSB check with dsb->cmd_buf check (rev2) Patchwork
2020-01-30 15:41 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2020-01-30 18:13 ` [Intel-gfx] [PATCH 1/9] drm/i915/dsb: Replace HAS_DSB check with dsb->cmd_buf check Souza, Jose
2020-01-31  9:34   ` Manna, Animesh
2020-01-31 11:42     ` Ville Syrjälä
2020-01-31 12:06       ` Manna, Animesh
2020-01-31 12:16         ` Ville Syrjälä
2020-03-03 10:43 ` Sharma, Swati2

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