From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: "José Roberto de Souza" <jose.souza@intel.com>
Cc: intel-gfx@lists.freedesktop.org,
Lucas De Marchi <lucas.demarchi@intel.com>,
Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Subject: Re: [Intel-gfx] [PATCH v2 2/3] drm/i915/display: Do not write in removed FBC fence registers
Date: Thu, 6 Feb 2020 15:49:36 +0200 [thread overview]
Message-ID: <20200206134936.GS13686@intel.com> (raw)
In-Reply-To: <20200206020851.337897-2-jose.souza@intel.com>
On Wed, Feb 05, 2020 at 06:08:50PM -0800, José Roberto de Souza wrote:
> From: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
>
> Platforms without fences don't have FBC host tracking and those
> registers are marked as reserved in those platforms.
>
> v2: checking num_fences to write to FBC fence registers (Ville)
>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_fbc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index 3a9e41e93ebf..fa8fca1a6b7c 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -320,7 +320,7 @@ static void gen7_fbc_activate(struct drm_i915_private *dev_priv)
> SNB_CPU_FENCE_ENABLE | params->fence_id);
> intel_de_write(dev_priv, DPFC_CPU_FENCE_OFFSET,
> params->crtc.fence_y_offset);
> - } else {
> + } else if (dev_priv->ggtt.num_fences) {
> intel_de_write(dev_priv, SNB_DPFC_CTL_SA, 0);
> intel_de_write(dev_priv, DPFC_CPU_FENCE_OFFSET, 0);
> }
> --
> 2.25.0
--
Ville Syrjälä
Intel
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next prev parent reply other threads:[~2020-02-06 13:49 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-06 2:08 [Intel-gfx] [PATCH v2 1/3] drm/i915/display/fbc: Make fences a nice-to-have for GEN11+ José Roberto de Souza
2020-02-06 2:08 ` [Intel-gfx] [PATCH v2 2/3] drm/i915/display: Do not write in removed FBC fence registers José Roberto de Souza
2020-02-06 13:49 ` Ville Syrjälä [this message]
2020-02-06 2:08 ` [Intel-gfx] [PATCH v2 3/3] drm/i915: Fix redefinition of sanitize_watermarks_add_affected José Roberto de Souza
2020-02-06 5:04 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/3] drm/i915/display/fbc: Make fences a nice-to-have for GEN11+ Patchwork
2020-02-06 5:54 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-02-06 13:46 ` [Intel-gfx] [PATCH v2 1/3] " Ville Syrjälä
2020-02-07 0:55 ` Souza, Jose
2020-02-07 13:05 ` Ville Syrjälä
2020-02-08 18:23 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v2,1/3] " Patchwork
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