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[79.176.41.183]) by smtp.gmail.com with ESMTPSA id k4sm1227300qtj.74.2020.02.07.04.00.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Feb 2020 04:00:57 -0800 (PST) Date: Fri, 7 Feb 2020 07:00:52 -0500 From: "Michael S. Tsirkin" To: Auger Eric Subject: Re: [PATCH v14 08/11] virtio-iommu-pci: Introduce the x-dt-binding option Message-ID: <20200207065915-mutt-send-email-mst@kernel.org> References: <20200207093203.3788-1-eric.auger@redhat.com> <20200207093203.3788-9-eric.auger@redhat.com> <20200207052214-mutt-send-email-mst@kernel.org> <25d39300-46b9-571c-6fa6-44c5f8d0be99@redhat.com> MIME-Version: 1.0 In-Reply-To: <25d39300-46b9-571c-6fa6-44c5f8d0be99@redhat.com> X-MC-Unique: 5xc8CFYjMLSTE2mu6Z6E_w-1 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: quoted-printable Content-Disposition: inline X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 207.211.31.81 X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, kevin.tian@intel.com, tnowicki@marvell.com, jean-philippe@linaro.org, quintela@redhat.com, qemu-devel@nongnu.org, peterx@redhat.com, dgilbert@redhat.com, bharatb.linux@gmail.com, qemu-arm@nongnu.org, eric.auger.pro@gmail.com Errors-To: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org Sender: "Qemu-arm" X-TUID: vLwLApyFfE8s On Fri, Feb 07, 2020 at 11:51:55AM +0100, Auger Eric wrote: > Hi, >=20 > On 2/7/20 11:23 AM, Michael S. Tsirkin wrote: > > On Fri, Feb 07, 2020 at 10:32:00AM +0100, Eric Auger wrote: > >> At the moment, the kernel only supports device tree > >> integration of the virtio-iommu. DT bindings between the > >> PCI root complex and the IOMMU must be created by the machine > >> in conformance to: > >> > >> Documentation/devicetree/bindings/virtio/iommu.txt. > >> > >> To make sure the end-user is aware of this, force him to use the > >> temporary device option "x-dt-binding" and also double check the > >> machine has a hotplug handler for the virtio-iommu-pci device. > >> This hotplug handler is in charge of creating those DT bindings. > >> > >> Signed-off-by: Eric Auger > >> Suggested-by: Michael S. Tsirkin > >=20 > > how about setting it by default from machine class? > Do you mean in ARM virt machine class? But this wouldn't prevent a user > from launching an ACPI booted guest. I thought you wanted the end-user > to know what he does. >=20 > I don't figure out a way to know if the guest is booted in dt or acpi > mode. I can get access to those info: > - whether acpi is enabled > - whether a FW is loaded >=20 > But a FW can be loaded, acpi enabled and eventually the guest is DT > booted with acpi=3Doff in kernel opts. So let's say this configuration does not support the virtio-iommu at the moment. Is that a big deal? > Maybe at this point I could only support the case where no FW is loaded. > In machvirt I would not register the virtio-iommu-pci hotplug handler in > case a FW is loaded. Then I could get rid of the new x-dt-binding prop. >=20 > Thoughts? >=20 > Eric Also an option. > > See > > [PATCH 1/2] spapr: Disable legacy virtio devices for pseries-5.0 and la= ter > > [PATCH 2/2] spapr: Enable virtio iommu_platform=3Don by default > > which does it for spapr. >=20 > >=20 > >> --- > >> > >> May be squashed with previous patch > >> --- > >> hw/virtio/virtio-iommu-pci.c | 18 ++++++++++++++++++ > >> 1 file changed, 18 insertions(+) > >> > >> diff --git a/hw/virtio/virtio-iommu-pci.c b/hw/virtio/virtio-iommu-pci= .c > >> index d539fcce75..3d06e14000 100644 > >> --- a/hw/virtio/virtio-iommu-pci.c > >> +++ b/hw/virtio/virtio-iommu-pci.c > >> @@ -14,6 +14,7 @@ > >> #include "virtio-pci.h" > >> #include "hw/virtio/virtio-iommu.h" > >> #include "hw/qdev-properties.h" > >> +#include "qapi/error.h" > >> =20 > >> typedef struct VirtIOIOMMUPCI VirtIOIOMMUPCI; > >> =20 > >> @@ -27,10 +28,12 @@ typedef struct VirtIOIOMMUPCI VirtIOIOMMUPCI; > >> struct VirtIOIOMMUPCI { > >> VirtIOPCIProxy parent_obj; > >> VirtIOIOMMU vdev; > >> + bool dt_binding; > >> }; > >> =20 > >> static Property virtio_iommu_pci_properties[] =3D { > >> DEFINE_PROP_UINT32("class", VirtIOPCIProxy, class_code, 0), > >> + DEFINE_PROP_BOOL("x-dt-binding", VirtIOIOMMUPCI, dt_binding, fals= e), > >> DEFINE_PROP_END_OF_LIST(), > >> }; > >> =20 > >> @@ -39,6 +42,21 @@ static void virtio_iommu_pci_realize(VirtIOPCIProxy= *vpci_dev, Error **errp) > >> VirtIOIOMMUPCI *dev =3D VIRTIO_IOMMU_PCI(vpci_dev); > >> DeviceState *vdev =3D DEVICE(&dev->vdev); > >> =20 > >> + if (!dev->dt_binding) { > >> + error_setg(errp, > >> + "Instantiation currently only is possible if the m= achine " > >> + "creates device tree iommu-map bindings, ie. ACPI = is not " > >> + "yet supported"); > >> + error_append_hint(errp, "use -virtio-iommu-pci,x-dt-binding\n= "); > >> + return; > >> + } > >> + > >> + if (!qdev_get_machine_hotplug_handler(DEVICE(vpci_dev))) { > >> + error_setg(errp, > >> + "The machine does not implement a virtio-iommu-pci= hotplug " > >> + " handler that creates the device tree iommu-map b= indings"); > >> + return; > >> + } > >> qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); > >> object_property_set_link(OBJECT(dev), > >> OBJECT(pci_get_bus(&vpci_dev->pci_dev)), > >> --=20 > >> 2.20.1 > >=20