From: Anshuman Gupta <anshuman.gupta@intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: jani.nikula@intel.com, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 0/6] 3 display pipes combination system support
Date: Tue, 11 Feb 2020 22:34:13 +0530 [thread overview]
Message-ID: <20200211170412.GD3527@intel.com> (raw)
In-Reply-To: <20200211162613.GV13686@intel.com>
On 2020-02-11 at 18:26:13 +0200, Ville Syrjälä wrote:
> On Tue, Feb 11, 2020 at 09:39:37PM +0530, Anshuman Gupta wrote:
> > On 2020-02-07 at 18:15:31 +0200, Ville Syrjälä wrote:
> > > On Fri, Feb 07, 2020 at 07:50:36PM +0530, Anshuman Gupta wrote:
> > > > Updated version after rebase and fixing few comments.
> > > >
> > > > Anshuman Gupta (6):
> > > > drm/i915: Iterate over pipe and skip the disabled one
> > > > drm/i915: Remove (pipe == crtc->index) assumption
> > > > drm/i915: Fix broken transcoder err state
> > > > drm/i915: Fix wrongly populated plane possible_crtcs bit mask
> > > > drm/i915: Get right max plane stride
> > > > drm/i915: Add WARN_ON in intel_get_crtc_for_pipe()
> > >
> > > Another broken thing I realized recently is due to my
> > > commit ee34801cc0e8 ("drm/i915: Prefer to use the pipe to index the ddb
> > > entries")
> > >
> > > We either need to revert that or always pass s/num_pipes/I915_MAX_PIPES/
> > > to skl_ddb_allocation_overlaps() in skl_commit_modeset_enables().
> > > The latter may be nicer since I don't really want that silly 'i'
> > > usage back. Can you cook up a patch like that as well?
> > AFAIU entries[] may have holes inside it as its size is I915_MAX_PIPES,
> > though these holes are already initialized with zero and will not harm
> > skl_ddb_allocation_overlaps, is it good a idea to avoid these hole
> > as ignore_index bit mask ?
>
> skl_ddb_entries_overlap() should just ignore empty allocations.
> And that will anyway happen for any pipe that is not active. So we
> don't have to worry about any holes.
Thanks Ville for explanation.
Thanks,
Anshuman Gupta.
>
> --
> Ville Syrjälä
> Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2020-02-11 17:12 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20200207142042.19689-1-anshuman.gupta@intel.com>
[not found] ` <20200207161531.GL13686@intel.com>
2020-02-11 16:09 ` [Intel-gfx] [PATCH v2 0/6] 3 display pipes combination system support Anshuman Gupta
2020-02-11 16:26 ` Ville Syrjälä
2020-02-11 17:04 ` Anshuman Gupta [this message]
[not found] ` <20200207142042.19689-2-anshuman.gupta@intel.com>
[not found] ` <20200207144753.GH13686@intel.com>
2020-02-18 17:53 ` [Intel-gfx] [PATCH v2 1/6] drm/i915: Iterate over pipe and skip the disabled one Anshuman Gupta
2020-02-19 13:15 ` Ville Syrjälä
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20200211170412.GD3527@intel.com \
--to=anshuman.gupta@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=jani.nikula@intel.com \
--cc=ville.syrjala@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.