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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Jani Nikula <jani.nikula@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 1/8] drm/i915: Parametrize PFIT_PIPE
Date: Thu, 13 Feb 2020 17:00:19 +0200	[thread overview]
Message-ID: <20200213150019.GF13686@intel.com> (raw)
In-Reply-To: <87lfp7vgyw.fsf@intel.com>

On Wed, Feb 12, 2020 at 07:43:51PM +0200, Jani Nikula wrote:
> On Wed, 12 Feb 2020, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Make the PFIT_PIPE stuff less ugly via parametrization.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_panel.c | 3 +--
> >  drivers/gpu/drm/i915/i915_reg.h            | 1 +
> >  2 files changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
> > index cba2f1c2557f..8b0730f4c442 100644
> > --- a/drivers/gpu/drm/i915/display/intel_panel.c
> > +++ b/drivers/gpu/drm/i915/display/intel_panel.c
> > @@ -434,8 +434,7 @@ void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
> >  	/* 965+ wants fuzzy fitting */
> >  	/* FIXME: handle multiple panels by failing gracefully */
> >  	if (INTEL_GEN(dev_priv) >= 4)
> > -		pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
> > -				 PFIT_FILTER_FUZZY);
> > +		pfit_control |= PFIT_PIPE(intel_crtc->pipe) | PFIT_FILTER_FUZZY;
> >  
> >  out:
> >  	if ((pfit_control & PFIT_ENABLE) == 0) {
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index b09c1d6dc0aa..faf8945a51b0 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -4928,6 +4928,7 @@ enum {
> >  #define   PFIT_ENABLE		(1 << 31)
> >  #define   PFIT_PIPE_MASK	(3 << 29)
> >  #define   PFIT_PIPE_SHIFT	29
> > +#define   PFIT_PIPE(pipe)	((pipe) << 29)
> 
> This is fine, but might have as well defined this in terms of
> REG_FIELD_PREP. I especially like it for parametrized stuff because it
> ensures we don't flood the value outside the field.

Old patch, old tricks.

> 
> Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> 
> >  #define   VERT_INTERP_DISABLE	(0 << 10)
> >  #define   VERT_INTERP_BILINEAR	(1 << 10)
> >  #define   VERT_INTERP_MASK	(3 << 10)
> 
> -- 
> Jani Nikula, Intel Open Source Graphics Center

-- 
Ville Syrjälä
Intel
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  reply	other threads:[~2020-02-13 15:00 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-12 16:17 [Intel-gfx] [PATCH v2 0/8] drm/i915: pfit/scaler rework prep stuff Ville Syrjala
2020-02-12 16:17 ` [Intel-gfx] [PATCH v2 1/8] drm/i915: Parametrize PFIT_PIPE Ville Syrjala
2020-02-12 17:43   ` Jani Nikula
2020-02-13 15:00     ` Ville Syrjälä [this message]
2020-04-01 22:48     ` Manasi Navare
2020-04-02 13:55       ` Ville Syrjälä
2020-02-12 16:17 ` [Intel-gfx] [PATCH v2 2/8] drm/i915: Use intel_de_write_fw() for skl+ scaler registers Ville Syrjala
2020-02-12 17:47   ` Jani Nikula
2020-02-12 16:17 ` [Intel-gfx] [PATCH v2 3/8] drm/i915: Fix skl+ non-scaled pfit modes Ville Syrjala
2020-04-01 23:35   ` Manasi Navare
2020-02-12 16:17 ` [Intel-gfx] [PATCH v2 4/8] drm/i915: Flatten a bunch of the pfit functions Ville Syrjala
2020-04-01 23:53   ` Manasi Navare
2020-04-02 13:55     ` Ville Syrjälä
2020-04-21 23:32       ` Manasi Navare
2020-02-12 16:17 ` [Intel-gfx] [PATCH v2 5/8] drm/i915: Use drm_rect to store the pfit window pos/size Ville Syrjala
2020-02-12 16:17 ` [Intel-gfx] [PATCH v2 6/8] drm/i915: s/pipe_config/crtc_state/ in pfit functions Ville Syrjala
2020-02-12 16:17 ` [Intel-gfx] [PATCH v2 7/8] drm/i915: Pass connector state to pfit calculations Ville Syrjala
2020-02-12 16:17 ` [Intel-gfx] [PATCH v2 8/8] drm/i915: Have pfit calculations return an error code Ville Syrjala
2020-02-13  6:06 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: pfit/scaler rework prep stuff (rev2) Patchwork
2020-02-16 22:45 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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