diff for duplicates of <20200218073650.16149-5-aik@ozlabs.ru> diff --git a/a/1.txt b/N1/1.txt index 31bc750..756ef33 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,5 +1,5 @@ IODA2 systems (POWER8/9) allow DMA windows at 2 fixed locations - 0 and -0x800.0000.0000.0000=1<<59, stored in TVT as TVE0/1. PHB4 on POWER9 has +0x800.0000.0000.0000==1<<59, stored in TVT as TVE0/1. PHB4 on POWER9 has an additional PHB mode to allow mapping both windows at 0 and selecting one based on IOBA address - accesses below 4GB go via TVE0 and above 4GB - via TVE1; it is called TVT Select 'GTE4GB' Option in PHB4. @@ -136,7 +136,8 @@ index f5f1b4e25530..74b4ac8cb71d 100644 + PNV_IOMMU_TCE_BYPASS +}; + -+static enum pnv_iommu_bypass_mode pnv_iommu_bypass_mode __read_mostly + PNV_IOMMU_NO_TRANSLATE; ++static enum pnv_iommu_bypass_mode pnv_iommu_bypass_mode __read_mostly = ++ PNV_IOMMU_NO_TRANSLATE; static bool pci_reset_phbs __read_mostly; static int __init iommu_setup(char *str) @@ -154,7 +155,7 @@ index f5f1b4e25530..74b4ac8cb71d 100644 + break; } str += strcspn(str, ","); - if (*str = ',') + if (*str == ',') @@ -2351,28 +2366,125 @@ static long pnv_pci_ioda2_set_window(struct iommu_table_group *table_group, return 0; } @@ -236,7 +237,7 @@ index f5f1b4e25530..74b4ac8cb71d 100644 + * Whether it was bypass or iommu bypass, this will write + * a zero to TVE and disable the window; + * opal_pci_map_pe_dma_window() does the same thing when -+ * tce_table_size=0. ++ * tce_table_size==0. + */ + rc = opal_pci_map_pe_dma_window_real(phb->opal_id, + pe->pe_number, window_id, 0, 0); @@ -256,7 +257,7 @@ index f5f1b4e25530..74b4ac8cb71d 100644 + return; + } + -+ if (pnv_iommu_bypass_mode = PNV_IOMMU_TCE_BYPASS) { ++ if (pnv_iommu_bypass_mode == PNV_IOMMU_TCE_BYPASS) { + if (!opal_phb_set_option(phb->opal_id, + OPAL_PHB_OPTION_TVE1_4GB, 1)) { + pe->table_group.tce64_start = SZ_4G; @@ -274,7 +275,7 @@ index f5f1b4e25530..74b4ac8cb71d 100644 + } + } + -+ if (pnv_iommu_bypass_mode = PNV_IOMMU_NO_TRANSLATE) { ++ if (pnv_iommu_bypass_mode == PNV_IOMMU_NO_TRANSLATE) { + /* + * FIXME: if we enable dynamic switch, here we need to disable + * OPAL_PCI_PHB_FLAG_TVE1_4GB @@ -315,7 +316,7 @@ index f5f1b4e25530..74b4ac8cb71d 100644 + * If we get TVE#1_4GB on, there is no point in having a huge default + * DMA window. + */ -+ if (pnv_iommu_bypass_mode = PNV_IOMMU_TCE_BYPASS) ++ if (pnv_iommu_bypass_mode == PNV_IOMMU_TCE_BYPASS) + window_size = min_t(u64, pe->table_group.tce32_size, + window_size); + @@ -346,7 +347,7 @@ index f5f1b4e25530..74b4ac8cb71d 100644 + long ret; - if (!ret) -+ if (bus_offset = SZ_4G) ++ if (bus_offset == SZ_4G) + ret = pnv_pci_ioda2_create_table(pe->phb->hose->node, + num, 0, page_shift, + roundup_pow_of_two(window_size + bus_offset), diff --git a/a/content_digest b/N1/content_digest index 799c8bf..a74df6b 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,7 +1,7 @@ "ref\020200218073650.16149-1-aik@ozlabs.ru\0" "From\0Alexey Kardashevskiy <aik@ozlabs.ru>\0" "Subject\0[PATCH kernel 4/5] powerpc/powernv/phb4: Add 4GB IOMMU bypass mode\0" - "Date\0Tue, 18 Feb 2020 07:36:49 +0000\0" + "Date\0Tue, 18 Feb 2020 18:36:49 +1100\0" "To\0linuxppc-dev@lists.ozlabs.org\0" "Cc\0Alexey Kardashevskiy <aik@ozlabs.ru>" Alistair Popple <alistair@popple.id.au> @@ -11,7 +11,7 @@ "\00:1\0" "b\0" "IODA2 systems (POWER8/9) allow DMA windows at 2 fixed locations - 0 and\n" - "0x800.0000.0000.0000=1<<59, stored in TVT as TVE0/1. PHB4 on POWER9 has\n" + "0x800.0000.0000.0000==1<<59, stored in TVT as TVE0/1. PHB4 on POWER9 has\n" "an additional PHB mode to allow mapping both windows at 0 and selecting\n" "one based on IOBA address - accesses below 4GB go via TVE0 and above\n" "4GB - via TVE1; it is called TVT Select 'GTE4GB' Option in PHB4.\n" @@ -148,7 +148,8 @@ "+\tPNV_IOMMU_TCE_BYPASS\n" "+};\n" "+\n" - "+static enum pnv_iommu_bypass_mode pnv_iommu_bypass_mode __read_mostly +\t\tPNV_IOMMU_NO_TRANSLATE;\n" + "+static enum pnv_iommu_bypass_mode pnv_iommu_bypass_mode __read_mostly =\n" + "+\t\tPNV_IOMMU_NO_TRANSLATE;\n" " static bool pci_reset_phbs __read_mostly;\n" " \n" " static int __init iommu_setup(char *str)\n" @@ -166,7 +167,7 @@ "+\t\t\tbreak;\n" " \t\t}\n" " \t\tstr += strcspn(str, \",\");\n" - " \t\tif (*str = ',')\n" + " \t\tif (*str == ',')\n" "@@ -2351,28 +2366,125 @@ static long pnv_pci_ioda2_set_window(struct iommu_table_group *table_group,\n" " \treturn 0;\n" " }\n" @@ -248,7 +249,7 @@ "+\t\t * Whether it was bypass or iommu bypass, this will write\n" "+\t\t * a zero to TVE and disable the window;\n" "+\t\t * opal_pci_map_pe_dma_window() does the same thing when\n" - "+\t\t * tce_table_size=0.\n" + "+\t\t * tce_table_size==0.\n" "+\t\t */\n" "+\t\trc = opal_pci_map_pe_dma_window_real(phb->opal_id,\n" "+\t\t\t\tpe->pe_number, window_id, 0, 0);\n" @@ -268,7 +269,7 @@ "+\t\treturn;\n" "+\t}\n" "+\n" - "+\tif (pnv_iommu_bypass_mode = PNV_IOMMU_TCE_BYPASS) {\n" + "+\tif (pnv_iommu_bypass_mode == PNV_IOMMU_TCE_BYPASS) {\n" "+\t\tif (!opal_phb_set_option(phb->opal_id,\n" "+\t\t\t\t\tOPAL_PHB_OPTION_TVE1_4GB, 1)) {\n" "+\t\t\tpe->table_group.tce64_start = SZ_4G;\n" @@ -286,7 +287,7 @@ "+\t\t}\n" "+\t}\n" "+\n" - "+\tif (pnv_iommu_bypass_mode = PNV_IOMMU_NO_TRANSLATE) {\n" + "+\tif (pnv_iommu_bypass_mode == PNV_IOMMU_NO_TRANSLATE) {\n" "+\t\t/*\n" "+\t\t * FIXME: if we enable dynamic switch, here we need to disable\n" "+\t\t * OPAL_PCI_PHB_FLAG_TVE1_4GB\n" @@ -327,7 +328,7 @@ "+\t * If we get TVE#1_4GB on, there is no point in having a huge default\n" "+\t * DMA window.\n" "+\t */\n" - "+\tif (pnv_iommu_bypass_mode = PNV_IOMMU_TCE_BYPASS)\n" + "+\tif (pnv_iommu_bypass_mode == PNV_IOMMU_TCE_BYPASS)\n" "+\t\twindow_size = min_t(u64, pe->table_group.tce32_size,\n" "+\t\t\t\twindow_size);\n" "+\n" @@ -358,7 +359,7 @@ "+\tlong ret;\n" " \n" "-\tif (!ret)\n" - "+\tif (bus_offset = SZ_4G)\n" + "+\tif (bus_offset == SZ_4G)\n" "+\t\tret = pnv_pci_ioda2_create_table(pe->phb->hose->node,\n" "+\t\t\t\tnum, 0, page_shift,\n" "+\t\t\t\troundup_pow_of_two(window_size + bus_offset),\n" @@ -390,4 +391,4 @@ "-- \n" 2.17.1 -99f6260b8aadeddd9209e75be6252bfdba73030404b3d283fdb3e7faf9168ef3 +a60e46c710f41ed87602161af20655391229a10de3158a70660e9b5626e7ac31
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.