From: kbuild test robot <lkp@intel.com>
To: kbuild-all@lists.01.org
Subject: Re: [PATCH] KVM: x86: avoid incorrect writes to host MSR_IA32_SPEC_CTRL
Date: Tue, 18 Feb 2020 15:11:00 +0800 [thread overview]
Message-ID: <202002181536.Fn44AD57%lkp@intel.com> (raw)
In-Reply-To: <1579614487-44583-3-git-send-email-pbonzini@redhat.com>
[-- Attachment #1: Type: text/plain, Size: 11027 bytes --]
Hi Paolo,
I love your patch! Perhaps something to improve:
[auto build test WARNING on tip/auto-latest]
[also build test WARNING on linux/master]
[cannot apply to kvm/linux-next linus/master v5.6-rc2 next-20200217]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
url: https://github.com/0day-ci/linux/commits/Paolo-Bonzini/KVM-x86-avoid-incorrect-writes-to-host-MSR_IA32_SPEC_CTRL/20200124-083109
base: https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git 1e53251a964b1875f82a071c0b59d135dd0cc563
config: x86_64-lkp (attached as .config)
compiler: gcc-7 (Debian 7.5.0-3) 7.5.0
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
arch/x86/kvm/vmx/vmx.c: In function 'vmx_set_msr':
>> arch/x86/kvm/vmx/vmx.c:1997:14: warning: '~' on a boolean expression [-Wbool-operation]
if (data & ~kvm_spec_ctrl_valid_bits(vcpu))
^
arch/x86/kvm/vmx/vmx.c:1997:14: note: did you mean to use logical not?
if (data & ~kvm_spec_ctrl_valid_bits(vcpu))
^
!
vim +1997 arch/x86/kvm/vmx/vmx.c
1917
1918 /*
1919 * Writes msr value into into the appropriate "register".
1920 * Returns 0 on success, non-0 otherwise.
1921 * Assumes vcpu_load() was already called.
1922 */
1923 static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1924 {
1925 struct vcpu_vmx *vmx = to_vmx(vcpu);
1926 struct shared_msr_entry *msr;
1927 int ret = 0;
1928 u32 msr_index = msr_info->index;
1929 u64 data = msr_info->data;
1930 u32 index;
1931
1932 switch (msr_index) {
1933 case MSR_EFER:
1934 ret = kvm_set_msr_common(vcpu, msr_info);
1935 break;
1936 #ifdef CONFIG_X86_64
1937 case MSR_FS_BASE:
1938 vmx_segment_cache_clear(vmx);
1939 vmcs_writel(GUEST_FS_BASE, data);
1940 break;
1941 case MSR_GS_BASE:
1942 vmx_segment_cache_clear(vmx);
1943 vmcs_writel(GUEST_GS_BASE, data);
1944 break;
1945 case MSR_KERNEL_GS_BASE:
1946 vmx_write_guest_kernel_gs_base(vmx, data);
1947 break;
1948 #endif
1949 case MSR_IA32_SYSENTER_CS:
1950 if (is_guest_mode(vcpu))
1951 get_vmcs12(vcpu)->guest_sysenter_cs = data;
1952 vmcs_write32(GUEST_SYSENTER_CS, data);
1953 break;
1954 case MSR_IA32_SYSENTER_EIP:
1955 if (is_guest_mode(vcpu))
1956 get_vmcs12(vcpu)->guest_sysenter_eip = data;
1957 vmcs_writel(GUEST_SYSENTER_EIP, data);
1958 break;
1959 case MSR_IA32_SYSENTER_ESP:
1960 if (is_guest_mode(vcpu))
1961 get_vmcs12(vcpu)->guest_sysenter_esp = data;
1962 vmcs_writel(GUEST_SYSENTER_ESP, data);
1963 break;
1964 case MSR_IA32_DEBUGCTLMSR:
1965 if (is_guest_mode(vcpu) && get_vmcs12(vcpu)->vm_exit_controls &
1966 VM_EXIT_SAVE_DEBUG_CONTROLS)
1967 get_vmcs12(vcpu)->guest_ia32_debugctl = data;
1968
1969 ret = kvm_set_msr_common(vcpu, msr_info);
1970 break;
1971
1972 case MSR_IA32_BNDCFGS:
1973 if (!kvm_mpx_supported() ||
1974 (!msr_info->host_initiated &&
1975 !guest_cpuid_has(vcpu, X86_FEATURE_MPX)))
1976 return 1;
1977 if (is_noncanonical_address(data & PAGE_MASK, vcpu) ||
1978 (data & MSR_IA32_BNDCFGS_RSVD))
1979 return 1;
1980 vmcs_write64(GUEST_BNDCFGS, data);
1981 break;
1982 case MSR_IA32_UMWAIT_CONTROL:
1983 if (!msr_info->host_initiated && !vmx_has_waitpkg(vmx))
1984 return 1;
1985
1986 /* The reserved bit 1 and non-32 bit [63:32] should be zero */
1987 if (data & (BIT_ULL(1) | GENMASK_ULL(63, 32)))
1988 return 1;
1989
1990 vmx->msr_ia32_umwait_control = data;
1991 break;
1992 case MSR_IA32_SPEC_CTRL:
1993 if (!msr_info->host_initiated &&
1994 !guest_cpuid_has(vcpu, X86_FEATURE_SPEC_CTRL))
1995 return 1;
1996
> 1997 if (data & ~kvm_spec_ctrl_valid_bits(vcpu))
1998 return 1;
1999
2000 vmx->spec_ctrl = data;
2001 if (!data)
2002 break;
2003
2004 /*
2005 * For non-nested:
2006 * When it's written (to non-zero) for the first time, pass
2007 * it through.
2008 *
2009 * For nested:
2010 * The handling of the MSR bitmap for L2 guests is done in
2011 * nested_vmx_merge_msr_bitmap. We should not touch the
2012 * vmcs02.msr_bitmap here since it gets completely overwritten
2013 * in the merging. We update the vmcs01 here for L1 as well
2014 * since it will end up touching the MSR anyway now.
2015 */
2016 vmx_disable_intercept_for_msr(vmx->vmcs01.msr_bitmap,
2017 MSR_IA32_SPEC_CTRL,
2018 MSR_TYPE_RW);
2019 break;
2020 case MSR_IA32_TSX_CTRL:
2021 if (!msr_info->host_initiated &&
2022 !(vcpu->arch.arch_capabilities & ARCH_CAP_TSX_CTRL_MSR))
2023 return 1;
2024 if (data & ~(TSX_CTRL_RTM_DISABLE | TSX_CTRL_CPUID_CLEAR))
2025 return 1;
2026 goto find_shared_msr;
2027 case MSR_IA32_PRED_CMD:
2028 if (!msr_info->host_initiated &&
2029 !guest_cpuid_has(vcpu, X86_FEATURE_SPEC_CTRL))
2030 return 1;
2031
2032 if (data & ~PRED_CMD_IBPB)
2033 return 1;
2034 if (!boot_cpu_has(X86_FEATURE_SPEC_CTRL))
2035 return 1;
2036 if (!data)
2037 break;
2038
2039 wrmsrl(MSR_IA32_PRED_CMD, PRED_CMD_IBPB);
2040
2041 /*
2042 * For non-nested:
2043 * When it's written (to non-zero) for the first time, pass
2044 * it through.
2045 *
2046 * For nested:
2047 * The handling of the MSR bitmap for L2 guests is done in
2048 * nested_vmx_merge_msr_bitmap. We should not touch the
2049 * vmcs02.msr_bitmap here since it gets completely overwritten
2050 * in the merging.
2051 */
2052 vmx_disable_intercept_for_msr(vmx->vmcs01.msr_bitmap, MSR_IA32_PRED_CMD,
2053 MSR_TYPE_W);
2054 break;
2055 case MSR_IA32_CR_PAT:
2056 if (!kvm_pat_valid(data))
2057 return 1;
2058
2059 if (is_guest_mode(vcpu) &&
2060 get_vmcs12(vcpu)->vm_exit_controls & VM_EXIT_SAVE_IA32_PAT)
2061 get_vmcs12(vcpu)->guest_ia32_pat = data;
2062
2063 if (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_IA32_PAT) {
2064 vmcs_write64(GUEST_IA32_PAT, data);
2065 vcpu->arch.pat = data;
2066 break;
2067 }
2068 ret = kvm_set_msr_common(vcpu, msr_info);
2069 break;
2070 case MSR_IA32_TSC_ADJUST:
2071 ret = kvm_set_msr_common(vcpu, msr_info);
2072 break;
2073 case MSR_IA32_MCG_EXT_CTL:
2074 if ((!msr_info->host_initiated &&
2075 !(to_vmx(vcpu)->msr_ia32_feature_control &
2076 FEAT_CTL_LMCE_ENABLED)) ||
2077 (data & ~MCG_EXT_CTL_LMCE_EN))
2078 return 1;
2079 vcpu->arch.mcg_ext_ctl = data;
2080 break;
2081 case MSR_IA32_FEAT_CTL:
2082 if (!vmx_feature_control_msr_valid(vcpu, data) ||
2083 (to_vmx(vcpu)->msr_ia32_feature_control &
2084 FEAT_CTL_LOCKED && !msr_info->host_initiated))
2085 return 1;
2086 vmx->msr_ia32_feature_control = data;
2087 if (msr_info->host_initiated && data == 0)
2088 vmx_leave_nested(vcpu);
2089 break;
2090 case MSR_IA32_VMX_BASIC ... MSR_IA32_VMX_VMFUNC:
2091 if (!msr_info->host_initiated)
2092 return 1; /* they are read-only */
2093 if (!nested_vmx_allowed(vcpu))
2094 return 1;
2095 return vmx_set_vmx_msr(vcpu, msr_index, data);
2096 case MSR_IA32_RTIT_CTL:
2097 if ((pt_mode != PT_MODE_HOST_GUEST) ||
2098 vmx_rtit_ctl_check(vcpu, data) ||
2099 vmx->nested.vmxon)
2100 return 1;
2101 vmcs_write64(GUEST_IA32_RTIT_CTL, data);
2102 vmx->pt_desc.guest.ctl = data;
2103 pt_update_intercept_for_msr(vmx);
2104 break;
2105 case MSR_IA32_RTIT_STATUS:
2106 if ((pt_mode != PT_MODE_HOST_GUEST) ||
2107 (vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN) ||
2108 (data & MSR_IA32_RTIT_STATUS_MASK))
2109 return 1;
2110 vmx->pt_desc.guest.status = data;
2111 break;
2112 case MSR_IA32_RTIT_CR3_MATCH:
2113 if ((pt_mode != PT_MODE_HOST_GUEST) ||
2114 (vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN) ||
2115 !intel_pt_validate_cap(vmx->pt_desc.caps,
2116 PT_CAP_cr3_filtering))
2117 return 1;
2118 vmx->pt_desc.guest.cr3_match = data;
2119 break;
2120 case MSR_IA32_RTIT_OUTPUT_BASE:
2121 if ((pt_mode != PT_MODE_HOST_GUEST) ||
2122 (vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN) ||
2123 (!intel_pt_validate_cap(vmx->pt_desc.caps,
2124 PT_CAP_topa_output) &&
2125 !intel_pt_validate_cap(vmx->pt_desc.caps,
2126 PT_CAP_single_range_output)) ||
2127 (data & MSR_IA32_RTIT_OUTPUT_BASE_MASK))
2128 return 1;
2129 vmx->pt_desc.guest.output_base = data;
2130 break;
2131 case MSR_IA32_RTIT_OUTPUT_MASK:
2132 if ((pt_mode != PT_MODE_HOST_GUEST) ||
2133 (vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN) ||
2134 (!intel_pt_validate_cap(vmx->pt_desc.caps,
2135 PT_CAP_topa_output) &&
2136 !intel_pt_validate_cap(vmx->pt_desc.caps,
2137 PT_CAP_single_range_output)))
2138 return 1;
2139 vmx->pt_desc.guest.output_mask = data;
2140 break;
2141 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
2142 index = msr_info->index - MSR_IA32_RTIT_ADDR0_A;
2143 if ((pt_mode != PT_MODE_HOST_GUEST) ||
2144 (vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN) ||
2145 (index >= 2 * intel_pt_validate_cap(vmx->pt_desc.caps,
2146 PT_CAP_num_address_ranges)))
2147 return 1;
2148 if (index % 2)
2149 vmx->pt_desc.guest.addr_b[index / 2] = data;
2150 else
2151 vmx->pt_desc.guest.addr_a[index / 2] = data;
2152 break;
2153 case MSR_TSC_AUX:
2154 if (!msr_info->host_initiated &&
2155 !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP))
2156 return 1;
2157 /* Check reserved bit, higher 32 bits should be zero */
2158 if ((data >> 32) != 0)
2159 return 1;
2160 goto find_shared_msr;
2161
2162 default:
2163 find_shared_msr:
2164 msr = find_msr_entry(vmx, msr_index);
2165 if (msr)
2166 ret = vmx_set_guest_msr(vmx, msr, data);
2167 else
2168 ret = kvm_set_msr_common(vcpu, msr_info);
2169 }
2170
2171 return ret;
2172 }
2173
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
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prev parent reply other threads:[~2020-02-18 7:11 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-21 13:48 [PATCH] KVM: x86: avoid incorrect writes to host MSR_IA32_SPEC_CTRL Paolo Bonzini
2020-01-24 8:00 ` Xiaoyao Li
2020-01-24 8:22 ` Paolo Bonzini
2020-01-25 1:32 ` kbuild test robot
2020-02-18 7:11 ` kbuild test robot [this message]
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