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From: Ye Xiaolong <xiaolong.ye@intel.com>
To: Guinan Sun <guinanx.sun@intel.com>
Cc: dev@dpdk.org, Wenzhuo Lu <wenzhuo.lu@intel.com>,
	Qiming Yang <qiming.yang@intel.com>,
	Qi Zhang <qi.z.zhang@intel.com>,
	stable@dpdk.org
Subject: Re: [dpdk-dev] [PATCH v4] net/ixgbe: fix flow ctrl mode setting
Date: Wed, 19 Feb 2020 15:06:15 +0800	[thread overview]
Message-ID: <20200219070615.GA36983@intel.com> (raw)
In-Reply-To: <20200218033931.81821-1-guinanx.sun@intel.com>

On 02/18, Guinan Sun wrote:
>When the port starts, the hw register is reset first,
>and then the required parameters are set again.
>If the parameters to be used are not set after resetting the register,
>a read register error will occur. This patch is used to fix the problem.
>
>Fixes: af75078fece3 ("first public release")
>Cc: stable@dpdk.org
>
>Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
>---
>v4: changes
>* rebase to dpdk-next-net-intel
>
>v3: changes
>* wrap duplication code into a function
>* Modify checkpatch warnings
>
>v2: changes
>* Modify the initial value of requested_mode and current_mode
>---
> drivers/net/ixgbe/ixgbe_ethdev.c | 76 +++++++++++++++++++++-----------
> drivers/net/ixgbe/ixgbe_ethdev.h |  1 +
> 2 files changed, 51 insertions(+), 26 deletions(-)
>
>diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c
>index 3aab24e82..08b4cc689 100644
>--- a/drivers/net/ixgbe/ixgbe_ethdev.c
>+++ b/drivers/net/ixgbe/ixgbe_ethdev.c
>@@ -1176,8 +1176,8 @@ eth_ixgbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused)
> 	memset(dcb_config, 0, sizeof(struct ixgbe_dcb_config));
> 	ixgbe_dcb_init(hw, dcb_config);
> 	/* Get Hardware Flow Control setting */
>-	hw->fc.requested_mode = ixgbe_fc_full;
>-	hw->fc.current_mode = ixgbe_fc_full;
>+	hw->fc.requested_mode = ixgbe_fc_none;
>+	hw->fc.current_mode = ixgbe_fc_none;
> 	hw->fc.pause_time = IXGBE_FC_PAUSE;
> 	for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) {
> 		hw->fc.low_water[i] = IXGBE_FC_LO;
>@@ -2538,6 +2538,39 @@ ixgbe_set_vf_rate_limit(struct rte_eth_dev *dev, uint16_t vf,
> 	return 0;
> }
> 
>+static int
>+ixgbe_flow_ctrl_enable(struct rte_eth_dev *dev, struct ixgbe_hw *hw)
>+{
>+	struct ixgbe_adapter *adapter = dev->data->dev_private;
>+	int err;
>+	uint32_t mflcn;
>+
>+	err = ixgbe_fc_enable(hw);
>+
>+	/* Not negotiated is not an error case */
>+	if (err == IXGBE_SUCCESS || err == IXGBE_ERR_FC_NOT_NEGOTIATED) {
>+		/*
>+		 *check if we want to forward MAC frames - driver doesn't
>+		 *have native capability to do that,
>+		 *so we'll write the registers ourselves
>+		 */
>+
>+		mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
>+
>+		/* set or clear MFLCN.PMCF bit depending on configuration */
>+		if (adapter->mac_ctrl_frame_fwd != 0)
>+			mflcn |= IXGBE_MFLCN_PMCF;
>+		else
>+			mflcn &= ~IXGBE_MFLCN_PMCF;
>+
>+		IXGBE_WRITE_REG(hw, IXGBE_MFLCN, mflcn);
>+		IXGBE_WRITE_FLUSH(hw);
>+
>+		return 0;
>+	}
>+	return err;
>+}
>+
> /*
>  * Configure device link speed and setup link.
>  * It returns 0 on success.
>@@ -2664,6 +2697,12 @@ ixgbe_dev_start(struct rte_eth_dev *dev)
> 
> 	ixgbe_restore_statistics_mapping(dev);
> 
>+	err = ixgbe_flow_ctrl_enable(dev, hw);
>+	if (err < 0) {
>+		PMD_INIT_LOG(ERR, "enable flow ctrl err");
>+		goto error;
>+	}
>+
> 	err = ixgbe_dev_rxtx_start(dev);
> 	if (err < 0) {
> 		PMD_INIT_LOG(ERR, "Unable to start rxtx queues");
>@@ -2900,6 +2939,8 @@ ixgbe_dev_stop(struct rte_eth_dev *dev)
> 
> 	adapter->rss_reta_updated = 0;
> 
>+	adapter->mac_ctrl_frame_fwd = 0;
>+
> 	hw->adapter_stopped = true;
> }
> 
>@@ -4718,10 +4759,10 @@ static int
> ixgbe_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
> {
> 	struct ixgbe_hw *hw;
>+	struct ixgbe_adapter *adapter = dev->data->dev_private;
> 	int err;
> 	uint32_t rx_buf_size;
> 	uint32_t max_high_water;
>-	uint32_t mflcn;
> 	enum ixgbe_fc_mode rte_fcmode_2_ixgbe_fcmode[] = {
> 		ixgbe_fc_none,
> 		ixgbe_fc_rx_pause,
>@@ -4754,31 +4795,14 @@ ixgbe_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
> 	hw->fc.low_water[0]   = fc_conf->low_water;
> 	hw->fc.send_xon       = fc_conf->send_xon;
> 	hw->fc.disable_fc_autoneg = !fc_conf->autoneg;
>+	adapter->mac_ctrl_frame_fwd = fc_conf->mac_ctrl_frame_fwd;
> 
>-	err = ixgbe_fc_enable(hw);
>-
>-	/* Not negotiated is not an error case */
>-	if ((err == IXGBE_SUCCESS) || (err == IXGBE_ERR_FC_NOT_NEGOTIATED)) {
>-
>-		/* check if we want to forward MAC frames - driver doesn't have native
>-		 * capability to do that, so we'll write the registers ourselves */
>-
>-		mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
>-
>-		/* set or clear MFLCN.PMCF bit depending on configuration */
>-		if (fc_conf->mac_ctrl_frame_fwd != 0)
>-			mflcn |= IXGBE_MFLCN_PMCF;
>-		else
>-			mflcn &= ~IXGBE_MFLCN_PMCF;
>-
>-		IXGBE_WRITE_REG(hw, IXGBE_MFLCN, mflcn);
>-		IXGBE_WRITE_FLUSH(hw);
>-
>-		return 0;
>+	err = ixgbe_flow_ctrl_enable(dev, hw);
>+	if (err < 0) {
>+		PMD_INIT_LOG(ERR, "ixgbe_flow_ctrl_enable = 0x%x", err);
>+		return -EIO;
> 	}
>-
>-	PMD_INIT_LOG(ERR, "ixgbe_fc_enable = 0x%x", err);
>-	return -EIO;
>+	return err;
> }
> 
> /**
>diff --git a/drivers/net/ixgbe/ixgbe_ethdev.h b/drivers/net/ixgbe/ixgbe_ethdev.h
>index 5089347a7..b8df75657 100644
>--- a/drivers/net/ixgbe/ixgbe_ethdev.h
>+++ b/drivers/net/ixgbe/ixgbe_ethdev.h
>@@ -511,6 +511,7 @@ struct ixgbe_adapter {
> 	 * mailbox status) link status.
> 	 */
> 	uint8_t pflink_fullchk;
>+	uint8_t mac_ctrl_frame_fwd;
> 	rte_atomic32_t link_thread_running;
> 	pthread_t link_thread_tid;
> };
>-- 
>2.17.1
>

Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>

Applied to dpdk-next-net-intel, Thanks.

  parent reply	other threads:[~2020-02-19  7:08 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-19  4:43 [dpdk-dev] [PATCH] net/ixgbe: fix flow ctrl mode setting Sun GuinanX
2019-12-19 10:17 ` [dpdk-dev] [PATCH v2] " Guinan Sun
2020-02-01 13:12   ` Ye Xiaolong
2020-02-17  7:51 ` [dpdk-dev] [PATCH v3] " Guinan Sun
2020-02-18  3:39 ` [dpdk-dev] [PATCH v4] " Guinan Sun
2020-02-18  9:21   ` Konieczny, TomaszX
2020-02-19  7:06   ` Ye Xiaolong [this message]
2020-02-19 12:44     ` Konieczny, TomaszX
2020-02-19 15:27       ` Ye Xiaolong
2020-05-09  7:34   ` Zhao1, Wei
2020-05-09  8:54     ` Sun, GuinanX
2020-05-09  9:30       ` Zhao1, Wei
2020-05-09  9:48         ` Sun, GuinanX
2020-05-09  9:49       ` Zhao1, Wei

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