From: Andrew Lunn <andrew@lunn.ch>
To: Florian Fainelli <f.fainelli@gmail.com>
Cc: netdev@vger.kernel.org, Heiner Kallweit <hkallweit1@gmail.com>,
Russell King <linux@armlinux.org.uk>,
"David S. Miller" <davem@davemloft.net>,
open list <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH net-next v2 2/3] net: phy: broadcom: Have bcm54xx_adjust_rxrefclk() check for flags
Date: Wed, 19 Feb 2020 21:20:06 +0100 [thread overview]
Message-ID: <20200219202006.GY31084@lunn.ch> (raw)
In-Reply-To: <20200219200049.12512-3-f.fainelli@gmail.com>
On Wed, Feb 19, 2020 at 12:00:48PM -0800, Florian Fainelli wrote:
> bcm54xx_adjust_rxrefclk() already checks for PHY_BRCM_AUTO_PWRDWN_ENABLE
> and PHY_BRCM_DIS_TXCRXC_NOENRGY in order to set the appropriate bit. The
> situation is a bit more complicated with the flag
> PHY_BRCM_RX_REFCLK_UNUSED but essentially amounts to the same situation.
>
> The default setting for the 125MHz clock is to be on for all PHYs and
> we still treat BCM50610 and BCM50610M specifically with the polarity of
> the bit reversed.
>
> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Andrew
next prev parent reply other threads:[~2020-02-19 20:20 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-19 20:00 [PATCH net-next v2 0/3] net: phy: Better support for BCM54810 Florian Fainelli
2020-02-19 20:00 ` [PATCH net-next v2 1/3] net: phy: broadcom: Allow BCM54810 to use bcm54xx_adjust_rxrefclk() Florian Fainelli
2020-02-19 20:00 ` [PATCH net-next v2 2/3] net: phy: broadcom: Have bcm54xx_adjust_rxrefclk() check for flags Florian Fainelli
2020-02-19 20:20 ` Andrew Lunn [this message]
2020-02-19 20:00 ` [PATCH net-next v2 3/3] net: phy: broadcom: Wire suspend/resume for BCM54810 Florian Fainelli
2020-02-20 0:37 ` [PATCH net-next v2 0/3] net: phy: Better support " David Miller
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