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From: "Michael S. Tsirkin" <mst@redhat.com>
To: Stefan Hajnoczi <stefanha@redhat.com>
Cc: kvm@vger.kernel.org, jasowang@redhat.com, cohuck@redhat.com,
	slp@redhat.com, felipe@nutanix.com, john.g.johnson@oracle.com,
	robert.bradford@intel.com, Dan Horobeanu <dhr@amazon.com>,
	Stephen Barber <smbarber@chromium.org>,
	Peter Shier <pshier@google.com>
Subject: Re: Proposal for MMIO/PIO dispatch file descriptors (ioregionfd)
Date: Tue, 25 Feb 2020 06:57:18 -0500	[thread overview]
Message-ID: <20200225065034-mutt-send-email-mst@kernel.org> (raw)
In-Reply-To: <20200225092434.GD4178@stefanha-x1.localdomain>

On Tue, Feb 25, 2020 at 09:24:34AM +0000, Stefan Hajnoczi wrote:
> On Mon, Feb 24, 2020 at 12:10:25PM -0500, Michael S. Tsirkin wrote:
> > On Sat, Feb 22, 2020 at 08:19:16PM +0000, Stefan Hajnoczi wrote:
> > > The KVM_IOREGIONFD_POSTED_WRITES flag
> > > skips waiting for an acknowledgement on write accesses.  This is
> > > suitable for accesses that do not require synchronous emulation, such as
> > > doorbell register writes.
> > 
> > I would avoid hacks like this until we understand this better.
> > Specificlly one needs to be very careful since memory ordering semantics
> > can differ between a write into an uncacheable range and host writes into
> > a data structure. Reads from one region are also assumed to be ordered with
> > writes to another region, and drivers are known to make assumptions
> > like this.
> > 
> > Memory ordering being what it is, this isn't a field I'd be comfortable
> > device writes know what they are doing.
> 
> Unlike PCI Posted Writes the idea is not to let the write operations sit
> in a cache.  They will be sent immediately just like ioeventfd is
> signalled immediately before re-entering the guest.

But ioeventfd sits in the cache: the internal counter. The fact it's
signalled does not force a barrier on the signalling thread.  It looks
like the same happens here: value is saved with the file descriptor,
other accesses of the same device can bypass the write.

> The purpose of this feature is to let the device emulation program
> handle these writes asynchronously (without holding up the vCPU for a
> response from the device emulation program) but the order of
> reads/writes remains unchanged.
> 
> Stefan

I don't see how this can be implemented without guest changes though.
For example, how do you make sure two writes to such regions are ordered
just like they are on PCI?

-- 
MST


  reply	other threads:[~2020-02-25 11:57 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-22 20:19 Proposal for MMIO/PIO dispatch file descriptors (ioregionfd) Stefan Hajnoczi
2020-02-24 16:14 ` Christophe de Dinechin
2020-02-24 17:43   ` Stefan Hajnoczi
2020-02-24 17:10 ` Michael S. Tsirkin
2020-02-25  9:24   ` Stefan Hajnoczi
2020-02-25 11:57     ` Michael S. Tsirkin [this message]
2020-02-25 16:36       ` Stefan Hajnoczi
2020-02-25 12:19 ` Felipe Franciosi
2020-02-25 12:30   ` Felipe Franciosi
2020-02-25 16:47     ` Stefan Hajnoczi
2020-02-25 16:45   ` Stefan Hajnoczi

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