diff for duplicates of <20200228084651.1ad0e334@collabora.com>

diff --git a/a/1.txt b/N1/1.txt
index daf8922..33880b8 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,6 +1,6 @@
 On Fri, 28 Feb 2020 12:11:09 +0800
 "Ramuthevar, Vadivel MuruganX"
-<vadivel.muruganx.ramuthevar@linux.intel.com> wrote:
+<vadivel.muruganx.ramuthevar-VuQAYsv1563Yd54FQh9/CA@public.gmane.org> wrote:
 
 > Hi Boris,
 > 
@@ -9,9 +9,9 @@ On Fri, 28 Feb 2020 12:11:09 +0800
 > On 28/2/2020 1:30 AM, Boris Brezillon wrote:
 > > On Thu, 27 Feb 2020 14:27:08 +0800
 > > "Ramuthevar, Vadivel MuruganX"
-> > <vadivel.muruganx.ramuthevar@linux.intel.com> wrote:
+> > <vadivel.muruganx.ramuthevar-VuQAYsv1563Yd54FQh9/CA@public.gmane.org> wrote:
 > >  
-> >> From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
+> >> From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
 > >>
 > >> Add support for the Cadence QSPI controller. This controller is
 > >> present in the Intel Lightning Mountain(LGM) SoCs, Altera and TI SoCs.
@@ -36,7 +36,3 @@ On Fri, 28 Feb 2020 12:11:09 +0800
 Hm, your commit message makes it sound like even the new driver isn't
 generic enough to support SPI NANDs. Maybe there's something to improve
 to clarify the fact that this new version is not limited to SPI NORs.
-
-______________________________________________________
-Linux MTD discussion mailing list
-http://lists.infradead.org/mailman/listinfo/linux-mtd/
diff --git a/a/content_digest b/N1/content_digest
index dffd39d..f18b657 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -2,38 +2,39 @@
  "ref\020200227062708.21544-3-vadivel.muruganx.ramuthevar@linux.intel.com\0"
  "ref\020200227183032.77ef0795@collabora.com\0"
  "ref\0f82e4964-f030-9aac-5895-a715921ed6db@linux.intel.com\0"
- "From\0Boris Brezillon <boris.brezillon@collabora.com>\0"
+ "ref\0f82e4964-f030-9aac-5895-a715921ed6db-VuQAYsv1563Yd54FQh9/CA@public.gmane.org\0"
+ "From\0Boris Brezillon <boris.brezillon-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org>\0"
  "Subject\0Re: [PATCH v11 2/2] spi: cadence-quadspi: Add support for the Cadence QSPI controller\0"
  "Date\0Fri, 28 Feb 2020 08:46:51 +0100\0"
  "To\0Ramuthevar"
- " Vadivel MuruganX <vadivel.muruganx.ramuthevar@linux.intel.com>\0"
- "Cc\0mark.rutland@arm.com"
-  tudor.ambarus@gmail.com
-  vigneshr@ti.com
-  linux-mtd@lists.infradead.org
-  miquel.raynal@bootlin.com
-  cyrille.pitchen@atmel.com
-  marex@denx.de
-  boris.brezillon@free-electrons.com
-  tien.fong.chee@intel.com
-  richard@nod.at
-  simon.k.r.goldschmidt@gmail.com
-  devicetree@vger.kernel.org
-  cheol.yong.kim@intel.com
-  robh+dt@kernel.org
-  qi-ming.wu@intel.com
-  david.oberhollenzer@sigma-star.at
-  linux-kernel@vger.kernel.org
-  linux-spi@vger.kernel.org
-  dinguyen@kernel.org
-  broonie@kernel.org
-  computersforpeace@gmail.com
- " dwmw2@infradead.org\0"
+ " Vadivel MuruganX <vadivel.muruganx.ramuthevar-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>\0"
+ "Cc\0linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
+  linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+  broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org
+  vigneshr-l0cyMroinI0@public.gmane.org
+  robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org
+  marex-ynQEQJNshbs@public.gmane.org
+  devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+  tien.fong.chee-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org
+  tudor.ambarus-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
+  boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org
+  richard-/L3Ra7n9ekc@public.gmane.org
+  qi-ming.wu-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org
+  simon.k.r.goldschmidt-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
+  david.oberhollenzer-S6VGOU4v5edDinCvNWH78Q@public.gmane.org
+  dinguyen-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org
+  linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
+  miquel.raynal-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org
+  cheol.yong.kim-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org
+  mark.rutland-5wv7dgnIgG8@public.gmane.org
+  computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
+  dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org
+ " cyrille.pitchen-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org\0"
  "\00:1\0"
  "b\0"
  "On Fri, 28 Feb 2020 12:11:09 +0800\n"
  "\"Ramuthevar, Vadivel MuruganX\"\n"
- "<vadivel.muruganx.ramuthevar@linux.intel.com> wrote:\n"
+ "<vadivel.muruganx.ramuthevar-VuQAYsv1563Yd54FQh9/CA@public.gmane.org> wrote:\n"
  "\n"
  "> Hi Boris,\n"
  "> \n"
@@ -42,9 +43,9 @@
  "> On 28/2/2020 1:30 AM, Boris Brezillon wrote:\n"
  "> > On Thu, 27 Feb 2020 14:27:08 +0800\n"
  "> > \"Ramuthevar, Vadivel MuruganX\"\n"
- "> > <vadivel.muruganx.ramuthevar@linux.intel.com> wrote:\n"
+ "> > <vadivel.muruganx.ramuthevar-VuQAYsv1563Yd54FQh9/CA@public.gmane.org> wrote:\n"
  "> >  \n"
- "> >> From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>\n"
+ "> >> From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>\n"
  "> >>\n"
  "> >> Add support for the Cadence QSPI controller. This controller is\n"
  "> >> present in the Intel Lightning Mountain(LGM) SoCs, Altera and TI SoCs.\n"
@@ -68,10 +69,6 @@
  "\n"
  "Hm, your commit message makes it sound like even the new driver isn't\n"
  "generic enough to support SPI NANDs. Maybe there's something to improve\n"
- "to clarify the fact that this new version is not limited to SPI NORs.\n"
- "\n"
- "______________________________________________________\n"
- "Linux MTD discussion mailing list\n"
- http://lists.infradead.org/mailman/listinfo/linux-mtd/
+ to clarify the fact that this new version is not limited to SPI NORs.
 
-5f1c34c4f0efad3c4801ddd9fcf5478dffa2fc68847d5a036396016077746264
+543eb805595cf6d990c30d902069bce201c1433c8f75adbc874b550543423a25
