From: Rob Herring <robh@kernel.org>
To: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Tom Joseph <tjoseph@cadence.com>,
Bjorn Helgaas <bhelgaas@google.com>,
linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Subject: Re: [PATCH v3 1/4] dt-bindings: PCI: Add PCI Endpoint Controller Schema
Date: Fri, 28 Feb 2020 09:34:11 -0600 [thread overview]
Message-ID: <20200228153411.GA7882@bogus> (raw)
In-Reply-To: <20200224130905.952-2-kishon@ti.com>
On Mon, Feb 24, 2020 at 06:39:02PM +0530, Kishon Vijay Abraham I wrote:
> Define a common schema for PCI Endpoint Controllers.
>
> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> ---
> .../devicetree/bindings/pci/pci-ep.yaml | 41 +++++++++++++++++++
> 1 file changed, 41 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pci/pci-ep.yaml
>
> diff --git a/Documentation/devicetree/bindings/pci/pci-ep.yaml b/Documentation/devicetree/bindings/pci/pci-ep.yaml
> new file mode 100644
> index 000000000000..2287771a066a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pci/pci-ep.yaml
> @@ -0,0 +1,41 @@
> +# SPDX-License-Identifier: (GPL2.0-only OR BSD-2-Clause)
Typo. Run checkpatch.
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pci/pci-ep.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: PCI Endpoint Controller Schema
> +
> +description: |
> + Common properties for PCI Endpoint Controller Nodes.
> +
> +maintainers:
> + - Kishon Vijay Abraham I <kishon@ti.com>
> +
> +properties:
> + $nodename:
> + pattern: "^pcie-ep?@"
Why the '?'? Let's define the name and fix anything that doesn't match.
> +
> + max-functions:
> + description: Maximum number of functions that can be configured
> + allOf:
> + - $ref: /schemas/types.yaml#/definitions/uint8
> + minimum: 1
> + default: 1
> + maximum: 255
> +
> + max-link-speed:
> + allOf:
> + - $ref: /schemas/types.yaml#/definitions/uint32
> + enum: [ 1, 2, 3, 4 ]
> +
> + num-lanes:
> + description: maximum number of lanes
> + allOf:
> + - $ref: /schemas/types.yaml#/definitions/uint32
> + minimum: 1
> + default: 1
> + maximum: 16
> +
> +required:
> + - compatible
> --
> 2.17.1
>
next prev parent reply other threads:[~2020-02-28 15:34 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-24 13:09 [PATCH v3 0/4] dt-bindings: Convert Cadence PCIe RC/EP to DT Schema Kishon Vijay Abraham I
2020-02-24 13:09 ` [PATCH v3 1/4] dt-bindings: PCI: Add PCI Endpoint Controller Schema Kishon Vijay Abraham I
2020-02-28 15:34 ` Rob Herring [this message]
2020-02-24 13:09 ` [PATCH v3 2/4] dt-bindings: PCI: cadence: Add PCIe RC/EP DT schema for Cadence PCIe Kishon Vijay Abraham I
2020-02-28 15:38 ` Rob Herring
2020-02-24 13:09 ` [PATCH v3 3/4] dt-bindings: PCI: Convert PCIe Host/Endpoint in Cadence platform to DT schema Kishon Vijay Abraham I
2020-02-28 15:38 ` Rob Herring
2020-02-24 13:09 ` [PATCH v3 4/4] dt-bindings: PCI: cadence: Deprecate inbound/outbound specific bindings Kishon Vijay Abraham I
2020-02-28 15:38 ` Rob Herring
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