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[79.178.2.19]) by smtp.gmail.com with ESMTPSA id y69sm919939wmd.46.2020.03.09.13.39.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Mar 2020 13:39:22 -0700 (PDT) Date: Mon, 9 Mar 2020 16:39:19 -0400 From: "Michael S. Tsirkin" To: BALATON Zoltan Subject: Re: [PATCH v3 2/3] pci: Honour wmask when resetting PCI_INTERRUPT_LINE Message-ID: <20200309163632-mutt-send-email-mst@kernel.org> References: <857e327a240f2175fe5105f0ebdfe1357fef32c7.1583781494.git.balaton@eik.bme.hu> MIME-Version: 1.0 In-Reply-To: <857e327a240f2175fe5105f0ebdfe1357fef32c7.1583781494.git.balaton@eik.bme.hu> X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: quoted-printable Content-Disposition: inline X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 207.211.31.81 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-block@nongnu.org, philmd@redhat.com, Mark Cave-Ayland , qemu-devel@nongnu.org, Aleksandar Markovic , John Snow , Artyom Tarasenko , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Mon, Mar 09, 2020 at 08:18:13PM +0100, BALATON Zoltan wrote: > The pci_do_device_reset() function (called from pci_device_reset) > clears the PCI_INTERRUPT_LINE config reg of devices on the bus but did > this without taking wmask into account. We'll have a device model now > that needs to set a constant value for this reg and this patch allows > to do that without additional workaround in device emulation to > reverse the effect of this PCI bus reset function. >=20 > Suggested-by: Mark Cave-Ayland > Signed-off-by: BALATON Zoltan > --- > hw/pci/pci.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) >=20 > diff --git a/hw/pci/pci.c b/hw/pci/pci.c > index e1ed6677e1..d07e4ed9de 100644 > --- a/hw/pci/pci.c > +++ b/hw/pci/pci.c > @@ -302,8 +302,10 @@ static void pci_do_device_reset(PCIDevice *dev) > pci_word_test_and_clear_mask(dev->config + PCI_STATUS, > pci_get_word(dev->wmask + PCI_STATUS) | > pci_get_word(dev->w1cmask + PCI_STATUS)= ); > + pci_word_test_and_clear_mask(dev->config + PCI_INTERRUPT_LINE, > + pci_get_word(dev->wmask + PCI_INTERRUPT_LI= NE) | > + pci_get_word(dev->w1cmask + PCI_INTERRUPT_= LINE)); PCI spec says: Interrupt Line The Interrupt Line register is an eight-bit register used to communicate in= terrupt line routing information. I don't see how it makes sense to access it as a word. > dev->config[PCI_CACHE_LINE_SIZE] =3D 0x0; > - dev->config[PCI_INTERRUPT_LINE] =3D 0x0; > for (r =3D 0; r < PCI_NUM_REGIONS; ++r) { > PCIIORegion *region =3D &dev->io_regions[r]; > if (!region->size) { Please add comments here explaining that some devices make PCI_INTERRUPT_LINE read-only. > --=20 > 2.21.1 >=20 >=20