From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: multipart/mixed; boundary="===============1362141115916973981==" MIME-Version: 1.0 From: kernel test robot To: lkp@lists.01.org Subject: [sched] db8e976e4a: will-it-scale.per_process_ops 15.8% improvement Date: Tue, 10 Mar 2020 16:43:35 +0800 Message-ID: <20200310084335.GA5972@shao2-debian> In-Reply-To: <20200304213941.112303-1-xii@google.com> List-Id: --===============1362141115916973981== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Greeting, FYI, we noticed a 15.8% improvement of will-it-scale.per_process_ops due to= commit: commit: db8e976e4a08f1f194a3503f88dec1319f9ee34f ("[PATCH] sched: watchdog:= Touch kernel watchdog in sched code") url: https://github.com/0day-ci/linux/commits/Xi-Wang/sched-watchdog-Touch-= kernel-watchdog-in-sched-code/20200305-062335 in testcase: will-it-scale on test machine: 288 threads Intel(R) Xeon Phi(TM) CPU 7295 @ 1.50GHz with = 80G memory with following parameters: nr_task: 100% mode: process test: mmap1 cpufreq_governor: performance ucode: 0x11 test-description: Will It Scale takes a testcase and runs it from 1 through= to n parallel copies to see if the testcase will scale. It builds both a p= rocess and threads based test in order to see any differences between the t= wo. test-url: https://github.com/antonblanchard/will-it-scale Details are as below: ---------------------------------------------------------------------------= -----------------------> To reproduce: git clone https://github.com/intel/lkp-tests.git cd lkp-tests bin/lkp install job.yaml # job file is attached in this email bin/lkp run job.yaml =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D compiler/cpufreq_governor/kconfig/mode/nr_task/rootfs/tbox_group/test/testc= ase/ucode: gcc-7/performance/x86_64-rhel-7.6/process/100%/debian-x86_64-20191114.cgz= /lkp-knm01/mmap1/will-it-scale/0x11 commit: = 6f2bc932d8 ("Merge branch 'core/objtool'") db8e976e4a ("sched: watchdog: Touch kernel watchdog in sched code") 6f2bc932d8ff72b1 db8e976e4a08f1f194a3503f88d = ---------------- --------------------------- = fail:runs %reproduction fail:runs | | | = 2:4 -50% :4 dmesg.WARNING:at#for_ip_swapg= s_restore_regs_and_return_to_usermode/0x :4 50% 2:4 dmesg.WARNING:at_ip_perf_even= t_mmap_output/0x %stddev %change %stddev \ | \ = 1426 +15.8% 1651 will-it-scale.per_process_ops 411035 +15.7% 475727 will-it-scale.workload 11380 =C2=B1 2% +2.6% 11674 boot-time.idle 2001 -6.9% 1862 =C2=B1 2% vmstat.system.cs 1385167 =C2=B1 2% +14.2% 1582207 =C2=B1 2% meminfo.DirectMap4k 11741 =C2=B1 4% +9.1% 12805 meminfo.max_used_kB 112158 +1.6% 113946 proc-vmstat.nr_anon_pages 41945 =C2=B1 2% -2.7% 40804 proc-vmstat.nr_shmem 606.55 =C2=B1 10% -28.5% 433.40 =C2=B1 11% sched_debug.cfs_rq:= /.util_avg.min 186488 =C2=B1 5% +39.7% 260513 =C2=B1 14% sched_debug.cpu.max= _idle_balance_cost.stddev 130.50 -23.1% 100.35 =C2=B1 4% sched_debug.cpu.ttwu_cou= nt.min 124.95 =C2=B1 2% -23.5% 95.55 =C2=B1 4% sched_debug.cpu.ttw= u_local.min 9.733e+09 +2.8% 1e+10 perf-stat.i.branch-instructio= ns 1.09 =C2=B1 2% +0.1 1.18 perf-stat.i.branch-miss-= rate% 1.029e+08 =C2=B1 3% +12.7% 1.16e+08 perf-stat.i.branch-misses 1989 -6.3% 1863 perf-stat.i.context-switches 11.26 -2.6% 10.98 perf-stat.i.cpi 61009464 =C2=B1 2% +9.1% 66590176 perf-stat.i.iTLB-load-mi= sses 3.973e+10 +2.8% 4.084e+10 perf-stat.i.iTLB-loads 3.968e+10 +2.8% 4.08e+10 perf-stat.i.instructions 653.29 =C2=B1 2% -5.9% 614.52 perf-stat.i.instructions= -per-iTLB-miss 0.09 +2.4% 0.09 perf-stat.i.ipc 1.05 =C2=B1 2% +0.1 1.15 perf-stat.overall.branch= -miss-rate% 11.29 -2.5% 11.00 perf-stat.overall.cpi 0.15 =C2=B1 2% +0.0 0.16 perf-stat.overall.iTLB-l= oad-miss-rate% 649.22 =C2=B1 2% -5.9% 610.81 perf-stat.overall.instru= ctions-per-iTLB-miss 0.09 +2.6% 0.09 perf-stat.overall.ipc 29737649 -11.6% 26299776 perf-stat.overall.path-length 9.723e+09 +2.5% 9.971e+09 perf-stat.ps.branch-instructi= ons 1.023e+08 =C2=B1 3% +12.5% 1.15e+08 perf-stat.ps.branch-miss= es 1926 -7.3% 1786 =C2=B1 2% perf-stat.ps.context-swi= tches 61101086 =C2=B1 3% +9.0% 66601356 perf-stat.ps.iTLB-load-m= isses 3.967e+10 +2.6% 4.069e+10 perf-stat.ps.iTLB-loads 3.964e+10 +2.6% 4.067e+10 perf-stat.ps.instructions 1.222e+13 +2.4% 1.251e+13 perf-stat.total.instructions 20.96 =C2=B1 59% -21.0 0.00 perf-profile.calltrace.c= ycles-pp.entry_SYSCALL_64_after_hwframe 20.95 =C2=B1 59% -21.0 0.00 perf-profile.calltrace.c= ycles-pp.do_syscall_64.entry_SYSCALL_64_after_hwframe 10.50 =C2=B1 58% -10.5 0.00 perf-profile.calltrace.c= ycles-pp.__x64_sys_munmap.do_syscall_64.entry_SYSCALL_64_after_hwframe 10.49 =C2=B1 58% -10.5 0.00 perf-profile.calltrace.c= ycles-pp.__vm_munmap.__x64_sys_munmap.do_syscall_64.entry_SYSCALL_64_after_= hwframe 10.20 =C2=B1 59% -10.2 0.00 perf-profile.calltrace.c= ycles-pp.ksys_mmap_pgoff.do_syscall_64.entry_SYSCALL_64_after_hwframe 10.20 =C2=B1 59% -10.2 0.00 perf-profile.calltrace.c= ycles-pp.vm_mmap_pgoff.ksys_mmap_pgoff.do_syscall_64.entry_SYSCALL_64_after= _hwframe 0.85 =C2=B1 17% +0.3 1.12 perf-profile.calltrace.c= ycles-pp.unmap_page_range.unmap_vmas.unmap_region.__do_munmap.__vm_munmap 0.92 =C2=B1 17% +0.3 1.21 perf-profile.calltrace.c= ycles-pp.unmap_vmas.unmap_region.__do_munmap.__vm_munmap.__x64_sys_munmap 1.18 =C2=B1 17% +0.4 1.55 perf-profile.calltrace.c= ycles-pp.unmap_region.__do_munmap.__vm_munmap.__x64_sys_munmap.do_syscall_64 38.17 =C2=B1 15% +10.3 48.45 perf-profile.calltrace.c= ycles-pp.vm_mmap_pgoff.ksys_mmap_pgoff.do_syscall_64.entry_SYSCALL_64_after= _hwframe.mmap64 38.18 =C2=B1 15% +10.3 48.47 perf-profile.calltrace.c= ycles-pp.ksys_mmap_pgoff.do_syscall_64.entry_SYSCALL_64_after_hwframe.mmap64 38.45 =C2=B1 15% +10.4 48.86 perf-profile.calltrace.c= ycles-pp.do_syscall_64.entry_SYSCALL_64_after_hwframe.mmap64 38.46 =C2=B1 15% +10.4 48.88 perf-profile.calltrace.c= ycles-pp.entry_SYSCALL_64_after_hwframe.mmap64 38.66 =C2=B1 15% +10.5 49.12 perf-profile.calltrace.c= ycles-pp.mmap64 39.32 =C2=B1 15% +10.6 49.88 perf-profile.calltrace.c= ycles-pp.__vm_munmap.__x64_sys_munmap.do_syscall_64.entry_SYSCALL_64_after_= hwframe.munmap 39.34 =C2=B1 15% +10.6 49.91 perf-profile.calltrace.c= ycles-pp.__x64_sys_munmap.do_syscall_64.entry_SYSCALL_64_after_hwframe.munm= ap 39.63 =C2=B1 15% +10.7 50.31 perf-profile.calltrace.c= ycles-pp.do_syscall_64.entry_SYSCALL_64_after_hwframe.munmap 39.64 =C2=B1 15% +10.7 50.33 perf-profile.calltrace.c= ycles-pp.entry_SYSCALL_64_after_hwframe.munmap 39.82 =C2=B1 15% +10.7 50.54 perf-profile.calltrace.c= ycles-pp.munmap 0.90 =C2=B1 6% -0.1 0.78 perf-profile.children.cy= cles-pp.tick_sched_handle 0.94 =C2=B1 6% -0.1 0.83 perf-profile.children.cy= cles-pp.tick_sched_timer 0.88 =C2=B1 6% -0.1 0.77 perf-profile.children.cy= cles-pp.update_process_times 0.69 =C2=B1 7% -0.1 0.60 perf-profile.children.cy= cles-pp.scheduler_tick 0.47 =C2=B1 2% -0.0 0.43 perf-profile.children.cy= cles-pp.task_tick_fair 0.14 =C2=B1 5% -0.0 0.12 =C2=B1 3% perf-profile.childr= en.cycles-pp.update_curr 0.07 =C2=B1 7% +0.0 0.08 perf-profile.children.cy= cles-pp.remove_vma 0.14 =C2=B1 6% +0.0 0.17 =C2=B1 5% perf-profile.childr= en.cycles-pp.entry_SYSCALL_64 0.15 =C2=B1 14% +0.0 0.19 =C2=B1 2% perf-profile.childr= en.cycles-pp.perf_iterate_sb 1.12 =C2=B1 4% +0.0 1.17 perf-profile.children.cy= cles-pp.unmap_page_range 0.00 +0.1 0.05 perf-profile.children.cycles-= pp.perf_event_mmap_output 1.17 =C2=B1 4% +0.1 1.22 perf-profile.children.cy= cles-pp.unmap_vmas 0.00 +0.1 0.09 =C2=B1 13% perf-profile.children.cy= cles-pp.userfaultfd_unmap_complete 0.27 =C2=B1 8% +0.1 0.41 perf-profile.children.cy= cles-pp.perf_event_mmap 38.67 =C2=B1 15% +10.5 49.12 perf-profile.children.cy= cles-pp.mmap64 39.84 =C2=B1 15% +10.7 50.56 perf-profile.children.cy= cles-pp.munmap 0.08 =C2=B1 5% -0.0 0.07 =C2=B1 5% perf-profile.self.c= ycles-pp.update_curr 0.12 =C2=B1 4% +0.0 0.15 =C2=B1 5% perf-profile.self.c= ycles-pp.entry_SYSCALL_64 0.52 =C2=B1 3% +0.0 0.55 perf-profile.self.cycles= -pp.___might_sleep 0.09 =C2=B1 14% +0.0 0.14 =C2=B1 11% perf-profile.self.c= ycles-pp.do_syscall_64 0.00 +0.1 0.05 perf-profile.self.cycles-pp.p= erf_event_mmap_output 0.00 +0.1 0.09 =C2=B1 14% perf-profile.self.cycles= -pp.userfaultfd_unmap_complete 0.14 =C2=B1 16% +0.1 0.23 perf-profile.self.cycles= -pp._raw_spin_unlock_irqrestore 0.07 =C2=B1 6% +0.1 0.17 =C2=B1 3% perf-profile.self.c= ycles-pp.perf_event_mmap 136047 -10.3% 122085 softirqs.CPU0.TIMER 142844 =C2=B1 7% -12.9% 124359 softirqs.CPU1.TIMER 135746 -9.4% 123045 softirqs.CPU10.TIMER 52171 =C2=B1 13% +30.0% 67833 =C2=B1 11% softirqs.CPU105.RCU 43570 =C2=B1 12% +32.7% 57800 =C2=B1 6% softirqs.CPU109.RCU 135354 -9.8% 122137 softirqs.CPU11.TIMER 61775 =C2=B1 6% -15.1% 52429 =C2=B1 2% softirqs.CPU112.RCU 65779 =C2=B1 7% -24.4% 49713 =C2=B1 11% softirqs.CPU116.RCU 67826 =C2=B1 7% -11.6% 59956 =C2=B1 6% softirqs.CPU119.RCU 136890 -11.2% 121517 softirqs.CPU12.TIMER 67497 =C2=B1 10% -26.7% 49495 =C2=B1 8% softirqs.CPU126.RCU 66978 =C2=B1 8% -14.4% 57348 softirqs.CPU127.RCU 68007 =C2=B1 8% -19.1% 55010 =C2=B1 4% softirqs.CPU128.RCU 73177 =C2=B1 20% -23.7% 55863 =C2=B1 5% softirqs.CPU129.RCU 137065 -10.8% 122305 softirqs.CPU13.TIMER 45451 =C2=B1 13% +36.0% 61809 =C2=B1 9% softirqs.CPU134.RCU 42557 =C2=B1 15% +40.1% 59639 =C2=B1 3% softirqs.CPU135.RCU 135866 =C2=B1 2% -10.3% 121860 softirqs.CPU14.TIMER 62809 =C2=B1 9% -17.9% 51590 =C2=B1 17% softirqs.CPU142.RCU 134061 -10.4% 120146 softirqs.CPU145.TIMER 47655 =C2=B1 10% +36.4% 65020 =C2=B1 11% softirqs.CPU146.RCU 46689 =C2=B1 14% +43.6% 67028 =C2=B1 22% softirqs.CPU147.RCU 132777 -9.0% 120864 softirqs.CPU147.TIMER 58663 =C2=B1 17% -21.4% 46097 =C2=B1 8% softirqs.CPU148.RCU 135185 -10.3% 121233 softirqs.CPU15.TIMER 45147 =C2=B1 18% +31.8% 59524 =C2=B1 8% softirqs.CPU150.RCU 43131 =C2=B1 10% +30.8% 56431 =C2=B1 12% softirqs.CPU151.RCU 45028 =C2=B1 14% +29.6% 58361 =C2=B1 8% softirqs.CPU156.RCU 66885 =C2=B1 19% -28.2% 48046 =C2=B1 9% softirqs.CPU158.RCU 54669 =C2=B1 11% +15.7% 63279 =C2=B1 5% softirqs.CPU16.RCU 135175 -10.2% 121330 softirqs.CPU16.TIMER 65572 =C2=B1 12% -23.8% 49957 =C2=B1 13% softirqs.CPU164.RCU 44791 =C2=B1 16% +38.3% 61959 =C2=B1 9% softirqs.CPU169.RCU 135558 -10.6% 121159 softirqs.CPU17.TIMER 133452 -9.2% 121202 softirqs.CPU170.TIMER 133532 -9.3% 121141 softirqs.CPU171.TIMER 47392 =C2=B1 11% +24.7% 59117 =C2=B1 8% softirqs.CPU173.RCU 133403 -9.0% 121345 softirqs.CPU174.TIMER 135163 -9.9% 121727 softirqs.CPU18.TIMER 135425 -10.3% 121530 softirqs.CPU19.TIMER 42257 =C2=B1 12% +42.4% 60184 =C2=B1 4% softirqs.CPU195.RCU 53072 =C2=B1 7% +20.6% 64002 =C2=B1 4% softirqs.CPU199.RCU 135802 -10.5% 121598 softirqs.CPU2.TIMER 135522 -10.3% 121496 softirqs.CPU20.TIMER 69873 =C2=B1 8% -23.1% 53716 =C2=B1 15% softirqs.CPU206.RCU 66999 =C2=B1 6% -26.7% 49080 =C2=B1 11% softirqs.CPU207.RCU 70738 =C2=B1 5% -18.3% 57793 =C2=B1 5% softirqs.CPU208.RCU 73865 =C2=B1 20% -26.2% 54482 =C2=B1 7% softirqs.CPU209.RCU 135015 -9.9% 121582 softirqs.CPU21.TIMER 46523 =C2=B1 13% +31.6% 61230 =C2=B1 8% softirqs.CPU211.RCU 133727 -9.8% 120658 softirqs.CPU214.TIMER 52296 =C2=B1 15% +25.3% 65529 =C2=B1 11% softirqs.CPU215.RCU 43894 =C2=B1 10% +37.8% 60485 =C2=B1 8% softirqs.CPU217.RCU 73420 =C2=B1 21% -27.1% 53490 =C2=B1 6% softirqs.CPU219.RCU 135360 -10.0% 121811 softirqs.CPU22.TIMER 132373 -9.1% 120338 softirqs.CPU220.TIMER 133390 -9.3% 121016 softirqs.CPU222.TIMER 55865 =C2=B1 4% -9.0% 50834 =C2=B1 6% softirqs.CPU225.RCU 136998 -11.4% 121423 softirqs.CPU23.TIMER 54255 =C2=B1 5% -14.3% 46491 =C2=B1 9% softirqs.CPU232.RCU 133106 -9.4% 120627 softirqs.CPU232.TIMER 44670 =C2=B1 12% +18.6% 52956 =C2=B1 10% softirqs.CPU234.RCU 52856 =C2=B1 10% +17.3% 62004 =C2=B1 4% softirqs.CPU238.RCU 48377 =C2=B1 11% +23.2% 59609 =C2=B1 5% softirqs.CPU239.RCU 135035 -10.1% 121361 softirqs.CPU24.TIMER 77763 =C2=B1 21% -35.8% 49895 =C2=B1 13% softirqs.CPU243.RCU 63845 =C2=B1 11% -19.5% 51400 =C2=B1 13% softirqs.CPU249.RCU 135168 -10.2% 121439 softirqs.CPU25.TIMER 138499 =C2=B1 2% -12.5% 121152 softirqs.CPU26.TIMER 132357 -9.2% 120182 softirqs.CPU264.TIMER 132170 -9.3% 119886 softirqs.CPU266.TIMER 42781 =C2=B1 12% +20.9% 51738 =C2=B1 3% softirqs.CPU267.RCU 133062 -9.7% 120174 softirqs.CPU267.TIMER 132712 -10.1% 119303 softirqs.CPU268.TIMER 131632 -9.0% 119730 softirqs.CPU269.TIMER 135175 -10.7% 120773 softirqs.CPU27.TIMER 133004 -9.9% 119900 softirqs.CPU270.TIMER 133270 -10.3% 119510 softirqs.CPU271.TIMER 132916 -10.0% 119643 softirqs.CPU272.TIMER 133082 -10.0% 119776 softirqs.CPU274.TIMER 133786 -10.6% 119578 softirqs.CPU275.TIMER 132309 -9.6% 119672 softirqs.CPU276.TIMER 132662 -9.9% 119494 softirqs.CPU278.TIMER 134886 -9.4% 122225 softirqs.CPU28.TIMER 132521 -9.6% 119769 softirqs.CPU280.TIMER 134159 =C2=B1 2% -10.4% 120251 softirqs.CPU282.TIMER 133004 -9.3% 120668 softirqs.CPU283.TIMER 132418 -9.9% 119268 softirqs.CPU284.TIMER 131960 -9.5% 119474 softirqs.CPU285.TIMER 132179 =C2=B1 2% -9.6% 119440 softirqs.CPU286.TIMER 134987 -10.2% 121232 softirqs.CPU29.TIMER 134984 -10.0% 121436 softirqs.CPU3.TIMER 134885 -9.3% 122324 =C2=B1 2% softirqs.CPU30.TIMER 135262 -10.4% 121151 softirqs.CPU31.TIMER 134900 -10.0% 121406 softirqs.CPU32.TIMER 135067 -10.3% 121138 softirqs.CPU33.TIMER 135436 -10.5% 121240 softirqs.CPU34.TIMER 134709 -9.5% 121965 softirqs.CPU35.TIMER 134664 -10.1% 121053 softirqs.CPU36.TIMER 134921 -10.0% 121492 softirqs.CPU38.TIMER 55252 =C2=B1 5% -20.1% 44140 =C2=B1 10% softirqs.CPU39.RCU 137516 =C2=B1 3% -11.8% 121343 softirqs.CPU39.TIMER 134929 -10.0% 121470 softirqs.CPU40.TIMER 138809 =C2=B1 6% -12.2% 121885 softirqs.CPU41.TIMER 134871 -10.1% 121298 softirqs.CPU43.TIMER 134766 -9.6% 121772 softirqs.CPU44.TIMER 149033 =C2=B1 12% -18.5% 121486 softirqs.CPU45.TIMER 134119 -9.7% 121157 softirqs.CPU46.TIMER 134773 -10.0% 121245 softirqs.CPU47.TIMER 138113 =C2=B1 5% -12.3% 121156 softirqs.CPU48.TIMER 133896 -9.9% 120615 softirqs.CPU49.TIMER 135352 -10.5% 121195 softirqs.CPU5.TIMER 134644 -9.9% 121354 softirqs.CPU50.TIMER 134956 -9.6% 122021 =C2=B1 2% softirqs.CPU51.TIMER 137890 =C2=B1 4% -12.1% 121232 softirqs.CPU52.TIMER 143732 =C2=B1 6% -13.4% 124469 =C2=B1 4% softirqs.CPU53.TIMER 134524 -9.5% 121793 softirqs.CPU54.TIMER 134248 -9.7% 121285 softirqs.CPU56.TIMER 133592 -9.2% 121293 softirqs.CPU57.TIMER 52449 =C2=B1 6% +11.9% 58710 =C2=B1 3% softirqs.CPU58.RCU 134725 -10.0% 121290 softirqs.CPU58.TIMER 134055 -9.6% 121131 softirqs.CPU59.TIMER 135888 -10.6% 121534 softirqs.CPU6.TIMER 133889 -9.3% 121489 softirqs.CPU60.TIMER 134347 -9.6% 121505 softirqs.CPU61.TIMER 134305 -9.3% 121753 softirqs.CPU62.TIMER 134645 -9.5% 121901 =C2=B1 2% softirqs.CPU63.TIMER 134588 -9.6% 121707 softirqs.CPU64.TIMER 134167 -9.9% 120874 softirqs.CPU65.TIMER 134594 -9.4% 121950 softirqs.CPU66.TIMER 133648 -9.2% 121319 softirqs.CPU68.TIMER 63238 =C2=B1 6% -12.5% 55351 =C2=B1 2% softirqs.CPU69.RCU 134627 -10.0% 121216 softirqs.CPU69.TIMER 135395 -10.4% 121298 softirqs.CPU7.TIMER 142231 =C2=B1 9% -14.6% 121503 softirqs.CPU70.TIMER 64567 =C2=B1 11% -25.3% 48263 =C2=B1 9% softirqs.CPU73.RCU 69013 =C2=B1 38% -30.1% 48221 =C2=B1 14% softirqs.CPU76.RCU 136051 =C2=B1 3% -10.6% 121631 softirqs.CPU78.TIMER 135859 =C2=B1 2% -10.6% 121477 softirqs.CPU8.TIMER 45091 =C2=B1 11% +34.3% 60576 =C2=B1 2% softirqs.CPU84.RCU 134229 -8.8% 122430 =C2=B1 2% softirqs.CPU84.TIMER 134922 -9.6% 121932 softirqs.CPU85.TIMER 72255 =C2=B1 10% -21.2% 56910 =C2=B1 6% softirqs.CPU86.RCU 67986 =C2=B1 5% -20.4% 54106 =C2=B1 8% softirqs.CPU87.RCU 134602 -9.9% 121326 softirqs.CPU9.TIMER 45407 =C2=B1 14% +35.4% 61490 =C2=B1 3% softirqs.CPU94.RCU 352236 =C2=B1 4% +8.9% 383520 =C2=B1 4% interrupts.CAL:Func= tion_call_interrupts 1223 =C2=B1 4% +9.0% 1333 =C2=B1 4% interrupts.CPU1.CAL= :Function_call_interrupts 698.00 =C2=B1 23% +71.2% 1195 =C2=B1 11% interrupts.CPU1.RES= :Rescheduling_interrupts 1223 =C2=B1 4% +9.0% 1333 =C2=B1 3% interrupts.CPU10.CA= L:Function_call_interrupts 1221 =C2=B1 4% +8.9% 1329 =C2=B1 4% interrupts.CPU100.C= AL:Function_call_interrupts 1221 =C2=B1 4% +9.1% 1332 =C2=B1 4% interrupts.CPU101.C= AL:Function_call_interrupts 1221 =C2=B1 4% +8.9% 1329 =C2=B1 4% interrupts.CPU102.C= AL:Function_call_interrupts 1222 =C2=B1 4% +8.8% 1329 =C2=B1 4% interrupts.CPU103.C= AL:Function_call_interrupts 1217 =C2=B1 3% +9.2% 1329 =C2=B1 4% interrupts.CPU104.C= AL:Function_call_interrupts 1222 =C2=B1 4% +8.8% 1329 =C2=B1 4% interrupts.CPU105.C= AL:Function_call_interrupts 1221 =C2=B1 4% +8.8% 1329 =C2=B1 4% interrupts.CPU106.C= AL:Function_call_interrupts 1222 =C2=B1 4% +8.8% 1329 =C2=B1 4% interrupts.CPU107.C= AL:Function_call_interrupts 1221 =C2=B1 4% +8.8% 1328 =C2=B1 3% interrupts.CPU108.C= AL:Function_call_interrupts 1221 =C2=B1 4% +8.7% 1328 =C2=B1 3% interrupts.CPU109.C= AL:Function_call_interrupts 1224 =C2=B1 3% +8.9% 1333 =C2=B1 4% interrupts.CPU11.CA= L:Function_call_interrupts 1221 =C2=B1 4% +8.7% 1327 =C2=B1 4% interrupts.CPU110.C= AL:Function_call_interrupts 1221 =C2=B1 4% +8.8% 1329 =C2=B1 4% interrupts.CPU111.C= AL:Function_call_interrupts 1221 =C2=B1 4% +8.9% 1329 =C2=B1 4% interrupts.CPU112.C= AL:Function_call_interrupts 1222 =C2=B1 4% +8.7% 1327 =C2=B1 4% interrupts.CPU114.C= AL:Function_call_interrupts 1222 =C2=B1 4% +8.8% 1329 =C2=B1 4% interrupts.CPU115.C= AL:Function_call_interrupts 1222 =C2=B1 4% +8.7% 1328 =C2=B1 3% interrupts.CPU116.C= AL:Function_call_interrupts 1223 =C2=B1 4% +8.8% 1330 =C2=B1 4% interrupts.CPU117.C= AL:Function_call_interrupts 1221 =C2=B1 4% +8.9% 1330 =C2=B1 4% interrupts.CPU118.C= AL:Function_call_interrupts 1222 =C2=B1 4% +8.9% 1331 =C2=B1 4% interrupts.CPU119.C= AL:Function_call_interrupts 1223 =C2=B1 3% +9.1% 1334 =C2=B1 4% interrupts.CPU12.CA= L:Function_call_interrupts 1222 =C2=B1 4% +8.7% 1328 =C2=B1 4% interrupts.CPU120.C= AL:Function_call_interrupts 1223 =C2=B1 4% +8.2% 1323 =C2=B1 3% interrupts.CPU121.C= AL:Function_call_interrupts 1223 =C2=B1 4% +8.6% 1328 =C2=B1 3% interrupts.CPU122.C= AL:Function_call_interrupts 1223 =C2=B1 4% +8.8% 1330 =C2=B1 4% interrupts.CPU123.C= AL:Function_call_interrupts 1222 =C2=B1 4% +8.6% 1327 =C2=B1 3% interrupts.CPU124.C= AL:Function_call_interrupts 6560 =C2=B1 24% -27.9% 4729 =C2=B1 34% interrupts.CPU124.N= MI:Non-maskable_interrupts 6560 =C2=B1 24% -27.9% 4729 =C2=B1 34% interrupts.CPU124.P= MI:Performance_monitoring_interrupts 1222 =C2=B1 4% +8.7% 1329 =C2=B1 4% interrupts.CPU126.C= AL:Function_call_interrupts 1225 =C2=B1 4% +8.2% 1325 =C2=B1 4% interrupts.CPU127.C= AL:Function_call_interrupts 1222 =C2=B1 4% +8.9% 1330 =C2=B1 3% interrupts.CPU128.C= AL:Function_call_interrupts 1222 =C2=B1 4% +8.9% 1331 =C2=B1 4% interrupts.CPU129.C= AL:Function_call_interrupts 1221 =C2=B1 4% +9.2% 1334 =C2=B1 4% interrupts.CPU13.CA= L:Function_call_interrupts 1222 =C2=B1 4% +8.8% 1330 =C2=B1 4% interrupts.CPU130.C= AL:Function_call_interrupts 1223 =C2=B1 4% +8.8% 1331 =C2=B1 4% interrupts.CPU131.C= AL:Function_call_interrupts 1220 =C2=B1 3% +9.0% 1330 =C2=B1 4% interrupts.CPU132.C= AL:Function_call_interrupts 117.75 =C2=B1 41% -68.6% 37.00 =C2=B1 4% interrupts.CPU132.R= ES:Rescheduling_interrupts 1222 =C2=B1 3% +8.9% 1331 =C2=B1 3% interrupts.CPU133.C= AL:Function_call_interrupts 1222 =C2=B1 4% +8.8% 1330 =C2=B1 4% interrupts.CPU134.C= AL:Function_call_interrupts 1222 =C2=B1 4% +8.9% 1331 =C2=B1 3% interrupts.CPU135.C= AL:Function_call_interrupts 1222 =C2=B1 4% +8.8% 1330 =C2=B1 4% interrupts.CPU136.C= AL:Function_call_interrupts 1222 =C2=B1 4% +8.9% 1331 =C2=B1 4% interrupts.CPU137.C= AL:Function_call_interrupts 1222 =C2=B1 4% +8.9% 1330 =C2=B1 4% interrupts.CPU138.C= AL:Function_call_interrupts 1223 =C2=B1 4% +8.7% 1330 =C2=B1 3% interrupts.CPU139.C= AL:Function_call_interrupts 1225 =C2=B1 4% +8.9% 1334 =C2=B1 4% interrupts.CPU14.CA= L:Function_call_interrupts 1223 =C2=B1 4% +8.8% 1330 =C2=B1 4% interrupts.CPU140.C= AL:Function_call_interrupts 1222 =C2=B1 4% +8.9% 1331 =C2=B1 4% interrupts.CPU141.C= AL:Function_call_interrupts 1223 =C2=B1 4% +8.8% 1331 =C2=B1 3% interrupts.CPU142.C= AL:Function_call_interrupts 1223 =C2=B1 4% +8.8% 1331 =C2=B1 4% interrupts.CPU143.C= AL:Function_call_interrupts 1223 =C2=B1 4% +8.9% 1332 =C2=B1 3% interrupts.CPU144.C= AL:Function_call_interrupts 1233 =C2=B1 3% +8.0% 1331 =C2=B1 3% interrupts.CPU145.C= AL:Function_call_interrupts 1223 =C2=B1 4% +8.8% 1331 =C2=B1 3% interrupts.CPU146.C= AL:Function_call_interrupts 7510 -37.1% 4725 =C2=B1 34% interrupts.CPU146.NMI:No= n-maskable_interrupts 7510 -37.1% 4725 =C2=B1 34% interrupts.CPU146.PMI:Pe= rformance_monitoring_interrupts 1224 =C2=B1 4% +8.7% 1330 =C2=B1 3% interrupts.CPU147.C= AL:Function_call_interrupts 1220 =C2=B1 3% +9.2% 1332 =C2=B1 3% interrupts.CPU148.C= AL:Function_call_interrupts 1220 =C2=B1 3% +9.0% 1329 =C2=B1 3% interrupts.CPU149.C= AL:Function_call_interrupts 1225 =C2=B1 4% +8.9% 1334 =C2=B1 4% interrupts.CPU15.CA= L:Function_call_interrupts 1223 =C2=B1 4% +8.7% 1330 =C2=B1 4% interrupts.CPU150.C= AL:Function_call_interrupts 1223 =C2=B1 4% +8.9% 1332 =C2=B1 4% interrupts.CPU151.C= AL:Function_call_interrupts 84.50 =C2=B1148% -96.2% 3.25 =C2=B1 13% interrupts.CPU151.T= LB:TLB_shootdowns 1222 =C2=B1 4% +8.9% 1331 =C2=B1 4% interrupts.CPU152.C= AL:Function_call_interrupts 1078 =C2=B1 24% +23.5% 1332 =C2=B1 3% interrupts.CPU153.C= AL:Function_call_interrupts 1223 =C2=B1 4% +8.7% 1330 =C2=B1 4% interrupts.CPU154.C= AL:Function_call_interrupts 1224 =C2=B1 4% +8.8% 1332 =C2=B1 4% interrupts.CPU155.C= AL:Function_call_interrupts 1223 =C2=B1 4% +8.7% 1329 =C2=B1 4% interrupts.CPU157.C= AL:Function_call_interrupts 1223 =C2=B1 4% +8.8% 1331 =C2=B1 3% interrupts.CPU158.C= AL:Function_call_interrupts 1223 =C2=B1 4% +9.0% 1333 =C2=B1 3% interrupts.CPU159.C= AL:Function_call_interrupts 1225 =C2=B1 4% +9.0% 1335 =C2=B1 4% interrupts.CPU16.CA= L:Function_call_interrupts 4722 =C2=B1 34% +40.2% 6622 =C2=B1 24% interrupts.CPU16.NM= I:Non-maskable_interrupts 4722 =C2=B1 34% +40.2% 6622 =C2=B1 24% interrupts.CPU16.PM= I:Performance_monitoring_interrupts 1223 =C2=B1 4% +8.7% 1330 =C2=B1 4% interrupts.CPU160.C= AL:Function_call_interrupts 1223 =C2=B1 4% +8.8% 1331 =C2=B1 3% interrupts.CPU161.C= AL:Function_call_interrupts 4640 =C2=B1 33% +22.5% 5683 =C2=B1 33% interrupts.CPU161.N= MI:Non-maskable_interrupts 4640 =C2=B1 33% +22.5% 5683 =C2=B1 33% interrupts.CPU161.P= MI:Performance_monitoring_interrupts 1223 =C2=B1 4% +8.9% 1331 =C2=B1 3% interrupts.CPU162.C= AL:Function_call_interrupts 1223 =C2=B1 4% +9.0% 1333 =C2=B1 4% interrupts.CPU163.C= AL:Function_call_interrupts 1223 =C2=B1 4% +8.9% 1332 =C2=B1 4% interrupts.CPU164.C= AL:Function_call_interrupts 1223 =C2=B1 4% +8.7% 1330 =C2=B1 4% interrupts.CPU165.C= AL:Function_call_interrupts 1222 =C2=B1 4% +8.9% 1332 =C2=B1 3% interrupts.CPU166.C= AL:Function_call_interrupts 1224 =C2=B1 4% +8.8% 1332 =C2=B1 3% interrupts.CPU167.C= AL:Function_call_interrupts 1223 =C2=B1 4% +9.1% 1333 =C2=B1 3% interrupts.CPU168.C= AL:Function_call_interrupts 1223 =C2=B1 4% +8.9% 1332 =C2=B1 4% interrupts.CPU169.C= AL:Function_call_interrupts 1224 =C2=B1 4% +8.9% 1333 =C2=B1 4% interrupts.CPU17.CA= L:Function_call_interrupts 1223 =C2=B1 4% +8.9% 1332 =C2=B1 3% interrupts.CPU170.C= AL:Function_call_interrupts 1224 =C2=B1 4% +8.9% 1332 =C2=B1 3% interrupts.CPU171.C= AL:Function_call_interrupts 1223 =C2=B1 4% +8.9% 1332 =C2=B1 4% interrupts.CPU172.C= AL:Function_call_interrupts 1223 =C2=B1 4% +8.9% 1332 =C2=B1 4% interrupts.CPU173.C= AL:Function_call_interrupts 1223 =C2=B1 4% +9.0% 1332 =C2=B1 3% interrupts.CPU174.C= AL:Function_call_interrupts 1224 =C2=B1 4% +8.9% 1332 =C2=B1 4% interrupts.CPU175.C= AL:Function_call_interrupts 1223 =C2=B1 4% +8.9% 1332 =C2=B1 3% interrupts.CPU176.C= AL:Function_call_interrupts 1223 =C2=B1 4% +8.9% 1332 =C2=B1 3% interrupts.CPU177.C= AL:Function_call_interrupts 1223 =C2=B1 4% +8.9% 1332 =C2=B1 3% interrupts.CPU178.C= AL:Function_call_interrupts 5616 =C2=B1 32% -32.9% 3766 interrupts.CPU178.NMI:No= n-maskable_interrupts 5616 =C2=B1 32% -32.9% 3766 interrupts.CPU178.PMI:Pe= rformance_monitoring_interrupts 1223 =C2=B1 4% +8.9% 1332 =C2=B1 3% interrupts.CPU179.C= AL:Function_call_interrupts 1225 =C2=B1 4% +8.9% 1333 =C2=B1 4% interrupts.CPU18.CA= L:Function_call_interrupts 1223 =C2=B1 4% +9.0% 1332 =C2=B1 3% interrupts.CPU180.C= AL:Function_call_interrupts 1224 =C2=B1 4% +8.7% 1331 =C2=B1 3% interrupts.CPU181.C= AL:Function_call_interrupts 1223 =C2=B1 4% +8.9% 1332 =C2=B1 3% interrupts.CPU182.C= AL:Function_call_interrupts 6558 =C2=B1 24% -27.9% 4727 =C2=B1 34% interrupts.CPU182.N= MI:Non-maskable_interrupts 6558 =C2=B1 24% -27.9% 4727 =C2=B1 34% interrupts.CPU182.P= MI:Performance_monitoring_interrupts 1224 =C2=B1 4% +9.0% 1334 =C2=B1 3% interrupts.CPU183.C= AL:Function_call_interrupts 9.75 =C2=B1 27% +756.4% 83.50 =C2=B1139% interrupts.CPU183.R= ES:Rescheduling_interrupts 1223 =C2=B1 4% +8.9% 1332 =C2=B1 3% interrupts.CPU184.C= AL:Function_call_interrupts 6549 =C2=B1 24% -42.5% 3765 interrupts.CPU184.NMI:No= n-maskable_interrupts 6549 =C2=B1 24% -42.5% 3765 interrupts.CPU184.PMI:Pe= rformance_monitoring_interrupts 1224 =C2=B1 4% +8.9% 1333 =C2=B1 3% interrupts.CPU185.C= AL:Function_call_interrupts 1223 =C2=B1 4% +8.6% 1328 =C2=B1 4% interrupts.CPU186.C= AL:Function_call_interrupts 5664 =C2=B1 33% -33.5% 3767 interrupts.CPU186.NMI:No= n-maskable_interrupts 5664 =C2=B1 33% -33.5% 3767 interrupts.CPU186.PMI:Pe= rformance_monitoring_interrupts 1224 =C2=B1 4% +8.8% 1332 =C2=B1 3% interrupts.CPU187.C= AL:Function_call_interrupts 1224 =C2=B1 4% +8.9% 1332 =C2=B1 3% interrupts.CPU188.C= AL:Function_call_interrupts 1225 =C2=B1 4% +8.7% 1331 =C2=B1 3% interrupts.CPU189.C= AL:Function_call_interrupts 6544 =C2=B1 24% -42.2% 3783 interrupts.CPU189.NMI:No= n-maskable_interrupts 6544 =C2=B1 24% -42.2% 3783 interrupts.CPU189.PMI:Pe= rformance_monitoring_interrupts 1224 =C2=B1 4% +9.0% 1334 =C2=B1 3% interrupts.CPU19.CA= L:Function_call_interrupts 1223 =C2=B1 4% +8.9% 1332 =C2=B1 4% interrupts.CPU190.C= AL:Function_call_interrupts 1224 =C2=B1 4% +8.8% 1332 =C2=B1 3% interrupts.CPU191.C= AL:Function_call_interrupts 1223 =C2=B1 4% +8.5% 1327 =C2=B1 3% interrupts.CPU192.C= AL:Function_call_interrupts 18.75 =C2=B1 5% +222.7% 60.50 =C2=B1 54% interrupts.CPU192.R= ES:Rescheduling_interrupts 1224 =C2=B1 4% +8.8% 1332 =C2=B1 4% interrupts.CPU193.C= AL:Function_call_interrupts 3779 +75.1% 6618 =C2=B1 24% interrupts.CPU193.NMI:No= n-maskable_interrupts 3779 +75.1% 6618 =C2=B1 24% interrupts.CPU193.PMI:Pe= rformance_monitoring_interrupts 1079 =C2=B1 24% +23.3% 1331 =C2=B1 3% interrupts.CPU194.C= AL:Function_call_interrupts 1224 =C2=B1 4% +8.4% 1327 =C2=B1 3% interrupts.CPU195.C= AL:Function_call_interrupts 1223 =C2=B1 4% +8.9% 1332 =C2=B1 4% interrupts.CPU196.C= AL:Function_call_interrupts 1224 =C2=B1 4% +8.8% 1332 =C2=B1 4% interrupts.CPU197.C= AL:Function_call_interrupts 14.25 =C2=B1 56% +731.6% 118.50 =C2=B1103% interrupts.CPU197.R= ES:Rescheduling_interrupts 1223 =C2=B1 4% +8.6% 1328 =C2=B1 4% interrupts.CPU198.C= AL:Function_call_interrupts 1224 =C2=B1 4% +8.7% 1330 =C2=B1 4% interrupts.CPU199.C= AL:Function_call_interrupts 1226 =C2=B1 3% +8.7% 1333 =C2=B1 4% interrupts.CPU2.CAL= :Function_call_interrupts 1224 =C2=B1 4% +8.9% 1333 =C2=B1 4% interrupts.CPU20.CA= L:Function_call_interrupts 1223 =C2=B1 4% +8.9% 1332 =C2=B1 3% interrupts.CPU200.C= AL:Function_call_interrupts 1223 =C2=B1 4% +8.9% 1332 =C2=B1 3% interrupts.CPU201.C= AL:Function_call_interrupts 1223 =C2=B1 4% +8.9% 1332 =C2=B1 3% interrupts.CPU202.C= AL:Function_call_interrupts 1224 =C2=B1 4% +8.9% 1333 =C2=B1 4% interrupts.CPU203.C= AL:Function_call_interrupts 1221 =C2=B1 3% +9.0% 1330 =C2=B1 4% interrupts.CPU204.C= AL:Function_call_interrupts 1224 =C2=B1 4% +8.9% 1333 =C2=B1 4% interrupts.CPU205.C= AL:Function_call_interrupts 1223 =C2=B1 4% +8.9% 1332 =C2=B1 3% interrupts.CPU206.C= AL:Function_call_interrupts 1224 =C2=B1 4% +8.8% 1332 =C2=B1 3% interrupts.CPU207.C= AL:Function_call_interrupts 1223 =C2=B1 4% +8.9% 1332 =C2=B1 4% interrupts.CPU208.C= AL:Function_call_interrupts 1224 =C2=B1 4% +8.9% 1333 =C2=B1 4% interrupts.CPU209.C= AL:Function_call_interrupts 1224 =C2=B1 4% +9.0% 1333 =C2=B1 4% interrupts.CPU21.CA= L:Function_call_interrupts 297.25 =C2=B1 5% +36.4% 405.50 =C2=B1 20% interrupts.CPU21.RE= S:Rescheduling_interrupts 1224 =C2=B1 4% +9.0% 1334 =C2=B1 4% interrupts.CPU210.C= AL:Function_call_interrupts 1224 =C2=B1 4% +9.0% 1333 =C2=B1 4% interrupts.CPU211.C= AL:Function_call_interrupts 1223 =C2=B1 4% +9.0% 1333 =C2=B1 4% interrupts.CPU212.C= AL:Function_call_interrupts 1224 =C2=B1 4% +8.9% 1333 =C2=B1 4% interrupts.CPU213.C= AL:Function_call_interrupts 1223 =C2=B1 4% +9.0% 1333 =C2=B1 3% interrupts.CPU214.C= AL:Function_call_interrupts 1224 =C2=B1 4% +9.0% 1334 =C2=B1 4% interrupts.CPU215.C= AL:Function_call_interrupts 6447 =C2=B1 24% -28.0% 4640 =C2=B1 34% interrupts.CPU215.N= MI:Non-maskable_interrupts 6447 =C2=B1 24% -28.0% 4640 =C2=B1 34% interrupts.CPU215.P= MI:Performance_monitoring_interrupts 1223 =C2=B1 4% +9.0% 1334 =C2=B1 3% interrupts.CPU216.C= AL:Function_call_interrupts 1223 =C2=B1 4% +9.0% 1333 =C2=B1 4% interrupts.CPU217.C= AL:Function_call_interrupts 1223 =C2=B1 4% +9.1% 1334 =C2=B1 4% interrupts.CPU218.C= AL:Function_call_interrupts 1223 =C2=B1 4% +9.0% 1333 =C2=B1 3% interrupts.CPU219.C= AL:Function_call_interrupts 1223 =C2=B1 4% +9.0% 1333 =C2=B1 4% interrupts.CPU22.CA= L:Function_call_interrupts 711.75 =C2=B1 23% -31.3% 489.00 =C2=B1 10% interrupts.CPU22.RE= S:Rescheduling_interrupts 1222 =C2=B1 4% +9.1% 1333 =C2=B1 3% interrupts.CPU220.C= AL:Function_call_interrupts 1221 =C2=B1 3% +9.6% 1338 =C2=B1 3% interrupts.CPU221.C= AL:Function_call_interrupts 1227 =C2=B1 4% +9.6% 1344 =C2=B1 4% interrupts.CPU222.C= AL:Function_call_interrupts 1233 =C2=B1 3% +9.0% 1345 =C2=B1 3% interrupts.CPU223.C= AL:Function_call_interrupts 1239 =C2=B1 4% +8.8% 1348 =C2=B1 3% interrupts.CPU224.C= AL:Function_call_interrupts 1239 =C2=B1 4% +8.9% 1349 =C2=B1 3% interrupts.CPU225.C= AL:Function_call_interrupts 1239 =C2=B1 4% +8.8% 1349 =C2=B1 3% interrupts.CPU226.C= AL:Function_call_interrupts 1240 =C2=B1 4% +8.8% 1349 =C2=B1 3% interrupts.CPU227.C= AL:Function_call_interrupts 1239 =C2=B1 4% +8.8% 1348 =C2=B1 3% interrupts.CPU228.C= AL:Function_call_interrupts 1240 =C2=B1 4% +8.8% 1349 =C2=B1 3% interrupts.CPU229.C= AL:Function_call_interrupts 1223 =C2=B1 4% +9.0% 1334 =C2=B1 4% interrupts.CPU23.CA= L:Function_call_interrupts 1239 =C2=B1 4% +8.9% 1349 =C2=B1 3% interrupts.CPU230.C= AL:Function_call_interrupts 1239 =C2=B1 4% +8.9% 1349 =C2=B1 3% interrupts.CPU231.C= AL:Function_call_interrupts 1239 =C2=B1 4% +8.9% 1349 =C2=B1 3% interrupts.CPU232.C= AL:Function_call_interrupts 1239 =C2=B1 4% +8.7% 1347 =C2=B1 3% interrupts.CPU233.C= AL:Function_call_interrupts 1238 =C2=B1 4% +9.0% 1350 =C2=B1 3% interrupts.CPU234.C= AL:Function_call_interrupts 1239 =C2=B1 4% +8.8% 1349 =C2=B1 3% interrupts.CPU235.C= AL:Function_call_interrupts 1239 =C2=B1 4% +8.9% 1350 =C2=B1 3% interrupts.CPU236.C= AL:Function_call_interrupts 4677 =C2=B1 32% +41.1% 6600 =C2=B1 24% interrupts.CPU236.N= MI:Non-maskable_interrupts 4677 =C2=B1 32% +41.1% 6600 =C2=B1 24% interrupts.CPU236.P= MI:Performance_monitoring_interrupts 1240 =C2=B1 4% +8.8% 1348 =C2=B1 3% interrupts.CPU237.C= AL:Function_call_interrupts 1239 =C2=B1 4% +8.9% 1349 =C2=B1 3% interrupts.CPU238.C= AL:Function_call_interrupts 1241 =C2=B1 4% +8.8% 1349 =C2=B1 3% interrupts.CPU239.C= AL:Function_call_interrupts 1224 =C2=B1 4% +8.9% 1333 =C2=B1 4% interrupts.CPU24.CA= L:Function_call_interrupts 1242 =C2=B1 4% +8.7% 1350 =C2=B1 3% interrupts.CPU240.C= AL:Function_call_interrupts 1239 =C2=B1 4% +8.9% 1349 =C2=B1 4% interrupts.CPU241.C= AL:Function_call_interrupts 1239 =C2=B1 4% +8.9% 1350 =C2=B1 4% interrupts.CPU242.C= AL:Function_call_interrupts 1239 =C2=B1 4% +8.8% 1348 =C2=B1 3% interrupts.CPU243.C= AL:Function_call_interrupts 1239 =C2=B1 4% +8.9% 1350 =C2=B1 3% interrupts.CPU244.C= AL:Function_call_interrupts 1239 =C2=B1 4% +8.9% 1349 =C2=B1 3% interrupts.CPU245.C= AL:Function_call_interrupts 1239 =C2=B1 4% +9.0% 1350 =C2=B1 3% interrupts.CPU246.C= AL:Function_call_interrupts 1242 =C2=B1 4% +8.7% 1349 =C2=B1 3% interrupts.CPU247.C= AL:Function_call_interrupts 1236 =C2=B1 3% +9.2% 1349 =C2=B1 3% interrupts.CPU248.C= AL:Function_call_interrupts 1240 =C2=B1 4% +8.8% 1348 =C2=B1 3% interrupts.CPU249.C= AL:Function_call_interrupts 1225 =C2=B1 4% +8.9% 1334 =C2=B1 3% interrupts.CPU25.CA= L:Function_call_interrupts 1239 =C2=B1 4% +8.9% 1350 =C2=B1 3% interrupts.CPU250.C= AL:Function_call_interrupts 1239 =C2=B1 4% +9.0% 1350 =C2=B1 3% interrupts.CPU251.C= AL:Function_call_interrupts 1240 =C2=B1 4% +8.6% 1347 =C2=B1 3% interrupts.CPU252.C= AL:Function_call_interrupts 1240 =C2=B1 4% +8.5% 1345 =C2=B1 3% interrupts.CPU253.C= AL:Function_call_interrupts 6556 =C2=B1 24% -42.4% 3774 interrupts.CPU253.NMI:No= n-maskable_interrupts 6556 =C2=B1 24% -42.4% 3774 interrupts.CPU253.PMI:Pe= rformance_monitoring_interrupts 1240 =C2=B1 4% +8.9% 1350 =C2=B1 3% interrupts.CPU254.C= AL:Function_call_interrupts 1240 =C2=B1 4% +8.8% 1350 =C2=B1 3% interrupts.CPU255.C= AL:Function_call_interrupts 1094 =C2=B1 18% +23.3% 1350 =C2=B1 3% interrupts.CPU256.C= AL:Function_call_interrupts 1240 =C2=B1 4% +8.9% 1350 =C2=B1 3% interrupts.CPU257.C= AL:Function_call_interrupts 1240 =C2=B1 4% +8.5% 1346 =C2=B1 3% interrupts.CPU258.C= AL:Function_call_interrupts 1240 =C2=B1 4% +8.9% 1350 =C2=B1 3% interrupts.CPU259.C= AL:Function_call_interrupts 1225 =C2=B1 4% +8.8% 1333 =C2=B1 4% interrupts.CPU26.CA= L:Function_call_interrupts 1239 =C2=B1 4% +8.8% 1348 =C2=B1 3% interrupts.CPU260.C= AL:Function_call_interrupts 1240 =C2=B1 4% +8.7% 1348 =C2=B1 3% interrupts.CPU261.C= AL:Function_call_interrupts 1240 =C2=B1 4% +8.8% 1350 =C2=B1 3% interrupts.CPU262.C= AL:Function_call_interrupts 1240 =C2=B1 4% +8.8% 1350 =C2=B1 3% interrupts.CPU263.C= AL:Function_call_interrupts 1241 =C2=B1 4% +8.4% 1346 =C2=B1 3% interrupts.CPU264.C= AL:Function_call_interrupts 1241 =C2=B1 4% +8.6% 1348 =C2=B1 3% interrupts.CPU265.C= AL:Function_call_interrupts 1240 =C2=B1 4% +8.8% 1350 =C2=B1 3% interrupts.CPU266.C= AL:Function_call_interrupts 1241 =C2=B1 4% +8.8% 1350 =C2=B1 3% interrupts.CPU267.C= AL:Function_call_interrupts 1242 =C2=B1 4% +8.7% 1350 =C2=B1 3% interrupts.CPU268.C= AL:Function_call_interrupts 1240 =C2=B1 4% +8.6% 1347 =C2=B1 3% interrupts.CPU269.C= AL:Function_call_interrupts 1224 =C2=B1 3% +8.7% 1330 =C2=B1 3% interrupts.CPU27.CA= L:Function_call_interrupts 1241 =C2=B1 4% +8.6% 1347 =C2=B1 4% interrupts.CPU270.C= AL:Function_call_interrupts 1240 =C2=B1 4% +8.8% 1349 =C2=B1 3% interrupts.CPU272.C= AL:Function_call_interrupts 4705 =C2=B1 34% +40.9% 6629 =C2=B1 24% interrupts.CPU272.N= MI:Non-maskable_interrupts 4705 =C2=B1 34% +40.9% 6629 =C2=B1 24% interrupts.CPU272.P= MI:Performance_monitoring_interrupts 1241 =C2=B1 4% +8.7% 1349 =C2=B1 3% interrupts.CPU273.C= AL:Function_call_interrupts 1238 =C2=B1 4% +9.1% 1351 =C2=B1 3% interrupts.CPU274.C= AL:Function_call_interrupts 1241 =C2=B1 4% +8.8% 1351 =C2=B1 3% interrupts.CPU275.C= AL:Function_call_interrupts 1241 =C2=B1 4% +8.9% 1351 =C2=B1 3% interrupts.CPU276.C= AL:Function_call_interrupts 1241 =C2=B1 4% +8.9% 1352 =C2=B1 3% interrupts.CPU277.C= AL:Function_call_interrupts 1241 =C2=B1 4% +9.2% 1355 =C2=B1 4% interrupts.CPU278.C= AL:Function_call_interrupts 1241 =C2=B1 4% +9.0% 1353 =C2=B1 3% interrupts.CPU279.C= AL:Function_call_interrupts 1224 =C2=B1 4% +8.9% 1332 =C2=B1 4% interrupts.CPU28.CA= L:Function_call_interrupts 1241 =C2=B1 4% +8.7% 1349 =C2=B1 3% interrupts.CPU280.C= AL:Function_call_interrupts 1241 =C2=B1 4% +9.0% 1353 =C2=B1 3% interrupts.CPU281.C= AL:Function_call_interrupts 1241 =C2=B1 4% +9.1% 1353 =C2=B1 3% interrupts.CPU282.C= AL:Function_call_interrupts 1241 =C2=B1 4% +9.0% 1353 =C2=B1 3% interrupts.CPU283.C= AL:Function_call_interrupts 1240 =C2=B1 4% +9.2% 1354 =C2=B1 3% interrupts.CPU284.C= AL:Function_call_interrupts 1096 =C2=B1 25% +23.5% 1354 =C2=B1 3% interrupts.CPU285.C= AL:Function_call_interrupts 1242 =C2=B1 4% +9.1% 1355 =C2=B1 3% interrupts.CPU286.C= AL:Function_call_interrupts 1091 =C2=B1 25% +23.6% 1348 =C2=B1 3% interrupts.CPU287.C= AL:Function_call_interrupts 1224 =C2=B1 4% +9.0% 1334 =C2=B1 4% interrupts.CPU29.CA= L:Function_call_interrupts 1224 =C2=B1 4% +8.9% 1333 =C2=B1 4% interrupts.CPU3.CAL= :Function_call_interrupts 1224 =C2=B1 4% +8.9% 1333 =C2=B1 4% interrupts.CPU30.CA= L:Function_call_interrupts 3778 +50.7% 5694 =C2=B1 33% interrupts.CPU30.NMI:Non= -maskable_interrupts 3778 +50.7% 5694 =C2=B1 33% interrupts.CPU30.PMI:Per= formance_monitoring_interrupts 1225 =C2=B1 4% +9.0% 1335 =C2=B1 3% interrupts.CPU31.CA= L:Function_call_interrupts 1226 =C2=B1 3% +8.7% 1333 =C2=B1 4% interrupts.CPU32.CA= L:Function_call_interrupts 1223 =C2=B1 4% +9.0% 1333 =C2=B1 4% interrupts.CPU33.CA= L:Function_call_interrupts 1224 =C2=B1 4% +8.8% 1332 =C2=B1 4% interrupts.CPU34.CA= L:Function_call_interrupts 451.25 =C2=B1 11% -47.3% 238.00 =C2=B1 16% interrupts.CPU34.RE= S:Rescheduling_interrupts 1224 =C2=B1 4% +8.8% 1332 =C2=B1 3% interrupts.CPU35.CA= L:Function_call_interrupts 1223 =C2=B1 4% +8.7% 1330 =C2=B1 3% interrupts.CPU36.CA= L:Function_call_interrupts 1224 =C2=B1 4% +8.8% 1332 =C2=B1 4% interrupts.CPU37.CA= L:Function_call_interrupts 1223 =C2=B1 4% +8.9% 1332 =C2=B1 4% interrupts.CPU38.CA= L:Function_call_interrupts 1224 =C2=B1 4% +8.8% 1332 =C2=B1 4% interrupts.CPU39.CA= L:Function_call_interrupts 105.25 =C2=B1 18% +41.3% 148.75 =C2=B1 15% interrupts.CPU39.RE= S:Rescheduling_interrupts 1224 =C2=B1 4% +8.9% 1333 =C2=B1 4% interrupts.CPU4.CAL= :Function_call_interrupts 440.00 =C2=B1 10% +71.3% 753.75 =C2=B1 14% interrupts.CPU4.RES= :Rescheduling_interrupts 1226 =C2=B1 4% +8.8% 1334 =C2=B1 4% interrupts.CPU40.CA= L:Function_call_interrupts 1225 =C2=B1 4% +8.9% 1334 =C2=B1 4% interrupts.CPU41.CA= L:Function_call_interrupts 1223 =C2=B1 4% +8.6% 1329 =C2=B1 3% interrupts.CPU42.CA= L:Function_call_interrupts 1224 =C2=B1 4% +8.9% 1333 =C2=B1 4% interrupts.CPU43.CA= L:Function_call_interrupts 1221 =C2=B1 4% +9.2% 1333 =C2=B1 4% interrupts.CPU44.CA= L:Function_call_interrupts 1222 =C2=B1 4% +9.0% 1332 =C2=B1 4% interrupts.CPU45.CA= L:Function_call_interrupts 1223 =C2=B1 4% +8.9% 1332 =C2=B1 4% interrupts.CPU46.CA= L:Function_call_interrupts 1224 =C2=B1 3% +8.9% 1333 =C2=B1 4% interrupts.CPU47.CA= L:Function_call_interrupts 1224 =C2=B1 3% +8.7% 1330 =C2=B1 3% interrupts.CPU48.CA= L:Function_call_interrupts 357.00 =C2=B1 38% -44.3% 198.75 =C2=B1 8% interrupts.CPU48.RE= S:Rescheduling_interrupts 1223 =C2=B1 4% +9.0% 1334 =C2=B1 4% interrupts.CPU49.CA= L:Function_call_interrupts 1222 =C2=B1 3% +9.1% 1333 =C2=B1 4% interrupts.CPU5.CAL= :Function_call_interrupts 1223 =C2=B1 4% +8.9% 1332 =C2=B1 3% interrupts.CPU50.CA= L:Function_call_interrupts 1224 =C2=B1 4% +8.8% 1332 =C2=B1 3% interrupts.CPU51.CA= L:Function_call_interrupts 1223 =C2=B1 4% +8.8% 1331 =C2=B1 3% interrupts.CPU52.CA= L:Function_call_interrupts 1223 =C2=B1 4% +8.9% 1332 =C2=B1 3% interrupts.CPU53.CA= L:Function_call_interrupts 1223 =C2=B1 4% +8.7% 1329 =C2=B1 4% interrupts.CPU54.CA= L:Function_call_interrupts 3784 +74.7% 6611 =C2=B1 24% interrupts.CPU54.NMI:Non= -maskable_interrupts 3784 +74.7% 6611 =C2=B1 24% interrupts.CPU54.PMI:Per= formance_monitoring_interrupts 1224 =C2=B1 4% +8.8% 1331 =C2=B1 4% interrupts.CPU55.CA= L:Function_call_interrupts 1224 =C2=B1 4% +8.8% 1331 =C2=B1 3% interrupts.CPU56.CA= L:Function_call_interrupts 1224 =C2=B1 4% +8.8% 1332 =C2=B1 4% interrupts.CPU57.CA= L:Function_call_interrupts 1224 =C2=B1 4% +8.5% 1328 =C2=B1 3% interrupts.CPU58.CA= L:Function_call_interrupts 1224 =C2=B1 4% +8.9% 1333 =C2=B1 3% interrupts.CPU59.CA= L:Function_call_interrupts 1224 =C2=B1 4% +8.8% 1332 =C2=B1 4% interrupts.CPU6.CAL= :Function_call_interrupts 3763 +51.2% 5690 =C2=B1 33% interrupts.CPU6.NMI:Non-= maskable_interrupts 3763 +51.2% 5690 =C2=B1 33% interrupts.CPU6.PMI:Perf= ormance_monitoring_interrupts 454.25 =C2=B1 13% +45.7% 662.00 =C2=B1 18% interrupts.CPU6.RES= :Rescheduling_interrupts 1225 =C2=B1 4% +8.8% 1332 =C2=B1 4% interrupts.CPU60.CA= L:Function_call_interrupts 1223 =C2=B1 3% +9.0% 1332 =C2=B1 4% interrupts.CPU61.CA= L:Function_call_interrupts 1225 =C2=B1 4% +8.8% 1332 =C2=B1 4% interrupts.CPU62.CA= L:Function_call_interrupts 1224 =C2=B1 4% +8.9% 1332 =C2=B1 4% interrupts.CPU63.CA= L:Function_call_interrupts 1223 =C2=B1 4% +9.0% 1333 =C2=B1 4% interrupts.CPU64.CA= L:Function_call_interrupts 4665 =C2=B1 32% +42.5% 6646 =C2=B1 24% interrupts.CPU64.NM= I:Non-maskable_interrupts 4665 =C2=B1 32% +42.5% 6646 =C2=B1 24% interrupts.CPU64.PM= I:Performance_monitoring_interrupts 1223 =C2=B1 4% +8.9% 1332 =C2=B1 4% interrupts.CPU65.CA= L:Function_call_interrupts 1224 =C2=B1 4% +9.0% 1334 =C2=B1 4% interrupts.CPU66.CA= L:Function_call_interrupts 1224 =C2=B1 4% +9.0% 1334 =C2=B1 4% interrupts.CPU67.CA= L:Function_call_interrupts 1222 =C2=B1 4% +8.9% 1332 =C2=B1 4% interrupts.CPU68.CA= L:Function_call_interrupts 1081 =C2=B1 18% +23.2% 1333 =C2=B1 4% interrupts.CPU69.CA= L:Function_call_interrupts 1224 =C2=B1 4% +8.9% 1333 =C2=B1 4% interrupts.CPU7.CAL= :Function_call_interrupts 1223 =C2=B1 4% +9.0% 1333 =C2=B1 4% interrupts.CPU70.CA= L:Function_call_interrupts 1226 =C2=B1 3% +8.7% 1332 =C2=B1 4% interrupts.CPU71.CA= L:Function_call_interrupts 3709 +51.1% 5604 =C2=B1 33% interrupts.CPU71.NMI:Non= -maskable_interrupts 3709 +51.1% 5604 =C2=B1 33% interrupts.CPU71.PMI:Per= formance_monitoring_interrupts 1220 =C2=B1 4% +8.9% 1329 =C2=B1 4% interrupts.CPU72.CA= L:Function_call_interrupts 1220 =C2=B1 4% +8.9% 1329 =C2=B1 4% interrupts.CPU73.CA= L:Function_call_interrupts 28.50 =C2=B1 28% +97.4% 56.25 =C2=B1 49% interrupts.CPU73.RE= S:Rescheduling_interrupts 1220 =C2=B1 4% +8.7% 1326 =C2=B1 3% interrupts.CPU74.CA= L:Function_call_interrupts 1221 =C2=B1 4% +8.8% 1328 =C2=B1 3% interrupts.CPU75.CA= L:Function_call_interrupts 1223 =C2=B1 3% +8.7% 1329 =C2=B1 4% interrupts.CPU76.CA= L:Function_call_interrupts 1221 =C2=B1 4% +8.8% 1329 =C2=B1 4% interrupts.CPU77.CA= L:Function_call_interrupts 1221 =C2=B1 4% +8.6% 1326 =C2=B1 4% interrupts.CPU78.CA= L:Function_call_interrupts 1221 =C2=B1 4% +8.6% 1326 =C2=B1 4% interrupts.CPU79.CA= L:Function_call_interrupts 1224 =C2=B1 4% +8.9% 1334 =C2=B1 4% interrupts.CPU8.CAL= :Function_call_interrupts 1221 =C2=B1 4% +8.9% 1329 =C2=B1 4% interrupts.CPU80.CA= L:Function_call_interrupts 1221 =C2=B1 4% +8.8% 1329 =C2=B1 4% interrupts.CPU81.CA= L:Function_call_interrupts 5605 =C2=B1 32% -32.7% 3774 interrupts.CPU81.NMI:Non= -maskable_interrupts 5605 =C2=B1 32% -32.7% 3774 interrupts.CPU81.PMI:Per= formance_monitoring_interrupts 1220 =C2=B1 4% +8.9% 1329 =C2=B1 4% interrupts.CPU82.CA= L:Function_call_interrupts 1221 =C2=B1 4% +8.9% 1329 =C2=B1 4% interrupts.CPU83.CA= L:Function_call_interrupts 1222 =C2=B1 3% +8.8% 1329 =C2=B1 4% interrupts.CPU84.CA= L:Function_call_interrupts 1220 =C2=B1 4% +8.9% 1329 =C2=B1 4% interrupts.CPU85.CA= L:Function_call_interrupts 1220 =C2=B1 4% +8.9% 1329 =C2=B1 4% interrupts.CPU86.CA= L:Function_call_interrupts 1221 =C2=B1 4% +8.9% 1329 =C2=B1 4% interrupts.CPU87.CA= L:Function_call_interrupts 1221 =C2=B1 4% +8.8% 1329 =C2=B1 4% interrupts.CPU88.CA= L:Function_call_interrupts 1221 =C2=B1 4% +8.8% 1329 =C2=B1 4% interrupts.CPU89.CA= L:Function_call_interrupts 1224 =C2=B1 4% +8.9% 1333 =C2=B1 4% interrupts.CPU9.CAL= :Function_call_interrupts 1221 =C2=B1 4% +8.8% 1329 =C2=B1 4% interrupts.CPU90.CA= L:Function_call_interrupts 1221 =C2=B1 4% +8.8% 1329 =C2=B1 4% interrupts.CPU91.CA= L:Function_call_interrupts 1221 =C2=B1 4% +8.8% 1329 =C2=B1 4% interrupts.CPU92.CA= L:Function_call_interrupts 1221 =C2=B1 4% +8.9% 1329 =C2=B1 4% interrupts.CPU93.CA= L:Function_call_interrupts 1221 =C2=B1 4% +8.8% 1329 =C2=B1 4% interrupts.CPU94.CA= L:Function_call_interrupts 1221 =C2=B1 4% +8.8% 1329 =C2=B1 4% interrupts.CPU95.CA= L:Function_call_interrupts 44.50 =C2=B1 82% -68.0% 14.25 =C2=B1 43% interrupts.CPU95.RE= S:Rescheduling_interrupts 1221 =C2=B1 4% +8.6% 1325 =C2=B1 3% interrupts.CPU96.CA= L:Function_call_interrupts 1221 =C2=B1 4% +8.9% 1329 =C2=B1 4% interrupts.CPU97.CA= L:Function_call_interrupts 1223 =C2=B1 4% +8.5% 1327 =C2=B1 3% interrupts.CPU98.CA= L:Function_call_interrupts 55.25 =C2=B1 17% +243.0% 189.50 =C2=B1 83% interrupts.CPU98.RE= S:Rescheduling_interrupts 1222 =C2=B1 4% +8.5% 1325 =C2=B1 3% interrupts.CPU99.CA= L:Function_call_interrupts = = will-it-scale.per_process_ops = = = = 1850 +-------------------------------------------------------------------= -+ = 1800 |-+ = | = | O O O O = | = 1750 |-+ O O O O O O O O O O O O = | = 1700 |-+ = | = 1650 |-+ O O O O O O O O = | = 1600 |-+ = | = | = | = 1550 |-+ = | = 1500 |-+ = | = 1450 |-+ .+ .+. = | = 1400 |-+.+.+.. .+.+. .+.+. .+.+..+.+.+ + .+. +.+= .| = |.+ +.+. .+..+.+.+ +..+.+ + + = | = 1350 |-+ +.+.+ = | = 1300 +-------------------------------------------------------------------= -+ = = = = = = will-it-scale.workload = = = = 520000 +-----------------------------------------------------------------= -+ = | O O O = | = 500000 |-O O O O O O O O O O O O = | = | O = | = 480000 |-+ O O O O = | = | O O O O = | = 460000 |-+ = | = | = | = 440000 |-+ = | = | = | = 420000 |-+ .+.. = | = | .+.+. .+.+. .+.+. .+. .+. .+ .+.+.+.+= .| = 400000 |.+ +. +.+.+.+ +..+.+ + + + + = | = | +..+.+. + = | = 380000 +-----------------------------------------------------------------= -+ = = = = = [*] bisect-good sample [O] bisect-bad sample Disclaimer: Results have been estimated based on internal Intel analysis and are provid= ed for informational purposes only. Any difference in system hardware or softw= are design or configuration may affect actual performance. Thanks, Rong Chen --===============1362141115916973981== Content-Type: text/plain MIME-Version: 1.0 Content-Transfer-Encoding: base64 Content-Disposition: attachment; filename="config-5.6.0-rc4-00302-gdb8e976e4a08f" IwojIEF1dG9tYXRpY2FsbHkgZ2VuZXJhdGVkIGZpbGU7IERPIE5PVCBFRElULgojIExpbnV4L3g4 Nl82NCA1LjYuMC1yYzQgS2VybmVsIENvbmZpZ3VyYXRpb24KIwoKIwojIENvbXBpbGVyOiBnY2Mt NyAoRGViaWFuIDcuNS4wLTUpIDcuNS4wCiMKQ09ORklHX0NDX0lTX0dDQz15CkNPTkZJR19HQ0Nf VkVSU0lPTj03MDUwMApDT05GSUdfQ0xBTkdfVkVSU0lPTj0wCkNPTkZJR19DQ19DQU5fTElOSz15 CkNPTkZJR19DQ19IQVNfQVNNX0dPVE89eQpDT05GSUdfQ0NfSEFTX0FTTV9JTkxJTkU9eQpDT05G SUdfQ0NfSEFTX1dBUk5fTUFZQkVfVU5JTklUSUFMSVpFRD15CkNPTkZJR19JUlFfV09SSz15CkNP TkZJR19CVUlMRFRJTUVfVEFCTEVfU09SVD15CkNPTkZJR19USFJFQURfSU5GT19JTl9UQVNLPXkK CiMKIyBHZW5lcmFsIHNldHVwCiMKQ09ORklHX0lOSVRfRU5WX0FSR19MSU1JVD0zMgojIENPTkZJ R19DT01QSUxFX1RFU1QgaXMgbm90IHNldApDT05GSUdfTE9DQUxWRVJTSU9OPSIiCkNPTkZJR19M T0NBTFZFUlNJT05fQVVUTz15CkNPTkZJR19CVUlMRF9TQUxUPSIiCkNPTkZJR19IQVZFX0tFUk5F TF9HWklQPXkKQ09ORklHX0hBVkVfS0VSTkVMX0JaSVAyPXkKQ09ORklHX0hBVkVfS0VSTkVMX0xa TUE9eQpDT05GSUdfSEFWRV9LRVJORUxfWFo9eQpDT05GSUdfSEFWRV9LRVJORUxfTFpPPXkKQ09O RklHX0hBVkVfS0VSTkVMX0xaND15CkNPTkZJR19LRVJORUxfR1pJUD15CiMgQ09ORklHX0tFUk5F TF9CWklQMiBpcyBub3Qgc2V0CiMgQ09ORklHX0tFUk5FTF9MWk1BIGlzIG5vdCBzZXQKIyBDT05G SUdfS0VSTkVMX1haIGlzIG5vdCBzZXQKIyBDT05GSUdfS0VSTkVMX0xaTyBpcyBub3Qgc2V0CiMg Q09ORklHX0tFUk5FTF9MWjQgaXMgbm90IHNldApDT05GSUdfREVGQVVMVF9IT1NUTkFNRT0iKG5v bmUpIgpDT05GSUdfU1dBUD15CkNPTkZJR19TWVNWSVBDPXkKQ09ORklHX1NZU1ZJUENfU1lTQ1RM PXkKQ09ORklHX1BPU0lYX01RVUVVRT15CkNPTkZJR19QT1NJWF9NUVVFVUVfU1lTQ1RMPXkKQ09O RklHX0NST1NTX01FTU9SWV9BVFRBQ0g9eQpDT05GSUdfVVNFTElCPXkKQ09ORklHX0FVRElUPXkK Q09ORklHX0hBVkVfQVJDSF9BVURJVFNZU0NBTEw9eQpDT05GSUdfQVVESVRTWVNDQUxMPXkKCiMK IyBJUlEgc3Vic3lzdGVtCiMKQ09ORklHX0dFTkVSSUNfSVJRX1BST0JFPXkKQ09ORklHX0dFTkVS SUNfSVJRX1NIT1c9eQpDT05GSUdfR0VORVJJQ19JUlFfRUZGRUNUSVZFX0FGRl9NQVNLPXkKQ09O RklHX0dFTkVSSUNfUEVORElOR19JUlE9eQpDT05GSUdfR0VORVJJQ19JUlFfTUlHUkFUSU9OPXkK Q09ORklHX0lSUV9ET01BSU49eQpDT05GSUdfSVJRX1NJTT15CkNPTkZJR19JUlFfRE9NQUlOX0hJ RVJBUkNIWT15CkNPTkZJR19HRU5FUklDX01TSV9JUlE9eQpDT05GSUdfR0VORVJJQ19NU0lfSVJR X0RPTUFJTj15CkNPTkZJR19JUlFfTVNJX0lPTU1VPXkKQ09ORklHX0dFTkVSSUNfSVJRX01BVFJJ WF9BTExPQ0FUT1I9eQpDT05GSUdfR0VORVJJQ19JUlFfUkVTRVJWQVRJT05fTU9ERT15CkNPTkZJ R19JUlFfRk9SQ0VEX1RIUkVBRElORz15CkNPTkZJR19TUEFSU0VfSVJRPXkKIyBDT05GSUdfR0VO RVJJQ19JUlFfREVCVUdGUyBpcyBub3Qgc2V0CiMgZW5kIG9mIElSUSBzdWJzeXN0ZW0KCkNPTkZJ R19DTE9DS1NPVVJDRV9XQVRDSERPRz15CkNPTkZJR19BUkNIX0NMT0NLU09VUkNFX0lOSVQ9eQpD T05GSUdfQ0xPQ0tTT1VSQ0VfVkFMSURBVEVfTEFTVF9DWUNMRT15CkNPTkZJR19HRU5FUklDX1RJ TUVfVlNZU0NBTEw9eQpDT05GSUdfR0VORVJJQ19DTE9DS0VWRU5UUz15CkNPTkZJR19HRU5FUklD X0NMT0NLRVZFTlRTX0JST0FEQ0FTVD15CkNPTkZJR19HRU5FUklDX0NMT0NLRVZFTlRTX01JTl9B REpVU1Q9eQpDT05GSUdfR0VORVJJQ19DTU9TX1VQREFURT15CgojCiMgVGltZXJzIHN1YnN5c3Rl bQojCkNPTkZJR19USUNLX09ORVNIT1Q9eQpDT05GSUdfTk9fSFpfQ09NTU9OPXkKIyBDT05GSUdf SFpfUEVSSU9ESUMgaXMgbm90IHNldAojIENPTkZJR19OT19IWl9JRExFIGlzIG5vdCBzZXQKQ09O RklHX05PX0haX0ZVTEw9eQpDT05GSUdfQ09OVEVYVF9UUkFDS0lORz15CiMgQ09ORklHX0NPTlRF WFRfVFJBQ0tJTkdfRk9SQ0UgaXMgbm90IHNldApDT05GSUdfTk9fSFo9eQpDT05GSUdfSElHSF9S RVNfVElNRVJTPXkKIyBlbmQgb2YgVGltZXJzIHN1YnN5c3RlbQoKIyBDT05GSUdfUFJFRU1QVF9O T05FIGlzIG5vdCBzZXQKQ09ORklHX1BSRUVNUFRfVk9MVU5UQVJZPXkKIyBDT05GSUdfUFJFRU1Q VCBpcyBub3Qgc2V0CkNPTkZJR19QUkVFTVBUX0NPVU5UPXkKCiMKIyBDUFUvVGFzayB0aW1lIGFu ZCBzdGF0cyBhY2NvdW50aW5nCiMKQ09ORklHX1ZJUlRfQ1BVX0FDQ09VTlRJTkc9eQpDT05GSUdf VklSVF9DUFVfQUNDT1VOVElOR19HRU49eQojIENPTkZJR19JUlFfVElNRV9BQ0NPVU5USU5HIGlz IG5vdCBzZXQKQ09ORklHX0hBVkVfU0NIRURfQVZHX0lSUT15CkNPTkZJR19CU0RfUFJPQ0VTU19B Q0NUPXkKQ09ORklHX0JTRF9QUk9DRVNTX0FDQ1RfVjM9eQpDT05GSUdfVEFTS1NUQVRTPXkKQ09O RklHX1RBU0tfREVMQVlfQUNDVD15CkNPTkZJR19UQVNLX1hBQ0NUPXkKQ09ORklHX1RBU0tfSU9f QUNDT1VOVElORz15CiMgQ09ORklHX1BTSSBpcyBub3Qgc2V0CiMgZW5kIG9mIENQVS9UYXNrIHRp bWUgYW5kIHN0YXRzIGFjY291bnRpbmcKCkNPTkZJR19DUFVfSVNPTEFUSU9OPXkKCiMKIyBSQ1Ug U3Vic3lzdGVtCiMKQ09ORklHX1RSRUVfUkNVPXkKIyBDT05GSUdfUkNVX0VYUEVSVCBpcyBub3Qg c2V0CkNPTkZJR19TUkNVPXkKQ09ORklHX1RSRUVfU1JDVT15CkNPTkZJR19UQVNLU19SQ1U9eQpD T05GSUdfUkNVX1NUQUxMX0NPTU1PTj15CkNPTkZJR19SQ1VfTkVFRF9TRUdDQkxJU1Q9eQpDT05G SUdfUkNVX05PQ0JfQ1BVPXkKIyBlbmQgb2YgUkNVIFN1YnN5c3RlbQoKQ09ORklHX0JVSUxEX0JJ TjJDPXkKQ09ORklHX0lLQ09ORklHPXkKQ09ORklHX0lLQ09ORklHX1BST0M9eQojIENPTkZJR19J S0hFQURFUlMgaXMgbm90IHNldApDT05GSUdfTE9HX0JVRl9TSElGVD0yMApDT05GSUdfTE9HX0NQ VV9NQVhfQlVGX1NISUZUPTEyCkNPTkZJR19QUklOVEtfU0FGRV9MT0dfQlVGX1NISUZUPTEzCkNP TkZJR19IQVZFX1VOU1RBQkxFX1NDSEVEX0NMT0NLPXkKCiMKIyBTY2hlZHVsZXIgZmVhdHVyZXMK IwojIGVuZCBvZiBTY2hlZHVsZXIgZmVhdHVyZXMKCkNPTkZJR19BUkNIX1NVUFBPUlRTX05VTUFf QkFMQU5DSU5HPXkKQ09ORklHX0FSQ0hfV0FOVF9CQVRDSEVEX1VOTUFQX1RMQl9GTFVTSD15CkNP TkZJR19DQ19IQVNfSU5UMTI4PXkKQ09ORklHX0FSQ0hfU1VQUE9SVFNfSU5UMTI4PXkKQ09ORklH X05VTUFfQkFMQU5DSU5HPXkKQ09ORklHX05VTUFfQkFMQU5DSU5HX0RFRkFVTFRfRU5BQkxFRD15 CkNPTkZJR19DR1JPVVBTPXkKQ09ORklHX1BBR0VfQ09VTlRFUj15CkNPTkZJR19NRU1DRz15CkNP TkZJR19NRU1DR19TV0FQPXkKQ09ORklHX01FTUNHX1NXQVBfRU5BQkxFRD15CkNPTkZJR19NRU1D R19LTUVNPXkKQ09ORklHX0JMS19DR1JPVVA9eQpDT05GSUdfQ0dST1VQX1dSSVRFQkFDSz15CkNP TkZJR19DR1JPVVBfU0NIRUQ9eQpDT05GSUdfRkFJUl9HUk9VUF9TQ0hFRD15CkNPTkZJR19DRlNf QkFORFdJRFRIPXkKQ09ORklHX1JUX0dST1VQX1NDSEVEPXkKQ09ORklHX0NHUk9VUF9QSURTPXkK Q09ORklHX0NHUk9VUF9SRE1BPXkKQ09ORklHX0NHUk9VUF9GUkVFWkVSPXkKQ09ORklHX0NHUk9V UF9IVUdFVExCPXkKQ09ORklHX0NQVVNFVFM9eQpDT05GSUdfUFJPQ19QSURfQ1BVU0VUPXkKQ09O RklHX0NHUk9VUF9ERVZJQ0U9eQpDT05GSUdfQ0dST1VQX0NQVUFDQ1Q9eQpDT05GSUdfQ0dST1VQ X1BFUkY9eQpDT05GSUdfQ0dST1VQX0JQRj15CiMgQ09ORklHX0NHUk9VUF9ERUJVRyBpcyBub3Qg c2V0CkNPTkZJR19TT0NLX0NHUk9VUF9EQVRBPXkKQ09ORklHX05BTUVTUEFDRVM9eQpDT05GSUdf VVRTX05TPXkKQ09ORklHX1RJTUVfTlM9eQpDT05GSUdfSVBDX05TPXkKQ09ORklHX1VTRVJfTlM9 eQpDT05GSUdfUElEX05TPXkKQ09ORklHX05FVF9OUz15CkNPTkZJR19DSEVDS1BPSU5UX1JFU1RP UkU9eQpDT05GSUdfU0NIRURfQVVUT0dST1VQPXkKIyBDT05GSUdfU1lTRlNfREVQUkVDQVRFRCBp cyBub3Qgc2V0CkNPTkZJR19SRUxBWT15CkNPTkZJR19CTEtfREVWX0lOSVRSRD15CkNPTkZJR19J TklUUkFNRlNfU09VUkNFPSIiCkNPTkZJR19SRF9HWklQPXkKQ09ORklHX1JEX0JaSVAyPXkKQ09O RklHX1JEX0xaTUE9eQpDT05GSUdfUkRfWFo9eQpDT05GSUdfUkRfTFpPPXkKQ09ORklHX1JEX0xa ND15CiMgQ09ORklHX0JPT1RfQ09ORklHIGlzIG5vdCBzZXQKQ09ORklHX0NDX09QVElNSVpFX0ZP Ul9QRVJGT1JNQU5DRT15CiMgQ09ORklHX0NDX09QVElNSVpFX0ZPUl9TSVpFIGlzIG5vdCBzZXQK Q09ORklHX1NZU0NUTD15CkNPTkZJR19IQVZFX1VJRDE2PXkKQ09ORklHX1NZU0NUTF9FWENFUFRJ T05fVFJBQ0U9eQpDT05GSUdfSEFWRV9QQ1NQS1JfUExBVEZPUk09eQpDT05GSUdfQlBGPXkKQ09O RklHX0VYUEVSVD15CkNPTkZJR19VSUQxNj15CkNPTkZJR19NVUxUSVVTRVI9eQpDT05GSUdfU0dF VE1BU0tfU1lTQ0FMTD15CkNPTkZJR19TWVNGU19TWVNDQUxMPXkKQ09ORklHX0ZIQU5ETEU9eQpD T05GSUdfUE9TSVhfVElNRVJTPXkKQ09ORklHX1BSSU5USz15CkNPTkZJR19QUklOVEtfTk1JPXkK Q09ORklHX0JVRz15CkNPTkZJR19FTEZfQ09SRT15CkNPTkZJR19QQ1NQS1JfUExBVEZPUk09eQpD T05GSUdfQkFTRV9GVUxMPXkKQ09ORklHX0ZVVEVYPXkKQ09ORklHX0ZVVEVYX1BJPXkKQ09ORklH X0VQT0xMPXkKQ09ORklHX1NJR05BTEZEPXkKQ09ORklHX1RJTUVSRkQ9eQpDT05GSUdfRVZFTlRG RD15CkNPTkZJR19TSE1FTT15CkNPTkZJR19BSU89eQpDT05GSUdfSU9fVVJJTkc9eQpDT05GSUdf QURWSVNFX1NZU0NBTExTPXkKQ09ORklHX01FTUJBUlJJRVI9eQpDT05GSUdfS0FMTFNZTVM9eQpD T05GSUdfS0FMTFNZTVNfQUxMPXkKQ09ORklHX0tBTExTWU1TX0FCU09MVVRFX1BFUkNQVT15CkNP TkZJR19LQUxMU1lNU19CQVNFX1JFTEFUSVZFPXkKQ09ORklHX0JQRl9TWVNDQUxMPXkKQ09ORklH X0FSQ0hfV0FOVF9ERUZBVUxUX0JQRl9KSVQ9eQpDT05GSUdfQlBGX0pJVF9BTFdBWVNfT049eQpD T05GSUdfQlBGX0pJVF9ERUZBVUxUX09OPXkKQ09ORklHX1VTRVJGQVVMVEZEPXkKQ09ORklHX0FS Q0hfSEFTX01FTUJBUlJJRVJfU1lOQ19DT1JFPXkKQ09ORklHX1JTRVE9eQojIENPTkZJR19ERUJV R19SU0VRIGlzIG5vdCBzZXQKQ09ORklHX0VNQkVEREVEPXkKQ09ORklHX0hBVkVfUEVSRl9FVkVO VFM9eQojIENPTkZJR19QQzEwNCBpcyBub3Qgc2V0CgojCiMgS2VybmVsIFBlcmZvcm1hbmNlIEV2 ZW50cyBBbmQgQ291bnRlcnMKIwpDT05GSUdfUEVSRl9FVkVOVFM9eQojIENPTkZJR19ERUJVR19Q RVJGX1VTRV9WTUFMTE9DIGlzIG5vdCBzZXQKIyBlbmQgb2YgS2VybmVsIFBlcmZvcm1hbmNlIEV2 ZW50cyBBbmQgQ291bnRlcnMKCkNPTkZJR19WTV9FVkVOVF9DT1VOVEVSUz15CkNPTkZJR19TTFVC X0RFQlVHPXkKIyBDT05GSUdfU0xVQl9NRU1DR19TWVNGU19PTiBpcyBub3Qgc2V0CiMgQ09ORklH X0NPTVBBVF9CUksgaXMgbm90IHNldAojIENPTkZJR19TTEFCIGlzIG5vdCBzZXQKQ09ORklHX1NM VUI9eQojIENPTkZJR19TTE9CIGlzIG5vdCBzZXQKQ09ORklHX1NMQUJfTUVSR0VfREVGQVVMVD15 CiMgQ09ORklHX1NMQUJfRlJFRUxJU1RfUkFORE9NIGlzIG5vdCBzZXQKIyBDT05GSUdfU0xBQl9G UkVFTElTVF9IQVJERU5FRCBpcyBub3Qgc2V0CiMgQ09ORklHX1NIVUZGTEVfUEFHRV9BTExPQ0FU T1IgaXMgbm90IHNldApDT05GSUdfU0xVQl9DUFVfUEFSVElBTD15CkNPTkZJR19TWVNURU1fREFU QV9WRVJJRklDQVRJT049eQpDT05GSUdfUFJPRklMSU5HPXkKQ09ORklHX1RSQUNFUE9JTlRTPXkK IyBlbmQgb2YgR2VuZXJhbCBzZXR1cAoKQ09ORklHXzY0QklUPXkKQ09ORklHX1g4Nl82ND15CkNP TkZJR19YODY9eQpDT05GSUdfSU5TVFJVQ1RJT05fREVDT0RFUj15CkNPTkZJR19PVVRQVVRfRk9S TUFUPSJlbGY2NC14ODYtNjQiCkNPTkZJR19BUkNIX0RFRkNPTkZJRz0iYXJjaC94ODYvY29uZmln cy94ODZfNjRfZGVmY29uZmlnIgpDT05GSUdfTE9DS0RFUF9TVVBQT1JUPXkKQ09ORklHX1NUQUNL VFJBQ0VfU1VQUE9SVD15CkNPTkZJR19NTVU9eQpDT05GSUdfQVJDSF9NTUFQX1JORF9CSVRTX01J Tj0yOApDT05GSUdfQVJDSF9NTUFQX1JORF9CSVRTX01BWD0zMgpDT05GSUdfQVJDSF9NTUFQX1JO RF9DT01QQVRfQklUU19NSU49OApDT05GSUdfQVJDSF9NTUFQX1JORF9DT01QQVRfQklUU19NQVg9 MTYKQ09ORklHX0dFTkVSSUNfSVNBX0RNQT15CkNPTkZJR19HRU5FUklDX0JVRz15CkNPTkZJR19H RU5FUklDX0JVR19SRUxBVElWRV9QT0lOVEVSUz15CkNPTkZJR19BUkNIX01BWV9IQVZFX1BDX0ZE Qz15CkNPTkZJR19HRU5FUklDX0NBTElCUkFURV9ERUxBWT15CkNPTkZJR19BUkNIX0hBU19DUFVf UkVMQVg9eQpDT05GSUdfQVJDSF9IQVNfQ0FDSEVfTElORV9TSVpFPXkKQ09ORklHX0FSQ0hfSEFT X0ZJTFRFUl9QR1BST1Q9eQpDT05GSUdfSEFWRV9TRVRVUF9QRVJfQ1BVX0FSRUE9eQpDT05GSUdf TkVFRF9QRVJfQ1BVX0VNQkVEX0ZJUlNUX0NIVU5LPXkKQ09ORklHX05FRURfUEVSX0NQVV9QQUdF X0ZJUlNUX0NIVU5LPXkKQ09ORklHX0FSQ0hfSElCRVJOQVRJT05fUE9TU0lCTEU9eQpDT05GSUdf QVJDSF9TVVNQRU5EX1BPU1NJQkxFPXkKQ09ORklHX0FSQ0hfV0FOVF9HRU5FUkFMX0hVR0VUTEI9 eQpDT05GSUdfWk9ORV9ETUEzMj15CkNPTkZJR19BVURJVF9BUkNIPXkKQ09ORklHX0FSQ0hfU1VQ UE9SVFNfREVCVUdfUEFHRUFMTE9DPXkKQ09ORklHX0hBVkVfSU5URUxfVFhUPXkKQ09ORklHX1g4 Nl82NF9TTVA9eQpDT05GSUdfQVJDSF9TVVBQT1JUU19VUFJPQkVTPXkKQ09ORklHX0ZJWF9FQVJM WUNPTl9NRU09eQpDT05GSUdfRFlOQU1JQ19QSFlTSUNBTF9NQVNLPXkKQ09ORklHX1BHVEFCTEVf TEVWRUxTPTUKQ09ORklHX0NDX0hBU19TQU5FX1NUQUNLUFJPVEVDVE9SPXkKCiMKIyBQcm9jZXNz b3IgdHlwZSBhbmQgZmVhdHVyZXMKIwpDT05GSUdfWk9ORV9ETUE9eQpDT05GSUdfU01QPXkKQ09O RklHX1g4Nl9GRUFUVVJFX05BTUVTPXkKQ09ORklHX1g4Nl9YMkFQSUM9eQpDT05GSUdfWDg2X01Q UEFSU0U9eQojIENPTkZJR19HT0xERklTSCBpcyBub3Qgc2V0CkNPTkZJR19SRVRQT0xJTkU9eQpD T05GSUdfWDg2X0NQVV9SRVNDVFJMPXkKQ09ORklHX1g4Nl9FWFRFTkRFRF9QTEFURk9STT15CiMg Q09ORklHX1g4Nl9OVU1BQ0hJUCBpcyBub3Qgc2V0CiMgQ09ORklHX1g4Nl9WU01QIGlzIG5vdCBz ZXQKQ09ORklHX1g4Nl9VVj15CiMgQ09ORklHX1g4Nl9HT0xERklTSCBpcyBub3Qgc2V0CiMgQ09O RklHX1g4Nl9JTlRFTF9NSUQgaXMgbm90IHNldApDT05GSUdfWDg2X0lOVEVMX0xQU1M9eQpDT05G SUdfWDg2X0FNRF9QTEFURk9STV9ERVZJQ0U9eQpDT05GSUdfSU9TRl9NQkk9eQojIENPTkZJR19J T1NGX01CSV9ERUJVRyBpcyBub3Qgc2V0CkNPTkZJR19YODZfU1VQUE9SVFNfTUVNT1JZX0ZBSUxV UkU9eQojIENPTkZJR19TQ0hFRF9PTUlUX0ZSQU1FX1BPSU5URVIgaXMgbm90IHNldApDT05GSUdf SFlQRVJWSVNPUl9HVUVTVD15CkNPTkZJR19QQVJBVklSVD15CkNPTkZJR19QQVJBVklSVF9YWEw9 eQojIENPTkZJR19QQVJBVklSVF9ERUJVRyBpcyBub3Qgc2V0CkNPTkZJR19QQVJBVklSVF9TUElO TE9DS1M9eQpDT05GSUdfWDg2X0hWX0NBTExCQUNLX1ZFQ1RPUj15CkNPTkZJR19YRU49eQpDT05G SUdfWEVOX1BWPXkKQ09ORklHX1hFTl9QVl9TTVA9eQojIENPTkZJR19YRU5fRE9NMCBpcyBub3Qg c2V0CkNPTkZJR19YRU5fUFZIVk09eQpDT05GSUdfWEVOX1BWSFZNX1NNUD15CkNPTkZJR19YRU5f NTEyR0I9eQpDT05GSUdfWEVOX1NBVkVfUkVTVE9SRT15CiMgQ09ORklHX1hFTl9ERUJVR19GUyBp cyBub3Qgc2V0CiMgQ09ORklHX1hFTl9QVkggaXMgbm90IHNldApDT05GSUdfS1ZNX0dVRVNUPXkK Q09ORklHX0FSQ0hfQ1BVSURMRV9IQUxUUE9MTD15CiMgQ09ORklHX1BWSCBpcyBub3Qgc2V0CiMg Q09ORklHX0tWTV9ERUJVR19GUyBpcyBub3Qgc2V0CkNPTkZJR19QQVJBVklSVF9USU1FX0FDQ09V TlRJTkc9eQpDT05GSUdfUEFSQVZJUlRfQ0xPQ0s9eQojIENPTkZJR19KQUlMSE9VU0VfR1VFU1Qg aXMgbm90IHNldAojIENPTkZJR19BQ1JOX0dVRVNUIGlzIG5vdCBzZXQKIyBDT05GSUdfTUs4IGlz IG5vdCBzZXQKIyBDT05GSUdfTVBTQyBpcyBub3Qgc2V0CiMgQ09ORklHX01DT1JFMiBpcyBub3Qg c2V0CiMgQ09ORklHX01BVE9NIGlzIG5vdCBzZXQKQ09ORklHX0dFTkVSSUNfQ1BVPXkKQ09ORklH X1g4Nl9JTlRFUk5PREVfQ0FDSEVfU0hJRlQ9NgpDT05GSUdfWDg2X0wxX0NBQ0hFX1NISUZUPTYK Q09ORklHX1g4Nl9UU0M9eQpDT05GSUdfWDg2X0NNUFhDSEc2ND15CkNPTkZJR19YODZfQ01PVj15 CkNPTkZJR19YODZfTUlOSU1VTV9DUFVfRkFNSUxZPTY0CkNPTkZJR19YODZfREVCVUdDVExNU1I9 eQpDT05GSUdfSUEzMl9GRUFUX0NUTD15CkNPTkZJR19YODZfVk1YX0ZFQVRVUkVfTkFNRVM9eQoj IENPTkZJR19QUk9DRVNTT1JfU0VMRUNUIGlzIG5vdCBzZXQKQ09ORklHX0NQVV9TVVBfSU5URUw9 eQpDT05GSUdfQ1BVX1NVUF9BTUQ9eQpDT05GSUdfQ1BVX1NVUF9IWUdPTj15CkNPTkZJR19DUFVf U1VQX0NFTlRBVVI9eQpDT05GSUdfQ1BVX1NVUF9aSEFPWElOPXkKQ09ORklHX0hQRVRfVElNRVI9 eQpDT05GSUdfSFBFVF9FTVVMQVRFX1JUQz15CkNPTkZJR19ETUk9eQpDT05GSUdfR0FSVF9JT01N VT15CkNPTkZJR19NQVhTTVA9eQpDT05GSUdfTlJfQ1BVU19SQU5HRV9CRUdJTj04MTkyCkNPTkZJ R19OUl9DUFVTX1JBTkdFX0VORD04MTkyCkNPTkZJR19OUl9DUFVTX0RFRkFVTFQ9ODE5MgpDT05G SUdfTlJfQ1BVUz04MTkyCkNPTkZJR19TQ0hFRF9TTVQ9eQpDT05GSUdfU0NIRURfTUM9eQpDT05G SUdfU0NIRURfTUNfUFJJTz15CkNPTkZJR19YODZfTE9DQUxfQVBJQz15CkNPTkZJR19YODZfSU9f QVBJQz15CkNPTkZJR19YODZfUkVST1VURV9GT1JfQlJPS0VOX0JPT1RfSVJRUz15CkNPTkZJR19Y ODZfTUNFPXkKQ09ORklHX1g4Nl9NQ0VMT0dfTEVHQUNZPXkKQ09ORklHX1g4Nl9NQ0VfSU5URUw9 eQpDT05GSUdfWDg2X01DRV9BTUQ9eQpDT05GSUdfWDg2X01DRV9USFJFU0hPTEQ9eQpDT05GSUdf WDg2X01DRV9JTkpFQ1Q9bQpDT05GSUdfWDg2X1RIRVJNQUxfVkVDVE9SPXkKCiMKIyBQZXJmb3Jt YW5jZSBtb25pdG9yaW5nCiMKQ09ORklHX1BFUkZfRVZFTlRTX0lOVEVMX1VOQ09SRT15CkNPTkZJ R19QRVJGX0VWRU5UU19JTlRFTF9SQVBMPXkKQ09ORklHX1BFUkZfRVZFTlRTX0lOVEVMX0NTVEFU RT15CiMgQ09ORklHX1BFUkZfRVZFTlRTX0FNRF9QT1dFUiBpcyBub3Qgc2V0CiMgZW5kIG9mIFBl cmZvcm1hbmNlIG1vbml0b3JpbmcKCkNPTkZJR19YODZfMTZCSVQ9eQpDT05GSUdfWDg2X0VTUEZJ WDY0PXkKQ09ORklHX1g4Nl9WU1lTQ0FMTF9FTVVMQVRJT049eQpDT05GSUdfWDg2X0lPUExfSU9Q RVJNPXkKQ09ORklHX0k4Sz1tCkNPTkZJR19NSUNST0NPREU9eQpDT05GSUdfTUlDUk9DT0RFX0lO VEVMPXkKQ09ORklHX01JQ1JPQ09ERV9BTUQ9eQpDT05GSUdfTUlDUk9DT0RFX09MRF9JTlRFUkZB Q0U9eQpDT05GSUdfWDg2X01TUj15CkNPTkZJR19YODZfQ1BVSUQ9eQpDT05GSUdfWDg2XzVMRVZF TD15CkNPTkZJR19YODZfRElSRUNUX0dCUEFHRVM9eQojIENPTkZJR19YODZfQ1BBX1NUQVRJU1RJ Q1MgaXMgbm90IHNldApDT05GSUdfQU1EX01FTV9FTkNSWVBUPXkKIyBDT05GSUdfQU1EX01FTV9F TkNSWVBUX0FDVElWRV9CWV9ERUZBVUxUIGlzIG5vdCBzZXQKQ09ORklHX05VTUE9eQpDT05GSUdf QU1EX05VTUE9eQpDT05GSUdfWDg2XzY0X0FDUElfTlVNQT15CkNPTkZJR19OT0RFU19TUEFOX09U SEVSX05PREVTPXkKQ09ORklHX05VTUFfRU1VPXkKQ09ORklHX05PREVTX1NISUZUPTEwCkNPTkZJ R19BUkNIX1NQQVJTRU1FTV9FTkFCTEU9eQpDT05GSUdfQVJDSF9TUEFSU0VNRU1fREVGQVVMVD15 CkNPTkZJR19BUkNIX1NFTEVDVF9NRU1PUllfTU9ERUw9eQpDT05GSUdfQVJDSF9NRU1PUllfUFJP QkU9eQpDT05GSUdfQVJDSF9QUk9DX0tDT1JFX1RFWFQ9eQpDT05GSUdfSUxMRUdBTF9QT0lOVEVS X1ZBTFVFPTB4ZGVhZDAwMDAwMDAwMDAwMApDT05GSUdfWDg2X1BNRU1fTEVHQUNZX0RFVklDRT15 CkNPTkZJR19YODZfUE1FTV9MRUdBQ1k9bQpDT05GSUdfWDg2X0NIRUNLX0JJT1NfQ09SUlVQVElP Tj15CiMgQ09ORklHX1g4Nl9CT09UUEFSQU1fTUVNT1JZX0NPUlJVUFRJT05fQ0hFQ0sgaXMgbm90 IHNldApDT05GSUdfWDg2X1JFU0VSVkVfTE9XPTY0CkNPTkZJR19NVFJSPXkKQ09ORklHX01UUlJf U0FOSVRJWkVSPXkKQ09ORklHX01UUlJfU0FOSVRJWkVSX0VOQUJMRV9ERUZBVUxUPTEKQ09ORklH X01UUlJfU0FOSVRJWkVSX1NQQVJFX1JFR19OUl9ERUZBVUxUPTEKQ09ORklHX1g4Nl9QQVQ9eQpD T05GSUdfQVJDSF9VU0VTX1BHX1VOQ0FDSEVEPXkKQ09ORklHX0FSQ0hfUkFORE9NPXkKQ09ORklH X1g4Nl9TTUFQPXkKQ09ORklHX1g4Nl9VTUlQPXkKQ09ORklHX1g4Nl9JTlRFTF9NRU1PUllfUFJP VEVDVElPTl9LRVlTPXkKQ09ORklHX1g4Nl9JTlRFTF9UU1hfTU9ERV9PRkY9eQojIENPTkZJR19Y ODZfSU5URUxfVFNYX01PREVfT04gaXMgbm90IHNldAojIENPTkZJR19YODZfSU5URUxfVFNYX01P REVfQVVUTyBpcyBub3Qgc2V0CkNPTkZJR19FRkk9eQpDT05GSUdfRUZJX1NUVUI9eQpDT05GSUdf RUZJX01JWEVEPXkKQ09ORklHX1NFQ0NPTVA9eQojIENPTkZJR19IWl8xMDAgaXMgbm90IHNldAoj IENPTkZJR19IWl8yNTAgaXMgbm90IHNldAojIENPTkZJR19IWl8zMDAgaXMgbm90IHNldApDT05G SUdfSFpfMTAwMD15CkNPTkZJR19IWj0xMDAwCkNPTkZJR19TQ0hFRF9IUlRJQ0s9eQpDT05GSUdf S0VYRUM9eQpDT05GSUdfS0VYRUNfRklMRT15CkNPTkZJR19BUkNIX0hBU19LRVhFQ19QVVJHQVRP Ulk9eQojIENPTkZJR19LRVhFQ19TSUcgaXMgbm90IHNldApDT05GSUdfQ1JBU0hfRFVNUD15CkNP TkZJR19LRVhFQ19KVU1QPXkKQ09ORklHX1BIWVNJQ0FMX1NUQVJUPTB4MTAwMDAwMApDT05GSUdf UkVMT0NBVEFCTEU9eQpDT05GSUdfUkFORE9NSVpFX0JBU0U9eQpDT05GSUdfWDg2X05FRURfUkVM T0NTPXkKQ09ORklHX1BIWVNJQ0FMX0FMSUdOPTB4MjAwMDAwCkNPTkZJR19EWU5BTUlDX01FTU9S WV9MQVlPVVQ9eQpDT05GSUdfUkFORE9NSVpFX01FTU9SWT15CkNPTkZJR19SQU5ET01JWkVfTUVN T1JZX1BIWVNJQ0FMX1BBRERJTkc9MHhhCkNPTkZJR19IT1RQTFVHX0NQVT15CkNPTkZJR19CT09U UEFSQU1fSE9UUExVR19DUFUwPXkKIyBDT05GSUdfREVCVUdfSE9UUExVR19DUFUwIGlzIG5vdCBz ZXQKIyBDT05GSUdfQ09NUEFUX1ZEU08gaXMgbm90IHNldApDT05GSUdfTEVHQUNZX1ZTWVNDQUxM X0VNVUxBVEU9eQojIENPTkZJR19MRUdBQ1lfVlNZU0NBTExfWE9OTFkgaXMgbm90IHNldAojIENP TkZJR19MRUdBQ1lfVlNZU0NBTExfTk9ORSBpcyBub3Qgc2V0CiMgQ09ORklHX0NNRExJTkVfQk9P TCBpcyBub3Qgc2V0CkNPTkZJR19NT0RJRllfTERUX1NZU0NBTEw9eQpDT05GSUdfSEFWRV9MSVZF UEFUQ0g9eQpDT05GSUdfTElWRVBBVENIPXkKIyBlbmQgb2YgUHJvY2Vzc29yIHR5cGUgYW5kIGZl YXR1cmVzCgpDT05GSUdfQVJDSF9IQVNfQUREX1BBR0VTPXkKQ09ORklHX0FSQ0hfRU5BQkxFX01F TU9SWV9IT1RQTFVHPXkKQ09ORklHX0FSQ0hfRU5BQkxFX01FTU9SWV9IT1RSRU1PVkU9eQpDT05G SUdfVVNFX1BFUkNQVV9OVU1BX05PREVfSUQ9eQpDT05GSUdfQVJDSF9FTkFCTEVfU1BMSVRfUE1E X1BUTE9DSz15CkNPTkZJR19BUkNIX0VOQUJMRV9IVUdFUEFHRV9NSUdSQVRJT049eQpDT05GSUdf QVJDSF9FTkFCTEVfVEhQX01JR1JBVElPTj15CgojCiMgUG93ZXIgbWFuYWdlbWVudCBhbmQgQUNQ SSBvcHRpb25zCiMKQ09ORklHX0FSQ0hfSElCRVJOQVRJT05fSEVBREVSPXkKQ09ORklHX1NVU1BF TkQ9eQpDT05GSUdfU1VTUEVORF9GUkVFWkVSPXkKIyBDT05GSUdfU1VTUEVORF9TS0lQX1NZTkMg aXMgbm90IHNldApDT05GSUdfSElCRVJOQVRFX0NBTExCQUNLUz15CkNPTkZJR19ISUJFUk5BVElP Tj15CkNPTkZJR19QTV9TVERfUEFSVElUSU9OPSIiCkNPTkZJR19QTV9TTEVFUD15CkNPTkZJR19Q TV9TTEVFUF9TTVA9eQojIENPTkZJR19QTV9BVVRPU0xFRVAgaXMgbm90IHNldAojIENPTkZJR19Q TV9XQUtFTE9DS1MgaXMgbm90IHNldApDT05GSUdfUE09eQpDT05GSUdfUE1fREVCVUc9eQpDT05G SUdfUE1fQURWQU5DRURfREVCVUc9eQojIENPTkZJR19QTV9URVNUX1NVU1BFTkQgaXMgbm90IHNl dApDT05GSUdfUE1fU0xFRVBfREVCVUc9eQojIENPTkZJR19EUE1fV0FUQ0hET0cgaXMgbm90IHNl dApDT05GSUdfUE1fVFJBQ0U9eQpDT05GSUdfUE1fVFJBQ0VfUlRDPXkKQ09ORklHX1BNX0NMSz15 CiMgQ09ORklHX1dRX1BPV0VSX0VGRklDSUVOVF9ERUZBVUxUIGlzIG5vdCBzZXQKIyBDT05GSUdf RU5FUkdZX01PREVMIGlzIG5vdCBzZXQKQ09ORklHX0FSQ0hfU1VQUE9SVFNfQUNQST15CkNPTkZJ R19BQ1BJPXkKQ09ORklHX0FDUElfTEVHQUNZX1RBQkxFU19MT09LVVA9eQpDT05GSUdfQVJDSF9N SUdIVF9IQVZFX0FDUElfUERDPXkKQ09ORklHX0FDUElfU1lTVEVNX1BPV0VSX1NUQVRFU19TVVBQ T1JUPXkKIyBDT05GSUdfQUNQSV9ERUJVR0dFUiBpcyBub3Qgc2V0CkNPTkZJR19BQ1BJX1NQQ1Jf VEFCTEU9eQpDT05GSUdfQUNQSV9MUElUPXkKQ09ORklHX0FDUElfU0xFRVA9eQojIENPTkZJR19B Q1BJX1BST0NGU19QT1dFUiBpcyBub3Qgc2V0CkNPTkZJR19BQ1BJX1JFVl9PVkVSUklERV9QT1NT SUJMRT15CkNPTkZJR19BQ1BJX0VDX0RFQlVHRlM9bQpDT05GSUdfQUNQSV9BQz15CkNPTkZJR19B Q1BJX0JBVFRFUlk9eQpDT05GSUdfQUNQSV9CVVRUT049eQpDT05GSUdfQUNQSV9WSURFTz1tCkNP TkZJR19BQ1BJX0ZBTj15CiMgQ09ORklHX0FDUElfVEFEIGlzIG5vdCBzZXQKQ09ORklHX0FDUElf RE9DSz15CkNPTkZJR19BQ1BJX0NQVV9GUkVRX1BTUz15CkNPTkZJR19BQ1BJX1BST0NFU1NPUl9D U1RBVEU9eQpDT05GSUdfQUNQSV9QUk9DRVNTT1JfSURMRT15CkNPTkZJR19BQ1BJX0NQUENfTElC PXkKQ09ORklHX0FDUElfUFJPQ0VTU09SPXkKQ09ORklHX0FDUElfSVBNST1tCkNPTkZJR19BQ1BJ X0hPVFBMVUdfQ1BVPXkKQ09ORklHX0FDUElfUFJPQ0VTU09SX0FHR1JFR0FUT1I9bQpDT05GSUdf QUNQSV9USEVSTUFMPXkKQ09ORklHX0FSQ0hfSEFTX0FDUElfVEFCTEVfVVBHUkFERT15CkNPTkZJ R19BQ1BJX1RBQkxFX1VQR1JBREU9eQojIENPTkZJR19BQ1BJX0RFQlVHIGlzIG5vdCBzZXQKQ09O RklHX0FDUElfUENJX1NMT1Q9eQpDT05GSUdfQUNQSV9DT05UQUlORVI9eQpDT05GSUdfQUNQSV9I T1RQTFVHX01FTU9SWT15CkNPTkZJR19BQ1BJX0hPVFBMVUdfSU9BUElDPXkKQ09ORklHX0FDUElf U0JTPW0KQ09ORklHX0FDUElfSEVEPXkKQ09ORklHX0FDUElfQ1VTVE9NX01FVEhPRD1tCkNPTkZJ R19BQ1BJX0JHUlQ9eQojIENPTkZJR19BQ1BJX1JFRFVDRURfSEFSRFdBUkVfT05MWSBpcyBub3Qg c2V0CkNPTkZJR19BQ1BJX05GSVQ9bQojIENPTkZJR19ORklUX1NFQ1VSSVRZX0RFQlVHIGlzIG5v dCBzZXQKQ09ORklHX0FDUElfTlVNQT15CiMgQ09ORklHX0FDUElfSE1BVCBpcyBub3Qgc2V0CkNP TkZJR19IQVZFX0FDUElfQVBFST15CkNPTkZJR19IQVZFX0FDUElfQVBFSV9OTUk9eQpDT05GSUdf QUNQSV9BUEVJPXkKQ09ORklHX0FDUElfQVBFSV9HSEVTPXkKQ09ORklHX0FDUElfQVBFSV9QQ0lF QUVSPXkKQ09ORklHX0FDUElfQVBFSV9NRU1PUllfRkFJTFVSRT15CkNPTkZJR19BQ1BJX0FQRUlf RUlOSj1tCkNPTkZJR19BQ1BJX0FQRUlfRVJTVF9ERUJVRz15CiMgQ09ORklHX0RQVEZfUE9XRVIg aXMgbm90IHNldApDT05GSUdfQUNQSV9XQVRDSERPRz15CkNPTkZJR19BQ1BJX0VYVExPRz1tCkNP TkZJR19BQ1BJX0FEWEw9eQojIENPTkZJR19QTUlDX09QUkVHSU9OIGlzIG5vdCBzZXQKIyBDT05G SUdfQUNQSV9DT05GSUdGUyBpcyBub3Qgc2V0CkNPTkZJR19YODZfUE1fVElNRVI9eQpDT05GSUdf U0ZJPXkKCiMKIyBDUFUgRnJlcXVlbmN5IHNjYWxpbmcKIwpDT05GSUdfQ1BVX0ZSRVE9eQpDT05G SUdfQ1BVX0ZSRVFfR09WX0FUVFJfU0VUPXkKQ09ORklHX0NQVV9GUkVRX0dPVl9DT01NT049eQoj IENPTkZJR19DUFVfRlJFUV9TVEFUIGlzIG5vdCBzZXQKIyBDT05GSUdfQ1BVX0ZSRVFfREVGQVVM VF9HT1ZfUEVSRk9STUFOQ0UgaXMgbm90IHNldAojIENPTkZJR19DUFVfRlJFUV9ERUZBVUxUX0dP Vl9QT1dFUlNBVkUgaXMgbm90IHNldAojIENPTkZJR19DUFVfRlJFUV9ERUZBVUxUX0dPVl9VU0VS U1BBQ0UgaXMgbm90IHNldApDT05GSUdfQ1BVX0ZSRVFfREVGQVVMVF9HT1ZfT05ERU1BTkQ9eQoj IENPTkZJR19DUFVfRlJFUV9ERUZBVUxUX0dPVl9DT05TRVJWQVRJVkUgaXMgbm90IHNldAojIENP TkZJR19DUFVfRlJFUV9ERUZBVUxUX0dPVl9TQ0hFRFVUSUwgaXMgbm90IHNldApDT05GSUdfQ1BV X0ZSRVFfR09WX1BFUkZPUk1BTkNFPXkKQ09ORklHX0NQVV9GUkVRX0dPVl9QT1dFUlNBVkU9eQpD T05GSUdfQ1BVX0ZSRVFfR09WX1VTRVJTUEFDRT15CkNPTkZJR19DUFVfRlJFUV9HT1ZfT05ERU1B TkQ9eQpDT05GSUdfQ1BVX0ZSRVFfR09WX0NPTlNFUlZBVElWRT15CiMgQ09ORklHX0NQVV9GUkVR X0dPVl9TQ0hFRFVUSUwgaXMgbm90IHNldAoKIwojIENQVSBmcmVxdWVuY3kgc2NhbGluZyBkcml2 ZXJzCiMKQ09ORklHX1g4Nl9JTlRFTF9QU1RBVEU9eQpDT05GSUdfWDg2X1BDQ19DUFVGUkVRPW0K Q09ORklHX1g4Nl9BQ1BJX0NQVUZSRVE9bQpDT05GSUdfWDg2X0FDUElfQ1BVRlJFUV9DUEI9eQpD T05GSUdfWDg2X1BPV0VSTk9XX0s4PW0KQ09ORklHX1g4Nl9BTURfRlJFUV9TRU5TSVRJVklUWT1t CiMgQ09ORklHX1g4Nl9TUEVFRFNURVBfQ0VOVFJJTk8gaXMgbm90IHNldApDT05GSUdfWDg2X1A0 X0NMT0NLTU9EPW0KCiMKIyBzaGFyZWQgb3B0aW9ucwojCkNPTkZJR19YODZfU1BFRURTVEVQX0xJ Qj1tCiMgZW5kIG9mIENQVSBGcmVxdWVuY3kgc2NhbGluZwoKIwojIENQVSBJZGxlCiMKQ09ORklH X0NQVV9JRExFPXkKIyBDT05GSUdfQ1BVX0lETEVfR09WX0xBRERFUiBpcyBub3Qgc2V0CkNPTkZJ R19DUFVfSURMRV9HT1ZfTUVOVT15CiMgQ09ORklHX0NQVV9JRExFX0dPVl9URU8gaXMgbm90IHNl dAojIENPTkZJR19DUFVfSURMRV9HT1ZfSEFMVFBPTEwgaXMgbm90IHNldApDT05GSUdfSEFMVFBP TExfQ1BVSURMRT15CiMgZW5kIG9mIENQVSBJZGxlCgpDT05GSUdfSU5URUxfSURMRT15CiMgZW5k IG9mIFBvd2VyIG1hbmFnZW1lbnQgYW5kIEFDUEkgb3B0aW9ucwoKIwojIEJ1cyBvcHRpb25zIChQ Q0kgZXRjLikKIwpDT05GSUdfUENJX0RJUkVDVD15CkNPTkZJR19QQ0lfTU1DT05GSUc9eQpDT05G SUdfUENJX1hFTj15CkNPTkZJR19NTUNPTkZfRkFNMTBIPXkKIyBDT05GSUdfUENJX0NOQjIwTEVf UVVJUksgaXMgbm90IHNldAojIENPTkZJR19JU0FfQlVTIGlzIG5vdCBzZXQKQ09ORklHX0lTQV9E TUFfQVBJPXkKQ09ORklHX0FNRF9OQj15CiMgQ09ORklHX1g4Nl9TWVNGQiBpcyBub3Qgc2V0CiMg ZW5kIG9mIEJ1cyBvcHRpb25zIChQQ0kgZXRjLikKCiMKIyBCaW5hcnkgRW11bGF0aW9ucwojCkNP TkZJR19JQTMyX0VNVUxBVElPTj15CiMgQ09ORklHX1g4Nl9YMzIgaXMgbm90IHNldApDT05GSUdf Q09NUEFUXzMyPXkKQ09ORklHX0NPTVBBVD15CkNPTkZJR19DT01QQVRfRk9SX1U2NF9BTElHTk1F TlQ9eQpDT05GSUdfU1lTVklQQ19DT01QQVQ9eQojIGVuZCBvZiBCaW5hcnkgRW11bGF0aW9ucwoK IwojIEZpcm13YXJlIERyaXZlcnMKIwpDT05GSUdfRUREPW0KIyBDT05GSUdfRUREX09GRiBpcyBu b3Qgc2V0CkNPTkZJR19GSVJNV0FSRV9NRU1NQVA9eQpDT05GSUdfRE1JSUQ9eQpDT05GSUdfRE1J X1NZU0ZTPXkKQ09ORklHX0RNSV9TQ0FOX01BQ0hJTkVfTk9OX0VGSV9GQUxMQkFDSz15CkNPTkZJ R19JU0NTSV9JQkZUX0ZJTkQ9eQpDT05GSUdfSVNDU0lfSUJGVD1tCkNPTkZJR19GV19DRkdfU1lT RlM9eQojIENPTkZJR19GV19DRkdfU1lTRlNfQ01ETElORSBpcyBub3Qgc2V0CiMgQ09ORklHX0dP T0dMRV9GSVJNV0FSRSBpcyBub3Qgc2V0CgojCiMgRUZJIChFeHRlbnNpYmxlIEZpcm13YXJlIElu dGVyZmFjZSkgU3VwcG9ydAojCkNPTkZJR19FRklfVkFSUz15CkNPTkZJR19FRklfRVNSVD15CkNP TkZJR19FRklfVkFSU19QU1RPUkU9eQpDT05GSUdfRUZJX1ZBUlNfUFNUT1JFX0RFRkFVTFRfRElT QUJMRT15CkNPTkZJR19FRklfUlVOVElNRV9NQVA9eQojIENPTkZJR19FRklfRkFLRV9NRU1NQVAg aXMgbm90IHNldApDT05GSUdfRUZJX1JVTlRJTUVfV1JBUFBFUlM9eQojIENPTkZJR19FRklfQk9P VExPQURFUl9DT05UUk9MIGlzIG5vdCBzZXQKIyBDT05GSUdfRUZJX0NBUFNVTEVfTE9BREVSIGlz IG5vdCBzZXQKIyBDT05GSUdfRUZJX1RFU1QgaXMgbm90IHNldApDT05GSUdfQVBQTEVfUFJPUEVS VElFUz15CiMgQ09ORklHX1JFU0VUX0FUVEFDS19NSVRJR0FUSU9OIGlzIG5vdCBzZXQKIyBDT05G SUdfRUZJX1JDSTJfVEFCTEUgaXMgbm90IHNldAojIENPTkZJR19FRklfRElTQUJMRV9QQ0lfRE1B IGlzIG5vdCBzZXQKIyBlbmQgb2YgRUZJIChFeHRlbnNpYmxlIEZpcm13YXJlIEludGVyZmFjZSkg U3VwcG9ydAoKQ09ORklHX1VFRklfQ1BFUj15CkNPTkZJR19VRUZJX0NQRVJfWDg2PXkKQ09ORklH X0VGSV9ERVZfUEFUSF9QQVJTRVI9eQpDT05GSUdfRUZJX0VBUkxZQ09OPXkKCiMKIyBUZWdyYSBm aXJtd2FyZSBkcml2ZXIKIwojIGVuZCBvZiBUZWdyYSBmaXJtd2FyZSBkcml2ZXIKIyBlbmQgb2Yg RmlybXdhcmUgRHJpdmVycwoKQ09ORklHX0hBVkVfS1ZNPXkKQ09ORklHX0hBVkVfS1ZNX0lSUUNI SVA9eQpDT05GSUdfSEFWRV9LVk1fSVJRRkQ9eQpDT05GSUdfSEFWRV9LVk1fSVJRX1JPVVRJTkc9 eQpDT05GSUdfSEFWRV9LVk1fRVZFTlRGRD15CkNPTkZJR19LVk1fTU1JTz15CkNPTkZJR19LVk1f QVNZTkNfUEY9eQpDT05GSUdfSEFWRV9LVk1fTVNJPXkKQ09ORklHX0hBVkVfS1ZNX0NQVV9SRUxB WF9JTlRFUkNFUFQ9eQpDT05GSUdfS1ZNX1ZGSU89eQpDT05GSUdfS1ZNX0dFTkVSSUNfRElSVFlM T0dfUkVBRF9QUk9URUNUPXkKQ09ORklHX0tWTV9DT01QQVQ9eQpDT05GSUdfSEFWRV9LVk1fSVJR X0JZUEFTUz15CkNPTkZJR19IQVZFX0tWTV9OT19QT0xMPXkKQ09ORklHX1ZJUlRVQUxJWkFUSU9O PXkKQ09ORklHX0tWTT1tCkNPTkZJR19LVk1fV0VSUk9SPXkKQ09ORklHX0tWTV9JTlRFTD1tCkNP TkZJR19LVk1fQU1EPW0KQ09ORklHX0tWTV9BTURfU0VWPXkKQ09ORklHX0tWTV9NTVVfQVVESVQ9 eQpDT05GSUdfVkhPU1RfTkVUPW0KIyBDT05GSUdfVkhPU1RfU0NTSSBpcyBub3Qgc2V0CkNPTkZJ R19WSE9TVF9WU09DSz1tCkNPTkZJR19WSE9TVD1tCiMgQ09ORklHX1ZIT1NUX0NST1NTX0VORElB Tl9MRUdBQ1kgaXMgbm90IHNldAoKIwojIEdlbmVyYWwgYXJjaGl0ZWN0dXJlLWRlcGVuZGVudCBv cHRpb25zCiMKQ09ORklHX0NSQVNIX0NPUkU9eQpDT05GSUdfS0VYRUNfQ09SRT15CkNPTkZJR19I T1RQTFVHX1NNVD15CkNPTkZJR19PUFJPRklMRT1tCkNPTkZJR19PUFJPRklMRV9FVkVOVF9NVUxU SVBMRVg9eQpDT05GSUdfSEFWRV9PUFJPRklMRT15CkNPTkZJR19PUFJPRklMRV9OTUlfVElNRVI9 eQpDT05GSUdfS1BST0JFUz15CkNPTkZJR19KVU1QX0xBQkVMPXkKIyBDT05GSUdfU1RBVElDX0tF WVNfU0VMRlRFU1QgaXMgbm90IHNldApDT05GSUdfT1BUUFJPQkVTPXkKQ09ORklHX0tQUk9CRVNf T05fRlRSQUNFPXkKQ09ORklHX1VQUk9CRVM9eQpDT05GSUdfSEFWRV9FRkZJQ0lFTlRfVU5BTElH TkVEX0FDQ0VTUz15CkNPTkZJR19BUkNIX1VTRV9CVUlMVElOX0JTV0FQPXkKQ09ORklHX0tSRVRQ Uk9CRVM9eQpDT05GSUdfVVNFUl9SRVRVUk5fTk9USUZJRVI9eQpDT05GSUdfSEFWRV9JT1JFTUFQ X1BST1Q9eQpDT05GSUdfSEFWRV9LUFJPQkVTPXkKQ09ORklHX0hBVkVfS1JFVFBST0JFUz15CkNP TkZJR19IQVZFX09QVFBST0JFUz15CkNPTkZJR19IQVZFX0tQUk9CRVNfT05fRlRSQUNFPXkKQ09O RklHX0hBVkVfRlVOQ1RJT05fRVJST1JfSU5KRUNUSU9OPXkKQ09ORklHX0hBVkVfTk1JPXkKQ09O RklHX0hBVkVfQVJDSF9UUkFDRUhPT0s9eQpDT05GSUdfSEFWRV9ETUFfQ09OVElHVU9VUz15CkNP TkZJR19HRU5FUklDX1NNUF9JRExFX1RIUkVBRD15CkNPTkZJR19BUkNIX0hBU19GT1JUSUZZX1NP VVJDRT15CkNPTkZJR19BUkNIX0hBU19TRVRfTUVNT1JZPXkKQ09ORklHX0FSQ0hfSEFTX1NFVF9E SVJFQ1RfTUFQPXkKQ09ORklHX0hBVkVfQVJDSF9USFJFQURfU1RSVUNUX1dISVRFTElTVD15CkNP TkZJR19BUkNIX1dBTlRTX0RZTkFNSUNfVEFTS19TVFJVQ1Q9eQpDT05GSUdfSEFWRV9BU01fTU9E VkVSU0lPTlM9eQpDT05GSUdfSEFWRV9SRUdTX0FORF9TVEFDS19BQ0NFU1NfQVBJPXkKQ09ORklH X0hBVkVfUlNFUT15CkNPTkZJR19IQVZFX0ZVTkNUSU9OX0FSR19BQ0NFU1NfQVBJPXkKQ09ORklH X0hBVkVfQ0xLPXkKQ09ORklHX0hBVkVfSFdfQlJFQUtQT0lOVD15CkNPTkZJR19IQVZFX01JWEVE X0JSRUFLUE9JTlRTX1JFR1M9eQpDT05GSUdfSEFWRV9VU0VSX1JFVFVSTl9OT1RJRklFUj15CkNP TkZJR19IQVZFX1BFUkZfRVZFTlRTX05NST15CkNPTkZJR19IQVZFX0hBUkRMT0NLVVBfREVURUNU T1JfUEVSRj15CkNPTkZJR19IQVZFX1BFUkZfUkVHUz15CkNPTkZJR19IQVZFX1BFUkZfVVNFUl9T VEFDS19EVU1QPXkKQ09ORklHX0hBVkVfQVJDSF9KVU1QX0xBQkVMPXkKQ09ORklHX0hBVkVfQVJD SF9KVU1QX0xBQkVMX1JFTEFUSVZFPXkKQ09ORklHX01NVV9HQVRIRVJfVEFCTEVfRlJFRT15CkNP TkZJR19NTVVfR0FUSEVSX1JDVV9UQUJMRV9GUkVFPXkKQ09ORklHX0FSQ0hfSEFWRV9OTUlfU0FG RV9DTVBYQ0hHPXkKQ09ORklHX0hBVkVfQUxJR05FRF9TVFJVQ1RfUEFHRT15CkNPTkZJR19IQVZF X0NNUFhDSEdfTE9DQUw9eQpDT05GSUdfSEFWRV9DTVBYQ0hHX0RPVUJMRT15CkNPTkZJR19BUkNI X1dBTlRfQ09NUEFUX0lQQ19QQVJTRV9WRVJTSU9OPXkKQ09ORklHX0FSQ0hfV0FOVF9PTERfQ09N UEFUX0lQQz15CkNPTkZJR19IQVZFX0FSQ0hfU0VDQ09NUF9GSUxURVI9eQpDT05GSUdfU0VDQ09N UF9GSUxURVI9eQpDT05GSUdfSEFWRV9BUkNIX1NUQUNLTEVBSz15CkNPTkZJR19IQVZFX1NUQUNL UFJPVEVDVE9SPXkKQ09ORklHX0NDX0hBU19TVEFDS1BST1RFQ1RPUl9OT05FPXkKQ09ORklHX1NU QUNLUFJPVEVDVE9SPXkKQ09ORklHX1NUQUNLUFJPVEVDVE9SX1NUUk9ORz15CkNPTkZJR19IQVZF X0FSQ0hfV0lUSElOX1NUQUNLX0ZSQU1FUz15CkNPTkZJR19IQVZFX0NPTlRFWFRfVFJBQ0tJTkc9 eQpDT05GSUdfSEFWRV9WSVJUX0NQVV9BQ0NPVU5USU5HX0dFTj15CkNPTkZJR19IQVZFX0lSUV9U SU1FX0FDQ09VTlRJTkc9eQpDT05GSUdfSEFWRV9NT1ZFX1BNRD15CkNPTkZJR19IQVZFX0FSQ0hf VFJBTlNQQVJFTlRfSFVHRVBBR0U9eQpDT05GSUdfSEFWRV9BUkNIX1RSQU5TUEFSRU5UX0hVR0VQ QUdFX1BVRD15CkNPTkZJR19IQVZFX0FSQ0hfSFVHRV9WTUFQPXkKQ09ORklHX0FSQ0hfV0FOVF9I VUdFX1BNRF9TSEFSRT15CkNPTkZJR19IQVZFX0FSQ0hfU09GVF9ESVJUWT15CkNPTkZJR19IQVZF X01PRF9BUkNIX1NQRUNJRklDPXkKQ09ORklHX01PRFVMRVNfVVNFX0VMRl9SRUxBPXkKQ09ORklH X0hBVkVfSVJRX0VYSVRfT05fSVJRX1NUQUNLPXkKQ09ORklHX0FSQ0hfSEFTX0VMRl9SQU5ET01J WkU9eQpDT05GSUdfSEFWRV9BUkNIX01NQVBfUk5EX0JJVFM9eQpDT05GSUdfSEFWRV9FWElUX1RI UkVBRD15CkNPTkZJR19BUkNIX01NQVBfUk5EX0JJVFM9MjgKQ09ORklHX0hBVkVfQVJDSF9NTUFQ X1JORF9DT01QQVRfQklUUz15CkNPTkZJR19BUkNIX01NQVBfUk5EX0NPTVBBVF9CSVRTPTgKQ09O RklHX0hBVkVfQVJDSF9DT01QQVRfTU1BUF9CQVNFUz15CkNPTkZJR19IQVZFX0NPUFlfVEhSRUFE X1RMUz15CkNPTkZJR19IQVZFX1NUQUNLX1ZBTElEQVRJT049eQpDT05GSUdfSEFWRV9SRUxJQUJM RV9TVEFDS1RSQUNFPXkKQ09ORklHX09MRF9TSUdTVVNQRU5EMz15CkNPTkZJR19DT01QQVRfT0xE X1NJR0FDVElPTj15CkNPTkZJR19DT01QQVRfMzJCSVRfVElNRT15CkNPTkZJR19IQVZFX0FSQ0hf Vk1BUF9TVEFDSz15CkNPTkZJR19WTUFQX1NUQUNLPXkKQ09ORklHX0FSQ0hfSEFTX1NUUklDVF9L RVJORUxfUldYPXkKQ09ORklHX1NUUklDVF9LRVJORUxfUldYPXkKQ09ORklHX0FSQ0hfSEFTX1NU UklDVF9NT0RVTEVfUldYPXkKQ09ORklHX1NUUklDVF9NT0RVTEVfUldYPXkKQ09ORklHX0hBVkVf QVJDSF9QUkVMMzJfUkVMT0NBVElPTlM9eQpDT05GSUdfQVJDSF9VU0VfTUVNUkVNQVBfUFJPVD15 CiMgQ09ORklHX0xPQ0tfRVZFTlRfQ09VTlRTIGlzIG5vdCBzZXQKQ09ORklHX0FSQ0hfSEFTX01F TV9FTkNSWVBUPXkKCiMKIyBHQ09WLWJhc2VkIGtlcm5lbCBwcm9maWxpbmcKIwojIENPTkZJR19H Q09WX0tFUk5FTCBpcyBub3Qgc2V0CkNPTkZJR19BUkNIX0hBU19HQ09WX1BST0ZJTEVfQUxMPXkK IyBlbmQgb2YgR0NPVi1iYXNlZCBrZXJuZWwgcHJvZmlsaW5nCgpDT05GSUdfUExVR0lOX0hPU1RD Qz0iZysrIgpDT05GSUdfSEFWRV9HQ0NfUExVR0lOUz15CkNPTkZJR19HQ0NfUExVR0lOUz15CiMg Q09ORklHX0dDQ19QTFVHSU5fQ1lDX0NPTVBMRVhJVFkgaXMgbm90IHNldAojIENPTkZJR19HQ0Nf UExVR0lOX0xBVEVOVF9FTlRST1BZIGlzIG5vdCBzZXQKIyBDT05GSUdfR0NDX1BMVUdJTl9SQU5E U1RSVUNUIGlzIG5vdCBzZXQKIyBlbmQgb2YgR2VuZXJhbCBhcmNoaXRlY3R1cmUtZGVwZW5kZW50 IG9wdGlvbnMKCkNPTkZJR19SVF9NVVRFWEVTPXkKQ09ORklHX0JBU0VfU01BTEw9MApDT05GSUdf TU9EVUxFX1NJR19GT1JNQVQ9eQpDT05GSUdfTU9EVUxFUz15CkNPTkZJR19NT0RVTEVfRk9SQ0Vf TE9BRD15CkNPTkZJR19NT0RVTEVfVU5MT0FEPXkKIyBDT05GSUdfTU9EVUxFX0ZPUkNFX1VOTE9B RCBpcyBub3Qgc2V0CiMgQ09ORklHX01PRFZFUlNJT05TIGlzIG5vdCBzZXQKIyBDT05GSUdfTU9E VUxFX1NSQ1ZFUlNJT05fQUxMIGlzIG5vdCBzZXQKQ09ORklHX01PRFVMRV9TSUc9eQojIENPTkZJ R19NT0RVTEVfU0lHX0ZPUkNFIGlzIG5vdCBzZXQKQ09ORklHX01PRFVMRV9TSUdfQUxMPXkKIyBD T05GSUdfTU9EVUxFX1NJR19TSEExIGlzIG5vdCBzZXQKIyBDT05GSUdfTU9EVUxFX1NJR19TSEEy MjQgaXMgbm90IHNldApDT05GSUdfTU9EVUxFX1NJR19TSEEyNTY9eQojIENPTkZJR19NT0RVTEVf U0lHX1NIQTM4NCBpcyBub3Qgc2V0CiMgQ09ORklHX01PRFVMRV9TSUdfU0hBNTEyIGlzIG5vdCBz ZXQKQ09ORklHX01PRFVMRV9TSUdfSEFTSD0ic2hhMjU2IgojIENPTkZJR19NT0RVTEVfQ09NUFJF U1MgaXMgbm90IHNldAojIENPTkZJR19NT0RVTEVfQUxMT1dfTUlTU0lOR19OQU1FU1BBQ0VfSU1Q T1JUUyBpcyBub3Qgc2V0CiMgQ09ORklHX1VOVVNFRF9TWU1CT0xTIGlzIG5vdCBzZXQKIyBDT05G SUdfVFJJTV9VTlVTRURfS1NZTVMgaXMgbm90IHNldApDT05GSUdfTU9EVUxFU19UUkVFX0xPT0tV UD15CkNPTkZJR19CTE9DSz15CkNPTkZJR19CTEtfU0NTSV9SRVFVRVNUPXkKQ09ORklHX0JMS19D R1JPVVBfUldTVEFUPXkKQ09ORklHX0JMS19ERVZfQlNHPXkKQ09ORklHX0JMS19ERVZfQlNHTElC PXkKQ09ORklHX0JMS19ERVZfSU5URUdSSVRZPXkKQ09ORklHX0JMS19ERVZfSU5URUdSSVRZX1Qx MD1tCkNPTkZJR19CTEtfREVWX1pPTkVEPXkKQ09ORklHX0JMS19ERVZfVEhST1RUTElORz15CiMg Q09ORklHX0JMS19ERVZfVEhST1RUTElOR19MT1cgaXMgbm90IHNldAojIENPTkZJR19CTEtfQ01E TElORV9QQVJTRVIgaXMgbm90IHNldAojIENPTkZJR19CTEtfV0JUIGlzIG5vdCBzZXQKIyBDT05G SUdfQkxLX0NHUk9VUF9JT0xBVEVOQ1kgaXMgbm90IHNldAojIENPTkZJR19CTEtfQ0dST1VQX0lP Q09TVCBpcyBub3Qgc2V0CkNPTkZJR19CTEtfREVCVUdfRlM9eQpDT05GSUdfQkxLX0RFQlVHX0ZT X1pPTkVEPXkKIyBDT05GSUdfQkxLX1NFRF9PUEFMIGlzIG5vdCBzZXQKCiMKIyBQYXJ0aXRpb24g VHlwZXMKIwpDT05GSUdfUEFSVElUSU9OX0FEVkFOQ0VEPXkKIyBDT05GSUdfQUNPUk5fUEFSVElU SU9OIGlzIG5vdCBzZXQKIyBDT05GSUdfQUlYX1BBUlRJVElPTiBpcyBub3Qgc2V0CkNPTkZJR19P U0ZfUEFSVElUSU9OPXkKQ09ORklHX0FNSUdBX1BBUlRJVElPTj15CiMgQ09ORklHX0FUQVJJX1BB UlRJVElPTiBpcyBub3Qgc2V0CkNPTkZJR19NQUNfUEFSVElUSU9OPXkKQ09ORklHX01TRE9TX1BB UlRJVElPTj15CkNPTkZJR19CU0RfRElTS0xBQkVMPXkKQ09ORklHX01JTklYX1NVQlBBUlRJVElP Tj15CkNPTkZJR19TT0xBUklTX1g4Nl9QQVJUSVRJT049eQpDT05GSUdfVU5JWFdBUkVfRElTS0xB QkVMPXkKIyBDT05GSUdfTERNX1BBUlRJVElPTiBpcyBub3Qgc2V0CkNPTkZJR19TR0lfUEFSVElU SU9OPXkKIyBDT05GSUdfVUxUUklYX1BBUlRJVElPTiBpcyBub3Qgc2V0CkNPTkZJR19TVU5fUEFS VElUSU9OPXkKQ09ORklHX0tBUk1BX1BBUlRJVElPTj15CkNPTkZJR19FRklfUEFSVElUSU9OPXkK IyBDT05GSUdfU1lTVjY4X1BBUlRJVElPTiBpcyBub3Qgc2V0CiMgQ09ORklHX0NNRExJTkVfUEFS VElUSU9OIGlzIG5vdCBzZXQKIyBlbmQgb2YgUGFydGl0aW9uIFR5cGVzCgpDT05GSUdfQkxPQ0tf Q09NUEFUPXkKQ09ORklHX0JMS19NUV9QQ0k9eQpDT05GSUdfQkxLX01RX1ZJUlRJTz15CkNPTkZJ R19CTEtfUE09eQoKIwojIElPIFNjaGVkdWxlcnMKIwpDT05GSUdfTVFfSU9TQ0hFRF9ERUFETElO RT15CkNPTkZJR19NUV9JT1NDSEVEX0tZQkVSPXkKIyBDT05GSUdfSU9TQ0hFRF9CRlEgaXMgbm90 IHNldAojIGVuZCBvZiBJTyBTY2hlZHVsZXJzCgpDT05GSUdfUFJFRU1QVF9OT1RJRklFUlM9eQpD T05GSUdfUEFEQVRBPXkKQ09ORklHX0FTTjE9eQpDT05GSUdfSU5MSU5FX1NQSU5fVU5MT0NLX0lS UT15CkNPTkZJR19JTkxJTkVfUkVBRF9VTkxPQ0s9eQpDT05GSUdfSU5MSU5FX1JFQURfVU5MT0NL X0lSUT15CkNPTkZJR19JTkxJTkVfV1JJVEVfVU5MT0NLPXkKQ09ORklHX0lOTElORV9XUklURV9V TkxPQ0tfSVJRPXkKQ09ORklHX0FSQ0hfU1VQUE9SVFNfQVRPTUlDX1JNVz15CkNPTkZJR19NVVRF WF9TUElOX09OX09XTkVSPXkKQ09ORklHX1JXU0VNX1NQSU5fT05fT1dORVI9eQpDT05GSUdfTE9D S19TUElOX09OX09XTkVSPXkKQ09ORklHX0FSQ0hfVVNFX1FVRVVFRF9TUElOTE9DS1M9eQpDT05G SUdfUVVFVUVEX1NQSU5MT0NLUz15CkNPTkZJR19BUkNIX1VTRV9RVUVVRURfUldMT0NLUz15CkNP TkZJR19RVUVVRURfUldMT0NLUz15CkNPTkZJR19BUkNIX0hBU19TWU5DX0NPUkVfQkVGT1JFX1VT RVJNT0RFPXkKQ09ORklHX0FSQ0hfSEFTX1NZU0NBTExfV1JBUFBFUj15CkNPTkZJR19GUkVFWkVS PXkKCiMKIyBFeGVjdXRhYmxlIGZpbGUgZm9ybWF0cwojCkNPTkZJR19CSU5GTVRfRUxGPXkKQ09O RklHX0NPTVBBVF9CSU5GTVRfRUxGPXkKQ09ORklHX0VMRkNPUkU9eQpDT05GSUdfQ09SRV9EVU1Q X0RFRkFVTFRfRUxGX0hFQURFUlM9eQpDT05GSUdfQklORk1UX1NDUklQVD15CkNPTkZJR19CSU5G TVRfTUlTQz1tCkNPTkZJR19DT1JFRFVNUD15CiMgZW5kIG9mIEV4ZWN1dGFibGUgZmlsZSBmb3Jt YXRzCgojCiMgTWVtb3J5IE1hbmFnZW1lbnQgb3B0aW9ucwojCkNPTkZJR19TRUxFQ1RfTUVNT1JZ X01PREVMPXkKQ09ORklHX1NQQVJTRU1FTV9NQU5VQUw9eQpDT05GSUdfU1BBUlNFTUVNPXkKQ09O RklHX05FRURfTVVMVElQTEVfTk9ERVM9eQpDT05GSUdfSEFWRV9NRU1PUllfUFJFU0VOVD15CkNP TkZJR19TUEFSU0VNRU1fRVhUUkVNRT15CkNPTkZJR19TUEFSU0VNRU1fVk1FTU1BUF9FTkFCTEU9 eQpDT05GSUdfU1BBUlNFTUVNX1ZNRU1NQVA9eQpDT05GSUdfSEFWRV9NRU1CTE9DS19OT0RFX01B UD15CkNPTkZJR19IQVZFX0ZBU1RfR1VQPXkKQ09ORklHX01FTU9SWV9JU09MQVRJT049eQpDT05G SUdfSEFWRV9CT09UTUVNX0lORk9fTk9ERT15CkNPTkZJR19NRU1PUllfSE9UUExVRz15CkNPTkZJ R19NRU1PUllfSE9UUExVR19TUEFSU0U9eQojIENPTkZJR19NRU1PUllfSE9UUExVR19ERUZBVUxU X09OTElORSBpcyBub3Qgc2V0CkNPTkZJR19NRU1PUllfSE9UUkVNT1ZFPXkKQ09ORklHX1NQTElU X1BUTE9DS19DUFVTPTQKQ09ORklHX01FTU9SWV9CQUxMT09OPXkKQ09ORklHX0JBTExPT05fQ09N UEFDVElPTj15CkNPTkZJR19DT01QQUNUSU9OPXkKQ09ORklHX01JR1JBVElPTj15CkNPTkZJR19D T05USUdfQUxMT0M9eQpDT05GSUdfUEhZU19BRERSX1RfNjRCSVQ9eQpDT05GSUdfQk9VTkNFPXkK Q09ORklHX1ZJUlRfVE9fQlVTPXkKQ09ORklHX01NVV9OT1RJRklFUj15CkNPTkZJR19LU009eQpD T05GSUdfREVGQVVMVF9NTUFQX01JTl9BRERSPTQwOTYKQ09ORklHX0FSQ0hfU1VQUE9SVFNfTUVN T1JZX0ZBSUxVUkU9eQpDT05GSUdfTUVNT1JZX0ZBSUxVUkU9eQpDT05GSUdfSFdQT0lTT05fSU5K RUNUPW0KQ09ORklHX1RSQU5TUEFSRU5UX0hVR0VQQUdFPXkKQ09ORklHX1RSQU5TUEFSRU5UX0hV R0VQQUdFX0FMV0FZUz15CiMgQ09ORklHX1RSQU5TUEFSRU5UX0hVR0VQQUdFX01BRFZJU0UgaXMg bm90IHNldApDT05GSUdfQVJDSF9XQU5UU19USFBfU1dBUD15CkNPTkZJR19USFBfU1dBUD15CkNP TkZJR19UUkFOU1BBUkVOVF9IVUdFX1BBR0VDQUNIRT15CkNPTkZJR19DTEVBTkNBQ0hFPXkKQ09O RklHX0ZST05UU1dBUD15CkNPTkZJR19DTUE9eQojIENPTkZJR19DTUFfREVCVUcgaXMgbm90IHNl dAojIENPTkZJR19DTUFfREVCVUdGUyBpcyBub3Qgc2V0CkNPTkZJR19DTUFfQVJFQVM9NwpDT05G SUdfTUVNX1NPRlRfRElSVFk9eQpDT05GSUdfWlNXQVA9eQpDT05GSUdfWlBPT0w9eQpDT05GSUdf WkJVRD15CiMgQ09ORklHX1ozRk9MRCBpcyBub3Qgc2V0CkNPTkZJR19aU01BTExPQz15CiMgQ09O RklHX1BHVEFCTEVfTUFQUElORyBpcyBub3Qgc2V0CiMgQ09ORklHX1pTTUFMTE9DX1NUQVQgaXMg bm90IHNldApDT05GSUdfR0VORVJJQ19FQVJMWV9JT1JFTUFQPXkKQ09ORklHX0RFRkVSUkVEX1NU UlVDVF9QQUdFX0lOSVQ9eQpDT05GSUdfSURMRV9QQUdFX1RSQUNLSU5HPXkKQ09ORklHX0FSQ0hf SEFTX1BURV9ERVZNQVA9eQpDT05GSUdfWk9ORV9ERVZJQ0U9eQpDT05GSUdfREVWX1BBR0VNQVBf T1BTPXkKIyBDT05GSUdfREVWSUNFX1BSSVZBVEUgaXMgbm90IHNldApDT05GSUdfRlJBTUVfVkVD VE9SPXkKQ09ORklHX0FSQ0hfVVNFU19ISUdIX1ZNQV9GTEFHUz15CkNPTkZJR19BUkNIX0hBU19Q S0VZUz15CiMgQ09ORklHX1BFUkNQVV9TVEFUUyBpcyBub3Qgc2V0CiMgQ09ORklHX0dVUF9CRU5D SE1BUksgaXMgbm90IHNldAojIENPTkZJR19SRUFEX09OTFlfVEhQX0ZPUl9GUyBpcyBub3Qgc2V0 CkNPTkZJR19BUkNIX0hBU19QVEVfU1BFQ0lBTD15CkNPTkZJR19NQVBQSU5HX0RJUlRZX0hFTFBF UlM9eQojIGVuZCBvZiBNZW1vcnkgTWFuYWdlbWVudCBvcHRpb25zCgpDT05GSUdfTkVUPXkKQ09O RklHX0NPTVBBVF9ORVRMSU5LX01FU1NBR0VTPXkKQ09ORklHX05FVF9JTkdSRVNTPXkKQ09ORklH X05FVF9FR1JFU1M9eQpDT05GSUdfU0tCX0VYVEVOU0lPTlM9eQoKIwojIE5ldHdvcmtpbmcgb3B0 aW9ucwojCkNPTkZJR19QQUNLRVQ9eQpDT05GSUdfUEFDS0VUX0RJQUc9bQpDT05GSUdfVU5JWD15 CkNPTkZJR19VTklYX1NDTT15CkNPTkZJR19VTklYX0RJQUc9bQojIENPTkZJR19UTFMgaXMgbm90 IHNldApDT05GSUdfWEZSTT15CkNPTkZJR19YRlJNX0FMR089eQpDT05GSUdfWEZSTV9VU0VSPXkK IyBDT05GSUdfWEZSTV9JTlRFUkZBQ0UgaXMgbm90IHNldApDT05GSUdfWEZSTV9TVUJfUE9MSUNZ PXkKQ09ORklHX1hGUk1fTUlHUkFURT15CkNPTkZJR19YRlJNX1NUQVRJU1RJQ1M9eQpDT05GSUdf WEZSTV9JUENPTVA9bQpDT05GSUdfTkVUX0tFWT1tCkNPTkZJR19ORVRfS0VZX01JR1JBVEU9eQoj IENPTkZJR19YRFBfU09DS0VUUyBpcyBub3Qgc2V0CkNPTkZJR19JTkVUPXkKQ09ORklHX0lQX01V TFRJQ0FTVD15CkNPTkZJR19JUF9BRFZBTkNFRF9ST1VURVI9eQpDT05GSUdfSVBfRklCX1RSSUVf U1RBVFM9eQpDT05GSUdfSVBfTVVMVElQTEVfVEFCTEVTPXkKQ09ORklHX0lQX1JPVVRFX01VTFRJ UEFUSD15CkNPTkZJR19JUF9ST1VURV9WRVJCT1NFPXkKQ09ORklHX0lQX1JPVVRFX0NMQVNTSUQ9 eQpDT05GSUdfSVBfUE5QPXkKQ09ORklHX0lQX1BOUF9ESENQPXkKIyBDT05GSUdfSVBfUE5QX0JP T1RQIGlzIG5vdCBzZXQKIyBDT05GSUdfSVBfUE5QX1JBUlAgaXMgbm90IHNldApDT05GSUdfTkVU X0lQSVA9bQpDT05GSUdfTkVUX0lQR1JFX0RFTVVYPW0KQ09ORklHX05FVF9JUF9UVU5ORUw9bQpD T05GSUdfTkVUX0lQR1JFPW0KQ09ORklHX05FVF9JUEdSRV9CUk9BRENBU1Q9eQpDT05GSUdfSVBf TVJPVVRFX0NPTU1PTj15CkNPTkZJR19JUF9NUk9VVEU9eQpDT05GSUdfSVBfTVJPVVRFX01VTFRJ UExFX1RBQkxFUz15CkNPTkZJR19JUF9QSU1TTV9WMT15CkNPTkZJR19JUF9QSU1TTV9WMj15CkNP TkZJR19TWU5fQ09PS0lFUz15CkNPTkZJR19ORVRfSVBWVEk9bQpDT05GSUdfTkVUX1VEUF9UVU5O RUw9bQpDT05GSUdfTkVUX0ZPVT1tCkNPTkZJR19ORVRfRk9VX0lQX1RVTk5FTFM9eQpDT05GSUdf SU5FVF9BSD1tCkNPTkZJR19JTkVUX0VTUD1tCiMgQ09ORklHX0lORVRfRVNQX09GRkxPQUQgaXMg bm90IHNldAojIENPTkZJR19JTkVUX0VTUElOVENQIGlzIG5vdCBzZXQKQ09ORklHX0lORVRfSVBD T01QPW0KQ09ORklHX0lORVRfWEZSTV9UVU5ORUw9bQpDT05GSUdfSU5FVF9UVU5ORUw9bQpDT05G SUdfSU5FVF9ESUFHPW0KQ09ORklHX0lORVRfVENQX0RJQUc9bQpDT05GSUdfSU5FVF9VRFBfRElB Rz1tCiMgQ09ORklHX0lORVRfUkFXX0RJQUcgaXMgbm90IHNldAojIENPTkZJR19JTkVUX0RJQUdf REVTVFJPWSBpcyBub3Qgc2V0CkNPTkZJR19UQ1BfQ09OR19BRFZBTkNFRD15CkNPTkZJR19UQ1Bf Q09OR19CSUM9bQpDT05GSUdfVENQX0NPTkdfQ1VCSUM9eQpDT05GSUdfVENQX0NPTkdfV0VTVFdP T0Q9bQpDT05GSUdfVENQX0NPTkdfSFRDUD1tCkNPTkZJR19UQ1BfQ09OR19IU1RDUD1tCkNPTkZJ R19UQ1BfQ09OR19IWUJMQT1tCkNPTkZJR19UQ1BfQ09OR19WRUdBUz1tCiMgQ09ORklHX1RDUF9D T05HX05WIGlzIG5vdCBzZXQKQ09ORklHX1RDUF9DT05HX1NDQUxBQkxFPW0KQ09ORklHX1RDUF9D T05HX0xQPW0KQ09ORklHX1RDUF9DT05HX1ZFTk89bQpDT05GSUdfVENQX0NPTkdfWUVBSD1tCkNP TkZJR19UQ1BfQ09OR19JTExJTk9JUz1tCkNPTkZJR19UQ1BfQ09OR19EQ1RDUD1tCiMgQ09ORklH X1RDUF9DT05HX0NERyBpcyBub3Qgc2V0CiMgQ09ORklHX1RDUF9DT05HX0JCUiBpcyBub3Qgc2V0 CkNPTkZJR19ERUZBVUxUX0NVQklDPXkKIyBDT05GSUdfREVGQVVMVF9SRU5PIGlzIG5vdCBzZXQK Q09ORklHX0RFRkFVTFRfVENQX0NPTkc9ImN1YmljIgpDT05GSUdfVENQX01ENVNJRz15CkNPTkZJ R19JUFY2PXkKQ09ORklHX0lQVjZfUk9VVEVSX1BSRUY9eQpDT05GSUdfSVBWNl9ST1VURV9JTkZP PXkKQ09ORklHX0lQVjZfT1BUSU1JU1RJQ19EQUQ9eQpDT05GSUdfSU5FVDZfQUg9bQpDT05GSUdf SU5FVDZfRVNQPW0KIyBDT05GSUdfSU5FVDZfRVNQX09GRkxPQUQgaXMgbm90IHNldApDT05GSUdf SU5FVDZfSVBDT01QPW0KQ09ORklHX0lQVjZfTUlQNj1tCiMgQ09ORklHX0lQVjZfSUxBIGlzIG5v dCBzZXQKQ09ORklHX0lORVQ2X1hGUk1fVFVOTkVMPW0KQ09ORklHX0lORVQ2X1RVTk5FTD1tCkNP TkZJR19JUFY2X1ZUST1tCkNPTkZJR19JUFY2X1NJVD1tCkNPTkZJR19JUFY2X1NJVF82UkQ9eQpD T05GSUdfSVBWNl9ORElTQ19OT0RFVFlQRT15CkNPTkZJR19JUFY2X1RVTk5FTD1tCkNPTkZJR19J UFY2X0dSRT1tCkNPTkZJR19JUFY2X0ZPVT1tCkNPTkZJR19JUFY2X0ZPVV9UVU5ORUw9bQpDT05G SUdfSVBWNl9NVUxUSVBMRV9UQUJMRVM9eQojIENPTkZJR19JUFY2X1NVQlRSRUVTIGlzIG5vdCBz ZXQKQ09ORklHX0lQVjZfTVJPVVRFPXkKQ09ORklHX0lQVjZfTVJPVVRFX01VTFRJUExFX1RBQkxF Uz15CkNPTkZJR19JUFY2X1BJTVNNX1YyPXkKQ09ORklHX0lQVjZfU0VHNl9MV1RVTk5FTD15CiMg Q09ORklHX0lQVjZfU0VHNl9ITUFDIGlzIG5vdCBzZXQKQ09ORklHX0lQVjZfU0VHNl9CUEY9eQpD T05GSUdfTkVUTEFCRUw9eQpDT05GSUdfTVBUQ1A9eQpDT05GSUdfTVBUQ1BfSVBWNj15CiMgQ09O RklHX01QVENQX0hNQUNfVEVTVCBpcyBub3Qgc2V0CkNPTkZJR19ORVRXT1JLX1NFQ01BUks9eQpD T05GSUdfTkVUX1BUUF9DTEFTU0lGWT15CkNPTkZJR19ORVRXT1JLX1BIWV9USU1FU1RBTVBJTkc9 eQpDT05GSUdfTkVURklMVEVSPXkKQ09ORklHX05FVEZJTFRFUl9BRFZBTkNFRD15CkNPTkZJR19C UklER0VfTkVURklMVEVSPW0KCiMKIyBDb3JlIE5ldGZpbHRlciBDb25maWd1cmF0aW9uCiMKQ09O RklHX05FVEZJTFRFUl9JTkdSRVNTPXkKQ09ORklHX05FVEZJTFRFUl9ORVRMSU5LPW0KQ09ORklH X05FVEZJTFRFUl9GQU1JTFlfQlJJREdFPXkKQ09ORklHX05FVEZJTFRFUl9GQU1JTFlfQVJQPXkK Q09ORklHX05FVEZJTFRFUl9ORVRMSU5LX0FDQ1Q9bQpDT05GSUdfTkVURklMVEVSX05FVExJTktf UVVFVUU9bQpDT05GSUdfTkVURklMVEVSX05FVExJTktfTE9HPW0KQ09ORklHX05FVEZJTFRFUl9O RVRMSU5LX09TRj1tCkNPTkZJR19ORl9DT05OVFJBQ0s9bQpDT05GSUdfTkZfTE9HX0NPTU1PTj1t CiMgQ09ORklHX05GX0xPR19ORVRERVYgaXMgbm90IHNldApDT05GSUdfTkVURklMVEVSX0NPTk5D T1VOVD1tCkNPTkZJR19ORl9DT05OVFJBQ0tfTUFSSz15CkNPTkZJR19ORl9DT05OVFJBQ0tfU0VD TUFSSz15CkNPTkZJR19ORl9DT05OVFJBQ0tfWk9ORVM9eQpDT05GSUdfTkZfQ09OTlRSQUNLX1BS T0NGUz15CkNPTkZJR19ORl9DT05OVFJBQ0tfRVZFTlRTPXkKQ09ORklHX05GX0NPTk5UUkFDS19U SU1FT1VUPXkKQ09ORklHX05GX0NPTk5UUkFDS19USU1FU1RBTVA9eQpDT05GSUdfTkZfQ09OTlRS QUNLX0xBQkVMUz15CkNPTkZJR19ORl9DVF9QUk9UT19EQ0NQPXkKQ09ORklHX05GX0NUX1BST1RP X0dSRT15CkNPTkZJR19ORl9DVF9QUk9UT19TQ1RQPXkKQ09ORklHX05GX0NUX1BST1RPX1VEUExJ VEU9eQpDT05GSUdfTkZfQ09OTlRSQUNLX0FNQU5EQT1tCkNPTkZJR19ORl9DT05OVFJBQ0tfRlRQ PW0KQ09ORklHX05GX0NPTk5UUkFDS19IMzIzPW0KQ09ORklHX05GX0NPTk5UUkFDS19JUkM9bQpD T05GSUdfTkZfQ09OTlRSQUNLX0JST0FEQ0FTVD1tCkNPTkZJR19ORl9DT05OVFJBQ0tfTkVUQklP U19OUz1tCkNPTkZJR19ORl9DT05OVFJBQ0tfU05NUD1tCkNPTkZJR19ORl9DT05OVFJBQ0tfUFBU UD1tCkNPTkZJR19ORl9DT05OVFJBQ0tfU0FORT1tCkNPTkZJR19ORl9DT05OVFJBQ0tfU0lQPW0K Q09ORklHX05GX0NPTk5UUkFDS19URlRQPW0KQ09ORklHX05GX0NUX05FVExJTks9bQpDT05GSUdf TkZfQ1RfTkVUTElOS19USU1FT1VUPW0KIyBDT05GSUdfTkVURklMVEVSX05FVExJTktfR0xVRV9D VCBpcyBub3Qgc2V0CkNPTkZJR19ORl9OQVQ9bQpDT05GSUdfTkZfTkFUX0FNQU5EQT1tCkNPTkZJ R19ORl9OQVRfRlRQPW0KQ09ORklHX05GX05BVF9JUkM9bQpDT05GSUdfTkZfTkFUX1NJUD1tCkNP TkZJR19ORl9OQVRfVEZUUD1tCkNPTkZJR19ORl9OQVRfUkVESVJFQ1Q9eQpDT05GSUdfTkZfTkFU X01BU1FVRVJBREU9eQpDT05GSUdfTkVURklMVEVSX1NZTlBST1hZPW0KQ09ORklHX05GX1RBQkxF Uz1tCiMgQ09ORklHX05GX1RBQkxFU19TRVQgaXMgbm90IHNldAojIENPTkZJR19ORl9UQUJMRVNf SU5FVCBpcyBub3Qgc2V0CiMgQ09ORklHX05GX1RBQkxFU19ORVRERVYgaXMgbm90IHNldAojIENP TkZJR19ORlRfTlVNR0VOIGlzIG5vdCBzZXQKQ09ORklHX05GVF9DVD1tCkNPTkZJR19ORlRfQ09V TlRFUj1tCiMgQ09ORklHX05GVF9DT05OTElNSVQgaXMgbm90IHNldApDT05GSUdfTkZUX0xPRz1t CkNPTkZJR19ORlRfTElNSVQ9bQpDT05GSUdfTkZUX01BU1E9bQpDT05GSUdfTkZUX1JFRElSPW0K IyBDT05GSUdfTkZUX1RVTk5FTCBpcyBub3Qgc2V0CiMgQ09ORklHX05GVF9PQkpSRUYgaXMgbm90 IHNldApDT05GSUdfTkZUX1FVRVVFPW0KIyBDT05GSUdfTkZUX1FVT1RBIGlzIG5vdCBzZXQKQ09O RklHX05GVF9SRUpFQ1Q9bQpDT05GSUdfTkZUX0NPTVBBVD1tCkNPTkZJR19ORlRfSEFTSD1tCiMg Q09ORklHX05GVF9YRlJNIGlzIG5vdCBzZXQKIyBDT05GSUdfTkZUX1NPQ0tFVCBpcyBub3Qgc2V0 CiMgQ09ORklHX05GVF9PU0YgaXMgbm90IHNldAojIENPTkZJR19ORlRfVFBST1hZIGlzIG5vdCBz ZXQKIyBDT05GSUdfTkZUX1NZTlBST1hZIGlzIG5vdCBzZXQKIyBDT05GSUdfTkZfRkxPV19UQUJM RSBpcyBub3Qgc2V0CkNPTkZJR19ORVRGSUxURVJfWFRBQkxFUz15CgojCiMgWHRhYmxlcyBjb21i aW5lZCBtb2R1bGVzCiMKQ09ORklHX05FVEZJTFRFUl9YVF9NQVJLPW0KQ09ORklHX05FVEZJTFRF Ul9YVF9DT05OTUFSSz1tCkNPTkZJR19ORVRGSUxURVJfWFRfU0VUPW0KCiMKIyBYdGFibGVzIHRh cmdldHMKIwpDT05GSUdfTkVURklMVEVSX1hUX1RBUkdFVF9BVURJVD1tCkNPTkZJR19ORVRGSUxU RVJfWFRfVEFSR0VUX0NIRUNLU1VNPW0KQ09ORklHX05FVEZJTFRFUl9YVF9UQVJHRVRfQ0xBU1NJ Rlk9bQpDT05GSUdfTkVURklMVEVSX1hUX1RBUkdFVF9DT05OTUFSSz1tCkNPTkZJR19ORVRGSUxU RVJfWFRfVEFSR0VUX0NPTk5TRUNNQVJLPW0KQ09ORklHX05FVEZJTFRFUl9YVF9UQVJHRVRfQ1Q9 bQpDT05GSUdfTkVURklMVEVSX1hUX1RBUkdFVF9EU0NQPW0KQ09ORklHX05FVEZJTFRFUl9YVF9U QVJHRVRfSEw9bQpDT05GSUdfTkVURklMVEVSX1hUX1RBUkdFVF9ITUFSSz1tCkNPTkZJR19ORVRG SUxURVJfWFRfVEFSR0VUX0lETEVUSU1FUj1tCkNPTkZJR19ORVRGSUxURVJfWFRfVEFSR0VUX0xF RD1tCkNPTkZJR19ORVRGSUxURVJfWFRfVEFSR0VUX0xPRz1tCkNPTkZJR19ORVRGSUxURVJfWFRf VEFSR0VUX01BUks9bQpDT05GSUdfTkVURklMVEVSX1hUX05BVD1tCkNPTkZJR19ORVRGSUxURVJf WFRfVEFSR0VUX05FVE1BUD1tCkNPTkZJR19ORVRGSUxURVJfWFRfVEFSR0VUX05GTE9HPW0KQ09O RklHX05FVEZJTFRFUl9YVF9UQVJHRVRfTkZRVUVVRT1tCkNPTkZJR19ORVRGSUxURVJfWFRfVEFS R0VUX05PVFJBQ0s9bQpDT05GSUdfTkVURklMVEVSX1hUX1RBUkdFVF9SQVRFRVNUPW0KQ09ORklH X05FVEZJTFRFUl9YVF9UQVJHRVRfUkVESVJFQ1Q9bQpDT05GSUdfTkVURklMVEVSX1hUX1RBUkdF VF9NQVNRVUVSQURFPW0KQ09ORklHX05FVEZJTFRFUl9YVF9UQVJHRVRfVEVFPW0KQ09ORklHX05F VEZJTFRFUl9YVF9UQVJHRVRfVFBST1hZPW0KQ09ORklHX05FVEZJTFRFUl9YVF9UQVJHRVRfVFJB Q0U9bQpDT05GSUdfTkVURklMVEVSX1hUX1RBUkdFVF9TRUNNQVJLPW0KQ09ORklHX05FVEZJTFRF Ul9YVF9UQVJHRVRfVENQTVNTPW0KQ09ORklHX05FVEZJTFRFUl9YVF9UQVJHRVRfVENQT1BUU1RS SVA9bQoKIwojIFh0YWJsZXMgbWF0Y2hlcwojCkNPTkZJR19ORVRGSUxURVJfWFRfTUFUQ0hfQURE UlRZUEU9bQpDT05GSUdfTkVURklMVEVSX1hUX01BVENIX0JQRj1tCkNPTkZJR19ORVRGSUxURVJf WFRfTUFUQ0hfQ0dST1VQPW0KQ09ORklHX05FVEZJTFRFUl9YVF9NQVRDSF9DTFVTVEVSPW0KQ09O RklHX05FVEZJTFRFUl9YVF9NQVRDSF9DT01NRU5UPW0KQ09ORklHX05FVEZJTFRFUl9YVF9NQVRD SF9DT05OQllURVM9bQpDT05GSUdfTkVURklMVEVSX1hUX01BVENIX0NPTk5MQUJFTD1tCkNPTkZJ R19ORVRGSUxURVJfWFRfTUFUQ0hfQ09OTkxJTUlUPW0KQ09ORklHX05FVEZJTFRFUl9YVF9NQVRD SF9DT05OTUFSSz1tCkNPTkZJR19ORVRGSUxURVJfWFRfTUFUQ0hfQ09OTlRSQUNLPW0KQ09ORklH X05FVEZJTFRFUl9YVF9NQVRDSF9DUFU9bQpDT05GSUdfTkVURklMVEVSX1hUX01BVENIX0RDQ1A9 bQpDT05GSUdfTkVURklMVEVSX1hUX01BVENIX0RFVkdST1VQPW0KQ09ORklHX05FVEZJTFRFUl9Y VF9NQVRDSF9EU0NQPW0KQ09ORklHX05FVEZJTFRFUl9YVF9NQVRDSF9FQ049bQpDT05GSUdfTkVU RklMVEVSX1hUX01BVENIX0VTUD1tCkNPTkZJR19ORVRGSUxURVJfWFRfTUFUQ0hfSEFTSExJTUlU PW0KQ09ORklHX05FVEZJTFRFUl9YVF9NQVRDSF9IRUxQRVI9bQpDT05GSUdfTkVURklMVEVSX1hU X01BVENIX0hMPW0KIyBDT05GSUdfTkVURklMVEVSX1hUX01BVENIX0lQQ09NUCBpcyBub3Qgc2V0 CkNPTkZJR19ORVRGSUxURVJfWFRfTUFUQ0hfSVBSQU5HRT1tCkNPTkZJR19ORVRGSUxURVJfWFRf TUFUQ0hfSVBWUz1tCkNPTkZJR19ORVRGSUxURVJfWFRfTUFUQ0hfTDJUUD1tCkNPTkZJR19ORVRG SUxURVJfWFRfTUFUQ0hfTEVOR1RIPW0KQ09ORklHX05FVEZJTFRFUl9YVF9NQVRDSF9MSU1JVD1t CkNPTkZJR19ORVRGSUxURVJfWFRfTUFUQ0hfTUFDPW0KQ09ORklHX05FVEZJTFRFUl9YVF9NQVRD SF9NQVJLPW0KQ09ORklHX05FVEZJTFRFUl9YVF9NQVRDSF9NVUxUSVBPUlQ9bQpDT05GSUdfTkVU RklMVEVSX1hUX01BVENIX05GQUNDVD1tCkNPTkZJR19ORVRGSUxURVJfWFRfTUFUQ0hfT1NGPW0K Q09ORklHX05FVEZJTFRFUl9YVF9NQVRDSF9PV05FUj1tCkNPTkZJR19ORVRGSUxURVJfWFRfTUFU Q0hfUE9MSUNZPW0KQ09ORklHX05FVEZJTFRFUl9YVF9NQVRDSF9QSFlTREVWPW0KQ09ORklHX05F VEZJTFRFUl9YVF9NQVRDSF9QS1RUWVBFPW0KQ09ORklHX05FVEZJTFRFUl9YVF9NQVRDSF9RVU9U QT1tCkNPTkZJR19ORVRGSUxURVJfWFRfTUFUQ0hfUkFURUVTVD1tCkNPTkZJR19ORVRGSUxURVJf WFRfTUFUQ0hfUkVBTE09bQpDT05GSUdfTkVURklMVEVSX1hUX01BVENIX1JFQ0VOVD1tCkNPTkZJ R19ORVRGSUxURVJfWFRfTUFUQ0hfU0NUUD1tCkNPTkZJR19ORVRGSUxURVJfWFRfTUFUQ0hfU09D S0VUPW0KQ09ORklHX05FVEZJTFRFUl9YVF9NQVRDSF9TVEFURT1tCkNPTkZJR19ORVRGSUxURVJf WFRfTUFUQ0hfU1RBVElTVElDPW0KQ09ORklHX05FVEZJTFRFUl9YVF9NQVRDSF9TVFJJTkc9bQpD T05GSUdfTkVURklMVEVSX1hUX01BVENIX1RDUE1TUz1tCkNPTkZJR19ORVRGSUxURVJfWFRfTUFU Q0hfVElNRT1tCkNPTkZJR19ORVRGSUxURVJfWFRfTUFUQ0hfVTMyPW0KIyBlbmQgb2YgQ29yZSBO ZXRmaWx0ZXIgQ29uZmlndXJhdGlvbgoKQ09ORklHX0lQX1NFVD1tCkNPTkZJR19JUF9TRVRfTUFY PTI1NgpDT05GSUdfSVBfU0VUX0JJVE1BUF9JUD1tCkNPTkZJR19JUF9TRVRfQklUTUFQX0lQTUFD PW0KQ09ORklHX0lQX1NFVF9CSVRNQVBfUE9SVD1tCkNPTkZJR19JUF9TRVRfSEFTSF9JUD1tCkNP TkZJR19JUF9TRVRfSEFTSF9JUE1BUks9bQpDT05GSUdfSVBfU0VUX0hBU0hfSVBQT1JUPW0KQ09O RklHX0lQX1NFVF9IQVNIX0lQUE9SVElQPW0KQ09ORklHX0lQX1NFVF9IQVNIX0lQUE9SVE5FVD1t CkNPTkZJR19JUF9TRVRfSEFTSF9JUE1BQz1tCkNPTkZJR19JUF9TRVRfSEFTSF9NQUM9bQpDT05G SUdfSVBfU0VUX0hBU0hfTkVUUE9SVE5FVD1tCkNPTkZJR19JUF9TRVRfSEFTSF9ORVQ9bQpDT05G SUdfSVBfU0VUX0hBU0hfTkVUTkVUPW0KQ09ORklHX0lQX1NFVF9IQVNIX05FVFBPUlQ9bQpDT05G SUdfSVBfU0VUX0hBU0hfTkVUSUZBQ0U9bQpDT05GSUdfSVBfU0VUX0xJU1RfU0VUPW0KQ09ORklH X0lQX1ZTPW0KQ09ORklHX0lQX1ZTX0lQVjY9eQojIENPTkZJR19JUF9WU19ERUJVRyBpcyBub3Qg c2V0CkNPTkZJR19JUF9WU19UQUJfQklUUz0xMgoKIwojIElQVlMgdHJhbnNwb3J0IHByb3RvY29s IGxvYWQgYmFsYW5jaW5nIHN1cHBvcnQKIwpDT05GSUdfSVBfVlNfUFJPVE9fVENQPXkKQ09ORklH X0lQX1ZTX1BST1RPX1VEUD15CkNPTkZJR19JUF9WU19QUk9UT19BSF9FU1A9eQpDT05GSUdfSVBf VlNfUFJPVE9fRVNQPXkKQ09ORklHX0lQX1ZTX1BST1RPX0FIPXkKQ09ORklHX0lQX1ZTX1BST1RP X1NDVFA9eQoKIwojIElQVlMgc2NoZWR1bGVyCiMKQ09ORklHX0lQX1ZTX1JSPW0KQ09ORklHX0lQ X1ZTX1dSUj1tCkNPTkZJR19JUF9WU19MQz1tCkNPTkZJR19JUF9WU19XTEM9bQojIENPTkZJR19J UF9WU19GTyBpcyBub3Qgc2V0CiMgQ09ORklHX0lQX1ZTX09WRiBpcyBub3Qgc2V0CkNPTkZJR19J UF9WU19MQkxDPW0KQ09ORklHX0lQX1ZTX0xCTENSPW0KQ09ORklHX0lQX1ZTX0RIPW0KQ09ORklH X0lQX1ZTX1NIPW0KIyBDT05GSUdfSVBfVlNfTUggaXMgbm90IHNldApDT05GSUdfSVBfVlNfU0VE PW0KQ09ORklHX0lQX1ZTX05RPW0KCiMKIyBJUFZTIFNIIHNjaGVkdWxlcgojCkNPTkZJR19JUF9W U19TSF9UQUJfQklUUz04CgojCiMgSVBWUyBNSCBzY2hlZHVsZXIKIwpDT05GSUdfSVBfVlNfTUhf VEFCX0lOREVYPTEyCgojCiMgSVBWUyBhcHBsaWNhdGlvbiBoZWxwZXIKIwpDT05GSUdfSVBfVlNf RlRQPW0KQ09ORklHX0lQX1ZTX05GQ1Q9eQpDT05GSUdfSVBfVlNfUEVfU0lQPW0KCiMKIyBJUDog TmV0ZmlsdGVyIENvbmZpZ3VyYXRpb24KIwpDT05GSUdfTkZfREVGUkFHX0lQVjQ9bQpDT05GSUdf TkZfU09DS0VUX0lQVjQ9bQpDT05GSUdfTkZfVFBST1hZX0lQVjQ9bQojIENPTkZJR19ORl9UQUJM RVNfSVBWNCBpcyBub3Qgc2V0CiMgQ09ORklHX05GX1RBQkxFU19BUlAgaXMgbm90IHNldApDT05G SUdfTkZfRFVQX0lQVjQ9bQojIENPTkZJR19ORl9MT0dfQVJQIGlzIG5vdCBzZXQKQ09ORklHX05G X0xPR19JUFY0PW0KQ09ORklHX05GX1JFSkVDVF9JUFY0PW0KQ09ORklHX05GX05BVF9TTk1QX0JB U0lDPW0KQ09ORklHX05GX05BVF9QUFRQPW0KQ09ORklHX05GX05BVF9IMzIzPW0KQ09ORklHX0lQ X05GX0lQVEFCTEVTPW0KQ09ORklHX0lQX05GX01BVENIX0FIPW0KQ09ORklHX0lQX05GX01BVENI X0VDTj1tCkNPTkZJR19JUF9ORl9NQVRDSF9SUEZJTFRFUj1tCkNPTkZJR19JUF9ORl9NQVRDSF9U VEw9bQpDT05GSUdfSVBfTkZfRklMVEVSPW0KQ09ORklHX0lQX05GX1RBUkdFVF9SRUpFQ1Q9bQpD T05GSUdfSVBfTkZfVEFSR0VUX1NZTlBST1hZPW0KQ09ORklHX0lQX05GX05BVD1tCkNPTkZJR19J UF9ORl9UQVJHRVRfTUFTUVVFUkFERT1tCkNPTkZJR19JUF9ORl9UQVJHRVRfTkVUTUFQPW0KQ09O RklHX0lQX05GX1RBUkdFVF9SRURJUkVDVD1tCkNPTkZJR19JUF9ORl9NQU5HTEU9bQpDT05GSUdf SVBfTkZfVEFSR0VUX0NMVVNURVJJUD1tCkNPTkZJR19JUF9ORl9UQVJHRVRfRUNOPW0KQ09ORklH X0lQX05GX1RBUkdFVF9UVEw9bQpDT05GSUdfSVBfTkZfUkFXPW0KQ09ORklHX0lQX05GX1NFQ1VS SVRZPW0KQ09ORklHX0lQX05GX0FSUFRBQkxFUz1tCkNPTkZJR19JUF9ORl9BUlBGSUxURVI9bQpD T05GSUdfSVBfTkZfQVJQX01BTkdMRT1tCiMgZW5kIG9mIElQOiBOZXRmaWx0ZXIgQ29uZmlndXJh dGlvbgoKIwojIElQdjY6IE5ldGZpbHRlciBDb25maWd1cmF0aW9uCiMKQ09ORklHX05GX1NPQ0tF VF9JUFY2PW0KQ09ORklHX05GX1RQUk9YWV9JUFY2PW0KIyBDT05GSUdfTkZfVEFCTEVTX0lQVjYg aXMgbm90IHNldApDT05GSUdfTkZfRFVQX0lQVjY9bQpDT05GSUdfTkZfUkVKRUNUX0lQVjY9bQpD T05GSUdfTkZfTE9HX0lQVjY9bQpDT05GSUdfSVA2X05GX0lQVEFCTEVTPW0KQ09ORklHX0lQNl9O Rl9NQVRDSF9BSD1tCkNPTkZJR19JUDZfTkZfTUFUQ0hfRVVJNjQ9bQpDT05GSUdfSVA2X05GX01B VENIX0ZSQUc9bQpDT05GSUdfSVA2X05GX01BVENIX09QVFM9bQpDT05GSUdfSVA2X05GX01BVENI X0hMPW0KQ09ORklHX0lQNl9ORl9NQVRDSF9JUFY2SEVBREVSPW0KQ09ORklHX0lQNl9ORl9NQVRD SF9NSD1tCkNPTkZJR19JUDZfTkZfTUFUQ0hfUlBGSUxURVI9bQpDT05GSUdfSVA2X05GX01BVENI X1JUPW0KIyBDT05GSUdfSVA2X05GX01BVENIX1NSSCBpcyBub3Qgc2V0CkNPTkZJR19JUDZfTkZf VEFSR0VUX0hMPW0KQ09ORklHX0lQNl9ORl9GSUxURVI9bQpDT05GSUdfSVA2X05GX1RBUkdFVF9S RUpFQ1Q9bQpDT05GSUdfSVA2X05GX1RBUkdFVF9TWU5QUk9YWT1tCkNPTkZJR19JUDZfTkZfTUFO R0xFPW0KQ09ORklHX0lQNl9ORl9SQVc9bQpDT05GSUdfSVA2X05GX1NFQ1VSSVRZPW0KQ09ORklH X0lQNl9ORl9OQVQ9bQpDT05GSUdfSVA2X05GX1RBUkdFVF9NQVNRVUVSQURFPW0KQ09ORklHX0lQ Nl9ORl9UQVJHRVRfTlBUPW0KIyBlbmQgb2YgSVB2NjogTmV0ZmlsdGVyIENvbmZpZ3VyYXRpb24K CkNPTkZJR19ORl9ERUZSQUdfSVBWNj1tCiMgQ09ORklHX05GX1RBQkxFU19CUklER0UgaXMgbm90 IHNldAojIENPTkZJR19ORl9DT05OVFJBQ0tfQlJJREdFIGlzIG5vdCBzZXQKQ09ORklHX0JSSURH RV9ORl9FQlRBQkxFUz1tCkNPTkZJR19CUklER0VfRUJUX0JST1VURT1tCkNPTkZJR19CUklER0Vf RUJUX1RfRklMVEVSPW0KQ09ORklHX0JSSURHRV9FQlRfVF9OQVQ9bQpDT05GSUdfQlJJREdFX0VC VF84MDJfMz1tCkNPTkZJR19CUklER0VfRUJUX0FNT05HPW0KQ09ORklHX0JSSURHRV9FQlRfQVJQ PW0KQ09ORklHX0JSSURHRV9FQlRfSVA9bQpDT05GSUdfQlJJREdFX0VCVF9JUDY9bQpDT05GSUdf QlJJREdFX0VCVF9MSU1JVD1tCkNPTkZJR19CUklER0VfRUJUX01BUks9bQpDT05GSUdfQlJJREdF X0VCVF9QS1RUWVBFPW0KQ09ORklHX0JSSURHRV9FQlRfU1RQPW0KQ09ORklHX0JSSURHRV9FQlRf VkxBTj1tCkNPTkZJR19CUklER0VfRUJUX0FSUFJFUExZPW0KQ09ORklHX0JSSURHRV9FQlRfRE5B VD1tCkNPTkZJR19CUklER0VfRUJUX01BUktfVD1tCkNPTkZJR19CUklER0VfRUJUX1JFRElSRUNU PW0KQ09ORklHX0JSSURHRV9FQlRfU05BVD1tCkNPTkZJR19CUklER0VfRUJUX0xPRz1tCkNPTkZJ R19CUklER0VfRUJUX05GTE9HPW0KIyBDT05GSUdfQlBGSUxURVIgaXMgbm90IHNldApDT05GSUdf SVBfRENDUD1tCkNPTkZJR19JTkVUX0RDQ1BfRElBRz1tCgojCiMgRENDUCBDQ0lEcyBDb25maWd1 cmF0aW9uCiMKIyBDT05GSUdfSVBfRENDUF9DQ0lEMl9ERUJVRyBpcyBub3Qgc2V0CkNPTkZJR19J UF9EQ0NQX0NDSUQzPXkKIyBDT05GSUdfSVBfRENDUF9DQ0lEM19ERUJVRyBpcyBub3Qgc2V0CkNP TkZJR19JUF9EQ0NQX1RGUkNfTElCPXkKIyBlbmQgb2YgRENDUCBDQ0lEcyBDb25maWd1cmF0aW9u CgojCiMgRENDUCBLZXJuZWwgSGFja2luZwojCiMgQ09ORklHX0lQX0RDQ1BfREVCVUcgaXMgbm90 IHNldAojIGVuZCBvZiBEQ0NQIEtlcm5lbCBIYWNraW5nCgpDT05GSUdfSVBfU0NUUD1tCiMgQ09O RklHX1NDVFBfREJHX09CSkNOVCBpcyBub3Qgc2V0CiMgQ09ORklHX1NDVFBfREVGQVVMVF9DT09L SUVfSE1BQ19NRDUgaXMgbm90IHNldApDT05GSUdfU0NUUF9ERUZBVUxUX0NPT0tJRV9ITUFDX1NI QTE9eQojIENPTkZJR19TQ1RQX0RFRkFVTFRfQ09PS0lFX0hNQUNfTk9ORSBpcyBub3Qgc2V0CkNP TkZJR19TQ1RQX0NPT0tJRV9ITUFDX01ENT15CkNPTkZJR19TQ1RQX0NPT0tJRV9ITUFDX1NIQTE9 eQpDT05GSUdfSU5FVF9TQ1RQX0RJQUc9bQojIENPTkZJR19SRFMgaXMgbm90IHNldAojIENPTkZJ R19USVBDIGlzIG5vdCBzZXQKQ09ORklHX0FUTT1tCkNPTkZJR19BVE1fQ0xJUD1tCiMgQ09ORklH X0FUTV9DTElQX05PX0lDTVAgaXMgbm90IHNldApDT05GSUdfQVRNX0xBTkU9bQojIENPTkZJR19B VE1fTVBPQSBpcyBub3Qgc2V0CkNPTkZJR19BVE1fQlIyNjg0PW0KIyBDT05GSUdfQVRNX0JSMjY4 NF9JUEZJTFRFUiBpcyBub3Qgc2V0CkNPTkZJR19MMlRQPW0KQ09ORklHX0wyVFBfREVCVUdGUz1t CkNPTkZJR19MMlRQX1YzPXkKQ09ORklHX0wyVFBfSVA9bQpDT05GSUdfTDJUUF9FVEg9bQpDT05G SUdfU1RQPW0KQ09ORklHX0dBUlA9bQpDT05GSUdfTVJQPW0KQ09ORklHX0JSSURHRT1tCkNPTkZJ R19CUklER0VfSUdNUF9TTk9PUElORz15CkNPTkZJR19CUklER0VfVkxBTl9GSUxURVJJTkc9eQpD T05GSUdfSEFWRV9ORVRfRFNBPXkKIyBDT05GSUdfTkVUX0RTQSBpcyBub3Qgc2V0CkNPTkZJR19W TEFOXzgwMjFRPW0KQ09ORklHX1ZMQU5fODAyMVFfR1ZSUD15CkNPTkZJR19WTEFOXzgwMjFRX01W UlA9eQojIENPTkZJR19ERUNORVQgaXMgbm90IHNldApDT05GSUdfTExDPW0KIyBDT05GSUdfTExD MiBpcyBub3Qgc2V0CiMgQ09ORklHX0FUQUxLIGlzIG5vdCBzZXQKIyBDT05GSUdfWDI1IGlzIG5v dCBzZXQKIyBDT05GSUdfTEFQQiBpcyBub3Qgc2V0CiMgQ09ORklHX1BIT05FVCBpcyBub3Qgc2V0 CkNPTkZJR182TE9XUEFOPW0KIyBDT05GSUdfNkxPV1BBTl9ERUJVR0ZTIGlzIG5vdCBzZXQKQ09O RklHXzZMT1dQQU5fTkhDPW0KQ09ORklHXzZMT1dQQU5fTkhDX0RFU1Q9bQpDT05GSUdfNkxPV1BB Tl9OSENfRlJBR01FTlQ9bQpDT05GSUdfNkxPV1BBTl9OSENfSE9QPW0KQ09ORklHXzZMT1dQQU5f TkhDX0lQVjY9bQpDT05GSUdfNkxPV1BBTl9OSENfTU9CSUxJVFk9bQpDT05GSUdfNkxPV1BBTl9O SENfUk9VVElORz1tCkNPTkZJR182TE9XUEFOX05IQ19VRFA9bQojIENPTkZJR182TE9XUEFOX0dI Q19FWFRfSERSX0hPUCBpcyBub3Qgc2V0CiMgQ09ORklHXzZMT1dQQU5fR0hDX1VEUCBpcyBub3Qg c2V0CiMgQ09ORklHXzZMT1dQQU5fR0hDX0lDTVBWNiBpcyBub3Qgc2V0CiMgQ09ORklHXzZMT1dQ QU5fR0hDX0VYVF9IRFJfREVTVCBpcyBub3Qgc2V0CiMgQ09ORklHXzZMT1dQQU5fR0hDX0VYVF9I RFJfRlJBRyBpcyBub3Qgc2V0CiMgQ09ORklHXzZMT1dQQU5fR0hDX0VYVF9IRFJfUk9VVEUgaXMg bm90IHNldApDT05GSUdfSUVFRTgwMjE1ND1tCiMgQ09ORklHX0lFRUU4MDIxNTRfTkw4MDIxNTRf RVhQRVJJTUVOVEFMIGlzIG5vdCBzZXQKQ09ORklHX0lFRUU4MDIxNTRfU09DS0VUPW0KQ09ORklH X0lFRUU4MDIxNTRfNkxPV1BBTj1tCkNPTkZJR19NQUM4MDIxNTQ9bQpDT05GSUdfTkVUX1NDSEVE PXkKCiMKIyBRdWV1ZWluZy9TY2hlZHVsaW5nCiMKQ09ORklHX05FVF9TQ0hfQ0JRPW0KQ09ORklH X05FVF9TQ0hfSFRCPW0KQ09ORklHX05FVF9TQ0hfSEZTQz1tCkNPTkZJR19ORVRfU0NIX0FUTT1t CkNPTkZJR19ORVRfU0NIX1BSSU89bQpDT05GSUdfTkVUX1NDSF9NVUxUSVE9bQpDT05GSUdfTkVU X1NDSF9SRUQ9bQpDT05GSUdfTkVUX1NDSF9TRkI9bQpDT05GSUdfTkVUX1NDSF9TRlE9bQpDT05G SUdfTkVUX1NDSF9URVFMPW0KQ09ORklHX05FVF9TQ0hfVEJGPW0KIyBDT05GSUdfTkVUX1NDSF9D QlMgaXMgbm90IHNldAojIENPTkZJR19ORVRfU0NIX0VURiBpcyBub3Qgc2V0CiMgQ09ORklHX05F VF9TQ0hfVEFQUklPIGlzIG5vdCBzZXQKQ09ORklHX05FVF9TQ0hfR1JFRD1tCkNPTkZJR19ORVRf U0NIX0RTTUFSSz1tCkNPTkZJR19ORVRfU0NIX05FVEVNPW0KQ09ORklHX05FVF9TQ0hfRFJSPW0K Q09ORklHX05FVF9TQ0hfTVFQUklPPW0KIyBDT05GSUdfTkVUX1NDSF9TS0JQUklPIGlzIG5vdCBz ZXQKQ09ORklHX05FVF9TQ0hfQ0hPS0U9bQpDT05GSUdfTkVUX1NDSF9RRlE9bQpDT05GSUdfTkVU X1NDSF9DT0RFTD1tCkNPTkZJR19ORVRfU0NIX0ZRX0NPREVMPW0KIyBDT05GSUdfTkVUX1NDSF9D QUtFIGlzIG5vdCBzZXQKQ09ORklHX05FVF9TQ0hfRlE9bQojIENPTkZJR19ORVRfU0NIX0hIRiBp cyBub3Qgc2V0CiMgQ09ORklHX05FVF9TQ0hfUElFIGlzIG5vdCBzZXQKQ09ORklHX05FVF9TQ0hf SU5HUkVTUz1tCkNPTkZJR19ORVRfU0NIX1BMVUc9bQojIENPTkZJR19ORVRfU0NIX0VUUyBpcyBu b3Qgc2V0CiMgQ09ORklHX05FVF9TQ0hfREVGQVVMVCBpcyBub3Qgc2V0CgojCiMgQ2xhc3NpZmlj YXRpb24KIwpDT05GSUdfTkVUX0NMUz15CkNPTkZJR19ORVRfQ0xTX0JBU0lDPW0KQ09ORklHX05F VF9DTFNfVENJTkRFWD1tCkNPTkZJR19ORVRfQ0xTX1JPVVRFND1tCkNPTkZJR19ORVRfQ0xTX0ZX PW0KQ09ORklHX05FVF9DTFNfVTMyPW0KQ09ORklHX0NMU19VMzJfUEVSRj15CkNPTkZJR19DTFNf VTMyX01BUks9eQpDT05GSUdfTkVUX0NMU19SU1ZQPW0KQ09ORklHX05FVF9DTFNfUlNWUDY9bQpD T05GSUdfTkVUX0NMU19GTE9XPW0KQ09ORklHX05FVF9DTFNfQ0dST1VQPXkKQ09ORklHX05FVF9D TFNfQlBGPW0KQ09ORklHX05FVF9DTFNfRkxPV0VSPW0KQ09ORklHX05FVF9DTFNfTUFUQ0hBTEw9 bQpDT05GSUdfTkVUX0VNQVRDSD15CkNPTkZJR19ORVRfRU1BVENIX1NUQUNLPTMyCkNPTkZJR19O RVRfRU1BVENIX0NNUD1tCkNPTkZJR19ORVRfRU1BVENIX05CWVRFPW0KQ09ORklHX05FVF9FTUFU Q0hfVTMyPW0KQ09ORklHX05FVF9FTUFUQ0hfTUVUQT1tCkNPTkZJR19ORVRfRU1BVENIX1RFWFQ9 bQojIENPTkZJR19ORVRfRU1BVENIX0NBTklEIGlzIG5vdCBzZXQKQ09ORklHX05FVF9FTUFUQ0hf SVBTRVQ9bQojIENPTkZJR19ORVRfRU1BVENIX0lQVCBpcyBub3Qgc2V0CkNPTkZJR19ORVRfQ0xT X0FDVD15CkNPTkZJR19ORVRfQUNUX1BPTElDRT1tCkNPTkZJR19ORVRfQUNUX0dBQ1Q9bQpDT05G SUdfR0FDVF9QUk9CPXkKQ09ORklHX05FVF9BQ1RfTUlSUkVEPW0KQ09ORklHX05FVF9BQ1RfU0FN UExFPW0KQ09ORklHX05FVF9BQ1RfSVBUPW0KQ09ORklHX05FVF9BQ1RfTkFUPW0KQ09ORklHX05F VF9BQ1RfUEVESVQ9bQpDT05GSUdfTkVUX0FDVF9TSU1QPW0KQ09ORklHX05FVF9BQ1RfU0tCRURJ VD1tCkNPTkZJR19ORVRfQUNUX0NTVU09bQojIENPTkZJR19ORVRfQUNUX01QTFMgaXMgbm90IHNl dApDT05GSUdfTkVUX0FDVF9WTEFOPW0KIyBDT05GSUdfTkVUX0FDVF9CUEYgaXMgbm90IHNldApD T05GSUdfTkVUX0FDVF9DT05OTUFSSz1tCiMgQ09ORklHX05FVF9BQ1RfQ1RJTkZPIGlzIG5vdCBz ZXQKQ09ORklHX05FVF9BQ1RfU0tCTU9EPW0KIyBDT05GSUdfTkVUX0FDVF9JRkUgaXMgbm90IHNl dApDT05GSUdfTkVUX0FDVF9UVU5ORUxfS0VZPW0KIyBDT05GSUdfTkVUX0FDVF9DVCBpcyBub3Qg c2V0CiMgQ09ORklHX05FVF9UQ19TS0JfRVhUIGlzIG5vdCBzZXQKQ09ORklHX05FVF9TQ0hfRklG Tz15CkNPTkZJR19EQ0I9eQpDT05GSUdfRE5TX1JFU09MVkVSPW0KIyBDT05GSUdfQkFUTUFOX0FE ViBpcyBub3Qgc2V0CkNPTkZJR19PUEVOVlNXSVRDSD1tCkNPTkZJR19PUEVOVlNXSVRDSF9HUkU9 bQpDT05GSUdfT1BFTlZTV0lUQ0hfVlhMQU49bQpDT05GSUdfT1BFTlZTV0lUQ0hfR0VORVZFPW0K Q09ORklHX1ZTT0NLRVRTPW0KQ09ORklHX1ZTT0NLRVRTX0RJQUc9bQpDT05GSUdfVlNPQ0tFVFNf TE9PUEJBQ0s9bQpDT05GSUdfVk1XQVJFX1ZNQ0lfVlNPQ0tFVFM9bQpDT05GSUdfVklSVElPX1ZT T0NLRVRTPW0KQ09ORklHX1ZJUlRJT19WU09DS0VUU19DT01NT049bQpDT05GSUdfSFlQRVJWX1ZT T0NLRVRTPW0KQ09ORklHX05FVExJTktfRElBRz1tCkNPTkZJR19NUExTPXkKQ09ORklHX05FVF9N UExTX0dTTz15CkNPTkZJR19NUExTX1JPVVRJTkc9bQpDT05GSUdfTVBMU19JUFRVTk5FTD1tCkNP TkZJR19ORVRfTlNIPW0KIyBDT05GSUdfSFNSIGlzIG5vdCBzZXQKQ09ORklHX05FVF9TV0lUQ0hE RVY9eQpDT05GSUdfTkVUX0wzX01BU1RFUl9ERVY9eQojIENPTkZJR19ORVRfTkNTSSBpcyBub3Qg c2V0CkNPTkZJR19SUFM9eQpDT05GSUdfUkZTX0FDQ0VMPXkKQ09ORklHX1hQUz15CiMgQ09ORklH X0NHUk9VUF9ORVRfUFJJTyBpcyBub3Qgc2V0CkNPTkZJR19DR1JPVVBfTkVUX0NMQVNTSUQ9eQpD T05GSUdfTkVUX1JYX0JVU1lfUE9MTD15CkNPTkZJR19CUUw9eQpDT05GSUdfQlBGX0pJVD15CkNP TkZJR19CUEZfU1RSRUFNX1BBUlNFUj15CkNPTkZJR19ORVRfRkxPV19MSU1JVD15CgojCiMgTmV0 d29yayB0ZXN0aW5nCiMKQ09ORklHX05FVF9QS1RHRU49bQpDT05GSUdfTkVUX0RST1BfTU9OSVRP Uj15CiMgZW5kIG9mIE5ldHdvcmsgdGVzdGluZwojIGVuZCBvZiBOZXR3b3JraW5nIG9wdGlvbnMK CiMgQ09ORklHX0hBTVJBRElPIGlzIG5vdCBzZXQKQ09ORklHX0NBTj1tCkNPTkZJR19DQU5fUkFX PW0KQ09ORklHX0NBTl9CQ009bQpDT05GSUdfQ0FOX0dXPW0KIyBDT05GSUdfQ0FOX0oxOTM5IGlz IG5vdCBzZXQKCiMKIyBDQU4gRGV2aWNlIERyaXZlcnMKIwpDT05GSUdfQ0FOX1ZDQU49bQojIENP TkZJR19DQU5fVlhDQU4gaXMgbm90IHNldApDT05GSUdfQ0FOX1NMQ0FOPW0KQ09ORklHX0NBTl9E RVY9bQpDT05GSUdfQ0FOX0NBTENfQklUVElNSU5HPXkKIyBDT05GSUdfQ0FOX0tWQVNFUl9QQ0lF RkQgaXMgbm90IHNldApDT05GSUdfQ0FOX0NfQ0FOPW0KQ09ORklHX0NBTl9DX0NBTl9QTEFURk9S TT1tCkNPTkZJR19DQU5fQ19DQU5fUENJPW0KQ09ORklHX0NBTl9DQzc3MD1tCiMgQ09ORklHX0NB Tl9DQzc3MF9JU0EgaXMgbm90IHNldApDT05GSUdfQ0FOX0NDNzcwX1BMQVRGT1JNPW0KIyBDT05G SUdfQ0FOX0lGSV9DQU5GRCBpcyBub3Qgc2V0CiMgQ09ORklHX0NBTl9NX0NBTiBpcyBub3Qgc2V0 CiMgQ09ORklHX0NBTl9QRUFLX1BDSUVGRCBpcyBub3Qgc2V0CkNPTkZJR19DQU5fU0pBMTAwMD1t CkNPTkZJR19DQU5fRU1TX1BDST1tCiMgQ09ORklHX0NBTl9GODE2MDEgaXMgbm90IHNldApDT05G SUdfQ0FOX0tWQVNFUl9QQ0k9bQpDT05GSUdfQ0FOX1BFQUtfUENJPW0KQ09ORklHX0NBTl9QRUFL X1BDSUVDPXkKQ09ORklHX0NBTl9QTFhfUENJPW0KIyBDT05GSUdfQ0FOX1NKQTEwMDBfSVNBIGlz IG5vdCBzZXQKQ09ORklHX0NBTl9TSkExMDAwX1BMQVRGT1JNPW0KQ09ORklHX0NBTl9TT0ZUSU5H PW0KCiMKIyBDQU4gU1BJIGludGVyZmFjZXMKIwojIENPTkZJR19DQU5fSEkzMTFYIGlzIG5vdCBz ZXQKIyBDT05GSUdfQ0FOX01DUDI1MVggaXMgbm90IHNldAojIGVuZCBvZiBDQU4gU1BJIGludGVy ZmFjZXMKCiMKIyBDQU4gVVNCIGludGVyZmFjZXMKIwpDT05GSUdfQ0FOXzhERVZfVVNCPW0KQ09O RklHX0NBTl9FTVNfVVNCPW0KQ09ORklHX0NBTl9FU0RfVVNCMj1tCiMgQ09ORklHX0NBTl9HU19V U0IgaXMgbm90IHNldApDT05GSUdfQ0FOX0tWQVNFUl9VU0I9bQojIENPTkZJR19DQU5fTUNCQV9V U0IgaXMgbm90IHNldApDT05GSUdfQ0FOX1BFQUtfVVNCPW0KIyBDT05GSUdfQ0FOX1VDQU4gaXMg bm90IHNldAojIGVuZCBvZiBDQU4gVVNCIGludGVyZmFjZXMKCiMgQ09ORklHX0NBTl9ERUJVR19E RVZJQ0VTIGlzIG5vdCBzZXQKIyBlbmQgb2YgQ0FOIERldmljZSBEcml2ZXJzCgpDT05GSUdfQlQ9 bQpDT05GSUdfQlRfQlJFRFI9eQpDT05GSUdfQlRfUkZDT01NPW0KQ09ORklHX0JUX1JGQ09NTV9U VFk9eQpDT05GSUdfQlRfQk5FUD1tCkNPTkZJR19CVF9CTkVQX01DX0ZJTFRFUj15CkNPTkZJR19C VF9CTkVQX1BST1RPX0ZJTFRFUj15CkNPTkZJR19CVF9DTVRQPW0KQ09ORklHX0JUX0hJRFA9bQpD T05GSUdfQlRfSFM9eQpDT05GSUdfQlRfTEU9eQojIENPTkZJR19CVF82TE9XUEFOIGlzIG5vdCBz ZXQKIyBDT05GSUdfQlRfTEVEUyBpcyBub3Qgc2V0CiMgQ09ORklHX0JUX1NFTEZURVNUIGlzIG5v dCBzZXQKQ09ORklHX0JUX0RFQlVHRlM9eQoKIwojIEJsdWV0b290aCBkZXZpY2UgZHJpdmVycwoj CkNPTkZJR19CVF9JTlRFTD1tCkNPTkZJR19CVF9CQ009bQpDT05GSUdfQlRfUlRMPW0KQ09ORklH X0JUX0hDSUJUVVNCPW0KIyBDT05GSUdfQlRfSENJQlRVU0JfQVVUT1NVU1BFTkQgaXMgbm90IHNl dApDT05GSUdfQlRfSENJQlRVU0JfQkNNPXkKIyBDT05GSUdfQlRfSENJQlRVU0JfTVRLIGlzIG5v dCBzZXQKQ09ORklHX0JUX0hDSUJUVVNCX1JUTD15CkNPTkZJR19CVF9IQ0lCVFNESU89bQpDT05G SUdfQlRfSENJVUFSVD1tCkNPTkZJR19CVF9IQ0lVQVJUX0g0PXkKQ09ORklHX0JUX0hDSVVBUlRf QkNTUD15CkNPTkZJR19CVF9IQ0lVQVJUX0FUSDNLPXkKIyBDT05GSUdfQlRfSENJVUFSVF9JTlRF TCBpcyBub3Qgc2V0CiMgQ09ORklHX0JUX0hDSVVBUlRfQUc2WFggaXMgbm90IHNldApDT05GSUdf QlRfSENJQkNNMjAzWD1tCkNPTkZJR19CVF9IQ0lCUEExMFg9bQpDT05GSUdfQlRfSENJQkZVU0I9 bQpDT05GSUdfQlRfSENJVkhDST1tCkNPTkZJR19CVF9NUlZMPW0KQ09ORklHX0JUX01SVkxfU0RJ Tz1tCkNPTkZJR19CVF9BVEgzSz1tCiMgQ09ORklHX0JUX01US1NESU8gaXMgbm90IHNldAojIGVu ZCBvZiBCbHVldG9vdGggZGV2aWNlIGRyaXZlcnMKCiMgQ09ORklHX0FGX1JYUlBDIGlzIG5vdCBz ZXQKIyBDT05GSUdfQUZfS0NNIGlzIG5vdCBzZXQKQ09ORklHX1NUUkVBTV9QQVJTRVI9eQpDT05G SUdfRklCX1JVTEVTPXkKQ09ORklHX1dJUkVMRVNTPXkKQ09ORklHX1dJUkVMRVNTX0VYVD15CkNP TkZJR19XRVhUX0NPUkU9eQpDT05GSUdfV0VYVF9QUk9DPXkKQ09ORklHX1dFWFRfUFJJVj15CkNP TkZJR19DRkc4MDIxMT1tCiMgQ09ORklHX05MODAyMTFfVEVTVE1PREUgaXMgbm90IHNldAojIENP TkZJR19DRkc4MDIxMV9ERVZFTE9QRVJfV0FSTklOR1MgaXMgbm90IHNldAojIENPTkZJR19DRkc4 MDIxMV9DRVJUSUZJQ0FUSU9OX09OVVMgaXMgbm90IHNldApDT05GSUdfQ0ZHODAyMTFfUkVRVUlS RV9TSUdORURfUkVHREI9eQpDT05GSUdfQ0ZHODAyMTFfVVNFX0tFUk5FTF9SRUdEQl9LRVlTPXkK Q09ORklHX0NGRzgwMjExX0RFRkFVTFRfUFM9eQojIENPTkZJR19DRkc4MDIxMV9ERUJVR0ZTIGlz IG5vdCBzZXQKQ09ORklHX0NGRzgwMjExX0NSREFfU1VQUE9SVD15CkNPTkZJR19DRkc4MDIxMV9X RVhUPXkKQ09ORklHX0xJQjgwMjExPW0KIyBDT05GSUdfTElCODAyMTFfREVCVUcgaXMgbm90IHNl dApDT05GSUdfTUFDODAyMTE9bQpDT05GSUdfTUFDODAyMTFfSEFTX1JDPXkKQ09ORklHX01BQzgw MjExX1JDX01JTlNUUkVMPXkKQ09ORklHX01BQzgwMjExX1JDX0RFRkFVTFRfTUlOU1RSRUw9eQpD T05GSUdfTUFDODAyMTFfUkNfREVGQVVMVD0ibWluc3RyZWxfaHQiCkNPTkZJR19NQUM4MDIxMV9N RVNIPXkKQ09ORklHX01BQzgwMjExX0xFRFM9eQpDT05GSUdfTUFDODAyMTFfREVCVUdGUz15CiMg Q09ORklHX01BQzgwMjExX01FU1NBR0VfVFJBQ0lORyBpcyBub3Qgc2V0CiMgQ09ORklHX01BQzgw MjExX0RFQlVHX01FTlUgaXMgbm90IHNldApDT05GSUdfTUFDODAyMTFfU1RBX0hBU0hfTUFYX1NJ WkU9MAojIENPTkZJR19XSU1BWCBpcyBub3Qgc2V0CkNPTkZJR19SRktJTEw9bQpDT05GSUdfUkZL SUxMX0xFRFM9eQpDT05GSUdfUkZLSUxMX0lOUFVUPXkKIyBDT05GSUdfUkZLSUxMX0dQSU8gaXMg bm90IHNldApDT05GSUdfTkVUXzlQPXkKQ09ORklHX05FVF85UF9WSVJUSU89eQojIENPTkZJR19O RVRfOVBfWEVOIGlzIG5vdCBzZXQKIyBDT05GSUdfTkVUXzlQX0RFQlVHIGlzIG5vdCBzZXQKIyBD T05GSUdfQ0FJRiBpcyBub3Qgc2V0CkNPTkZJR19DRVBIX0xJQj1tCiMgQ09ORklHX0NFUEhfTElC X1BSRVRUWURFQlVHIGlzIG5vdCBzZXQKQ09ORklHX0NFUEhfTElCX1VTRV9ETlNfUkVTT0xWRVI9 eQojIENPTkZJR19ORkMgaXMgbm90IHNldApDT05GSUdfUFNBTVBMRT1tCiMgQ09ORklHX05FVF9J RkUgaXMgbm90IHNldApDT05GSUdfTFdUVU5ORUw9eQpDT05GSUdfTFdUVU5ORUxfQlBGPXkKQ09O RklHX0RTVF9DQUNIRT15CkNPTkZJR19HUk9fQ0VMTFM9eQpDT05GSUdfTkVUX1NPQ0tfTVNHPXkK Q09ORklHX05FVF9ERVZMSU5LPXkKQ09ORklHX1BBR0VfUE9PTD15CkNPTkZJR19GQUlMT1ZFUj1t CkNPTkZJR19FVEhUT09MX05FVExJTks9eQpDT05GSUdfSEFWRV9FQlBGX0pJVD15CgojCiMgRGV2 aWNlIERyaXZlcnMKIwpDT05GSUdfSEFWRV9FSVNBPXkKIyBDT05GSUdfRUlTQSBpcyBub3Qgc2V0 CkNPTkZJR19IQVZFX1BDST15CkNPTkZJR19QQ0k9eQpDT05GSUdfUENJX0RPTUFJTlM9eQpDT05G SUdfUENJRVBPUlRCVVM9eQpDT05GSUdfSE9UUExVR19QQ0lfUENJRT15CkNPTkZJR19QQ0lFQUVS PXkKQ09ORklHX1BDSUVBRVJfSU5KRUNUPW0KQ09ORklHX1BDSUVfRUNSQz15CkNPTkZJR19QQ0lF QVNQTT15CkNPTkZJR19QQ0lFQVNQTV9ERUZBVUxUPXkKIyBDT05GSUdfUENJRUFTUE1fUE9XRVJT QVZFIGlzIG5vdCBzZXQKIyBDT05GSUdfUENJRUFTUE1fUE9XRVJfU1VQRVJTQVZFIGlzIG5vdCBz ZXQKIyBDT05GSUdfUENJRUFTUE1fUEVSRk9STUFOQ0UgaXMgbm90IHNldApDT05GSUdfUENJRV9Q TUU9eQojIENPTkZJR19QQ0lFX0RQQyBpcyBub3Qgc2V0CiMgQ09ORklHX1BDSUVfUFRNIGlzIG5v dCBzZXQKIyBDT05GSUdfUENJRV9CVyBpcyBub3Qgc2V0CkNPTkZJR19QQ0lfTVNJPXkKQ09ORklH X1BDSV9NU0lfSVJRX0RPTUFJTj15CkNPTkZJR19QQ0lfUVVJUktTPXkKIyBDT05GSUdfUENJX0RF QlVHIGlzIG5vdCBzZXQKIyBDT05GSUdfUENJX1JFQUxMT0NfRU5BQkxFX0FVVE8gaXMgbm90IHNl dApDT05GSUdfUENJX1NUVUI9eQojIENPTkZJR19QQ0lfUEZfU1RVQiBpcyBub3Qgc2V0CiMgQ09O RklHX1hFTl9QQ0lERVZfRlJPTlRFTkQgaXMgbm90IHNldApDT05GSUdfUENJX0FUUz15CkNPTkZJ R19QQ0lfTE9DS0xFU1NfQ09ORklHPXkKQ09ORklHX1BDSV9JT1Y9eQpDT05GSUdfUENJX1BSST15 CkNPTkZJR19QQ0lfUEFTSUQ9eQojIENPTkZJR19QQ0lfUDJQRE1BIGlzIG5vdCBzZXQKQ09ORklH X1BDSV9MQUJFTD15CkNPTkZJR19QQ0lfSFlQRVJWPW0KQ09ORklHX0hPVFBMVUdfUENJPXkKQ09O RklHX0hPVFBMVUdfUENJX0FDUEk9eQpDT05GSUdfSE9UUExVR19QQ0lfQUNQSV9JQk09bQojIENP TkZJR19IT1RQTFVHX1BDSV9DUENJIGlzIG5vdCBzZXQKQ09ORklHX0hPVFBMVUdfUENJX1NIUEM9 eQoKIwojIFBDSSBjb250cm9sbGVyIGRyaXZlcnMKIwpDT05GSUdfVk1EPXkKQ09ORklHX1BDSV9I WVBFUlZfSU5URVJGQUNFPW0KCiMKIyBEZXNpZ25XYXJlIFBDSSBDb3JlIFN1cHBvcnQKIwojIENP TkZJR19QQ0lFX0RXX1BMQVRfSE9TVCBpcyBub3Qgc2V0CiMgQ09ORklHX1BDSV9NRVNPTiBpcyBu b3Qgc2V0CiMgZW5kIG9mIERlc2lnbldhcmUgUENJIENvcmUgU3VwcG9ydAoKIwojIENhZGVuY2Ug UENJZSBjb250cm9sbGVycyBzdXBwb3J0CiMKIyBlbmQgb2YgQ2FkZW5jZSBQQ0llIGNvbnRyb2xs ZXJzIHN1cHBvcnQKIyBlbmQgb2YgUENJIGNvbnRyb2xsZXIgZHJpdmVycwoKIwojIFBDSSBFbmRw b2ludAojCiMgQ09ORklHX1BDSV9FTkRQT0lOVCBpcyBub3Qgc2V0CiMgZW5kIG9mIFBDSSBFbmRw b2ludAoKIwojIFBDSSBzd2l0Y2ggY29udHJvbGxlciBkcml2ZXJzCiMKIyBDT05GSUdfUENJX1NX X1NXSVRDSFRFQyBpcyBub3Qgc2V0CiMgZW5kIG9mIFBDSSBzd2l0Y2ggY29udHJvbGxlciBkcml2 ZXJzCgpDT05GSUdfUENDQVJEPXkKIyBDT05GSUdfUENNQ0lBIGlzIG5vdCBzZXQKQ09ORklHX0NB UkRCVVM9eQoKIwojIFBDLWNhcmQgYnJpZGdlcwojCkNPTkZJR19ZRU5UQT1tCkNPTkZJR19ZRU5U QV9PMj15CkNPTkZJR19ZRU5UQV9SSUNPSD15CkNPTkZJR19ZRU5UQV9UST15CkNPTkZJR19ZRU5U QV9FTkVfVFVORT15CkNPTkZJR19ZRU5UQV9UT1NISUJBPXkKIyBDT05GSUdfUkFQSURJTyBpcyBu b3Qgc2V0CgojCiMgR2VuZXJpYyBEcml2ZXIgT3B0aW9ucwojCkNPTkZJR19VRVZFTlRfSEVMUEVS PXkKQ09ORklHX1VFVkVOVF9IRUxQRVJfUEFUSD0iIgpDT05GSUdfREVWVE1QRlM9eQpDT05GSUdf REVWVE1QRlNfTU9VTlQ9eQpDT05GSUdfU1RBTkRBTE9ORT15CkNPTkZJR19QUkVWRU5UX0ZJUk1X QVJFX0JVSUxEPXkKCiMKIyBGaXJtd2FyZSBsb2FkZXIKIwpDT05GSUdfRldfTE9BREVSPXkKQ09O RklHX0ZXX0xPQURFUl9QQUdFRF9CVUY9eQpDT05GSUdfRVhUUkFfRklSTVdBUkU9IiIKQ09ORklH X0ZXX0xPQURFUl9VU0VSX0hFTFBFUj15CiMgQ09ORklHX0ZXX0xPQURFUl9VU0VSX0hFTFBFUl9G QUxMQkFDSyBpcyBub3Qgc2V0CiMgQ09ORklHX0ZXX0xPQURFUl9DT01QUkVTUyBpcyBub3Qgc2V0 CkNPTkZJR19GV19DQUNIRT15CiMgZW5kIG9mIEZpcm13YXJlIGxvYWRlcgoKQ09ORklHX1dBTlRf REVWX0NPUkVEVU1QPXkKQ09ORklHX0FMTE9XX0RFVl9DT1JFRFVNUD15CkNPTkZJR19ERVZfQ09S RURVTVA9eQojIENPTkZJR19ERUJVR19EUklWRVIgaXMgbm90IHNldAojIENPTkZJR19ERUJVR19E RVZSRVMgaXMgbm90IHNldAojIENPTkZJR19ERUJVR19URVNUX0RSSVZFUl9SRU1PVkUgaXMgbm90 IHNldAojIENPTkZJR19URVNUX0FTWU5DX0RSSVZFUl9QUk9CRSBpcyBub3Qgc2V0CkNPTkZJR19T WVNfSFlQRVJWSVNPUj15CkNPTkZJR19HRU5FUklDX0NQVV9BVVRPUFJPQkU9eQpDT05GSUdfR0VO RVJJQ19DUFVfVlVMTkVSQUJJTElUSUVTPXkKQ09ORklHX1JFR01BUD15CkNPTkZJR19SRUdNQVBf STJDPW0KQ09ORklHX1JFR01BUF9TUEk9bQpDT05GSUdfUkVHTUFQX0lSUT15CkNPTkZJR19ETUFf U0hBUkVEX0JVRkZFUj15CiMgQ09ORklHX0RNQV9GRU5DRV9UUkFDRSBpcyBub3Qgc2V0CiMgZW5k IG9mIEdlbmVyaWMgRHJpdmVyIE9wdGlvbnMKCiMKIyBCdXMgZGV2aWNlcwojCiMgZW5kIG9mIEJ1 cyBkZXZpY2VzCgpDT05GSUdfQ09OTkVDVE9SPXkKQ09ORklHX1BST0NfRVZFTlRTPXkKIyBDT05G SUdfR05TUyBpcyBub3Qgc2V0CkNPTkZJR19NVEQ9bQojIENPTkZJR19NVERfVEVTVFMgaXMgbm90 IHNldAoKIwojIFBhcnRpdGlvbiBwYXJzZXJzCiMKIyBDT05GSUdfTVREX0FSN19QQVJUUyBpcyBu b3Qgc2V0CiMgQ09ORklHX01URF9DTURMSU5FX1BBUlRTIGlzIG5vdCBzZXQKIyBDT05GSUdfTVRE X1JFREJPT1RfUEFSVFMgaXMgbm90IHNldAojIGVuZCBvZiBQYXJ0aXRpb24gcGFyc2VycwoKIwoj IFVzZXIgTW9kdWxlcyBBbmQgVHJhbnNsYXRpb24gTGF5ZXJzCiMKQ09ORklHX01URF9CTEtERVZT PW0KQ09ORklHX01URF9CTE9DSz1tCiMgQ09ORklHX01URF9CTE9DS19STyBpcyBub3Qgc2V0CiMg Q09ORklHX0ZUTCBpcyBub3Qgc2V0CiMgQ09ORklHX05GVEwgaXMgbm90IHNldAojIENPTkZJR19J TkZUTCBpcyBub3Qgc2V0CiMgQ09ORklHX1JGRF9GVEwgaXMgbm90IHNldAojIENPTkZJR19TU0ZE QyBpcyBub3Qgc2V0CiMgQ09ORklHX1NNX0ZUTCBpcyBub3Qgc2V0CiMgQ09ORklHX01URF9PT1BT IGlzIG5vdCBzZXQKIyBDT05GSUdfTVREX1NXQVAgaXMgbm90IHNldAojIENPTkZJR19NVERfUEFS VElUSU9ORURfTUFTVEVSIGlzIG5vdCBzZXQKCiMKIyBSQU0vUk9NL0ZsYXNoIGNoaXAgZHJpdmVy cwojCiMgQ09ORklHX01URF9DRkkgaXMgbm90IHNldAojIENPTkZJR19NVERfSkVERUNQUk9CRSBp cyBub3Qgc2V0CkNPTkZJR19NVERfTUFQX0JBTktfV0lEVEhfMT15CkNPTkZJR19NVERfTUFQX0JB TktfV0lEVEhfMj15CkNPTkZJR19NVERfTUFQX0JBTktfV0lEVEhfND15CkNPTkZJR19NVERfQ0ZJ X0kxPXkKQ09ORklHX01URF9DRklfSTI9eQojIENPTkZJR19NVERfUkFNIGlzIG5vdCBzZXQKIyBD T05GSUdfTVREX1JPTSBpcyBub3Qgc2V0CiMgQ09ORklHX01URF9BQlNFTlQgaXMgbm90IHNldAoj IGVuZCBvZiBSQU0vUk9NL0ZsYXNoIGNoaXAgZHJpdmVycwoKIwojIE1hcHBpbmcgZHJpdmVycyBm b3IgY2hpcCBhY2Nlc3MKIwojIENPTkZJR19NVERfQ09NUExFWF9NQVBQSU5HUyBpcyBub3Qgc2V0 CiMgQ09ORklHX01URF9JTlRFTF9WUl9OT1IgaXMgbm90IHNldAojIENPTkZJR19NVERfUExBVFJB TSBpcyBub3Qgc2V0CiMgZW5kIG9mIE1hcHBpbmcgZHJpdmVycyBmb3IgY2hpcCBhY2Nlc3MKCiMK IyBTZWxmLWNvbnRhaW5lZCBNVEQgZGV2aWNlIGRyaXZlcnMKIwojIENPTkZJR19NVERfUE1DNTUx IGlzIG5vdCBzZXQKIyBDT05GSUdfTVREX0RBVEFGTEFTSCBpcyBub3Qgc2V0CiMgQ09ORklHX01U RF9NQ0hQMjNLMjU2IGlzIG5vdCBzZXQKIyBDT05GSUdfTVREX1NTVDI1TCBpcyBub3Qgc2V0CiMg Q09ORklHX01URF9TTFJBTSBpcyBub3Qgc2V0CiMgQ09ORklHX01URF9QSFJBTSBpcyBub3Qgc2V0 CiMgQ09ORklHX01URF9NVERSQU0gaXMgbm90IHNldAojIENPTkZJR19NVERfQkxPQ0syTVREIGlz IG5vdCBzZXQKCiMKIyBEaXNrLU9uLUNoaXAgRGV2aWNlIERyaXZlcnMKIwojIENPTkZJR19NVERf RE9DRzMgaXMgbm90IHNldAojIGVuZCBvZiBTZWxmLWNvbnRhaW5lZCBNVEQgZGV2aWNlIGRyaXZl cnMKCiMgQ09ORklHX01URF9PTkVOQU5EIGlzIG5vdCBzZXQKIyBDT05GSUdfTVREX1JBV19OQU5E IGlzIG5vdCBzZXQKIyBDT05GSUdfTVREX1NQSV9OQU5EIGlzIG5vdCBzZXQKCiMKIyBMUEREUiAm IExQRERSMiBQQ00gbWVtb3J5IGRyaXZlcnMKIwojIENPTkZJR19NVERfTFBERFIgaXMgbm90IHNl dAojIGVuZCBvZiBMUEREUiAmIExQRERSMiBQQ00gbWVtb3J5IGRyaXZlcnMKCiMgQ09ORklHX01U RF9TUElfTk9SIGlzIG5vdCBzZXQKQ09ORklHX01URF9VQkk9bQpDT05GSUdfTVREX1VCSV9XTF9U SFJFU0hPTEQ9NDA5NgpDT05GSUdfTVREX1VCSV9CRUJfTElNSVQ9MjAKIyBDT05GSUdfTVREX1VC SV9GQVNUTUFQIGlzIG5vdCBzZXQKIyBDT05GSUdfTVREX1VCSV9HTFVFQkkgaXMgbm90IHNldAoj IENPTkZJR19NVERfVUJJX0JMT0NLIGlzIG5vdCBzZXQKIyBDT05GSUdfTVREX0hZUEVSQlVTIGlz IG5vdCBzZXQKIyBDT05GSUdfT0YgaXMgbm90IHNldApDT05GSUdfQVJDSF9NSUdIVF9IQVZFX1BD X1BBUlBPUlQ9eQpDT05GSUdfUEFSUE9SVD1tCkNPTkZJR19QQVJQT1JUX1BDPW0KQ09ORklHX1BB UlBPUlRfU0VSSUFMPW0KIyBDT05GSUdfUEFSUE9SVF9QQ19GSUZPIGlzIG5vdCBzZXQKIyBDT05G SUdfUEFSUE9SVF9QQ19TVVBFUklPIGlzIG5vdCBzZXQKIyBDT05GSUdfUEFSUE9SVF9BWDg4Nzk2 IGlzIG5vdCBzZXQKQ09ORklHX1BBUlBPUlRfMTI4ND15CkNPTkZJR19QQVJQT1JUX05PVF9QQz15 CkNPTkZJR19QTlA9eQojIENPTkZJR19QTlBfREVCVUdfTUVTU0FHRVMgaXMgbm90IHNldAoKIwoj IFByb3RvY29scwojCkNPTkZJR19QTlBBQ1BJPXkKQ09ORklHX0JMS19ERVY9eQpDT05GSUdfQkxL X0RFVl9OVUxMX0JMSz1tCkNPTkZJR19CTEtfREVWX05VTExfQkxLX0ZBVUxUX0lOSkVDVElPTj15 CkNPTkZJR19CTEtfREVWX0ZEPW0KQ09ORklHX0NEUk9NPW0KIyBDT05GSUdfUEFSSURFIGlzIG5v dCBzZXQKQ09ORklHX0JMS19ERVZfUENJRVNTRF9NVElQMzJYWD1tCiMgQ09ORklHX1pSQU0gaXMg bm90IHNldAojIENPTkZJR19CTEtfREVWX1VNRU0gaXMgbm90IHNldApDT05GSUdfQkxLX0RFVl9M T09QPW0KQ09ORklHX0JMS19ERVZfTE9PUF9NSU5fQ09VTlQ9MAojIENPTkZJR19CTEtfREVWX0NS WVBUT0xPT1AgaXMgbm90IHNldAojIENPTkZJR19CTEtfREVWX0RSQkQgaXMgbm90IHNldApDT05G SUdfQkxLX0RFVl9OQkQ9bQojIENPTkZJR19CTEtfREVWX1NLRCBpcyBub3Qgc2V0CkNPTkZJR19C TEtfREVWX1NYOD1tCkNPTkZJR19CTEtfREVWX1JBTT1tCkNPTkZJR19CTEtfREVWX1JBTV9DT1VO VD0xNgpDT05GSUdfQkxLX0RFVl9SQU1fU0laRT0xNjM4NApDT05GSUdfQ0RST01fUEtUQ0RWRD1t CkNPTkZJR19DRFJPTV9QS1RDRFZEX0JVRkZFUlM9OAojIENPTkZJR19DRFJPTV9QS1RDRFZEX1dD QUNIRSBpcyBub3Qgc2V0CkNPTkZJR19BVEFfT1ZFUl9FVEg9bQpDT05GSUdfWEVOX0JMS0RFVl9G Uk9OVEVORD1tCkNPTkZJR19WSVJUSU9fQkxLPXkKQ09ORklHX0JMS19ERVZfUkJEPW0KIyBDT05G SUdfQkxLX0RFVl9SU1hYIGlzIG5vdCBzZXQKCiMKIyBOVk1FIFN1cHBvcnQKIwpDT05GSUdfTlZN RV9DT1JFPW0KQ09ORklHX0JMS19ERVZfTlZNRT1tCkNPTkZJR19OVk1FX01VTFRJUEFUSD15CiMg Q09ORklHX05WTUVfSFdNT04gaXMgbm90IHNldApDT05GSUdfTlZNRV9GQUJSSUNTPW0KQ09ORklH X05WTUVfRkM9bQojIENPTkZJR19OVk1FX1RDUCBpcyBub3Qgc2V0CkNPTkZJR19OVk1FX1RBUkdF VD1tCkNPTkZJR19OVk1FX1RBUkdFVF9MT09QPW0KQ09ORklHX05WTUVfVEFSR0VUX0ZDPW0KQ09O RklHX05WTUVfVEFSR0VUX0ZDTE9PUD1tCiMgQ09ORklHX05WTUVfVEFSR0VUX1RDUCBpcyBub3Qg c2V0CiMgZW5kIG9mIE5WTUUgU3VwcG9ydAoKIwojIE1pc2MgZGV2aWNlcwojCkNPTkZJR19TRU5T T1JTX0xJUzNMVjAyRD1tCiMgQ09ORklHX0FENTI1WF9EUE9UIGlzIG5vdCBzZXQKIyBDT05GSUdf RFVNTVlfSVJRIGlzIG5vdCBzZXQKIyBDT05GSUdfSUJNX0FTTSBpcyBub3Qgc2V0CiMgQ09ORklH X1BIQU5UT00gaXMgbm90IHNldApDT05GSUdfVElGTV9DT1JFPW0KQ09ORklHX1RJRk1fN1hYMT1t CiMgQ09ORklHX0lDUzkzMlM0MDEgaXMgbm90IHNldApDT05GSUdfRU5DTE9TVVJFX1NFUlZJQ0VT PW0KQ09ORklHX1NHSV9YUD1tCkNPTkZJR19IUF9JTE89bQpDT05GSUdfU0dJX0dSVT1tCiMgQ09O RklHX1NHSV9HUlVfREVCVUcgaXMgbm90IHNldApDT05GSUdfQVBEUzk4MDJBTFM9bQpDT05GSUdf SVNMMjkwMDM9bQpDT05GSUdfSVNMMjkwMjA9bQpDT05GSUdfU0VOU09SU19UU0wyNTUwPW0KQ09O RklHX1NFTlNPUlNfQkgxNzcwPW0KQ09ORklHX1NFTlNPUlNfQVBEUzk5MFg9bQojIENPTkZJR19I TUM2MzUyIGlzIG5vdCBzZXQKIyBDT05GSUdfRFMxNjgyIGlzIG5vdCBzZXQKQ09ORklHX1ZNV0FS RV9CQUxMT09OPW0KIyBDT05GSUdfTEFUVElDRV9FQ1AzX0NPTkZJRyBpcyBub3Qgc2V0CiMgQ09O RklHX1NSQU0gaXMgbm90IHNldAojIENPTkZJR19QQ0lfRU5EUE9JTlRfVEVTVCBpcyBub3Qgc2V0 CiMgQ09ORklHX1hJTElOWF9TREZFQyBpcyBub3Qgc2V0CkNPTkZJR19QVlBBTklDPXkKIyBDT05G SUdfQzJQT1JUIGlzIG5vdCBzZXQKCiMKIyBFRVBST00gc3VwcG9ydAojCkNPTkZJR19FRVBST01f QVQyND1tCiMgQ09ORklHX0VFUFJPTV9BVDI1IGlzIG5vdCBzZXQKQ09ORklHX0VFUFJPTV9MRUdB Q1k9bQpDT05GSUdfRUVQUk9NX01BWDY4NzU9bQpDT05GSUdfRUVQUk9NXzkzQ1g2PW0KIyBDT05G SUdfRUVQUk9NXzkzWFg0NiBpcyBub3Qgc2V0CiMgQ09ORklHX0VFUFJPTV9JRFRfODlIUEVTWCBp cyBub3Qgc2V0CiMgQ09ORklHX0VFUFJPTV9FRTEwMDQgaXMgbm90IHNldAojIGVuZCBvZiBFRVBS T00gc3VwcG9ydAoKQ09ORklHX0NCNzEwX0NPUkU9bQojIENPTkZJR19DQjcxMF9ERUJVRyBpcyBu b3Qgc2V0CkNPTkZJR19DQjcxMF9ERUJVR19BU1NVTVBUSU9OUz15CgojCiMgVGV4YXMgSW5zdHJ1 bWVudHMgc2hhcmVkIHRyYW5zcG9ydCBsaW5lIGRpc2NpcGxpbmUKIwojIENPTkZJR19USV9TVCBp cyBub3Qgc2V0CiMgZW5kIG9mIFRleGFzIEluc3RydW1lbnRzIHNoYXJlZCB0cmFuc3BvcnQgbGlu ZSBkaXNjaXBsaW5lCgpDT05GSUdfU0VOU09SU19MSVMzX0kyQz1tCkNPTkZJR19BTFRFUkFfU1RB UEw9bQpDT05GSUdfSU5URUxfTUVJPW0KQ09ORklHX0lOVEVMX01FSV9NRT1tCiMgQ09ORklHX0lO VEVMX01FSV9UWEUgaXMgbm90IHNldAojIENPTkZJR19JTlRFTF9NRUlfSERDUCBpcyBub3Qgc2V0 CkNPTkZJR19WTVdBUkVfVk1DST1tCgojCiMgSW50ZWwgTUlDICYgcmVsYXRlZCBzdXBwb3J0CiMK IyBDT05GSUdfSU5URUxfTUlDX0JVUyBpcyBub3Qgc2V0CiMgQ09ORklHX1NDSUZfQlVTIGlzIG5v dCBzZXQKIyBDT05GSUdfVk9QX0JVUyBpcyBub3Qgc2V0CiMgZW5kIG9mIEludGVsIE1JQyAmIHJl bGF0ZWQgc3VwcG9ydAoKIyBDT05GSUdfR0VOV1FFIGlzIG5vdCBzZXQKIyBDT05GSUdfRUNITyBp cyBub3Qgc2V0CiMgQ09ORklHX01JU0NfQUxDT1JfUENJIGlzIG5vdCBzZXQKIyBDT05GSUdfTUlT Q19SVFNYX1BDSSBpcyBub3Qgc2V0CiMgQ09ORklHX01JU0NfUlRTWF9VU0IgaXMgbm90IHNldAoj IENPTkZJR19IQUJBTkFfQUkgaXMgbm90IHNldAojIGVuZCBvZiBNaXNjIGRldmljZXMKCkNPTkZJ R19IQVZFX0lERT15CiMgQ09ORklHX0lERSBpcyBub3Qgc2V0CgojCiMgU0NTSSBkZXZpY2Ugc3Vw cG9ydAojCkNPTkZJR19TQ1NJX01PRD15CkNPTkZJR19SQUlEX0FUVFJTPW0KQ09ORklHX1NDU0k9 eQpDT05GSUdfU0NTSV9ETUE9eQpDT05GSUdfU0NTSV9ORVRMSU5LPXkKQ09ORklHX1NDU0lfUFJP Q19GUz15CgojCiMgU0NTSSBzdXBwb3J0IHR5cGUgKGRpc2ssIHRhcGUsIENELVJPTSkKIwpDT05G SUdfQkxLX0RFVl9TRD1tCkNPTkZJR19DSFJfREVWX1NUPW0KQ09ORklHX0JMS19ERVZfU1I9bQpD T05GSUdfQkxLX0RFVl9TUl9WRU5ET1I9eQpDT05GSUdfQ0hSX0RFVl9TRz1tCkNPTkZJR19DSFJf REVWX1NDSD1tCkNPTkZJR19TQ1NJX0VOQ0xPU1VSRT1tCkNPTkZJR19TQ1NJX0NPTlNUQU5UUz15 CkNPTkZJR19TQ1NJX0xPR0dJTkc9eQpDT05GSUdfU0NTSV9TQ0FOX0FTWU5DPXkKCiMKIyBTQ1NJ IFRyYW5zcG9ydHMKIwpDT05GSUdfU0NTSV9TUElfQVRUUlM9bQpDT05GSUdfU0NTSV9GQ19BVFRS Uz1tCkNPTkZJR19TQ1NJX0lTQ1NJX0FUVFJTPW0KQ09ORklHX1NDU0lfU0FTX0FUVFJTPW0KQ09O RklHX1NDU0lfU0FTX0xJQlNBUz1tCkNPTkZJR19TQ1NJX1NBU19BVEE9eQpDT05GSUdfU0NTSV9T QVNfSE9TVF9TTVA9eQpDT05GSUdfU0NTSV9TUlBfQVRUUlM9bQojIGVuZCBvZiBTQ1NJIFRyYW5z cG9ydHMKCkNPTkZJR19TQ1NJX0xPV0xFVkVMPXkKQ09ORklHX0lTQ1NJX1RDUD1tCkNPTkZJR19J U0NTSV9CT09UX1NZU0ZTPW0KQ09ORklHX1NDU0lfQ1hHQjNfSVNDU0k9bQpDT05GSUdfU0NTSV9D WEdCNF9JU0NTST1tCkNPTkZJR19TQ1NJX0JOWDJfSVNDU0k9bQpDT05GSUdfU0NTSV9CTlgyWF9G Q09FPW0KQ09ORklHX0JFMklTQ1NJPW0KIyBDT05GSUdfQkxLX0RFVl8zV19YWFhYX1JBSUQgaXMg bm90IHNldApDT05GSUdfU0NTSV9IUFNBPW0KQ09ORklHX1NDU0lfM1dfOVhYWD1tCkNPTkZJR19T Q1NJXzNXX1NBUz1tCiMgQ09ORklHX1NDU0lfQUNBUkQgaXMgbm90IHNldApDT05GSUdfU0NTSV9B QUNSQUlEPW0KIyBDT05GSUdfU0NTSV9BSUM3WFhYIGlzIG5vdCBzZXQKQ09ORklHX1NDU0lfQUlD NzlYWD1tCkNPTkZJR19BSUM3OVhYX0NNRFNfUEVSX0RFVklDRT00CkNPTkZJR19BSUM3OVhYX1JF U0VUX0RFTEFZX01TPTE1MDAwCiMgQ09ORklHX0FJQzc5WFhfREVCVUdfRU5BQkxFIGlzIG5vdCBz ZXQKQ09ORklHX0FJQzc5WFhfREVCVUdfTUFTSz0wCiMgQ09ORklHX0FJQzc5WFhfUkVHX1BSRVRU WV9QUklOVCBpcyBub3Qgc2V0CiMgQ09ORklHX1NDU0lfQUlDOTRYWCBpcyBub3Qgc2V0CkNPTkZJ R19TQ1NJX01WU0FTPW0KIyBDT05GSUdfU0NTSV9NVlNBU19ERUJVRyBpcyBub3Qgc2V0CkNPTkZJ R19TQ1NJX01WU0FTX1RBU0tMRVQ9eQpDT05GSUdfU0NTSV9NVlVNST1tCiMgQ09ORklHX1NDU0lf RFBUX0kyTyBpcyBub3Qgc2V0CiMgQ09ORklHX1NDU0lfQURWQU5TWVMgaXMgbm90IHNldApDT05G SUdfU0NTSV9BUkNNU1I9bQojIENPTkZJR19TQ1NJX0VTQVMyUiBpcyBub3Qgc2V0CiMgQ09ORklH X01FR0FSQUlEX05FV0dFTiBpcyBub3Qgc2V0CiMgQ09ORklHX01FR0FSQUlEX0xFR0FDWSBpcyBu b3Qgc2V0CkNPTkZJR19NRUdBUkFJRF9TQVM9bQpDT05GSUdfU0NTSV9NUFQzU0FTPW0KQ09ORklH X1NDU0lfTVBUMlNBU19NQVhfU0dFPTEyOApDT05GSUdfU0NTSV9NUFQzU0FTX01BWF9TR0U9MTI4 CkNPTkZJR19TQ1NJX01QVDJTQVM9bQojIENPTkZJR19TQ1NJX1NNQVJUUFFJIGlzIG5vdCBzZXQK Q09ORklHX1NDU0lfVUZTSENEPW0KQ09ORklHX1NDU0lfVUZTSENEX1BDST1tCiMgQ09ORklHX1ND U0lfVUZTX0RXQ19UQ19QQ0kgaXMgbm90IHNldAojIENPTkZJR19TQ1NJX1VGU0hDRF9QTEFURk9S TSBpcyBub3Qgc2V0CiMgQ09ORklHX1NDU0lfVUZTX0JTRyBpcyBub3Qgc2V0CkNPTkZJR19TQ1NJ X0hQVElPUD1tCiMgQ09ORklHX1NDU0lfQlVTTE9HSUMgaXMgbm90IHNldAojIENPTkZJR19TQ1NJ X01ZUkIgaXMgbm90IHNldAojIENPTkZJR19TQ1NJX01ZUlMgaXMgbm90IHNldApDT05GSUdfVk1X QVJFX1BWU0NTST1tCiMgQ09ORklHX1hFTl9TQ1NJX0ZST05URU5EIGlzIG5vdCBzZXQKQ09ORklH X0hZUEVSVl9TVE9SQUdFPW0KQ09ORklHX0xJQkZDPW0KQ09ORklHX0xJQkZDT0U9bQpDT05GSUdf RkNPRT1tCkNPTkZJR19GQ09FX0ZOSUM9bQojIENPTkZJR19TQ1NJX1NOSUMgaXMgbm90IHNldAoj IENPTkZJR19TQ1NJX0RNWDMxOTFEIGlzIG5vdCBzZXQKIyBDT05GSUdfU0NTSV9GRE9NQUlOX1BD SSBpcyBub3Qgc2V0CiMgQ09ORklHX1NDU0lfR0RUSCBpcyBub3Qgc2V0CkNPTkZJR19TQ1NJX0lT Q0k9bQojIENPTkZJR19TQ1NJX0lQUyBpcyBub3Qgc2V0CkNPTkZJR19TQ1NJX0lOSVRJTz1tCiMg Q09ORklHX1NDU0lfSU5JQTEwMCBpcyBub3Qgc2V0CiMgQ09ORklHX1NDU0lfUFBBIGlzIG5vdCBz ZXQKIyBDT05GSUdfU0NTSV9JTU0gaXMgbm90IHNldApDT05GSUdfU0NTSV9TVEVYPW0KIyBDT05G SUdfU0NTSV9TWU01M0M4WFhfMiBpcyBub3Qgc2V0CiMgQ09ORklHX1NDU0lfSVBSIGlzIG5vdCBz ZXQKIyBDT05GSUdfU0NTSV9RTE9HSUNfMTI4MCBpcyBub3Qgc2V0CkNPTkZJR19TQ1NJX1FMQV9G Qz1tCkNPTkZJR19UQ01fUUxBMlhYWD1tCiMgQ09ORklHX1RDTV9RTEEyWFhYX0RFQlVHIGlzIG5v dCBzZXQKQ09ORklHX1NDU0lfUUxBX0lTQ1NJPW0KIyBDT05GSUdfUUVESSBpcyBub3Qgc2V0CiMg Q09ORklHX1FFREYgaXMgbm90IHNldAojIENPTkZJR19TQ1NJX0xQRkMgaXMgbm90IHNldAojIENP TkZJR19TQ1NJX0RDMzk1eCBpcyBub3Qgc2V0CiMgQ09ORklHX1NDU0lfQU01M0M5NzQgaXMgbm90 IHNldAojIENPTkZJR19TQ1NJX1dENzE5WCBpcyBub3Qgc2V0CkNPTkZJR19TQ1NJX0RFQlVHPW0K Q09ORklHX1NDU0lfUE1DUkFJRD1tCkNPTkZJR19TQ1NJX1BNODAwMT1tCiMgQ09ORklHX1NDU0lf QkZBX0ZDIGlzIG5vdCBzZXQKQ09ORklHX1NDU0lfVklSVElPPW0KIyBDT05GSUdfU0NTSV9DSEVM U0lPX0ZDT0UgaXMgbm90IHNldApDT05GSUdfU0NTSV9ESD15CkNPTkZJR19TQ1NJX0RIX1JEQUM9 eQpDT05GSUdfU0NTSV9ESF9IUF9TVz15CkNPTkZJR19TQ1NJX0RIX0VNQz15CkNPTkZJR19TQ1NJ X0RIX0FMVUE9eQojIGVuZCBvZiBTQ1NJIGRldmljZSBzdXBwb3J0CgpDT05GSUdfQVRBPW0KQ09O RklHX0FUQV9WRVJCT1NFX0VSUk9SPXkKQ09ORklHX0FUQV9BQ1BJPXkKIyBDT05GSUdfU0FUQV9a UE9ERCBpcyBub3Qgc2V0CkNPTkZJR19TQVRBX1BNUD15CgojCiMgQ29udHJvbGxlcnMgd2l0aCBu b24tU0ZGIG5hdGl2ZSBpbnRlcmZhY2UKIwpDT05GSUdfU0FUQV9BSENJPW0KQ09ORklHX1NBVEFf TU9CSUxFX0xQTV9QT0xJQ1k9MApDT05GSUdfU0FUQV9BSENJX1BMQVRGT1JNPW0KIyBDT05GSUdf U0FUQV9JTklDMTYyWCBpcyBub3Qgc2V0CkNPTkZJR19TQVRBX0FDQVJEX0FIQ0k9bQpDT05GSUdf U0FUQV9TSUwyND1tCkNPTkZJR19BVEFfU0ZGPXkKCiMKIyBTRkYgY29udHJvbGxlcnMgd2l0aCBj dXN0b20gRE1BIGludGVyZmFjZQojCkNPTkZJR19QRENfQURNQT1tCkNPTkZJR19TQVRBX1FTVE9S PW0KQ09ORklHX1NBVEFfU1g0PW0KQ09ORklHX0FUQV9CTURNQT15CgojCiMgU0FUQSBTRkYgY29u dHJvbGxlcnMgd2l0aCBCTURNQQojCkNPTkZJR19BVEFfUElJWD1tCiMgQ09ORklHX1NBVEFfRFdD IGlzIG5vdCBzZXQKQ09ORklHX1NBVEFfTVY9bQpDT05GSUdfU0FUQV9OVj1tCkNPTkZJR19TQVRB X1BST01JU0U9bQpDT05GSUdfU0FUQV9TSUw9bQpDT05GSUdfU0FUQV9TSVM9bQpDT05GSUdfU0FU QV9TVlc9bQpDT05GSUdfU0FUQV9VTEk9bQpDT05GSUdfU0FUQV9WSUE9bQpDT05GSUdfU0FUQV9W SVRFU1NFPW0KCiMKIyBQQVRBIFNGRiBjb250cm9sbGVycyB3aXRoIEJNRE1BCiMKQ09ORklHX1BB VEFfQUxJPW0KQ09ORklHX1BBVEFfQU1EPW0KQ09ORklHX1BBVEFfQVJUT1A9bQpDT05GSUdfUEFU QV9BVElJWFA9bQpDT05GSUdfUEFUQV9BVFA4NjdYPW0KQ09ORklHX1BBVEFfQ01ENjRYPW0KIyBD T05GSUdfUEFUQV9DWVBSRVNTIGlzIG5vdCBzZXQKIyBDT05GSUdfUEFUQV9FRkFSIGlzIG5vdCBz ZXQKQ09ORklHX1BBVEFfSFBUMzY2PW0KQ09ORklHX1BBVEFfSFBUMzdYPW0KQ09ORklHX1BBVEFf SFBUM1gyTj1tCkNPTkZJR19QQVRBX0hQVDNYMz1tCiMgQ09ORklHX1BBVEFfSFBUM1gzX0RNQSBp cyBub3Qgc2V0CkNPTkZJR19QQVRBX0lUODIxMz1tCkNPTkZJR19QQVRBX0lUODIxWD1tCkNPTkZJ R19QQVRBX0pNSUNST049bQpDT05GSUdfUEFUQV9NQVJWRUxMPW0KQ09ORklHX1BBVEFfTkVUQ0VM TD1tCkNPTkZJR19QQVRBX05JTkpBMzI9bQojIENPTkZJR19QQVRBX05TODc0MTUgaXMgbm90IHNl dApDT05GSUdfUEFUQV9PTERQSUlYPW0KIyBDT05GSUdfUEFUQV9PUFRJRE1BIGlzIG5vdCBzZXQK Q09ORklHX1BBVEFfUERDMjAyN1g9bQpDT05GSUdfUEFUQV9QRENfT0xEPW0KIyBDT05GSUdfUEFU QV9SQURJU1lTIGlzIG5vdCBzZXQKQ09ORklHX1BBVEFfUkRDPW0KQ09ORklHX1BBVEFfU0NIPW0K Q09ORklHX1BBVEFfU0VSVkVSV09SS1M9bQpDT05GSUdfUEFUQV9TSUw2ODA9bQpDT05GSUdfUEFU QV9TSVM9bQpDT05GSUdfUEFUQV9UT1NISUJBPW0KIyBDT05GSUdfUEFUQV9UUklGTEVYIGlzIG5v dCBzZXQKQ09ORklHX1BBVEFfVklBPW0KIyBDT05GSUdfUEFUQV9XSU5CT05EIGlzIG5vdCBzZXQK CiMKIyBQSU8tb25seSBTRkYgY29udHJvbGxlcnMKIwojIENPTkZJR19QQVRBX0NNRDY0MF9QQ0kg aXMgbm90IHNldAojIENPTkZJR19QQVRBX01QSUlYIGlzIG5vdCBzZXQKIyBDT05GSUdfUEFUQV9O Uzg3NDEwIGlzIG5vdCBzZXQKIyBDT05GSUdfUEFUQV9PUFRJIGlzIG5vdCBzZXQKIyBDT05GSUdf UEFUQV9QTEFURk9STSBpcyBub3Qgc2V0CiMgQ09ORklHX1BBVEFfUloxMDAwIGlzIG5vdCBzZXQK CiMKIyBHZW5lcmljIGZhbGxiYWNrIC8gbGVnYWN5IGRyaXZlcnMKIwpDT05GSUdfUEFUQV9BQ1BJ PW0KQ09ORklHX0FUQV9HRU5FUklDPW0KIyBDT05GSUdfUEFUQV9MRUdBQ1kgaXMgbm90IHNldApD T05GSUdfTUQ9eQpDT05GSUdfQkxLX0RFVl9NRD15CkNPTkZJR19NRF9BVVRPREVURUNUPXkKQ09O RklHX01EX0xJTkVBUj1tCkNPTkZJR19NRF9SQUlEMD1tCkNPTkZJR19NRF9SQUlEMT1tCkNPTkZJ R19NRF9SQUlEMTA9bQpDT05GSUdfTURfUkFJRDQ1Nj1tCkNPTkZJR19NRF9NVUxUSVBBVEg9bQpD T05GSUdfTURfRkFVTFRZPW0KIyBDT05GSUdfTURfQ0xVU1RFUiBpcyBub3Qgc2V0CiMgQ09ORklH X0JDQUNIRSBpcyBub3Qgc2V0CkNPTkZJR19CTEtfREVWX0RNX0JVSUxUSU49eQpDT05GSUdfQkxL X0RFVl9ETT1tCkNPTkZJR19ETV9ERUJVRz15CkNPTkZJR19ETV9CVUZJTz1tCiMgQ09ORklHX0RN X0RFQlVHX0JMT0NLX01BTkFHRVJfTE9DS0lORyBpcyBub3Qgc2V0CkNPTkZJR19ETV9CSU9fUFJJ U09OPW0KQ09ORklHX0RNX1BFUlNJU1RFTlRfREFUQT1tCiMgQ09ORklHX0RNX1VOU1RSSVBFRCBp cyBub3Qgc2V0CkNPTkZJR19ETV9DUllQVD1tCkNPTkZJR19ETV9TTkFQU0hPVD1tCkNPTkZJR19E TV9USElOX1BST1ZJU0lPTklORz1tCkNPTkZJR19ETV9DQUNIRT1tCkNPTkZJR19ETV9DQUNIRV9T TVE9bQojIENPTkZJR19ETV9XUklURUNBQ0hFIGlzIG5vdCBzZXQKQ09ORklHX0RNX0VSQT1tCiMg Q09ORklHX0RNX0NMT05FIGlzIG5vdCBzZXQKQ09ORklHX0RNX01JUlJPUj1tCkNPTkZJR19ETV9M T0dfVVNFUlNQQUNFPW0KQ09ORklHX0RNX1JBSUQ9bQpDT05GSUdfRE1fWkVSTz1tCkNPTkZJR19E TV9NVUxUSVBBVEg9bQpDT05GSUdfRE1fTVVMVElQQVRIX1FMPW0KQ09ORklHX0RNX01VTFRJUEFU SF9TVD1tCkNPTkZJR19ETV9ERUxBWT1tCiMgQ09ORklHX0RNX0RVU1QgaXMgbm90IHNldApDT05G SUdfRE1fVUVWRU5UPXkKQ09ORklHX0RNX0ZMQUtFWT1tCkNPTkZJR19ETV9WRVJJVFk9bQojIENP TkZJR19ETV9WRVJJVFlfVkVSSUZZX1JPT1RIQVNIX1NJRyBpcyBub3Qgc2V0CiMgQ09ORklHX0RN X1ZFUklUWV9GRUMgaXMgbm90IHNldApDT05GSUdfRE1fU1dJVENIPW0KQ09ORklHX0RNX0xPR19X UklURVM9bQojIENPTkZJR19ETV9JTlRFR1JJVFkgaXMgbm90IHNldAojIENPTkZJR19ETV9aT05F RCBpcyBub3Qgc2V0CkNPTkZJR19UQVJHRVRfQ09SRT1tCkNPTkZJR19UQ01fSUJMT0NLPW0KQ09O RklHX1RDTV9GSUxFSU89bQpDT05GSUdfVENNX1BTQ1NJPW0KQ09ORklHX1RDTV9VU0VSMj1tCkNP TkZJR19MT09QQkFDS19UQVJHRVQ9bQpDT05GSUdfVENNX0ZDPW0KQ09ORklHX0lTQ1NJX1RBUkdF VD1tCkNPTkZJR19JU0NTSV9UQVJHRVRfQ1hHQjQ9bQojIENPTkZJR19TQlBfVEFSR0VUIGlzIG5v dCBzZXQKQ09ORklHX0ZVU0lPTj15CkNPTkZJR19GVVNJT05fU1BJPW0KIyBDT05GSUdfRlVTSU9O X0ZDIGlzIG5vdCBzZXQKQ09ORklHX0ZVU0lPTl9TQVM9bQpDT05GSUdfRlVTSU9OX01BWF9TR0U9 MTI4CkNPTkZJR19GVVNJT05fQ1RMPW0KQ09ORklHX0ZVU0lPTl9MT0dHSU5HPXkKCiMKIyBJRUVF IDEzOTQgKEZpcmVXaXJlKSBzdXBwb3J0CiMKQ09ORklHX0ZJUkVXSVJFPW0KQ09ORklHX0ZJUkVX SVJFX09IQ0k9bQpDT05GSUdfRklSRVdJUkVfU0JQMj1tCkNPTkZJR19GSVJFV0lSRV9ORVQ9bQoj IENPTkZJR19GSVJFV0lSRV9OT1NZIGlzIG5vdCBzZXQKIyBlbmQgb2YgSUVFRSAxMzk0IChGaXJl V2lyZSkgc3VwcG9ydAoKQ09ORklHX01BQ0lOVE9TSF9EUklWRVJTPXkKQ09ORklHX01BQ19FTVVN T1VTRUJUTj15CkNPTkZJR19ORVRERVZJQ0VTPXkKQ09ORklHX01JST15CkNPTkZJR19ORVRfQ09S RT15CkNPTkZJR19CT05ESU5HPW0KQ09ORklHX0RVTU1ZPW0KIyBDT05GSUdfV0lSRUdVQVJEIGlz IG5vdCBzZXQKIyBDT05GSUdfRVFVQUxJWkVSIGlzIG5vdCBzZXQKQ09ORklHX05FVF9GQz15CkNP TkZJR19JRkI9bQpDT05GSUdfTkVUX1RFQU09bQpDT05GSUdfTkVUX1RFQU1fTU9ERV9CUk9BRENB U1Q9bQpDT05GSUdfTkVUX1RFQU1fTU9ERV9ST1VORFJPQklOPW0KQ09ORklHX05FVF9URUFNX01P REVfUkFORE9NPW0KQ09ORklHX05FVF9URUFNX01PREVfQUNUSVZFQkFDS1VQPW0KQ09ORklHX05F VF9URUFNX01PREVfTE9BREJBTEFOQ0U9bQpDT05GSUdfTUFDVkxBTj1tCkNPTkZJR19NQUNWVEFQ PW0KIyBDT05GSUdfSVBWTEFOIGlzIG5vdCBzZXQKQ09ORklHX1ZYTEFOPW0KQ09ORklHX0dFTkVW RT1tCiMgQ09ORklHX0dUUCBpcyBub3Qgc2V0CkNPTkZJR19NQUNTRUM9eQpDT05GSUdfTkVUQ09O U09MRT1tCkNPTkZJR19ORVRDT05TT0xFX0RZTkFNSUM9eQpDT05GSUdfTkVUUE9MTD15CkNPTkZJ R19ORVRfUE9MTF9DT05UUk9MTEVSPXkKQ09ORklHX05UQl9ORVRERVY9bQpDT05GSUdfVFVOPW0K Q09ORklHX1RBUD1tCiMgQ09ORklHX1RVTl9WTkVUX0NST1NTX0xFIGlzIG5vdCBzZXQKQ09ORklH X1ZFVEg9bQpDT05GSUdfVklSVElPX05FVD1tCkNPTkZJR19OTE1PTj1tCkNPTkZJR19ORVRfVlJG PXkKQ09ORklHX1ZTT0NLTU9OPW0KIyBDT05GSUdfQVJDTkVUIGlzIG5vdCBzZXQKIyBDT05GSUdf QVRNX0RSSVZFUlMgaXMgbm90IHNldAoKIwojIERpc3RyaWJ1dGVkIFN3aXRjaCBBcmNoaXRlY3R1 cmUgZHJpdmVycwojCiMgZW5kIG9mIERpc3RyaWJ1dGVkIFN3aXRjaCBBcmNoaXRlY3R1cmUgZHJp dmVycwoKQ09ORklHX0VUSEVSTkVUPXkKQ09ORklHX01ESU89eQojIENPTkZJR19ORVRfVkVORE9S XzNDT00gaXMgbm90IHNldAojIENPTkZJR19ORVRfVkVORE9SX0FEQVBURUMgaXMgbm90IHNldApD T05GSUdfTkVUX1ZFTkRPUl9BR0VSRT15CiMgQ09ORklHX0VUMTMxWCBpcyBub3Qgc2V0CkNPTkZJ R19ORVRfVkVORE9SX0FMQUNSSVRFQ0g9eQojIENPTkZJR19TTElDT1NTIGlzIG5vdCBzZXQKIyBD T05GSUdfTkVUX1ZFTkRPUl9BTFRFT04gaXMgbm90IHNldAojIENPTkZJR19BTFRFUkFfVFNFIGlz IG5vdCBzZXQKQ09ORklHX05FVF9WRU5ET1JfQU1BWk9OPXkKQ09ORklHX0VOQV9FVEhFUk5FVD1t CkNPTkZJR19ORVRfVkVORE9SX0FNRD15CkNPTkZJR19BTUQ4MTExX0VUSD1tCkNPTkZJR19QQ05F VDMyPW0KQ09ORklHX0FNRF9YR0JFPW0KIyBDT05GSUdfQU1EX1hHQkVfRENCIGlzIG5vdCBzZXQK Q09ORklHX0FNRF9YR0JFX0hBVkVfRUNDPXkKQ09ORklHX05FVF9WRU5ET1JfQVFVQU5USUE9eQpD T05GSUdfQVFUSU9OPW0KQ09ORklHX05FVF9WRU5ET1JfQVJDPXkKQ09ORklHX05FVF9WRU5ET1Jf QVRIRVJPUz15CkNPTkZJR19BVEwyPW0KQ09ORklHX0FUTDE9bQpDT05GSUdfQVRMMUU9bQpDT05G SUdfQVRMMUM9bQpDT05GSUdfQUxYPW0KQ09ORklHX05FVF9WRU5ET1JfQVVST1JBPXkKIyBDT05G SUdfQVVST1JBX05CODgwMCBpcyBub3Qgc2V0CkNPTkZJR19ORVRfVkVORE9SX0JST0FEQ09NPXkK Q09ORklHX0I0ND1tCkNPTkZJR19CNDRfUENJX0FVVE9TRUxFQ1Q9eQpDT05GSUdfQjQ0X1BDSUNP UkVfQVVUT1NFTEVDVD15CkNPTkZJR19CNDRfUENJPXkKIyBDT05GSUdfQkNNR0VORVQgaXMgbm90 IHNldApDT05GSUdfQk5YMj1tCkNPTkZJR19DTklDPW0KQ09ORklHX1RJR09OMz15CkNPTkZJR19U SUdPTjNfSFdNT049eQpDT05GSUdfQk5YMlg9bQpDT05GSUdfQk5YMlhfU1JJT1Y9eQojIENPTkZJ R19TWVNURU1QT1JUIGlzIG5vdCBzZXQKQ09ORklHX0JOWFQ9bQpDT05GSUdfQk5YVF9TUklPVj15 CkNPTkZJR19CTlhUX0ZMT1dFUl9PRkZMT0FEPXkKQ09ORklHX0JOWFRfRENCPXkKQ09ORklHX0JO WFRfSFdNT049eQpDT05GSUdfTkVUX1ZFTkRPUl9CUk9DQURFPXkKQ09ORklHX0JOQT1tCkNPTkZJ R19ORVRfVkVORE9SX0NBREVOQ0U9eQpDT05GSUdfTUFDQj1tCkNPTkZJR19NQUNCX1VTRV9IV1NU QU1QPXkKIyBDT05GSUdfTUFDQl9QQ0kgaXMgbm90IHNldApDT05GSUdfTkVUX1ZFTkRPUl9DQVZJ VU09eQojIENPTkZJR19USFVOREVSX05JQ19QRiBpcyBub3Qgc2V0CiMgQ09ORklHX1RIVU5ERVJf TklDX1ZGIGlzIG5vdCBzZXQKIyBDT05GSUdfVEhVTkRFUl9OSUNfQkdYIGlzIG5vdCBzZXQKIyBD T05GSUdfVEhVTkRFUl9OSUNfUkdYIGlzIG5vdCBzZXQKQ09ORklHX0NBVklVTV9QVFA9eQpDT05G SUdfTElRVUlESU89bQpDT05GSUdfTElRVUlESU9fVkY9bQpDT05GSUdfTkVUX1ZFTkRPUl9DSEVM U0lPPXkKIyBDT05GSUdfQ0hFTFNJT19UMSBpcyBub3Qgc2V0CkNPTkZJR19DSEVMU0lPX1QzPW0K Q09ORklHX0NIRUxTSU9fVDQ9bQojIENPTkZJR19DSEVMU0lPX1Q0X0RDQiBpcyBub3Qgc2V0CkNP TkZJR19DSEVMU0lPX1Q0VkY9bQpDT05GSUdfQ0hFTFNJT19MSUI9bQpDT05GSUdfTkVUX1ZFTkRP Ul9DSVNDTz15CkNPTkZJR19FTklDPW0KQ09ORklHX05FVF9WRU5ET1JfQ09SVElOQT15CiMgQ09O RklHX0NYX0VDQVQgaXMgbm90IHNldApDT05GSUdfRE5FVD1tCkNPTkZJR19ORVRfVkVORE9SX0RF Qz15CkNPTkZJR19ORVRfVFVMSVA9eQpDT05GSUdfREUyMTA0WD1tCkNPTkZJR19ERTIxMDRYX0RT TD0wCkNPTkZJR19UVUxJUD15CiMgQ09ORklHX1RVTElQX01XSSBpcyBub3Qgc2V0CkNPTkZJR19U VUxJUF9NTUlPPXkKIyBDT05GSUdfVFVMSVBfTkFQSSBpcyBub3Qgc2V0CkNPTkZJR19ERTRYNT1t CkNPTkZJR19XSU5CT05EXzg0MD1tCkNPTkZJR19ETTkxMDI9bQpDT05GSUdfVUxJNTI2WD1tCkNP TkZJR19QQ01DSUFfWElSQ09NPW0KIyBDT05GSUdfTkVUX1ZFTkRPUl9ETElOSyBpcyBub3Qgc2V0 CkNPTkZJR19ORVRfVkVORE9SX0VNVUxFWD15CkNPTkZJR19CRTJORVQ9bQpDT05GSUdfQkUyTkVU X0hXTU9OPXkKQ09ORklHX0JFMk5FVF9CRTI9eQpDT05GSUdfQkUyTkVUX0JFMz15CkNPTkZJR19C RTJORVRfTEFOQ0VSPXkKQ09ORklHX0JFMk5FVF9TS1lIQVdLPXkKQ09ORklHX05FVF9WRU5ET1Jf RVpDSElQPXkKQ09ORklHX05FVF9WRU5ET1JfR09PR0xFPXkKIyBDT05GSUdfR1ZFIGlzIG5vdCBz ZXQKQ09ORklHX05FVF9WRU5ET1JfSFVBV0VJPXkKIyBDT05GSUdfSElOSUMgaXMgbm90IHNldAoj IENPTkZJR19ORVRfVkVORE9SX0k4MjVYWCBpcyBub3Qgc2V0CkNPTkZJR19ORVRfVkVORE9SX0lO VEVMPXkKIyBDT05GSUdfRTEwMCBpcyBub3Qgc2V0CkNPTkZJR19FMTAwMD15CkNPTkZJR19FMTAw MEU9eQpDT05GSUdfRTEwMDBFX0hXVFM9eQpDT05GSUdfSUdCPXkKQ09ORklHX0lHQl9IV01PTj15 CkNPTkZJR19JR0JWRj1tCiMgQ09ORklHX0lYR0IgaXMgbm90IHNldApDT05GSUdfSVhHQkU9eQpD T05GSUdfSVhHQkVfSFdNT049eQpDT05GSUdfSVhHQkVfRENCPXkKQ09ORklHX0lYR0JFVkY9bQpD T05GSUdfSTQwRT15CkNPTkZJR19JNDBFX0RDQj15CkNPTkZJR19JQVZGPW0KQ09ORklHX0k0MEVW Rj1tCiMgQ09ORklHX0lDRSBpcyBub3Qgc2V0CkNPTkZJR19GTTEwSz1tCiMgQ09ORklHX0lHQyBp cyBub3Qgc2V0CkNPTkZJR19KTUU9bQpDT05GSUdfTkVUX1ZFTkRPUl9NQVJWRUxMPXkKQ09ORklH X01WTURJTz1tCkNPTkZJR19TS0dFPXkKIyBDT05GSUdfU0tHRV9ERUJVRyBpcyBub3Qgc2V0CkNP TkZJR19TS0dFX0dFTkVTSVM9eQpDT05GSUdfU0tZMj1tCiMgQ09ORklHX1NLWTJfREVCVUcgaXMg bm90IHNldApDT05GSUdfTkVUX1ZFTkRPUl9NRUxMQU5PWD15CkNPTkZJR19NTFg0X0VOPW0KQ09O RklHX01MWDRfRU5fRENCPXkKQ09ORklHX01MWDRfQ09SRT1tCkNPTkZJR19NTFg0X0RFQlVHPXkK Q09ORklHX01MWDRfQ09SRV9HRU4yPXkKIyBDT05GSUdfTUxYNV9DT1JFIGlzIG5vdCBzZXQKIyBD T05GSUdfTUxYU1dfQ09SRSBpcyBub3Qgc2V0CiMgQ09ORklHX01MWEZXIGlzIG5vdCBzZXQKIyBD T05GSUdfTkVUX1ZFTkRPUl9NSUNSRUwgaXMgbm90IHNldAojIENPTkZJR19ORVRfVkVORE9SX01J Q1JPQ0hJUCBpcyBub3Qgc2V0CkNPTkZJR19ORVRfVkVORE9SX01JQ1JPU0VNST15CiMgQ09ORklH X01TQ0NfT0NFTE9UX1NXSVRDSCBpcyBub3Qgc2V0CkNPTkZJR19ORVRfVkVORE9SX01ZUkk9eQpD T05GSUdfTVlSSTEwR0U9bQpDT05GSUdfTVlSSTEwR0VfRENBPXkKIyBDT05GSUdfRkVBTE5YIGlz IG5vdCBzZXQKIyBDT05GSUdfTkVUX1ZFTkRPUl9OQVRTRU1JIGlzIG5vdCBzZXQKQ09ORklHX05F VF9WRU5ET1JfTkVURVJJT049eQojIENPTkZJR19TMklPIGlzIG5vdCBzZXQKIyBDT05GSUdfVlhH RSBpcyBub3Qgc2V0CkNPTkZJR19ORVRfVkVORE9SX05FVFJPTk9NRT15CkNPTkZJR19ORlA9bQpD T05GSUdfTkZQX0FQUF9GTE9XRVI9eQpDT05GSUdfTkZQX0FQUF9BQk1fTklDPXkKIyBDT05GSUdf TkZQX0RFQlVHIGlzIG5vdCBzZXQKQ09ORklHX05FVF9WRU5ET1JfTkk9eQojIENPTkZJR19OSV9Y R0VfTUFOQUdFTUVOVF9FTkVUIGlzIG5vdCBzZXQKIyBDT05GSUdfTkVUX1ZFTkRPUl9OVklESUEg aXMgbm90IHNldApDT05GSUdfTkVUX1ZFTkRPUl9PS0k9eQpDT05GSUdfRVRIT0M9bQpDT05GSUdf TkVUX1ZFTkRPUl9QQUNLRVRfRU5HSU5FUz15CiMgQ09ORklHX0hBTUFDSEkgaXMgbm90IHNldApD T05GSUdfWUVMTE9XRklOPW0KQ09ORklHX05FVF9WRU5ET1JfUEVOU0FORE89eQojIENPTkZJR19J T05JQyBpcyBub3Qgc2V0CkNPTkZJR19ORVRfVkVORE9SX1FMT0dJQz15CkNPTkZJR19RTEEzWFhY PW0KQ09ORklHX1FMQ05JQz1tCkNPTkZJR19RTENOSUNfU1JJT1Y9eQpDT05GSUdfUUxDTklDX0RD Qj15CkNPTkZJR19RTENOSUNfSFdNT049eQpDT05GSUdfTkVUWEVOX05JQz1tCkNPTkZJR19RRUQ9 bQpDT05GSUdfUUVEX1NSSU9WPXkKQ09ORklHX1FFREU9bQpDT05GSUdfTkVUX1ZFTkRPUl9RVUFM Q09NTT15CiMgQ09ORklHX1FDT01fRU1BQyBpcyBub3Qgc2V0CiMgQ09ORklHX1JNTkVUIGlzIG5v dCBzZXQKIyBDT05GSUdfTkVUX1ZFTkRPUl9SREMgaXMgbm90IHNldApDT05GSUdfTkVUX1ZFTkRP Ul9SRUFMVEVLPXkKIyBDT05GSUdfQVRQIGlzIG5vdCBzZXQKQ09ORklHXzgxMzlDUD15CkNPTkZJ R184MTM5VE9PPXkKIyBDT05GSUdfODEzOVRPT19QSU8gaXMgbm90IHNldAojIENPTkZJR184MTM5 VE9PX1RVTkVfVFdJU1RFUiBpcyBub3Qgc2V0CkNPTkZJR184MTM5VE9PXzgxMjk9eQojIENPTkZJ R184MTM5X09MRF9SWF9SRVNFVCBpcyBub3Qgc2V0CkNPTkZJR19SODE2OT15CkNPTkZJR19ORVRf VkVORE9SX1JFTkVTQVM9eQpDT05GSUdfTkVUX1ZFTkRPUl9ST0NLRVI9eQpDT05GSUdfUk9DS0VS PW0KQ09ORklHX05FVF9WRU5ET1JfU0FNU1VORz15CiMgQ09ORklHX1NYR0JFX0VUSCBpcyBub3Qg c2V0CiMgQ09ORklHX05FVF9WRU5ET1JfU0VFUSBpcyBub3Qgc2V0CkNPTkZJR19ORVRfVkVORE9S X1NPTEFSRkxBUkU9eQpDT05GSUdfU0ZDPW0KQ09ORklHX1NGQ19NVEQ9eQpDT05GSUdfU0ZDX01D RElfTU9OPXkKQ09ORklHX1NGQ19TUklPVj15CkNPTkZJR19TRkNfTUNESV9MT0dHSU5HPXkKQ09O RklHX1NGQ19GQUxDT049bQpDT05GSUdfU0ZDX0ZBTENPTl9NVEQ9eQojIENPTkZJR19ORVRfVkVO RE9SX1NJTEFOIGlzIG5vdCBzZXQKIyBDT05GSUdfTkVUX1ZFTkRPUl9TSVMgaXMgbm90IHNldApD T05GSUdfTkVUX1ZFTkRPUl9TTVNDPXkKQ09ORklHX0VQSUMxMDA9bQojIENPTkZJR19TTVNDOTEx WCBpcyBub3Qgc2V0CkNPTkZJR19TTVNDOTQyMD1tCkNPTkZJR19ORVRfVkVORE9SX1NPQ0lPTkVY VD15CiMgQ09ORklHX05FVF9WRU5ET1JfU1RNSUNSTyBpcyBub3Qgc2V0CiMgQ09ORklHX05FVF9W RU5ET1JfU1VOIGlzIG5vdCBzZXQKQ09ORklHX05FVF9WRU5ET1JfU1lOT1BTWVM9eQojIENPTkZJ R19EV0NfWExHTUFDIGlzIG5vdCBzZXQKIyBDT05GSUdfTkVUX1ZFTkRPUl9URUhVVEkgaXMgbm90 IHNldApDT05GSUdfTkVUX1ZFTkRPUl9UST15CiMgQ09ORklHX1RJX0NQU1dfUEhZX1NFTCBpcyBu b3Qgc2V0CkNPTkZJR19UTEFOPW0KIyBDT05GSUdfTkVUX1ZFTkRPUl9WSUEgaXMgbm90IHNldAoj IENPTkZJR19ORVRfVkVORE9SX1dJWk5FVCBpcyBub3Qgc2V0CkNPTkZJR19ORVRfVkVORE9SX1hJ TElOWD15CiMgQ09ORklHX1hJTElOWF9BWElfRU1BQyBpcyBub3Qgc2V0CiMgQ09ORklHX1hJTElO WF9MTF9URU1BQyBpcyBub3Qgc2V0CiMgQ09ORklHX0ZEREkgaXMgbm90IHNldAojIENPTkZJR19I SVBQSSBpcyBub3Qgc2V0CiMgQ09ORklHX05FVF9TQjEwMDAgaXMgbm90IHNldApDT05GSUdfTURJ T19ERVZJQ0U9eQpDT05GSUdfTURJT19CVVM9eQojIENPTkZJR19NRElPX0JDTV9VTklNQUMgaXMg bm90IHNldApDT05GSUdfTURJT19CSVRCQU5HPW0KIyBDT05GSUdfTURJT19HUElPIGlzIG5vdCBz ZXQKIyBDT05GSUdfTURJT19NU0NDX01JSU0gaXMgbm90IHNldAojIENPTkZJR19NRElPX1RIVU5E RVIgaXMgbm90IHNldApDT05GSUdfUEhZTElOSz1tCkNPTkZJR19QSFlMSUI9eQpDT05GSUdfU1dQ SFk9eQojIENPTkZJR19MRURfVFJJR0dFUl9QSFkgaXMgbm90IHNldAoKIwojIE1JSSBQSFkgZGV2 aWNlIGRyaXZlcnMKIwojIENPTkZJR19TRlAgaXMgbm90IHNldAojIENPTkZJR19BRElOX1BIWSBp cyBub3Qgc2V0CkNPTkZJR19BTURfUEhZPW0KIyBDT05GSUdfQVFVQU5USUFfUEhZIGlzIG5vdCBz ZXQKIyBDT05GSUdfQVg4ODc5NkJfUEhZIGlzIG5vdCBzZXQKIyBDT05GSUdfQkNNN1hYWF9QSFkg aXMgbm90IHNldApDT05GSUdfQkNNODdYWF9QSFk9bQpDT05GSUdfQkNNX05FVF9QSFlMSUI9bQpD T05GSUdfQlJPQURDT01fUEhZPW0KIyBDT05GSUdfQkNNODQ4ODFfUEhZIGlzIG5vdCBzZXQKQ09O RklHX0NJQ0FEQV9QSFk9bQojIENPTkZJR19DT1JUSU5BX1BIWSBpcyBub3Qgc2V0CkNPTkZJR19E QVZJQ09NX1BIWT1tCiMgQ09ORklHX0RQODM4MjJfUEhZIGlzIG5vdCBzZXQKIyBDT05GSUdfRFA4 M1RDODExX1BIWSBpcyBub3Qgc2V0CiMgQ09ORklHX0RQODM4NDhfUEhZIGlzIG5vdCBzZXQKIyBD T05GSUdfRFA4Mzg2N19QSFkgaXMgbm90IHNldAojIENPTkZJR19EUDgzODY5X1BIWSBpcyBub3Qg c2V0CkNPTkZJR19GSVhFRF9QSFk9eQpDT05GSUdfSUNQTFVTX1BIWT1tCiMgQ09ORklHX0lOVEVM X1hXQVlfUEhZIGlzIG5vdCBzZXQKQ09ORklHX0xTSV9FVDEwMTFDX1BIWT1tCkNPTkZJR19MWFRf UEhZPW0KQ09ORklHX01BUlZFTExfUEhZPW0KIyBDT05GSUdfTUFSVkVMTF8xMEdfUEhZIGlzIG5v dCBzZXQKQ09ORklHX01JQ1JFTF9QSFk9bQojIENPTkZJR19NSUNST0NISVBfUEhZIGlzIG5vdCBz ZXQKIyBDT05GSUdfTUlDUk9DSElQX1QxX1BIWSBpcyBub3Qgc2V0CiMgQ09ORklHX01JQ1JPU0VN SV9QSFkgaXMgbm90IHNldApDT05GSUdfTkFUSU9OQUxfUEhZPW0KIyBDT05GSUdfTlhQX1RKQTEx WFhfUEhZIGlzIG5vdCBzZXQKQ09ORklHX1FTRU1JX1BIWT1tCkNPTkZJR19SRUFMVEVLX1BIWT15 CiMgQ09ORklHX1JFTkVTQVNfUEhZIGlzIG5vdCBzZXQKIyBDT05GSUdfUk9DS0NISVBfUEhZIGlz IG5vdCBzZXQKQ09ORklHX1NNU0NfUEhZPW0KQ09ORklHX1NURTEwWFA9bQojIENPTkZJR19URVJB TkVUSUNTX1BIWSBpcyBub3Qgc2V0CkNPTkZJR19WSVRFU1NFX1BIWT1tCiMgQ09ORklHX1hJTElO WF9HTUlJMlJHTUlJIGlzIG5vdCBzZXQKIyBDT05GSUdfTUlDUkVMX0tTODk5NU1BIGlzIG5vdCBz ZXQKIyBDT05GSUdfUExJUCBpcyBub3Qgc2V0CkNPTkZJR19QUFA9bQpDT05GSUdfUFBQX0JTRENP TVA9bQpDT05GSUdfUFBQX0RFRkxBVEU9bQpDT05GSUdfUFBQX0ZJTFRFUj15CkNPTkZJR19QUFBf TVBQRT1tCkNPTkZJR19QUFBfTVVMVElMSU5LPXkKQ09ORklHX1BQUE9BVE09bQpDT05GSUdfUFBQ T0U9bQpDT05GSUdfUFBUUD1tCkNPTkZJR19QUFBPTDJUUD1tCkNPTkZJR19QUFBfQVNZTkM9bQpD T05GSUdfUFBQX1NZTkNfVFRZPW0KQ09ORklHX1NMSVA9bQpDT05GSUdfU0xIQz1tCkNPTkZJR19T TElQX0NPTVBSRVNTRUQ9eQpDT05GSUdfU0xJUF9TTUFSVD15CiMgQ09ORklHX1NMSVBfTU9ERV9T TElQNiBpcyBub3Qgc2V0CkNPTkZJR19VU0JfTkVUX0RSSVZFUlM9eQpDT05GSUdfVVNCX0NBVEM9 eQpDT05GSUdfVVNCX0tBV0VUSD15CkNPTkZJR19VU0JfUEVHQVNVUz15CkNPTkZJR19VU0JfUlRM ODE1MD15CkNPTkZJR19VU0JfUlRMODE1Mj1tCiMgQ09ORklHX1VTQl9MQU43OFhYIGlzIG5vdCBz ZXQKQ09ORklHX1VTQl9VU0JORVQ9eQpDT05GSUdfVVNCX05FVF9BWDg4MTdYPXkKQ09ORklHX1VT Ql9ORVRfQVg4ODE3OV8xNzhBPW0KQ09ORklHX1VTQl9ORVRfQ0RDRVRIRVI9eQpDT05GSUdfVVNC X05FVF9DRENfRUVNPXkKQ09ORklHX1VTQl9ORVRfQ0RDX05DTT1tCkNPTkZJR19VU0JfTkVUX0hV QVdFSV9DRENfTkNNPW0KQ09ORklHX1VTQl9ORVRfQ0RDX01CSU09bQpDT05GSUdfVVNCX05FVF9E TTk2MDE9eQojIENPTkZJR19VU0JfTkVUX1NSOTcwMCBpcyBub3Qgc2V0CiMgQ09ORklHX1VTQl9O RVRfU1I5ODAwIGlzIG5vdCBzZXQKQ09ORklHX1VTQl9ORVRfU01TQzc1WFg9eQpDT05GSUdfVVNC X05FVF9TTVNDOTVYWD15CkNPTkZJR19VU0JfTkVUX0dMNjIwQT15CkNPTkZJR19VU0JfTkVUX05F VDEwODA9eQpDT05GSUdfVVNCX05FVF9QTFVTQj15CkNPTkZJR19VU0JfTkVUX01DUzc4MzA9eQpD T05GSUdfVVNCX05FVF9STkRJU19IT1NUPXkKQ09ORklHX1VTQl9ORVRfQ0RDX1NVQlNFVF9FTkFC TEU9eQpDT05GSUdfVVNCX05FVF9DRENfU1VCU0VUPXkKQ09ORklHX1VTQl9BTElfTTU2MzI9eQpD T05GSUdfVVNCX0FOMjcyMD15CkNPTkZJR19VU0JfQkVMS0lOPXkKQ09ORklHX1VTQl9BUk1MSU5V WD15CkNPTkZJR19VU0JfRVBTT04yODg4PXkKQ09ORklHX1VTQl9LQzIxOTA9eQpDT05GSUdfVVNC X05FVF9aQVVSVVM9eQpDT05GSUdfVVNCX05FVF9DWDgyMzEwX0VUSD1tCkNPTkZJR19VU0JfTkVU X0tBTE1JQT1tCkNPTkZJR19VU0JfTkVUX1FNSV9XV0FOPW0KQ09ORklHX1VTQl9IU089bQpDT05G SUdfVVNCX05FVF9JTlQ1MVgxPXkKQ09ORklHX1VTQl9JUEhFVEg9eQpDT05GSUdfVVNCX1NJRVJS QV9ORVQ9eQpDT05GSUdfVVNCX1ZMNjAwPW0KIyBDT05GSUdfVVNCX05FVF9DSDkyMDAgaXMgbm90 IHNldAojIENPTkZJR19VU0JfTkVUX0FRQzExMSBpcyBub3Qgc2V0CkNPTkZJR19XTEFOPXkKIyBD T05GSUdfV0lSRUxFU1NfV0RTIGlzIG5vdCBzZXQKQ09ORklHX1dMQU5fVkVORE9SX0FETVRFSz15 CiMgQ09ORklHX0FETTgyMTEgaXMgbm90IHNldApDT05GSUdfQVRIX0NPTU1PTj1tCkNPTkZJR19X TEFOX1ZFTkRPUl9BVEg9eQojIENPTkZJR19BVEhfREVCVUcgaXMgbm90IHNldAojIENPTkZJR19B VEg1SyBpcyBub3Qgc2V0CiMgQ09ORklHX0FUSDVLX1BDSSBpcyBub3Qgc2V0CkNPTkZJR19BVEg5 S19IVz1tCkNPTkZJR19BVEg5S19DT01NT049bQpDT05GSUdfQVRIOUtfQlRDT0VYX1NVUFBPUlQ9 eQojIENPTkZJR19BVEg5SyBpcyBub3Qgc2V0CkNPTkZJR19BVEg5S19IVEM9bQojIENPTkZJR19B VEg5S19IVENfREVCVUdGUyBpcyBub3Qgc2V0CiMgQ09ORklHX0NBUkw5MTcwIGlzIG5vdCBzZXQK IyBDT05GSUdfQVRINktMIGlzIG5vdCBzZXQKIyBDT05GSUdfQVI1NTIzIGlzIG5vdCBzZXQKIyBD T05GSUdfV0lMNjIxMCBpcyBub3Qgc2V0CiMgQ09ORklHX0FUSDEwSyBpcyBub3Qgc2V0CiMgQ09O RklHX1dDTjM2WFggaXMgbm90IHNldApDT05GSUdfV0xBTl9WRU5ET1JfQVRNRUw9eQojIENPTkZJ R19BVE1FTCBpcyBub3Qgc2V0CiMgQ09ORklHX0FUNzZDNTBYX1VTQiBpcyBub3Qgc2V0CkNPTkZJ R19XTEFOX1ZFTkRPUl9CUk9BRENPTT15CiMgQ09ORklHX0I0MyBpcyBub3Qgc2V0CiMgQ09ORklH X0I0M0xFR0FDWSBpcyBub3Qgc2V0CiMgQ09ORklHX0JSQ01TTUFDIGlzIG5vdCBzZXQKIyBDT05G SUdfQlJDTUZNQUMgaXMgbm90IHNldApDT05GSUdfV0xBTl9WRU5ET1JfQ0lTQ089eQojIENPTkZJ R19BSVJPIGlzIG5vdCBzZXQKQ09ORklHX1dMQU5fVkVORE9SX0lOVEVMPXkKIyBDT05GSUdfSVBX MjEwMCBpcyBub3Qgc2V0CiMgQ09ORklHX0lQVzIyMDAgaXMgbm90IHNldApDT05GSUdfSVdMRUdB Q1k9bQpDT05GSUdfSVdMNDk2NT1tCkNPTkZJR19JV0wzOTQ1PW0KCiMKIyBpd2wzOTQ1IC8gaXds NDk2NSBEZWJ1Z2dpbmcgT3B0aW9ucwojCkNPTkZJR19JV0xFR0FDWV9ERUJVRz15CkNPTkZJR19J V0xFR0FDWV9ERUJVR0ZTPXkKIyBlbmQgb2YgaXdsMzk0NSAvIGl3bDQ5NjUgRGVidWdnaW5nIE9w dGlvbnMKCkNPTkZJR19JV0xXSUZJPW0KQ09ORklHX0lXTFdJRklfTEVEUz15CkNPTkZJR19JV0xE Vk09bQpDT05GSUdfSVdMTVZNPW0KQ09ORklHX0lXTFdJRklfT1BNT0RFX01PRFVMQVI9eQojIENP TkZJR19JV0xXSUZJX0JDQVNUX0ZJTFRFUklORyBpcyBub3Qgc2V0CgojCiMgRGVidWdnaW5nIE9w dGlvbnMKIwojIENPTkZJR19JV0xXSUZJX0RFQlVHIGlzIG5vdCBzZXQKQ09ORklHX0lXTFdJRklf REVCVUdGUz15CiMgQ09ORklHX0lXTFdJRklfREVWSUNFX1RSQUNJTkcgaXMgbm90IHNldAojIGVu ZCBvZiBEZWJ1Z2dpbmcgT3B0aW9ucwoKQ09ORklHX1dMQU5fVkVORE9SX0lOVEVSU0lMPXkKIyBD T05GSUdfSE9TVEFQIGlzIG5vdCBzZXQKIyBDT05GSUdfSEVSTUVTIGlzIG5vdCBzZXQKIyBDT05G SUdfUDU0X0NPTU1PTiBpcyBub3Qgc2V0CiMgQ09ORklHX1BSSVNNNTQgaXMgbm90IHNldApDT05G SUdfV0xBTl9WRU5ET1JfTUFSVkVMTD15CiMgQ09ORklHX0xJQkVSVEFTIGlzIG5vdCBzZXQKIyBD T05GSUdfTElCRVJUQVNfVEhJTkZJUk0gaXMgbm90IHNldAojIENPTkZJR19NV0lGSUVYIGlzIG5v dCBzZXQKIyBDT05GSUdfTVdMOEsgaXMgbm90IHNldApDT05GSUdfV0xBTl9WRU5ET1JfTUVESUFU RUs9eQojIENPTkZJR19NVDc2MDFVIGlzIG5vdCBzZXQKIyBDT05GSUdfTVQ3NngwVSBpcyBub3Qg c2V0CiMgQ09ORklHX01UNzZ4MEUgaXMgbm90IHNldAojIENPTkZJR19NVDc2eDJFIGlzIG5vdCBz ZXQKIyBDT05GSUdfTVQ3NngyVSBpcyBub3Qgc2V0CiMgQ09ORklHX01UNzYwM0UgaXMgbm90IHNl dAojIENPTkZJR19NVDc2MTVFIGlzIG5vdCBzZXQKQ09ORklHX1dMQU5fVkVORE9SX1JBTElOSz15 CiMgQ09ORklHX1JUMlgwMCBpcyBub3Qgc2V0CkNPTkZJR19XTEFOX1ZFTkRPUl9SRUFMVEVLPXkK IyBDT05GSUdfUlRMODE4MCBpcyBub3Qgc2V0CiMgQ09ORklHX1JUTDgxODcgaXMgbm90IHNldAoj IENPTkZJR19SVExfQ0FSRFMgaXMgbm90IHNldAojIENPTkZJR19SVEw4WFhYVSBpcyBub3Qgc2V0 CiMgQ09ORklHX1JUVzg4IGlzIG5vdCBzZXQKQ09ORklHX1dMQU5fVkVORE9SX1JTST15CiMgQ09O RklHX1JTSV85MVggaXMgbm90IHNldApDT05GSUdfV0xBTl9WRU5ET1JfU1Q9eQojIENPTkZJR19D VzEyMDAgaXMgbm90IHNldApDT05GSUdfV0xBTl9WRU5ET1JfVEk9eQojIENPTkZJR19XTDEyNTEg aXMgbm90IHNldAojIENPTkZJR19XTDEyWFggaXMgbm90IHNldAojIENPTkZJR19XTDE4WFggaXMg bm90IHNldAojIENPTkZJR19XTENPUkUgaXMgbm90IHNldApDT05GSUdfV0xBTl9WRU5ET1JfWllE QVM9eQojIENPTkZJR19VU0JfWkQxMjAxIGlzIG5vdCBzZXQKIyBDT05GSUdfWkQxMjExUlcgaXMg bm90IHNldApDT05GSUdfV0xBTl9WRU5ET1JfUVVBTlRFTk5BPXkKIyBDT05GSUdfUVRORk1BQ19Q Q0lFIGlzIG5vdCBzZXQKQ09ORklHX01BQzgwMjExX0hXU0lNPW0KIyBDT05GSUdfVVNCX05FVF9S TkRJU19XTEFOIGlzIG5vdCBzZXQKIyBDT05GSUdfVklSVF9XSUZJIGlzIG5vdCBzZXQKCiMKIyBF bmFibGUgV2lNQVggKE5ldHdvcmtpbmcgb3B0aW9ucykgdG8gc2VlIHRoZSBXaU1BWCBkcml2ZXJz CiMKQ09ORklHX1dBTj15CiMgQ09ORklHX0xBTk1FRElBIGlzIG5vdCBzZXQKQ09ORklHX0hETEM9 bQpDT05GSUdfSERMQ19SQVc9bQojIENPTkZJR19IRExDX1JBV19FVEggaXMgbm90IHNldApDT05G SUdfSERMQ19DSVNDTz1tCkNPTkZJR19IRExDX0ZSPW0KQ09ORklHX0hETENfUFBQPW0KCiMKIyBY LjI1L0xBUEIgc3VwcG9ydCBpcyBkaXNhYmxlZAojCiMgQ09ORklHX1BDSTIwMFNZTiBpcyBub3Qg c2V0CiMgQ09ORklHX1dBTlhMIGlzIG5vdCBzZXQKIyBDT05GSUdfUEMzMDBUT08gaXMgbm90IHNl dAojIENPTkZJR19GQVJTWU5DIGlzIG5vdCBzZXQKQ09ORklHX0RMQ0k9bQpDT05GSUdfRExDSV9N QVg9OAojIENPTkZJR19TQk5JIGlzIG5vdCBzZXQKQ09ORklHX0lFRUU4MDIxNTRfRFJJVkVSUz1t CkNPTkZJR19JRUVFODAyMTU0X0ZBS0VMQj1tCiMgQ09ORklHX0lFRUU4MDIxNTRfQVQ4NlJGMjMw IGlzIG5vdCBzZXQKIyBDT05GSUdfSUVFRTgwMjE1NF9NUkYyNEo0MCBpcyBub3Qgc2V0CiMgQ09O RklHX0lFRUU4MDIxNTRfQ0MyNTIwIGlzIG5vdCBzZXQKIyBDT05GSUdfSUVFRTgwMjE1NF9BVFVT QiBpcyBub3Qgc2V0CiMgQ09ORklHX0lFRUU4MDIxNTRfQURGNzI0MiBpcyBub3Qgc2V0CiMgQ09O RklHX0lFRUU4MDIxNTRfQ0E4MjEwIGlzIG5vdCBzZXQKIyBDT05GSUdfSUVFRTgwMjE1NF9NQ1Iy MEEgaXMgbm90IHNldAojIENPTkZJR19JRUVFODAyMTU0X0hXU0lNIGlzIG5vdCBzZXQKQ09ORklH X1hFTl9ORVRERVZfRlJPTlRFTkQ9bQpDT05GSUdfVk1YTkVUMz1tCkNPTkZJR19GVUpJVFNVX0VT PW0KQ09ORklHX0hZUEVSVl9ORVQ9bQpDT05GSUdfTkVUREVWU0lNPW0KQ09ORklHX05FVF9GQUlM T1ZFUj1tCkNPTkZJR19JU0ROPXkKQ09ORklHX0lTRE5fQ0FQST15CkNPTkZJR19DQVBJX1RSQUNF PXkKQ09ORklHX0lTRE5fQ0FQSV9NSURETEVXQVJFPXkKQ09ORklHX01JU0ROPW0KQ09ORklHX01J U0ROX0RTUD1tCkNPTkZJR19NSVNETl9MMU9JUD1tCgojCiMgbUlTRE4gaGFyZHdhcmUgZHJpdmVy cwojCkNPTkZJR19NSVNETl9IRkNQQ0k9bQpDT05GSUdfTUlTRE5fSEZDTVVMVEk9bQpDT05GSUdf TUlTRE5fSEZDVVNCPW0KQ09ORklHX01JU0ROX0FWTUZSSVRaPW0KQ09ORklHX01JU0ROX1NQRUVE RkFYPW0KQ09ORklHX01JU0ROX0lORklORU9OPW0KQ09ORklHX01JU0ROX1c2NjkyPW0KQ09ORklH X01JU0ROX05FVEpFVD1tCkNPTkZJR19NSVNETl9IRExDPW0KQ09ORklHX01JU0ROX0lQQUM9bQpD T05GSUdfTUlTRE5fSVNBUj1tCkNPTkZJR19OVk09eQojIENPTkZJR19OVk1fUEJMSyBpcyBub3Qg c2V0CgojCiMgSW5wdXQgZGV2aWNlIHN1cHBvcnQKIwpDT05GSUdfSU5QVVQ9eQpDT05GSUdfSU5Q VVRfTEVEUz15CkNPTkZJR19JTlBVVF9GRl9NRU1MRVNTPXkKQ09ORklHX0lOUFVUX1BPTExERVY9 bQpDT05GSUdfSU5QVVRfU1BBUlNFS01BUD1tCiMgQ09ORklHX0lOUFVUX01BVFJJWEtNQVAgaXMg bm90IHNldAoKIwojIFVzZXJsYW5kIGludGVyZmFjZXMKIwpDT05GSUdfSU5QVVRfTU9VU0VERVY9 eQojIENPTkZJR19JTlBVVF9NT1VTRURFVl9QU0FVWCBpcyBub3Qgc2V0CkNPTkZJR19JTlBVVF9N T1VTRURFVl9TQ1JFRU5fWD0xMDI0CkNPTkZJR19JTlBVVF9NT1VTRURFVl9TQ1JFRU5fWT03NjgK Q09ORklHX0lOUFVUX0pPWURFVj1tCkNPTkZJR19JTlBVVF9FVkRFVj15CiMgQ09ORklHX0lOUFVU X0VWQlVHIGlzIG5vdCBzZXQKCiMKIyBJbnB1dCBEZXZpY2UgRHJpdmVycwojCkNPTkZJR19JTlBV VF9LRVlCT0FSRD15CiMgQ09ORklHX0tFWUJPQVJEX0FEQyBpcyBub3Qgc2V0CiMgQ09ORklHX0tF WUJPQVJEX0FEUDU1ODggaXMgbm90IHNldAojIENPTkZJR19LRVlCT0FSRF9BRFA1NTg5IGlzIG5v dCBzZXQKIyBDT05GSUdfS0VZQk9BUkRfQVBQTEVTUEkgaXMgbm90IHNldApDT05GSUdfS0VZQk9B UkRfQVRLQkQ9eQojIENPTkZJR19LRVlCT0FSRF9RVDEwNTAgaXMgbm90IHNldAojIENPTkZJR19L RVlCT0FSRF9RVDEwNzAgaXMgbm90IHNldAojIENPTkZJR19LRVlCT0FSRF9RVDIxNjAgaXMgbm90 IHNldAojIENPTkZJR19LRVlCT0FSRF9ETElOS19ESVI2ODUgaXMgbm90IHNldAojIENPTkZJR19L RVlCT0FSRF9MS0tCRCBpcyBub3Qgc2V0CiMgQ09ORklHX0tFWUJPQVJEX0dQSU8gaXMgbm90IHNl dAojIENPTkZJR19LRVlCT0FSRF9HUElPX1BPTExFRCBpcyBub3Qgc2V0CiMgQ09ORklHX0tFWUJP QVJEX1RDQTY0MTYgaXMgbm90IHNldAojIENPTkZJR19LRVlCT0FSRF9UQ0E4NDE4IGlzIG5vdCBz ZXQKIyBDT05GSUdfS0VZQk9BUkRfTUFUUklYIGlzIG5vdCBzZXQKIyBDT05GSUdfS0VZQk9BUkRf TE04MzIzIGlzIG5vdCBzZXQKIyBDT05GSUdfS0VZQk9BUkRfTE04MzMzIGlzIG5vdCBzZXQKIyBD T05GSUdfS0VZQk9BUkRfTUFYNzM1OSBpcyBub3Qgc2V0CiMgQ09ORklHX0tFWUJPQVJEX01DUyBp cyBub3Qgc2V0CiMgQ09ORklHX0tFWUJPQVJEX01QUjEyMSBpcyBub3Qgc2V0CiMgQ09ORklHX0tF WUJPQVJEX05FV1RPTiBpcyBub3Qgc2V0CiMgQ09ORklHX0tFWUJPQVJEX09QRU5DT1JFUyBpcyBu b3Qgc2V0CiMgQ09ORklHX0tFWUJPQVJEX1NBTVNVTkcgaXMgbm90IHNldAojIENPTkZJR19LRVlC T0FSRF9TVE9XQVdBWSBpcyBub3Qgc2V0CiMgQ09ORklHX0tFWUJPQVJEX1NVTktCRCBpcyBub3Qg c2V0CiMgQ09ORklHX0tFWUJPQVJEX1RNMl9UT1VDSEtFWSBpcyBub3Qgc2V0CiMgQ09ORklHX0tF WUJPQVJEX1hUS0JEIGlzIG5vdCBzZXQKQ09ORklHX0lOUFVUX01PVVNFPXkKQ09ORklHX01PVVNF X1BTMj15CkNPTkZJR19NT1VTRV9QUzJfQUxQUz15CkNPTkZJR19NT1VTRV9QUzJfQllEPXkKQ09O RklHX01PVVNFX1BTMl9MT0dJUFMyUFA9eQpDT05GSUdfTU9VU0VfUFMyX1NZTkFQVElDUz15CkNP TkZJR19NT1VTRV9QUzJfU1lOQVBUSUNTX1NNQlVTPXkKQ09ORklHX01PVVNFX1BTMl9DWVBSRVNT PXkKQ09ORklHX01PVVNFX1BTMl9MSUZFQk9PSz15CkNPTkZJR19NT1VTRV9QUzJfVFJBQ0tQT0lO VD15CkNPTkZJR19NT1VTRV9QUzJfRUxBTlRFQ0g9eQpDT05GSUdfTU9VU0VfUFMyX0VMQU5URUNI X1NNQlVTPXkKQ09ORklHX01PVVNFX1BTMl9TRU5URUxJQz15CiMgQ09ORklHX01PVVNFX1BTMl9U T1VDSEtJVCBpcyBub3Qgc2V0CkNPTkZJR19NT1VTRV9QUzJfRk9DQUxURUNIPXkKQ09ORklHX01P VVNFX1BTMl9WTU1PVVNFPXkKQ09ORklHX01PVVNFX1BTMl9TTUJVUz15CkNPTkZJR19NT1VTRV9T RVJJQUw9bQpDT05GSUdfTU9VU0VfQVBQTEVUT1VDSD1tCkNPTkZJR19NT1VTRV9CQ001OTc0PW0K Q09ORklHX01PVVNFX0NZQVBBPW0KIyBDT05GSUdfTU9VU0VfRUxBTl9JMkMgaXMgbm90IHNldApD T05GSUdfTU9VU0VfVlNYWFhBQT1tCiMgQ09ORklHX01PVVNFX0dQSU8gaXMgbm90IHNldApDT05G SUdfTU9VU0VfU1lOQVBUSUNTX0kyQz1tCkNPTkZJR19NT1VTRV9TWU5BUFRJQ1NfVVNCPW0KIyBD T05GSUdfSU5QVVRfSk9ZU1RJQ0sgaXMgbm90IHNldApDT05GSUdfSU5QVVRfVEFCTEVUPXkKQ09O RklHX1RBQkxFVF9VU0JfQUNFQ0FEPW0KQ09ORklHX1RBQkxFVF9VU0JfQUlQVEVLPW0KQ09ORklH X1RBQkxFVF9VU0JfR1RDTz1tCiMgQ09ORklHX1RBQkxFVF9VU0JfSEFOV0FORyBpcyBub3Qgc2V0 CkNPTkZJR19UQUJMRVRfVVNCX0tCVEFCPW0KIyBDT05GSUdfVEFCTEVUX1VTQl9QRUdBU1VTIGlz IG5vdCBzZXQKIyBDT05GSUdfVEFCTEVUX1NFUklBTF9XQUNPTTQgaXMgbm90IHNldApDT05GSUdf SU5QVVRfVE9VQ0hTQ1JFRU49eQpDT05GSUdfVE9VQ0hTQ1JFRU5fUFJPUEVSVElFUz15CiMgQ09O RklHX1RPVUNIU0NSRUVOX0FEUzc4NDYgaXMgbm90IHNldAojIENPTkZJR19UT1VDSFNDUkVFTl9B RDc4NzcgaXMgbm90IHNldAojIENPTkZJR19UT1VDSFNDUkVFTl9BRDc4NzkgaXMgbm90IHNldAoj IENPTkZJR19UT1VDSFNDUkVFTl9BREMgaXMgbm90IHNldAojIENPTkZJR19UT1VDSFNDUkVFTl9B VE1FTF9NWFQgaXMgbm90IHNldAojIENPTkZJR19UT1VDSFNDUkVFTl9BVU9fUElYQ0lSIGlzIG5v dCBzZXQKIyBDT05GSUdfVE9VQ0hTQ1JFRU5fQlUyMTAxMyBpcyBub3Qgc2V0CiMgQ09ORklHX1RP VUNIU0NSRUVOX0JVMjEwMjkgaXMgbm90IHNldAojIENPTkZJR19UT1VDSFNDUkVFTl9DSElQT05F X0lDTjg1MDUgaXMgbm90IHNldAojIENPTkZJR19UT1VDSFNDUkVFTl9DWThDVE1HMTEwIGlzIG5v dCBzZXQKIyBDT05GSUdfVE9VQ0hTQ1JFRU5fQ1lUVFNQX0NPUkUgaXMgbm90IHNldAojIENPTkZJ R19UT1VDSFNDUkVFTl9DWVRUU1A0X0NPUkUgaXMgbm90IHNldAojIENPTkZJR19UT1VDSFNDUkVF Tl9EWU5BUFJPIGlzIG5vdCBzZXQKIyBDT05GSUdfVE9VQ0hTQ1JFRU5fSEFNUFNISVJFIGlzIG5v dCBzZXQKIyBDT05GSUdfVE9VQ0hTQ1JFRU5fRUVUSSBpcyBub3Qgc2V0CiMgQ09ORklHX1RPVUNI U0NSRUVOX0VHQUxBWF9TRVJJQUwgaXMgbm90IHNldAojIENPTkZJR19UT1VDSFNDUkVFTl9FWEMz MDAwIGlzIG5vdCBzZXQKIyBDT05GSUdfVE9VQ0hTQ1JFRU5fRlVKSVRTVSBpcyBub3Qgc2V0CiMg Q09ORklHX1RPVUNIU0NSRUVOX0dPT0RJWCBpcyBub3Qgc2V0CiMgQ09ORklHX1RPVUNIU0NSRUVO X0hJREVFUCBpcyBub3Qgc2V0CiMgQ09ORklHX1RPVUNIU0NSRUVOX0lMSTIxMFggaXMgbm90IHNl dAojIENPTkZJR19UT1VDSFNDUkVFTl9TNlNZNzYxIGlzIG5vdCBzZXQKIyBDT05GSUdfVE9VQ0hT Q1JFRU5fR1VOWkUgaXMgbm90IHNldAojIENPTkZJR19UT1VDSFNDUkVFTl9FS1RGMjEyNyBpcyBu b3Qgc2V0CiMgQ09ORklHX1RPVUNIU0NSRUVOX0VMQU4gaXMgbm90IHNldApDT05GSUdfVE9VQ0hT Q1JFRU5fRUxPPW0KQ09ORklHX1RPVUNIU0NSRUVOX1dBQ09NX1c4MDAxPW0KQ09ORklHX1RPVUNI U0NSRUVOX1dBQ09NX0kyQz1tCiMgQ09ORklHX1RPVUNIU0NSRUVOX01BWDExODAxIGlzIG5vdCBz ZXQKIyBDT05GSUdfVE9VQ0hTQ1JFRU5fTUNTNTAwMCBpcyBub3Qgc2V0CiMgQ09ORklHX1RPVUNI U0NSRUVOX01NUzExNCBpcyBub3Qgc2V0CiMgQ09ORklHX1RPVUNIU0NSRUVOX01FTEZBU19NSVA0 IGlzIG5vdCBzZXQKIyBDT05GSUdfVE9VQ0hTQ1JFRU5fTVRPVUNIIGlzIG5vdCBzZXQKIyBDT05G SUdfVE9VQ0hTQ1JFRU5fSU5FWElPIGlzIG5vdCBzZXQKIyBDT05GSUdfVE9VQ0hTQ1JFRU5fTUs3 MTIgaXMgbm90IHNldAojIENPTkZJR19UT1VDSFNDUkVFTl9QRU5NT1VOVCBpcyBub3Qgc2V0CiMg Q09ORklHX1RPVUNIU0NSRUVOX0VEVF9GVDVYMDYgaXMgbm90IHNldAojIENPTkZJR19UT1VDSFND UkVFTl9UT1VDSFJJR0hUIGlzIG5vdCBzZXQKIyBDT05GSUdfVE9VQ0hTQ1JFRU5fVE9VQ0hXSU4g aXMgbm90IHNldAojIENPTkZJR19UT1VDSFNDUkVFTl9QSVhDSVIgaXMgbm90IHNldAojIENPTkZJ R19UT1VDSFNDUkVFTl9XRFQ4N1hYX0kyQyBpcyBub3Qgc2V0CiMgQ09ORklHX1RPVUNIU0NSRUVO X1dNOTdYWCBpcyBub3Qgc2V0CiMgQ09ORklHX1RPVUNIU0NSRUVOX1VTQl9DT01QT1NJVEUgaXMg bm90IHNldAojIENPTkZJR19UT1VDSFNDUkVFTl9UT1VDSElUMjEzIGlzIG5vdCBzZXQKIyBDT05G SUdfVE9VQ0hTQ1JFRU5fVFNDX1NFUklPIGlzIG5vdCBzZXQKIyBDT05GSUdfVE9VQ0hTQ1JFRU5f VFNDMjAwNCBpcyBub3Qgc2V0CiMgQ09ORklHX1RPVUNIU0NSRUVOX1RTQzIwMDUgaXMgbm90IHNl dAojIENPTkZJR19UT1VDSFNDUkVFTl9UU0MyMDA3IGlzIG5vdCBzZXQKIyBDT05GSUdfVE9VQ0hT Q1JFRU5fUk1fVFMgaXMgbm90IHNldAojIENPTkZJR19UT1VDSFNDUkVFTl9TSUxFQUQgaXMgbm90 IHNldAojIENPTkZJR19UT1VDSFNDUkVFTl9TSVNfSTJDIGlzIG5vdCBzZXQKIyBDT05GSUdfVE9V Q0hTQ1JFRU5fU1QxMjMyIGlzIG5vdCBzZXQKIyBDT05GSUdfVE9VQ0hTQ1JFRU5fU1RNRlRTIGlz IG5vdCBzZXQKIyBDT05GSUdfVE9VQ0hTQ1JFRU5fU1VSNDAgaXMgbm90IHNldAojIENPTkZJR19U T1VDSFNDUkVFTl9TVVJGQUNFM19TUEkgaXMgbm90IHNldAojIENPTkZJR19UT1VDSFNDUkVFTl9T WDg2NTQgaXMgbm90IHNldAojIENPTkZJR19UT1VDSFNDUkVFTl9UUFM2NTA3WCBpcyBub3Qgc2V0 CiMgQ09ORklHX1RPVUNIU0NSRUVOX1pFVDYyMjMgaXMgbm90IHNldAojIENPTkZJR19UT1VDSFND UkVFTl9aRk9SQ0UgaXMgbm90IHNldAojIENPTkZJR19UT1VDSFNDUkVFTl9ST0hNX0JVMjEwMjMg aXMgbm90IHNldAojIENPTkZJR19UT1VDSFNDUkVFTl9JUVM1WFggaXMgbm90IHNldApDT05GSUdf SU5QVVRfTUlTQz15CiMgQ09ORklHX0lOUFVUX0FENzE0WCBpcyBub3Qgc2V0CiMgQ09ORklHX0lO UFVUX0JNQTE1MCBpcyBub3Qgc2V0CiMgQ09ORklHX0lOUFVUX0UzWDBfQlVUVE9OIGlzIG5vdCBz ZXQKIyBDT05GSUdfSU5QVVRfTVNNX1ZJQlJBVE9SIGlzIG5vdCBzZXQKQ09ORklHX0lOUFVUX1BD U1BLUj1tCiMgQ09ORklHX0lOUFVUX01NQTg0NTAgaXMgbm90IHNldApDT05GSUdfSU5QVVRfQVBB TkVMPW0KQ09ORklHX0lOUFVUX0dQMkE9bQojIENPTkZJR19JTlBVVF9HUElPX0JFRVBFUiBpcyBu b3Qgc2V0CiMgQ09ORklHX0lOUFVUX0dQSU9fREVDT0RFUiBpcyBub3Qgc2V0CiMgQ09ORklHX0lO UFVUX0dQSU9fVklCUkEgaXMgbm90IHNldApDT05GSUdfSU5QVVRfQVRMQVNfQlROUz1tCkNPTkZJ R19JTlBVVF9BVElfUkVNT1RFMj1tCkNPTkZJR19JTlBVVF9LRVlTUEFOX1JFTU9URT1tCiMgQ09O RklHX0lOUFVUX0tYVEo5IGlzIG5vdCBzZXQKQ09ORklHX0lOUFVUX1BPV0VSTUFURT1tCkNPTkZJ R19JTlBVVF9ZRUFMSU5LPW0KQ09ORklHX0lOUFVUX0NNMTA5PW0KQ09ORklHX0lOUFVUX1VJTlBV VD1tCiMgQ09ORklHX0lOUFVUX1BDRjg1NzQgaXMgbm90IHNldAojIENPTkZJR19JTlBVVF9QV01f QkVFUEVSIGlzIG5vdCBzZXQKIyBDT05GSUdfSU5QVVRfUFdNX1ZJQlJBIGlzIG5vdCBzZXQKQ09O RklHX0lOUFVUX0dQSU9fUk9UQVJZX0VOQ09ERVI9bQojIENPTkZJR19JTlBVVF9BRFhMMzRYIGlz IG5vdCBzZXQKIyBDT05GSUdfSU5QVVRfSU1TX1BDVSBpcyBub3Qgc2V0CiMgQ09ORklHX0lOUFVU X0NNQTMwMDAgaXMgbm90IHNldApDT05GSUdfSU5QVVRfWEVOX0tCRERFVl9GUk9OVEVORD1tCiMg Q09ORklHX0lOUFVUX0lERUFQQURfU0xJREVCQVIgaXMgbm90IHNldAojIENPTkZJR19JTlBVVF9E UlYyNjBYX0hBUFRJQ1MgaXMgbm90IHNldAojIENPTkZJR19JTlBVVF9EUlYyNjY1X0hBUFRJQ1Mg aXMgbm90IHNldAojIENPTkZJR19JTlBVVF9EUlYyNjY3X0hBUFRJQ1MgaXMgbm90IHNldApDT05G SUdfUk1JNF9DT1JFPW0KIyBDT05GSUdfUk1JNF9JMkMgaXMgbm90IHNldAojIENPTkZJR19STUk0 X1NQSSBpcyBub3Qgc2V0CkNPTkZJR19STUk0X1NNQj1tCkNPTkZJR19STUk0X0YwMz15CkNPTkZJ R19STUk0X0YwM19TRVJJTz1tCkNPTkZJR19STUk0XzJEX1NFTlNPUj15CkNPTkZJR19STUk0X0Yx MT15CkNPTkZJR19STUk0X0YxMj15CkNPTkZJR19STUk0X0YzMD15CiMgQ09ORklHX1JNSTRfRjM0 IGlzIG5vdCBzZXQKIyBDT05GSUdfUk1JNF9GNTQgaXMgbm90IHNldAojIENPTkZJR19STUk0X0Y1 NSBpcyBub3Qgc2V0CgojCiMgSGFyZHdhcmUgSS9PIHBvcnRzCiMKQ09ORklHX1NFUklPPXkKQ09O RklHX0FSQ0hfTUlHSFRfSEFWRV9QQ19TRVJJTz15CkNPTkZJR19TRVJJT19JODA0Mj15CkNPTkZJ R19TRVJJT19TRVJQT1JUPXkKIyBDT05GSUdfU0VSSU9fQ1Q4MkM3MTAgaXMgbm90IHNldAojIENP TkZJR19TRVJJT19QQVJLQkQgaXMgbm90IHNldAojIENPTkZJR19TRVJJT19QQ0lQUzIgaXMgbm90 IHNldApDT05GSUdfU0VSSU9fTElCUFMyPXkKQ09ORklHX1NFUklPX1JBVz1tCkNPTkZJR19TRVJJ T19BTFRFUkFfUFMyPW0KIyBDT05GSUdfU0VSSU9fUFMyTVVMVCBpcyBub3Qgc2V0CkNPTkZJR19T RVJJT19BUkNfUFMyPW0KQ09ORklHX0hZUEVSVl9LRVlCT0FSRD1tCiMgQ09ORklHX1NFUklPX0dQ SU9fUFMyIGlzIG5vdCBzZXQKIyBDT05GSUdfVVNFUklPIGlzIG5vdCBzZXQKIyBDT05GSUdfR0FN RVBPUlQgaXMgbm90IHNldAojIGVuZCBvZiBIYXJkd2FyZSBJL08gcG9ydHMKIyBlbmQgb2YgSW5w dXQgZGV2aWNlIHN1cHBvcnQKCiMKIyBDaGFyYWN0ZXIgZGV2aWNlcwojCkNPTkZJR19UVFk9eQpD T05GSUdfVlQ9eQpDT05GSUdfQ09OU09MRV9UUkFOU0xBVElPTlM9eQpDT05GSUdfVlRfQ09OU09M RT15CkNPTkZJR19WVF9DT05TT0xFX1NMRUVQPXkKQ09ORklHX0hXX0NPTlNPTEU9eQpDT05GSUdf VlRfSFdfQ09OU09MRV9CSU5ESU5HPXkKQ09ORklHX1VOSVg5OF9QVFlTPXkKIyBDT05GSUdfTEVH QUNZX1BUWVMgaXMgbm90IHNldApDT05GSUdfU0VSSUFMX05PTlNUQU5EQVJEPXkKIyBDT05GSUdf Uk9DS0VUUE9SVCBpcyBub3Qgc2V0CkNPTkZJR19DWUNMQURFUz1tCiMgQ09ORklHX0NZWl9JTlRS IGlzIG5vdCBzZXQKIyBDT05GSUdfTU9YQV9JTlRFTExJTyBpcyBub3Qgc2V0CiMgQ09ORklHX01P WEFfU01BUlRJTyBpcyBub3Qgc2V0CkNPTkZJR19TWU5DTElOSz1tCkNPTkZJR19TWU5DTElOS01Q PW0KQ09ORklHX1NZTkNMSU5LX0dUPW0KQ09ORklHX05PWk9NST1tCiMgQ09ORklHX0lTSSBpcyBu b3Qgc2V0CkNPTkZJR19OX0hETEM9bQpDT05GSUdfTl9HU009bQojIENPTkZJR19UUkFDRV9TSU5L IGlzIG5vdCBzZXQKIyBDT05GSUdfTlVMTF9UVFkgaXMgbm90IHNldApDT05GSUdfTERJU0NfQVVU T0xPQUQ9eQpDT05GSUdfREVWTUVNPXkKIyBDT05GSUdfREVWS01FTSBpcyBub3Qgc2V0CgojCiMg U2VyaWFsIGRyaXZlcnMKIwpDT05GSUdfU0VSSUFMX0VBUkxZQ09OPXkKQ09ORklHX1NFUklBTF84 MjUwPXkKIyBDT05GSUdfU0VSSUFMXzgyNTBfREVQUkVDQVRFRF9PUFRJT05TIGlzIG5vdCBzZXQK Q09ORklHX1NFUklBTF84MjUwX1BOUD15CiMgQ09ORklHX1NFUklBTF84MjUwXzE2NTUwQV9WQVJJ QU5UUyBpcyBub3Qgc2V0CiMgQ09ORklHX1NFUklBTF84MjUwX0ZJTlRFSyBpcyBub3Qgc2V0CkNP TkZJR19TRVJJQUxfODI1MF9DT05TT0xFPXkKQ09ORklHX1NFUklBTF84MjUwX0RNQT15CkNPTkZJ R19TRVJJQUxfODI1MF9QQ0k9eQpDT05GSUdfU0VSSUFMXzgyNTBfRVhBUj15CkNPTkZJR19TRVJJ QUxfODI1MF9OUl9VQVJUUz0zMgpDT05GSUdfU0VSSUFMXzgyNTBfUlVOVElNRV9VQVJUUz00CkNP TkZJR19TRVJJQUxfODI1MF9FWFRFTkRFRD15CkNPTkZJR19TRVJJQUxfODI1MF9NQU5ZX1BPUlRT PXkKQ09ORklHX1NFUklBTF84MjUwX1NIQVJFX0lSUT15CiMgQ09ORklHX1NFUklBTF84MjUwX0RF VEVDVF9JUlEgaXMgbm90IHNldApDT05GSUdfU0VSSUFMXzgyNTBfUlNBPXkKQ09ORklHX1NFUklB TF84MjUwX0RXTElCPXkKQ09ORklHX1NFUklBTF84MjUwX0RXPXkKIyBDT05GSUdfU0VSSUFMXzgy NTBfUlQyODhYIGlzIG5vdCBzZXQKQ09ORklHX1NFUklBTF84MjUwX0xQU1M9eQpDT05GSUdfU0VS SUFMXzgyNTBfTUlEPXkKCiMKIyBOb24tODI1MCBzZXJpYWwgcG9ydCBzdXBwb3J0CiMKIyBDT05G SUdfU0VSSUFMX01BWDMxMDAgaXMgbm90IHNldAojIENPTkZJR19TRVJJQUxfTUFYMzEwWCBpcyBu b3Qgc2V0CiMgQ09ORklHX1NFUklBTF9VQVJUTElURSBpcyBub3Qgc2V0CkNPTkZJR19TRVJJQUxf Q09SRT15CkNPTkZJR19TRVJJQUxfQ09SRV9DT05TT0xFPXkKQ09ORklHX1NFUklBTF9KU009bQoj IENPTkZJR19TRVJJQUxfU0NDTlhQIGlzIG5vdCBzZXQKIyBDT05GSUdfU0VSSUFMX1NDMTZJUzdY WCBpcyBub3Qgc2V0CiMgQ09ORklHX1NFUklBTF9BTFRFUkFfSlRBR1VBUlQgaXMgbm90IHNldAoj IENPTkZJR19TRVJJQUxfQUxURVJBX1VBUlQgaXMgbm90IHNldAojIENPTkZJR19TRVJJQUxfSUZY Nlg2MCBpcyBub3Qgc2V0CkNPTkZJR19TRVJJQUxfQVJDPW0KQ09ORklHX1NFUklBTF9BUkNfTlJf UE9SVFM9MQojIENPTkZJR19TRVJJQUxfUlAyIGlzIG5vdCBzZXQKIyBDT05GSUdfU0VSSUFMX0ZT TF9MUFVBUlQgaXMgbm90IHNldAojIENPTkZJR19TRVJJQUxfRlNMX0xJTkZMRVhVQVJUIGlzIG5v dCBzZXQKIyBlbmQgb2YgU2VyaWFsIGRyaXZlcnMKCkNPTkZJR19TRVJJQUxfTUNUUkxfR1BJTz15 CiMgQ09ORklHX1NFUklBTF9ERVZfQlVTIGlzIG5vdCBzZXQKIyBDT05GSUdfVFRZX1BSSU5USyBp cyBub3Qgc2V0CkNPTkZJR19QUklOVEVSPW0KIyBDT05GSUdfTFBfQ09OU09MRSBpcyBub3Qgc2V0 CkNPTkZJR19QUERFVj1tCkNPTkZJR19IVkNfRFJJVkVSPXkKQ09ORklHX0hWQ19JUlE9eQpDT05G SUdfSFZDX1hFTj15CkNPTkZJR19IVkNfWEVOX0ZST05URU5EPXkKQ09ORklHX1ZJUlRJT19DT05T T0xFPXkKQ09ORklHX0lQTUlfSEFORExFUj1tCkNPTkZJR19JUE1JX0RNSV9ERUNPREU9eQpDT05G SUdfSVBNSV9QTEFUX0RBVEE9eQojIENPTkZJR19JUE1JX1BBTklDX0VWRU5UIGlzIG5vdCBzZXQK Q09ORklHX0lQTUlfREVWSUNFX0lOVEVSRkFDRT1tCkNPTkZJR19JUE1JX1NJPW0KQ09ORklHX0lQ TUlfU1NJRj1tCkNPTkZJR19JUE1JX1dBVENIRE9HPW0KQ09ORklHX0lQTUlfUE9XRVJPRkY9bQpD T05GSUdfSFdfUkFORE9NPXkKQ09ORklHX0hXX1JBTkRPTV9USU1FUklPTUVNPW0KQ09ORklHX0hX X1JBTkRPTV9JTlRFTD1tCkNPTkZJR19IV19SQU5ET01fQU1EPW0KQ09ORklHX0hXX1JBTkRPTV9W SUE9bQpDT05GSUdfSFdfUkFORE9NX1ZJUlRJTz15CkNPTkZJR19OVlJBTT15CiMgQ09ORklHX0FQ UExJQ09NIGlzIG5vdCBzZXQKIyBDT05GSUdfTVdBVkUgaXMgbm90IHNldApDT05GSUdfUkFXX0RS SVZFUj15CkNPTkZJR19NQVhfUkFXX0RFVlM9ODE5MgpDT05GSUdfSFBFVD15CkNPTkZJR19IUEVU X01NQVA9eQojIENPTkZJR19IUEVUX01NQVBfREVGQVVMVCBpcyBub3Qgc2V0CkNPTkZJR19IQU5H Q0hFQ0tfVElNRVI9bQpDT05GSUdfVVZfTU1USU1FUj1tCkNPTkZJR19UQ0dfVFBNPXkKQ09ORklH X0hXX1JBTkRPTV9UUE09eQpDT05GSUdfVENHX1RJU19DT1JFPXkKQ09ORklHX1RDR19USVM9eQoj IENPTkZJR19UQ0dfVElTX1NQSSBpcyBub3Qgc2V0CkNPTkZJR19UQ0dfVElTX0kyQ19BVE1FTD1t CkNPTkZJR19UQ0dfVElTX0kyQ19JTkZJTkVPTj1tCkNPTkZJR19UQ0dfVElTX0kyQ19OVVZPVE9O PW0KQ09ORklHX1RDR19OU0M9bQpDT05GSUdfVENHX0FUTUVMPW0KQ09ORklHX1RDR19JTkZJTkVP Tj1tCiMgQ09ORklHX1RDR19YRU4gaXMgbm90IHNldApDT05GSUdfVENHX0NSQj15CiMgQ09ORklH X1RDR19WVFBNX1BST1hZIGlzIG5vdCBzZXQKQ09ORklHX1RDR19USVNfU1QzM1pQMjQ9bQpDT05G SUdfVENHX1RJU19TVDMzWlAyNF9JMkM9bQojIENPTkZJR19UQ0dfVElTX1NUMzNaUDI0X1NQSSBp cyBub3Qgc2V0CkNPTkZJR19URUxDTE9DSz1tCkNPTkZJR19ERVZQT1JUPXkKIyBDT05GSUdfWElM TFlCVVMgaXMgbm90IHNldAojIGVuZCBvZiBDaGFyYWN0ZXIgZGV2aWNlcwoKIyBDT05GSUdfUkFO RE9NX1RSVVNUX0NQVSBpcyBub3Qgc2V0CiMgQ09ORklHX1JBTkRPTV9UUlVTVF9CT09UTE9BREVS IGlzIG5vdCBzZXQKCiMKIyBJMkMgc3VwcG9ydAojCkNPTkZJR19JMkM9eQpDT05GSUdfQUNQSV9J MkNfT1BSRUdJT049eQpDT05GSUdfSTJDX0JPQVJESU5GTz15CkNPTkZJR19JMkNfQ09NUEFUPXkK Q09ORklHX0kyQ19DSEFSREVWPW0KQ09ORklHX0kyQ19NVVg9bQoKIwojIE11bHRpcGxleGVyIEky QyBDaGlwIHN1cHBvcnQKIwojIENPTkZJR19JMkNfTVVYX0dQSU8gaXMgbm90IHNldAojIENPTkZJ R19JMkNfTVVYX0xUQzQzMDYgaXMgbm90IHNldAojIENPTkZJR19JMkNfTVVYX1BDQTk1NDEgaXMg bm90IHNldAojIENPTkZJR19JMkNfTVVYX1BDQTk1NHggaXMgbm90IHNldAojIENPTkZJR19JMkNf TVVYX1JFRyBpcyBub3Qgc2V0CiMgQ09ORklHX0kyQ19NVVhfTUxYQ1BMRCBpcyBub3Qgc2V0CiMg ZW5kIG9mIE11bHRpcGxleGVyIEkyQyBDaGlwIHN1cHBvcnQKCkNPTkZJR19JMkNfSEVMUEVSX0FV VE89eQpDT05GSUdfSTJDX1NNQlVTPW0KQ09ORklHX0kyQ19BTEdPQklUPXkKQ09ORklHX0kyQ19B TEdPUENBPW0KCiMKIyBJMkMgSGFyZHdhcmUgQnVzIHN1cHBvcnQKIwoKIwojIFBDIFNNQnVzIGhv c3QgY29udHJvbGxlciBkcml2ZXJzCiMKIyBDT05GSUdfSTJDX0FMSTE1MzUgaXMgbm90IHNldAoj IENPTkZJR19JMkNfQUxJMTU2MyBpcyBub3Qgc2V0CiMgQ09ORklHX0kyQ19BTEkxNVgzIGlzIG5v dCBzZXQKQ09ORklHX0kyQ19BTUQ3NTY9bQpDT05GSUdfSTJDX0FNRDc1Nl9TNDg4Mj1tCkNPTkZJ R19JMkNfQU1EODExMT1tCiMgQ09ORklHX0kyQ19BTURfTVAyIGlzIG5vdCBzZXQKQ09ORklHX0ky Q19JODAxPW0KQ09ORklHX0kyQ19JU0NIPW0KQ09ORklHX0kyQ19JU01UPW0KQ09ORklHX0kyQ19Q SUlYND1tCkNPTkZJR19JMkNfTkZPUkNFMj1tCkNPTkZJR19JMkNfTkZPUkNFMl9TNDk4NT1tCiMg Q09ORklHX0kyQ19OVklESUFfR1BVIGlzIG5vdCBzZXQKIyBDT05GSUdfSTJDX1NJUzU1OTUgaXMg bm90IHNldAojIENPTkZJR19JMkNfU0lTNjMwIGlzIG5vdCBzZXQKQ09ORklHX0kyQ19TSVM5Nlg9 bQpDT05GSUdfSTJDX1ZJQT1tCkNPTkZJR19JMkNfVklBUFJPPW0KCiMKIyBBQ1BJIGRyaXZlcnMK IwpDT05GSUdfSTJDX1NDTUk9bQoKIwojIEkyQyBzeXN0ZW0gYnVzIGRyaXZlcnMgKG1vc3RseSBl bWJlZGRlZCAvIHN5c3RlbS1vbi1jaGlwKQojCiMgQ09ORklHX0kyQ19DQlVTX0dQSU8gaXMgbm90 IHNldApDT05GSUdfSTJDX0RFU0lHTldBUkVfQ09SRT1tCkNPTkZJR19JMkNfREVTSUdOV0FSRV9Q TEFURk9STT1tCiMgQ09ORklHX0kyQ19ERVNJR05XQVJFX1NMQVZFIGlzIG5vdCBzZXQKIyBDT05G SUdfSTJDX0RFU0lHTldBUkVfUENJIGlzIG5vdCBzZXQKIyBDT05GSUdfSTJDX0RFU0lHTldBUkVf QkFZVFJBSUwgaXMgbm90IHNldAojIENPTkZJR19JMkNfRU1FVjIgaXMgbm90IHNldAojIENPTkZJ R19JMkNfR1BJTyBpcyBub3Qgc2V0CiMgQ09ORklHX0kyQ19PQ09SRVMgaXMgbm90IHNldApDT05G SUdfSTJDX1BDQV9QTEFURk9STT1tCkNPTkZJR19JMkNfU0lNVEVDPW0KIyBDT05GSUdfSTJDX1hJ TElOWCBpcyBub3Qgc2V0CgojCiMgRXh0ZXJuYWwgSTJDL1NNQnVzIGFkYXB0ZXIgZHJpdmVycwoj CkNPTkZJR19JMkNfRElPTEFOX1UyQz1tCkNPTkZJR19JMkNfUEFSUE9SVD1tCiMgQ09ORklHX0ky Q19ST0JPVEZVWlpfT1NJRiBpcyBub3Qgc2V0CiMgQ09ORklHX0kyQ19UQU9TX0VWTSBpcyBub3Qg c2V0CkNPTkZJR19JMkNfVElOWV9VU0I9bQpDT05GSUdfSTJDX1ZJUEVSQk9BUkQ9bQoKIwojIE90 aGVyIEkyQy9TTUJ1cyBidXMgZHJpdmVycwojCiMgQ09ORklHX0kyQ19NTFhDUExEIGlzIG5vdCBz ZXQKIyBlbmQgb2YgSTJDIEhhcmR3YXJlIEJ1cyBzdXBwb3J0CgpDT05GSUdfSTJDX1NUVUI9bQoj IENPTkZJR19JMkNfU0xBVkUgaXMgbm90IHNldAojIENPTkZJR19JMkNfREVCVUdfQ09SRSBpcyBu b3Qgc2V0CiMgQ09ORklHX0kyQ19ERUJVR19BTEdPIGlzIG5vdCBzZXQKIyBDT05GSUdfSTJDX0RF QlVHX0JVUyBpcyBub3Qgc2V0CiMgZW5kIG9mIEkyQyBzdXBwb3J0CgojIENPTkZJR19JM0MgaXMg bm90IHNldApDT05GSUdfU1BJPXkKIyBDT05GSUdfU1BJX0RFQlVHIGlzIG5vdCBzZXQKQ09ORklH X1NQSV9NQVNURVI9eQojIENPTkZJR19TUElfTUVNIGlzIG5vdCBzZXQKCiMKIyBTUEkgTWFzdGVy IENvbnRyb2xsZXIgRHJpdmVycwojCiMgQ09ORklHX1NQSV9BTFRFUkEgaXMgbm90IHNldAojIENP TkZJR19TUElfQVhJX1NQSV9FTkdJTkUgaXMgbm90IHNldAojIENPTkZJR19TUElfQklUQkFORyBp cyBub3Qgc2V0CiMgQ09ORklHX1NQSV9CVVRURVJGTFkgaXMgbm90IHNldAojIENPTkZJR19TUElf Q0FERU5DRSBpcyBub3Qgc2V0CiMgQ09ORklHX1NQSV9ERVNJR05XQVJFIGlzIG5vdCBzZXQKIyBD T05GSUdfU1BJX05YUF9GTEVYU1BJIGlzIG5vdCBzZXQKIyBDT05GSUdfU1BJX0dQSU8gaXMgbm90 IHNldAojIENPTkZJR19TUElfTE03MF9MTFAgaXMgbm90IHNldAojIENPTkZJR19TUElfT0NfVElO WSBpcyBub3Qgc2V0CkNPTkZJR19TUElfUFhBMlhYPW0KQ09ORklHX1NQSV9QWEEyWFhfUENJPW0K IyBDT05GSUdfU1BJX1JPQ0tDSElQIGlzIG5vdCBzZXQKIyBDT05GSUdfU1BJX1NDMThJUzYwMiBp cyBub3Qgc2V0CiMgQ09ORklHX1NQSV9TSUZJVkUgaXMgbm90IHNldAojIENPTkZJR19TUElfTVhJ QyBpcyBub3Qgc2V0CiMgQ09ORklHX1NQSV9YQ09NTSBpcyBub3Qgc2V0CiMgQ09ORklHX1NQSV9Y SUxJTlggaXMgbm90IHNldAojIENPTkZJR19TUElfWllOUU1QX0dRU1BJIGlzIG5vdCBzZXQKCiMK IyBTUEkgUHJvdG9jb2wgTWFzdGVycwojCiMgQ09ORklHX1NQSV9TUElERVYgaXMgbm90IHNldAoj IENPTkZJR19TUElfTE9PUEJBQ0tfVEVTVCBpcyBub3Qgc2V0CiMgQ09ORklHX1NQSV9UTEU2Mlgw IGlzIG5vdCBzZXQKIyBDT05GSUdfU1BJX1NMQVZFIGlzIG5vdCBzZXQKIyBDT05GSUdfU1BNSSBp cyBub3Qgc2V0CiMgQ09ORklHX0hTSSBpcyBub3Qgc2V0CkNPTkZJR19QUFM9eQojIENPTkZJR19Q UFNfREVCVUcgaXMgbm90IHNldAoKIwojIFBQUyBjbGllbnRzIHN1cHBvcnQKIwojIENPTkZJR19Q UFNfQ0xJRU5UX0tUSU1FUiBpcyBub3Qgc2V0CkNPTkZJR19QUFNfQ0xJRU5UX0xESVNDPW0KQ09O RklHX1BQU19DTElFTlRfUEFSUE9SVD1tCkNPTkZJR19QUFNfQ0xJRU5UX0dQSU89bQoKIwojIFBQ UyBnZW5lcmF0b3JzIHN1cHBvcnQKIwoKIwojIFBUUCBjbG9jayBzdXBwb3J0CiMKQ09ORklHX1BU UF8xNTg4X0NMT0NLPXkKQ09ORklHX0RQODM2NDBfUEhZPW0KIyBDT05GSUdfUFRQXzE1ODhfQ0xP Q0tfSU5FUyBpcyBub3Qgc2V0CkNPTkZJR19QVFBfMTU4OF9DTE9DS19LVk09bQojIENPTkZJR19Q VFBfMTU4OF9DTE9DS19JRFRDTSBpcyBub3Qgc2V0CiMgZW5kIG9mIFBUUCBjbG9jayBzdXBwb3J0 CgpDT05GSUdfUElOQ1RSTD15CkNPTkZJR19QSU5NVVg9eQpDT05GSUdfUElOQ09ORj15CkNPTkZJ R19HRU5FUklDX1BJTkNPTkY9eQojIENPTkZJR19ERUJVR19QSU5DVFJMIGlzIG5vdCBzZXQKQ09O RklHX1BJTkNUUkxfQU1EPW0KIyBDT05GSUdfUElOQ1RSTF9NQ1AyM1MwOCBpcyBub3Qgc2V0CiMg Q09ORklHX1BJTkNUUkxfU1gxNTBYIGlzIG5vdCBzZXQKQ09ORklHX1BJTkNUUkxfQkFZVFJBSUw9 eQojIENPTkZJR19QSU5DVFJMX0NIRVJSWVZJRVcgaXMgbm90IHNldAojIENPTkZJR19QSU5DVFJM X0xZTlhQT0lOVCBpcyBub3Qgc2V0CkNPTkZJR19QSU5DVFJMX0lOVEVMPW0KIyBDT05GSUdfUElO Q1RSTF9CUk9YVE9OIGlzIG5vdCBzZXQKQ09ORklHX1BJTkNUUkxfQ0FOTk9OTEFLRT1tCiMgQ09O RklHX1BJTkNUUkxfQ0VEQVJGT1JLIGlzIG5vdCBzZXQKQ09ORklHX1BJTkNUUkxfREVOVkVSVE9O PW0KQ09ORklHX1BJTkNUUkxfR0VNSU5JTEFLRT1tCiMgQ09ORklHX1BJTkNUUkxfSUNFTEFLRSBp cyBub3Qgc2V0CkNPTkZJR19QSU5DVFJMX0xFV0lTQlVSRz1tCkNPTkZJR19QSU5DVFJMX1NVTlJJ U0VQT0lOVD1tCiMgQ09ORklHX1BJTkNUUkxfVElHRVJMQUtFIGlzIG5vdCBzZXQKQ09ORklHX0dQ SU9MSUI9eQpDT05GSUdfR1BJT0xJQl9GQVNUUEFUSF9MSU1JVD01MTIKQ09ORklHX0dQSU9fQUNQ ST15CkNPTkZJR19HUElPTElCX0lSUUNISVA9eQojIENPTkZJR19ERUJVR19HUElPIGlzIG5vdCBz ZXQKQ09ORklHX0dQSU9fU1lTRlM9eQpDT05GSUdfR1BJT19HRU5FUklDPW0KCiMKIyBNZW1vcnkg bWFwcGVkIEdQSU8gZHJpdmVycwojCkNPTkZJR19HUElPX0FNRFBUPW0KIyBDT05GSUdfR1BJT19E V0FQQiBpcyBub3Qgc2V0CiMgQ09ORklHX0dQSU9fRVhBUiBpcyBub3Qgc2V0CiMgQ09ORklHX0dQ SU9fR0VORVJJQ19QTEFURk9STSBpcyBub3Qgc2V0CkNPTkZJR19HUElPX0lDSD1tCiMgQ09ORklH X0dQSU9fTUI4NlM3WCBpcyBub3Qgc2V0CiMgQ09ORklHX0dQSU9fVlg4NTUgaXMgbm90IHNldAoj IENPTkZJR19HUElPX1hJTElOWCBpcyBub3Qgc2V0CiMgQ09ORklHX0dQSU9fQU1EX0ZDSCBpcyBu b3Qgc2V0CiMgZW5kIG9mIE1lbW9yeSBtYXBwZWQgR1BJTyBkcml2ZXJzCgojCiMgUG9ydC1tYXBw ZWQgSS9PIEdQSU8gZHJpdmVycwojCiMgQ09ORklHX0dQSU9fRjcxODhYIGlzIG5vdCBzZXQKIyBD T05GSUdfR1BJT19JVDg3IGlzIG5vdCBzZXQKIyBDT05GSUdfR1BJT19TQ0ggaXMgbm90IHNldAoj IENPTkZJR19HUElPX1NDSDMxMVggaXMgbm90IHNldAojIENPTkZJR19HUElPX1dJTkJPTkQgaXMg bm90IHNldAojIENPTkZJR19HUElPX1dTMTZDNDggaXMgbm90IHNldAojIGVuZCBvZiBQb3J0LW1h cHBlZCBJL08gR1BJTyBkcml2ZXJzCgojCiMgSTJDIEdQSU8gZXhwYW5kZXJzCiMKIyBDT05GSUdf R1BJT19BRFA1NTg4IGlzIG5vdCBzZXQKIyBDT05GSUdfR1BJT19NQVg3MzAwIGlzIG5vdCBzZXQK IyBDT05GSUdfR1BJT19NQVg3MzJYIGlzIG5vdCBzZXQKIyBDT05GSUdfR1BJT19QQ0E5NTNYIGlz IG5vdCBzZXQKIyBDT05GSUdfR1BJT19QQ0Y4NTdYIGlzIG5vdCBzZXQKIyBDT05GSUdfR1BJT19U UElDMjgxMCBpcyBub3Qgc2V0CiMgZW5kIG9mIEkyQyBHUElPIGV4cGFuZGVycwoKIwojIE1GRCBH UElPIGV4cGFuZGVycwojCiMgZW5kIG9mIE1GRCBHUElPIGV4cGFuZGVycwoKIwojIFBDSSBHUElP IGV4cGFuZGVycwojCiMgQ09ORklHX0dQSU9fQU1EODExMSBpcyBub3Qgc2V0CiMgQ09ORklHX0dQ SU9fTUxfSU9IIGlzIG5vdCBzZXQKIyBDT05GSUdfR1BJT19QQ0lfSURJT18xNiBpcyBub3Qgc2V0 CiMgQ09ORklHX0dQSU9fUENJRV9JRElPXzI0IGlzIG5vdCBzZXQKIyBDT05GSUdfR1BJT19SREMz MjFYIGlzIG5vdCBzZXQKIyBlbmQgb2YgUENJIEdQSU8gZXhwYW5kZXJzCgojCiMgU1BJIEdQSU8g ZXhwYW5kZXJzCiMKIyBDT05GSUdfR1BJT19NQVgzMTkxWCBpcyBub3Qgc2V0CiMgQ09ORklHX0dQ SU9fTUFYNzMwMSBpcyBub3Qgc2V0CiMgQ09ORklHX0dQSU9fTUMzMzg4MCBpcyBub3Qgc2V0CiMg Q09ORklHX0dQSU9fUElTT1NSIGlzIG5vdCBzZXQKIyBDT05GSUdfR1BJT19YUkExNDAzIGlzIG5v dCBzZXQKIyBlbmQgb2YgU1BJIEdQSU8gZXhwYW5kZXJzCgojCiMgVVNCIEdQSU8gZXhwYW5kZXJz CiMKQ09ORklHX0dQSU9fVklQRVJCT0FSRD1tCiMgZW5kIG9mIFVTQiBHUElPIGV4cGFuZGVycwoK Q09ORklHX0dQSU9fTU9DS1VQPXkKIyBDT05GSUdfVzEgaXMgbm90IHNldAojIENPTkZJR19QT1dF Ul9BVlMgaXMgbm90IHNldApDT05GSUdfUE9XRVJfUkVTRVQ9eQojIENPTkZJR19QT1dFUl9SRVNF VF9SRVNUQVJUIGlzIG5vdCBzZXQKQ09ORklHX1BPV0VSX1NVUFBMWT15CiMgQ09ORklHX1BPV0VS X1NVUFBMWV9ERUJVRyBpcyBub3Qgc2V0CkNPTkZJR19QT1dFUl9TVVBQTFlfSFdNT049eQojIENP TkZJR19QREFfUE9XRVIgaXMgbm90IHNldAojIENPTkZJR19HRU5FUklDX0FEQ19CQVRURVJZIGlz IG5vdCBzZXQKIyBDT05GSUdfVEVTVF9QT1dFUiBpcyBub3Qgc2V0CiMgQ09ORklHX0NIQVJHRVJf QURQNTA2MSBpcyBub3Qgc2V0CiMgQ09ORklHX0JBVFRFUllfRFMyNzgwIGlzIG5vdCBzZXQKIyBD T05GSUdfQkFUVEVSWV9EUzI3ODEgaXMgbm90IHNldAojIENPTkZJR19CQVRURVJZX0RTMjc4MiBp cyBub3Qgc2V0CiMgQ09ORklHX0JBVFRFUllfU0JTIGlzIG5vdCBzZXQKIyBDT05GSUdfQ0hBUkdF Ul9TQlMgaXMgbm90IHNldAojIENPTkZJR19NQU5BR0VSX1NCUyBpcyBub3Qgc2V0CiMgQ09ORklH X0JBVFRFUllfQlEyN1hYWCBpcyBub3Qgc2V0CiMgQ09ORklHX0JBVFRFUllfTUFYMTcwNDAgaXMg bm90IHNldAojIENPTkZJR19CQVRURVJZX01BWDE3MDQyIGlzIG5vdCBzZXQKIyBDT05GSUdfQ0hB UkdFUl9NQVg4OTAzIGlzIG5vdCBzZXQKIyBDT05GSUdfQ0hBUkdFUl9MUDg3MjcgaXMgbm90IHNl dAojIENPTkZJR19DSEFSR0VSX0dQSU8gaXMgbm90IHNldAojIENPTkZJR19DSEFSR0VSX0xUMzY1 MSBpcyBub3Qgc2V0CiMgQ09ORklHX0NIQVJHRVJfQlEyNDE1WCBpcyBub3Qgc2V0CiMgQ09ORklH X0NIQVJHRVJfQlEyNDI1NyBpcyBub3Qgc2V0CiMgQ09ORklHX0NIQVJHRVJfQlEyNDczNSBpcyBu b3Qgc2V0CiMgQ09ORklHX0NIQVJHRVJfQlEyNTg5MCBpcyBub3Qgc2V0CkNPTkZJR19DSEFSR0VS X1NNQjM0Nz1tCiMgQ09ORklHX0JBVFRFUllfR0FVR0VfTFRDMjk0MSBpcyBub3Qgc2V0CiMgQ09O RklHX0NIQVJHRVJfUlQ5NDU1IGlzIG5vdCBzZXQKQ09ORklHX0hXTU9OPXkKQ09ORklHX0hXTU9O X1ZJRD1tCiMgQ09ORklHX0hXTU9OX0RFQlVHX0NISVAgaXMgbm90IHNldAoKIwojIE5hdGl2ZSBk cml2ZXJzCiMKQ09ORklHX1NFTlNPUlNfQUJJVFVHVVJVPW0KQ09ORklHX1NFTlNPUlNfQUJJVFVH VVJVMz1tCiMgQ09ORklHX1NFTlNPUlNfQUQ3MzE0IGlzIG5vdCBzZXQKQ09ORklHX1NFTlNPUlNf QUQ3NDE0PW0KQ09ORklHX1NFTlNPUlNfQUQ3NDE4PW0KQ09ORklHX1NFTlNPUlNfQURNMTAyMT1t CkNPTkZJR19TRU5TT1JTX0FETTEwMjU9bQpDT05GSUdfU0VOU09SU19BRE0xMDI2PW0KQ09ORklH X1NFTlNPUlNfQURNMTAyOT1tCkNPTkZJR19TRU5TT1JTX0FETTEwMzE9bQojIENPTkZJR19TRU5T T1JTX0FETTExNzcgaXMgbm90IHNldApDT05GSUdfU0VOU09SU19BRE05MjQwPW0KQ09ORklHX1NF TlNPUlNfQURUN1gxMD1tCiMgQ09ORklHX1NFTlNPUlNfQURUNzMxMCBpcyBub3Qgc2V0CkNPTkZJ R19TRU5TT1JTX0FEVDc0MTA9bQpDT05GSUdfU0VOU09SU19BRFQ3NDExPW0KQ09ORklHX1NFTlNP UlNfQURUNzQ2Mj1tCkNPTkZJR19TRU5TT1JTX0FEVDc0NzA9bQpDT05GSUdfU0VOU09SU19BRFQ3 NDc1PW0KIyBDT05GSUdfU0VOU09SU19BUzM3MCBpcyBub3Qgc2V0CkNPTkZJR19TRU5TT1JTX0FT Qzc2MjE9bQpDT05GSUdfU0VOU09SU19LOFRFTVA9bQpDT05GSUdfU0VOU09SU19LMTBURU1QPW0K Q09ORklHX1NFTlNPUlNfRkFNMTVIX1BPV0VSPW0KQ09ORklHX1NFTlNPUlNfQVBQTEVTTUM9bQpD T05GSUdfU0VOU09SU19BU0IxMDA9bQojIENPTkZJR19TRU5TT1JTX0FTUEVFRCBpcyBub3Qgc2V0 CkNPTkZJR19TRU5TT1JTX0FUWFAxPW0KIyBDT05GSUdfU0VOU09SU19EUklWRVRFTVAgaXMgbm90 IHNldApDT05GSUdfU0VOU09SU19EUzYyMD1tCkNPTkZJR19TRU5TT1JTX0RTMTYyMT1tCkNPTkZJ R19TRU5TT1JTX0RFTExfU01NPW0KQ09ORklHX1NFTlNPUlNfSTVLX0FNQj1tCkNPTkZJR19TRU5T T1JTX0Y3MTgwNUY9bQpDT05GSUdfU0VOU09SU19GNzE4ODJGRz1tCkNPTkZJR19TRU5TT1JTX0Y3 NTM3NVM9bQpDT05GSUdfU0VOU09SU19GU0NITUQ9bQojIENPTkZJR19TRU5TT1JTX0ZUU1RFVVRB VEVTIGlzIG5vdCBzZXQKQ09ORklHX1NFTlNPUlNfR0w1MThTTT1tCkNPTkZJR19TRU5TT1JTX0dM NTIwU009bQpDT05GSUdfU0VOU09SU19HNzYwQT1tCiMgQ09ORklHX1NFTlNPUlNfRzc2MiBpcyBu b3Qgc2V0CiMgQ09ORklHX1NFTlNPUlNfSElINjEzMCBpcyBub3Qgc2V0CkNPTkZJR19TRU5TT1JT X0lCTUFFTT1tCkNPTkZJR19TRU5TT1JTX0lCTVBFWD1tCiMgQ09ORklHX1NFTlNPUlNfSUlPX0hX TU9OIGlzIG5vdCBzZXQKIyBDT05GSUdfU0VOU09SU19JNTUwMCBpcyBub3Qgc2V0CkNPTkZJR19T RU5TT1JTX0NPUkVURU1QPW0KQ09ORklHX1NFTlNPUlNfSVQ4Nz1tCkNPTkZJR19TRU5TT1JTX0pD NDI9bQojIENPTkZJR19TRU5TT1JTX1BPV1IxMjIwIGlzIG5vdCBzZXQKQ09ORklHX1NFTlNPUlNf TElORUFHRT1tCiMgQ09ORklHX1NFTlNPUlNfTFRDMjk0NSBpcyBub3Qgc2V0CiMgQ09ORklHX1NF TlNPUlNfTFRDMjk0N19JMkMgaXMgbm90IHNldAojIENPTkZJR19TRU5TT1JTX0xUQzI5NDdfU1BJ IGlzIG5vdCBzZXQKIyBDT05GSUdfU0VOU09SU19MVEMyOTkwIGlzIG5vdCBzZXQKQ09ORklHX1NF TlNPUlNfTFRDNDE1MT1tCkNPTkZJR19TRU5TT1JTX0xUQzQyMTU9bQojIENPTkZJR19TRU5TT1JT X0xUQzQyMjIgaXMgbm90IHNldApDT05GSUdfU0VOU09SU19MVEM0MjQ1PW0KIyBDT05GSUdfU0VO U09SU19MVEM0MjYwIGlzIG5vdCBzZXQKQ09ORklHX1NFTlNPUlNfTFRDNDI2MT1tCiMgQ09ORklH X1NFTlNPUlNfTUFYMTExMSBpcyBub3Qgc2V0CkNPTkZJR19TRU5TT1JTX01BWDE2MDY1PW0KQ09O RklHX1NFTlNPUlNfTUFYMTYxOT1tCkNPTkZJR19TRU5TT1JTX01BWDE2Njg9bQpDT05GSUdfU0VO U09SU19NQVgxOTc9bQojIENPTkZJR19TRU5TT1JTX01BWDMxNzIyIGlzIG5vdCBzZXQKIyBDT05G SUdfU0VOU09SU19NQVgzMTczMCBpcyBub3Qgc2V0CiMgQ09ORklHX1NFTlNPUlNfTUFYNjYyMSBp cyBub3Qgc2V0CkNPTkZJR19TRU5TT1JTX01BWDY2Mzk9bQpDT05GSUdfU0VOU09SU19NQVg2NjQy PW0KQ09ORklHX1NFTlNPUlNfTUFYNjY1MD1tCkNPTkZJR19TRU5TT1JTX01BWDY2OTc9bQojIENP TkZJR19TRU5TT1JTX01BWDMxNzkwIGlzIG5vdCBzZXQKQ09ORklHX1NFTlNPUlNfTUNQMzAyMT1t CiMgQ09ORklHX1NFTlNPUlNfVEM2NTQgaXMgbm90IHNldAojIENPTkZJR19TRU5TT1JTX0FEQ1hY IGlzIG5vdCBzZXQKQ09ORklHX1NFTlNPUlNfTE02Mz1tCiMgQ09ORklHX1NFTlNPUlNfTE03MCBp cyBub3Qgc2V0CkNPTkZJR19TRU5TT1JTX0xNNzM9bQpDT05GSUdfU0VOU09SU19MTTc1PW0KQ09O RklHX1NFTlNPUlNfTE03Nz1tCkNPTkZJR19TRU5TT1JTX0xNNzg9bQpDT05GSUdfU0VOU09SU19M TTgwPW0KQ09ORklHX1NFTlNPUlNfTE04Mz1tCkNPTkZJR19TRU5TT1JTX0xNODU9bQpDT05GSUdf U0VOU09SU19MTTg3PW0KQ09ORklHX1NFTlNPUlNfTE05MD1tCkNPTkZJR19TRU5TT1JTX0xNOTI9 bQpDT05GSUdfU0VOU09SU19MTTkzPW0KQ09ORklHX1NFTlNPUlNfTE05NTIzND1tCkNPTkZJR19T RU5TT1JTX0xNOTUyNDE9bQpDT05GSUdfU0VOU09SU19MTTk1MjQ1PW0KQ09ORklHX1NFTlNPUlNf UEM4NzM2MD1tCkNPTkZJR19TRU5TT1JTX1BDODc0Mjc9bQpDT05GSUdfU0VOU09SU19OVENfVEhF Uk1JU1RPUj1tCiMgQ09ORklHX1NFTlNPUlNfTkNUNjY4MyBpcyBub3Qgc2V0CkNPTkZJR19TRU5T T1JTX05DVDY3NzU9bQojIENPTkZJR19TRU5TT1JTX05DVDc4MDIgaXMgbm90IHNldAojIENPTkZJ R19TRU5TT1JTX05DVDc5MDQgaXMgbm90IHNldAojIENPTkZJR19TRU5TT1JTX05QQ003WFggaXMg bm90IHNldApDT05GSUdfU0VOU09SU19QQ0Y4NTkxPW0KQ09ORklHX1BNQlVTPW0KQ09ORklHX1NF TlNPUlNfUE1CVVM9bQpDT05GSUdfU0VOU09SU19BRE0xMjc1PW0KIyBDT05GSUdfU0VOU09SU19C RUxfUEZFIGlzIG5vdCBzZXQKIyBDT05GSUdfU0VOU09SU19JQk1fQ0ZGUFMgaXMgbm90IHNldAoj IENPTkZJR19TRU5TT1JTX0lOU1BVUl9JUFNQUyBpcyBub3Qgc2V0CiMgQ09ORklHX1NFTlNPUlNf SVIzNTIyMSBpcyBub3Qgc2V0CiMgQ09ORklHX1NFTlNPUlNfSVIzODA2NCBpcyBub3Qgc2V0CiMg Q09ORklHX1NFTlNPUlNfSVJQUzU0MDEgaXMgbm90IHNldAojIENPTkZJR19TRU5TT1JTX0lTTDY4 MTM3IGlzIG5vdCBzZXQKQ09ORklHX1NFTlNPUlNfTE0yNTA2Nj1tCkNPTkZJR19TRU5TT1JTX0xU QzI5Nzg9bQojIENPTkZJR19TRU5TT1JTX0xUQzM4MTUgaXMgbm90IHNldApDT05GSUdfU0VOU09S U19NQVgxNjA2ND1tCiMgQ09ORklHX1NFTlNPUlNfTUFYMjA3MzAgaXMgbm90IHNldAojIENPTkZJ R19TRU5TT1JTX01BWDIwNzUxIGlzIG5vdCBzZXQKIyBDT05GSUdfU0VOU09SU19NQVgzMTc4NSBp cyBub3Qgc2V0CkNPTkZJR19TRU5TT1JTX01BWDM0NDQwPW0KQ09ORklHX1NFTlNPUlNfTUFYODY4 OD1tCiMgQ09ORklHX1NFTlNPUlNfUFhFMTYxMCBpcyBub3Qgc2V0CiMgQ09ORklHX1NFTlNPUlNf VFBTNDA0MjIgaXMgbm90IHNldAojIENPTkZJR19TRU5TT1JTX1RQUzUzNjc5IGlzIG5vdCBzZXQK Q09ORklHX1NFTlNPUlNfVUNEOTAwMD1tCkNPTkZJR19TRU5TT1JTX1VDRDkyMDA9bQojIENPTkZJ R19TRU5TT1JTX1hEUEUxMjIgaXMgbm90IHNldApDT05GSUdfU0VOU09SU19aTDYxMDA9bQpDT05G SUdfU0VOU09SU19TSFQxNT1tCkNPTkZJR19TRU5TT1JTX1NIVDIxPW0KIyBDT05GSUdfU0VOU09S U19TSFQzeCBpcyBub3Qgc2V0CiMgQ09ORklHX1NFTlNPUlNfU0hUQzEgaXMgbm90IHNldApDT05G SUdfU0VOU09SU19TSVM1NTk1PW0KQ09ORklHX1NFTlNPUlNfRE1FMTczNz1tCkNPTkZJR19TRU5T T1JTX0VNQzE0MDM9bQojIENPTkZJR19TRU5TT1JTX0VNQzIxMDMgaXMgbm90IHNldApDT05GSUdf U0VOU09SU19FTUM2VzIwMT1tCkNPTkZJR19TRU5TT1JTX1NNU0M0N00xPW0KQ09ORklHX1NFTlNP UlNfU01TQzQ3TTE5Mj1tCkNPTkZJR19TRU5TT1JTX1NNU0M0N0IzOTc9bQpDT05GSUdfU0VOU09S U19TQ0g1NlhYX0NPTU1PTj1tCkNPTkZJR19TRU5TT1JTX1NDSDU2Mjc9bQpDT05GSUdfU0VOU09S U19TQ0g1NjM2PW0KIyBDT05GSUdfU0VOU09SU19TVFRTNzUxIGlzIG5vdCBzZXQKIyBDT05GSUdf U0VOU09SU19TTU02NjUgaXMgbm90IHNldAojIENPTkZJR19TRU5TT1JTX0FEQzEyOEQ4MTggaXMg bm90IHNldApDT05GSUdfU0VOU09SU19BRFM3ODI4PW0KIyBDT05GSUdfU0VOU09SU19BRFM3ODcx IGlzIG5vdCBzZXQKQ09ORklHX1NFTlNPUlNfQU1DNjgyMT1tCkNPTkZJR19TRU5TT1JTX0lOQTIw OT1tCkNPTkZJR19TRU5TT1JTX0lOQTJYWD1tCiMgQ09ORklHX1NFTlNPUlNfSU5BMzIyMSBpcyBu b3Qgc2V0CiMgQ09ORklHX1NFTlNPUlNfVEM3NCBpcyBub3Qgc2V0CkNPTkZJR19TRU5TT1JTX1RI TUM1MD1tCkNPTkZJR19TRU5TT1JTX1RNUDEwMj1tCiMgQ09ORklHX1NFTlNPUlNfVE1QMTAzIGlz IG5vdCBzZXQKIyBDT05GSUdfU0VOU09SU19UTVAxMDggaXMgbm90IHNldApDT05GSUdfU0VOU09S U19UTVA0MDE9bQpDT05GSUdfU0VOU09SU19UTVA0MjE9bQojIENPTkZJR19TRU5TT1JTX1RNUDUx MyBpcyBub3Qgc2V0CkNPTkZJR19TRU5TT1JTX1ZJQV9DUFVURU1QPW0KQ09ORklHX1NFTlNPUlNf VklBNjg2QT1tCkNPTkZJR19TRU5TT1JTX1ZUMTIxMT1tCkNPTkZJR19TRU5TT1JTX1ZUODIzMT1t CiMgQ09ORklHX1NFTlNPUlNfVzgzNzczRyBpcyBub3Qgc2V0CkNPTkZJR19TRU5TT1JTX1c4Mzc4 MUQ9bQpDT05GSUdfU0VOU09SU19XODM3OTFEPW0KQ09ORklHX1NFTlNPUlNfVzgzNzkyRD1tCkNP TkZJR19TRU5TT1JTX1c4Mzc5Mz1tCkNPTkZJR19TRU5TT1JTX1c4Mzc5NT1tCiMgQ09ORklHX1NF TlNPUlNfVzgzNzk1X0ZBTkNUUkwgaXMgbm90IHNldApDT05GSUdfU0VOU09SU19XODNMNzg1VFM9 bQpDT05GSUdfU0VOU09SU19XODNMNzg2Tkc9bQpDT05GSUdfU0VOU09SU19XODM2MjdIRj1tCkNP TkZJR19TRU5TT1JTX1c4MzYyN0VIRj1tCiMgQ09ORklHX1NFTlNPUlNfWEdFTkUgaXMgbm90IHNl dAoKIwojIEFDUEkgZHJpdmVycwojCkNPTkZJR19TRU5TT1JTX0FDUElfUE9XRVI9bQpDT05GSUdf U0VOU09SU19BVEswMTEwPW0KQ09ORklHX1RIRVJNQUw9eQojIENPTkZJR19USEVSTUFMX1NUQVRJ U1RJQ1MgaXMgbm90IHNldApDT05GSUdfVEhFUk1BTF9FTUVSR0VOQ1lfUE9XRVJPRkZfREVMQVlf TVM9MApDT05GSUdfVEhFUk1BTF9IV01PTj15CkNPTkZJR19USEVSTUFMX1dSSVRBQkxFX1RSSVBT PXkKQ09ORklHX1RIRVJNQUxfREVGQVVMVF9HT1ZfU1RFUF9XSVNFPXkKIyBDT05GSUdfVEhFUk1B TF9ERUZBVUxUX0dPVl9GQUlSX1NIQVJFIGlzIG5vdCBzZXQKIyBDT05GSUdfVEhFUk1BTF9ERUZB VUxUX0dPVl9VU0VSX1NQQUNFIGlzIG5vdCBzZXQKQ09ORklHX1RIRVJNQUxfR09WX0ZBSVJfU0hB UkU9eQpDT05GSUdfVEhFUk1BTF9HT1ZfU1RFUF9XSVNFPXkKQ09ORklHX1RIRVJNQUxfR09WX0JB TkdfQkFORz15CkNPTkZJR19USEVSTUFMX0dPVl9VU0VSX1NQQUNFPXkKIyBDT05GSUdfQ0xPQ0tf VEhFUk1BTCBpcyBub3Qgc2V0CiMgQ09ORklHX0RFVkZSRVFfVEhFUk1BTCBpcyBub3Qgc2V0CiMg Q09ORklHX1RIRVJNQUxfRU1VTEFUSU9OIGlzIG5vdCBzZXQKCiMKIyBJbnRlbCB0aGVybWFsIGRy aXZlcnMKIwpDT05GSUdfSU5URUxfUE9XRVJDTEFNUD1tCkNPTkZJR19YODZfUEtHX1RFTVBfVEhF Uk1BTD1tCkNPTkZJR19JTlRFTF9TT0NfRFRTX0lPU0ZfQ09SRT1tCiMgQ09ORklHX0lOVEVMX1NP Q19EVFNfVEhFUk1BTCBpcyBub3Qgc2V0CgojCiMgQUNQSSBJTlQzNDBYIHRoZXJtYWwgZHJpdmVy cwojCkNPTkZJR19JTlQzNDBYX1RIRVJNQUw9bQpDT05GSUdfQUNQSV9USEVSTUFMX1JFTD1tCiMg Q09ORklHX0lOVDM0MDZfVEhFUk1BTCBpcyBub3Qgc2V0CkNPTkZJR19QUk9DX1RIRVJNQUxfTU1J T19SQVBMPXkKIyBlbmQgb2YgQUNQSSBJTlQzNDBYIHRoZXJtYWwgZHJpdmVycwoKIyBDT05GSUdf SU5URUxfUENIX1RIRVJNQUwgaXMgbm90IHNldAojIGVuZCBvZiBJbnRlbCB0aGVybWFsIGRyaXZl cnMKCiMgQ09ORklHX0dFTkVSSUNfQURDX1RIRVJNQUwgaXMgbm90IHNldApDT05GSUdfV0FUQ0hE T0c9eQpDT05GSUdfV0FUQ0hET0dfQ09SRT15CiMgQ09ORklHX1dBVENIRE9HX05PV0FZT1VUIGlz IG5vdCBzZXQKQ09ORklHX1dBVENIRE9HX0hBTkRMRV9CT09UX0VOQUJMRUQ9eQpDT05GSUdfV0FU Q0hET0dfT1BFTl9USU1FT1VUPTAKQ09ORklHX1dBVENIRE9HX1NZU0ZTPXkKCiMKIyBXYXRjaGRv ZyBQcmV0aW1lb3V0IEdvdmVybm9ycwojCiMgQ09ORklHX1dBVENIRE9HX1BSRVRJTUVPVVRfR09W IGlzIG5vdCBzZXQKCiMKIyBXYXRjaGRvZyBEZXZpY2UgRHJpdmVycwojCkNPTkZJR19TT0ZUX1dB VENIRE9HPW0KQ09ORklHX1dEQVRfV0RUPW0KIyBDT05GSUdfWElMSU5YX1dBVENIRE9HIGlzIG5v dCBzZXQKIyBDT05GSUdfWklJUkFWRV9XQVRDSERPRyBpcyBub3Qgc2V0CiMgQ09ORklHX0NBREVO Q0VfV0FUQ0hET0cgaXMgbm90IHNldAojIENPTkZJR19EV19XQVRDSERPRyBpcyBub3Qgc2V0CiMg Q09ORklHX01BWDYzWFhfV0FUQ0hET0cgaXMgbm90IHNldAojIENPTkZJR19BQ1FVSVJFX1dEVCBp cyBub3Qgc2V0CiMgQ09ORklHX0FEVkFOVEVDSF9XRFQgaXMgbm90IHNldApDT05GSUdfQUxJTTE1 MzVfV0RUPW0KQ09ORklHX0FMSU03MTAxX1dEVD1tCiMgQ09ORklHX0VCQ19DMzg0X1dEVCBpcyBu b3Qgc2V0CkNPTkZJR19GNzE4MDhFX1dEVD1tCkNPTkZJR19TUDUxMDBfVENPPW0KQ09ORklHX1NC Q19GSVRQQzJfV0FUQ0hET0c9bQojIENPTkZJR19FVVJPVEVDSF9XRFQgaXMgbm90IHNldApDT05G SUdfSUI3MDBfV0RUPW0KQ09ORklHX0lCTUFTUj1tCiMgQ09ORklHX1dBRkVSX1dEVCBpcyBub3Qg c2V0CkNPTkZJR19JNjMwMEVTQl9XRFQ9eQpDT05GSUdfSUU2WFhfV0RUPW0KQ09ORklHX0lUQ09f V0RUPXkKQ09ORklHX0lUQ09fVkVORE9SX1NVUFBPUlQ9eQpDT05GSUdfSVQ4NzEyRl9XRFQ9bQpD T05GSUdfSVQ4N19XRFQ9bQpDT05GSUdfSFBfV0FUQ0hET0c9bQpDT05GSUdfSFBXRFRfTk1JX0RF Q09ESU5HPXkKIyBDT05GSUdfU0MxMjAwX1dEVCBpcyBub3Qgc2V0CiMgQ09ORklHX1BDODc0MTNf V0RUIGlzIG5vdCBzZXQKQ09ORklHX05WX1RDTz1tCiMgQ09ORklHXzYwWFhfV0RUIGlzIG5vdCBz ZXQKIyBDT05GSUdfQ1BVNV9XRFQgaXMgbm90IHNldApDT05GSUdfU01TQ19TQ0gzMTFYX1dEVD1t CiMgQ09ORklHX1NNU0MzN0I3ODdfV0RUIGlzIG5vdCBzZXQKIyBDT05GSUdfVFFNWDg2X1dEVCBp cyBub3Qgc2V0CkNPTkZJR19WSUFfV0RUPW0KQ09ORklHX1c4MzYyN0hGX1dEVD1tCkNPTkZJR19X ODM4NzdGX1dEVD1tCkNPTkZJR19XODM5NzdGX1dEVD1tCkNPTkZJR19NQUNIWl9XRFQ9bQojIENP TkZJR19TQkNfRVBYX0MzX1dBVENIRE9HIGlzIG5vdCBzZXQKQ09ORklHX0lOVEVMX01FSV9XRFQ9 bQojIENPTkZJR19OSTkwM1hfV0RUIGlzIG5vdCBzZXQKIyBDT05GSUdfTklDNzAxOF9XRFQgaXMg bm90IHNldAojIENPTkZJR19NRU5fQTIxX1dEVCBpcyBub3Qgc2V0CkNPTkZJR19YRU5fV0RUPW0K CiMKIyBQQ0ktYmFzZWQgV2F0Y2hkb2cgQ2FyZHMKIwpDT05GSUdfUENJUENXQVRDSERPRz1tCkNP TkZJR19XRFRQQ0k9bQoKIwojIFVTQi1iYXNlZCBXYXRjaGRvZyBDYXJkcwojCkNPTkZJR19VU0JQ Q1dBVENIRE9HPW0KQ09ORklHX1NTQl9QT1NTSUJMRT15CkNPTkZJR19TU0I9bQpDT05GSUdfU1NC X1NQUk9NPXkKQ09ORklHX1NTQl9QQ0lIT1NUX1BPU1NJQkxFPXkKQ09ORklHX1NTQl9QQ0lIT1NU PXkKQ09ORklHX1NTQl9TRElPSE9TVF9QT1NTSUJMRT15CkNPTkZJR19TU0JfU0RJT0hPU1Q9eQpD T05GSUdfU1NCX0RSSVZFUl9QQ0lDT1JFX1BPU1NJQkxFPXkKQ09ORklHX1NTQl9EUklWRVJfUENJ Q09SRT15CkNPTkZJR19TU0JfRFJJVkVSX0dQSU89eQpDT05GSUdfQkNNQV9QT1NTSUJMRT15CkNP TkZJR19CQ01BPW0KQ09ORklHX0JDTUFfSE9TVF9QQ0lfUE9TU0lCTEU9eQpDT05GSUdfQkNNQV9I T1NUX1BDST15CiMgQ09ORklHX0JDTUFfSE9TVF9TT0MgaXMgbm90IHNldApDT05GSUdfQkNNQV9E UklWRVJfUENJPXkKQ09ORklHX0JDTUFfRFJJVkVSX0dNQUNfQ01OPXkKQ09ORklHX0JDTUFfRFJJ VkVSX0dQSU89eQojIENPTkZJR19CQ01BX0RFQlVHIGlzIG5vdCBzZXQKCiMKIyBNdWx0aWZ1bmN0 aW9uIGRldmljZSBkcml2ZXJzCiMKQ09ORklHX01GRF9DT1JFPXkKIyBDT05GSUdfTUZEX0FTMzcx MSBpcyBub3Qgc2V0CiMgQ09ORklHX1BNSUNfQURQNTUyMCBpcyBub3Qgc2V0CiMgQ09ORklHX01G RF9BQVQyODcwX0NPUkUgaXMgbm90IHNldAojIENPTkZJR19NRkRfQkNNNTkwWFggaXMgbm90IHNl dAojIENPTkZJR19NRkRfQkQ5NTcxTVdWIGlzIG5vdCBzZXQKIyBDT05GSUdfTUZEX0FYUDIwWF9J MkMgaXMgbm90IHNldAojIENPTkZJR19NRkRfTUFERVJBIGlzIG5vdCBzZXQKIyBDT05GSUdfUE1J Q19EQTkwM1ggaXMgbm90IHNldAojIENPTkZJR19NRkRfREE5MDUyX1NQSSBpcyBub3Qgc2V0CiMg Q09ORklHX01GRF9EQTkwNTJfSTJDIGlzIG5vdCBzZXQKIyBDT05GSUdfTUZEX0RBOTA1NSBpcyBu b3Qgc2V0CiMgQ09ORklHX01GRF9EQTkwNjIgaXMgbm90IHNldAojIENPTkZJR19NRkRfREE5MDYz IGlzIG5vdCBzZXQKIyBDT05GSUdfTUZEX0RBOTE1MCBpcyBub3Qgc2V0CiMgQ09ORklHX01GRF9E TE4yIGlzIG5vdCBzZXQKIyBDT05GSUdfTUZEX01DMTNYWFhfU1BJIGlzIG5vdCBzZXQKIyBDT05G SUdfTUZEX01DMTNYWFhfSTJDIGlzIG5vdCBzZXQKIyBDT05GSUdfSFRDX1BBU0lDMyBpcyBub3Qg c2V0CiMgQ09ORklHX0hUQ19JMkNQTEQgaXMgbm90IHNldAojIENPTkZJR19NRkRfSU5URUxfUVVB UktfSTJDX0dQSU8gaXMgbm90IHNldApDT05GSUdfTFBDX0lDSD1tCkNPTkZJR19MUENfU0NIPW0K IyBDT05GSUdfSU5URUxfU09DX1BNSUNfQ0hURENfVEkgaXMgbm90IHNldApDT05GSUdfTUZEX0lO VEVMX0xQU1M9eQpDT05GSUdfTUZEX0lOVEVMX0xQU1NfQUNQST15CkNPTkZJR19NRkRfSU5URUxf TFBTU19QQ0k9eQojIENPTkZJR19NRkRfSkFOWl9DTU9ESU8gaXMgbm90IHNldAojIENPTkZJR19N RkRfS0VNUExEIGlzIG5vdCBzZXQKIyBDT05GSUdfTUZEXzg4UE04MDAgaXMgbm90IHNldAojIENP TkZJR19NRkRfODhQTTgwNSBpcyBub3Qgc2V0CiMgQ09ORklHX01GRF84OFBNODYwWCBpcyBub3Qg c2V0CiMgQ09ORklHX01GRF9NQVgxNDU3NyBpcyBub3Qgc2V0CiMgQ09ORklHX01GRF9NQVg3NzY5 MyBpcyBub3Qgc2V0CiMgQ09ORklHX01GRF9NQVg3Nzg0MyBpcyBub3Qgc2V0CiMgQ09ORklHX01G RF9NQVg4OTA3IGlzIG5vdCBzZXQKIyBDT05GSUdfTUZEX01BWDg5MjUgaXMgbm90IHNldAojIENP TkZJR19NRkRfTUFYODk5NyBpcyBub3Qgc2V0CiMgQ09ORklHX01GRF9NQVg4OTk4IGlzIG5vdCBz ZXQKIyBDT05GSUdfTUZEX01UNjM5NyBpcyBub3Qgc2V0CiMgQ09ORklHX01GRF9NRU5GMjFCTUMg aXMgbm90IHNldAojIENPTkZJR19FWlhfUENBUCBpcyBub3Qgc2V0CkNPTkZJR19NRkRfVklQRVJC T0FSRD1tCiMgQ09ORklHX01GRF9SRVRVIGlzIG5vdCBzZXQKIyBDT05GSUdfTUZEX1BDRjUwNjMz IGlzIG5vdCBzZXQKIyBDT05GSUdfVUNCMTQwMF9DT1JFIGlzIG5vdCBzZXQKIyBDT05GSUdfTUZE X1JEQzMyMVggaXMgbm90IHNldAojIENPTkZJR19NRkRfUlQ1MDMzIGlzIG5vdCBzZXQKIyBDT05G SUdfTUZEX1JDNVQ1ODMgaXMgbm90IHNldAojIENPTkZJR19NRkRfU0VDX0NPUkUgaXMgbm90IHNl dAojIENPTkZJR19NRkRfU0k0NzZYX0NPUkUgaXMgbm90IHNldApDT05GSUdfTUZEX1NNNTAxPW0K Q09ORklHX01GRF9TTTUwMV9HUElPPXkKIyBDT05GSUdfTUZEX1NLWTgxNDUyIGlzIG5vdCBzZXQK IyBDT05GSUdfTUZEX1NNU0MgaXMgbm90IHNldAojIENPTkZJR19BQlg1MDBfQ09SRSBpcyBub3Qg c2V0CiMgQ09ORklHX01GRF9TWVNDT04gaXMgbm90IHNldAojIENPTkZJR19NRkRfVElfQU0zMzVY X1RTQ0FEQyBpcyBub3Qgc2V0CiMgQ09ORklHX01GRF9MUDM5NDMgaXMgbm90IHNldAojIENPTkZJ R19NRkRfTFA4Nzg4IGlzIG5vdCBzZXQKIyBDT05GSUdfTUZEX1RJX0xNVSBpcyBub3Qgc2V0CiMg Q09ORklHX01GRF9QQUxNQVMgaXMgbm90IHNldAojIENPTkZJR19UUFM2MTA1WCBpcyBub3Qgc2V0 CiMgQ09ORklHX1RQUzY1MDEwIGlzIG5vdCBzZXQKIyBDT05GSUdfVFBTNjUwN1ggaXMgbm90IHNl dAojIENPTkZJR19NRkRfVFBTNjUwODYgaXMgbm90IHNldAojIENPTkZJR19NRkRfVFBTNjUwOTAg aXMgbm90IHNldAojIENPTkZJR19NRkRfVElfTFA4NzNYIGlzIG5vdCBzZXQKIyBDT05GSUdfTUZE X1RQUzY1ODZYIGlzIG5vdCBzZXQKIyBDT05GSUdfTUZEX1RQUzY1OTEwIGlzIG5vdCBzZXQKIyBD T05GSUdfTUZEX1RQUzY1OTEyX0kyQyBpcyBub3Qgc2V0CiMgQ09ORklHX01GRF9UUFM2NTkxMl9T UEkgaXMgbm90IHNldAojIENPTkZJR19NRkRfVFBTODAwMzEgaXMgbm90IHNldAojIENPTkZJR19U V0w0MDMwX0NPUkUgaXMgbm90IHNldAojIENPTkZJR19UV0w2MDQwX0NPUkUgaXMgbm90IHNldAoj IENPTkZJR19NRkRfV0wxMjczX0NPUkUgaXMgbm90IHNldAojIENPTkZJR19NRkRfTE0zNTMzIGlz IG5vdCBzZXQKIyBDT05GSUdfTUZEX1RRTVg4NiBpcyBub3Qgc2V0CkNPTkZJR19NRkRfVlg4NTU9 bQojIENPTkZJR19NRkRfQVJJWk9OQV9JMkMgaXMgbm90IHNldAojIENPTkZJR19NRkRfQVJJWk9O QV9TUEkgaXMgbm90IHNldAojIENPTkZJR19NRkRfV004NDAwIGlzIG5vdCBzZXQKIyBDT05GSUdf TUZEX1dNODMxWF9JMkMgaXMgbm90IHNldAojIENPTkZJR19NRkRfV004MzFYX1NQSSBpcyBub3Qg c2V0CiMgQ09ORklHX01GRF9XTTgzNTBfSTJDIGlzIG5vdCBzZXQKIyBDT05GSUdfTUZEX1dNODk5 NCBpcyBub3Qgc2V0CiMgZW5kIG9mIE11bHRpZnVuY3Rpb24gZGV2aWNlIGRyaXZlcnMKCiMgQ09O RklHX1JFR1VMQVRPUiBpcyBub3Qgc2V0CkNPTkZJR19SQ19DT1JFPW0KQ09ORklHX1JDX01BUD1t CkNPTkZJR19MSVJDPXkKQ09ORklHX1JDX0RFQ09ERVJTPXkKQ09ORklHX0lSX05FQ19ERUNPREVS PW0KQ09ORklHX0lSX1JDNV9ERUNPREVSPW0KQ09ORklHX0lSX1JDNl9ERUNPREVSPW0KQ09ORklH X0lSX0pWQ19ERUNPREVSPW0KQ09ORklHX0lSX1NPTllfREVDT0RFUj1tCkNPTkZJR19JUl9TQU5Z T19ERUNPREVSPW0KQ09ORklHX0lSX1NIQVJQX0RFQ09ERVI9bQpDT05GSUdfSVJfTUNFX0tCRF9E RUNPREVSPW0KIyBDT05GSUdfSVJfWE1QX0RFQ09ERVIgaXMgbm90IHNldApDT05GSUdfSVJfSU1P Tl9ERUNPREVSPW0KIyBDT05GSUdfSVJfUkNNTV9ERUNPREVSIGlzIG5vdCBzZXQKQ09ORklHX1JD X0RFVklDRVM9eQpDT05GSUdfUkNfQVRJX1JFTU9URT1tCkNPTkZJR19JUl9FTkU9bQpDT05GSUdf SVJfSU1PTj1tCiMgQ09ORklHX0lSX0lNT05fUkFXIGlzIG5vdCBzZXQKQ09ORklHX0lSX01DRVVT Qj1tCkNPTkZJR19JUl9JVEVfQ0lSPW0KQ09ORklHX0lSX0ZJTlRFSz1tCkNPTkZJR19JUl9OVVZP VE9OPW0KQ09ORklHX0lSX1JFRFJBVDM9bQpDT05GSUdfSVJfU1RSRUFNWkFQPW0KQ09ORklHX0lS X1dJTkJPTkRfQ0lSPW0KIyBDT05GSUdfSVJfSUdPUlBMVUdVU0IgaXMgbm90IHNldApDT05GSUdf SVJfSUdVQU5BPW0KQ09ORklHX0lSX1RUVVNCSVI9bQpDT05GSUdfUkNfTE9PUEJBQ0s9bQojIENP TkZJR19JUl9TRVJJQUwgaXMgbm90IHNldAojIENPTkZJR19JUl9TSVIgaXMgbm90IHNldAojIENP TkZJR19SQ19YQk9YX0RWRCBpcyBub3Qgc2V0CkNPTkZJR19NRURJQV9TVVBQT1JUPW0KCiMKIyBN dWx0aW1lZGlhIGNvcmUgc3VwcG9ydAojCkNPTkZJR19NRURJQV9DQU1FUkFfU1VQUE9SVD15CkNP TkZJR19NRURJQV9BTkFMT0dfVFZfU1VQUE9SVD15CkNPTkZJR19NRURJQV9ESUdJVEFMX1RWX1NV UFBPUlQ9eQpDT05GSUdfTUVESUFfUkFESU9fU1VQUE9SVD15CiMgQ09ORklHX01FRElBX1NEUl9T VVBQT1JUIGlzIG5vdCBzZXQKIyBDT05GSUdfTUVESUFfQ0VDX1NVUFBPUlQgaXMgbm90IHNldApD T05GSUdfTUVESUFfQ09OVFJPTExFUj15CkNPTkZJR19NRURJQV9DT05UUk9MTEVSX0RWQj15CkNP TkZJR19WSURFT19ERVY9bQojIENPTkZJR19WSURFT19WNEwyX1NVQkRFVl9BUEkgaXMgbm90IHNl dApDT05GSUdfVklERU9fVjRMMj1tCkNPTkZJR19WSURFT19WNEwyX0kyQz15CiMgQ09ORklHX1ZJ REVPX0FEVl9ERUJVRyBpcyBub3Qgc2V0CiMgQ09ORklHX1ZJREVPX0ZJWEVEX01JTk9SX1JBTkdF UyBpcyBub3Qgc2V0CkNPTkZJR19WSURFT19UVU5FUj1tCkNPTkZJR19WSURFT0JVRl9HRU49bQpD T05GSUdfVklERU9CVUZfRE1BX1NHPW0KQ09ORklHX1ZJREVPQlVGX1ZNQUxMT0M9bQpDT05GSUdf RFZCX0NPUkU9bQojIENPTkZJR19EVkJfTU1BUCBpcyBub3Qgc2V0CkNPTkZJR19EVkJfTkVUPXkK Q09ORklHX1RUUENJX0VFUFJPTT1tCkNPTkZJR19EVkJfTUFYX0FEQVBURVJTPTgKQ09ORklHX0RW Ql9EWU5BTUlDX01JTk9SUz15CiMgQ09ORklHX0RWQl9ERU1VWF9TRUNUSU9OX0xPU1NfTE9HIGlz IG5vdCBzZXQKIyBDT05GSUdfRFZCX1VMRV9ERUJVRyBpcyBub3Qgc2V0CgojCiMgTWVkaWEgZHJp dmVycwojCkNPTkZJR19NRURJQV9VU0JfU1VQUE9SVD15CgojCiMgV2ViY2FtIGRldmljZXMKIwpD T05GSUdfVVNCX1ZJREVPX0NMQVNTPW0KQ09ORklHX1VTQl9WSURFT19DTEFTU19JTlBVVF9FVkRF Vj15CkNPTkZJR19VU0JfR1NQQ0E9bQpDT05GSUdfVVNCX001NjAyPW0KQ09ORklHX1VTQl9TVFYw NlhYPW0KQ09ORklHX1VTQl9HTDg2MD1tCkNPTkZJR19VU0JfR1NQQ0FfQkVOUT1tCkNPTkZJR19V U0JfR1NQQ0FfQ09ORVg9bQpDT05GSUdfVVNCX0dTUENBX0NQSUExPW0KIyBDT05GSUdfVVNCX0dT UENBX0RUQ1MwMzMgaXMgbm90IHNldApDT05GSUdfVVNCX0dTUENBX0VUT01TPW0KQ09ORklHX1VT Ql9HU1BDQV9GSU5FUElYPW0KQ09ORklHX1VTQl9HU1BDQV9KRUlMSU5KPW0KQ09ORklHX1VTQl9H U1BDQV9KTDIwMDVCQ0Q9bQojIENPTkZJR19VU0JfR1NQQ0FfS0lORUNUIGlzIG5vdCBzZXQKQ09O RklHX1VTQl9HU1BDQV9LT05JQ0E9bQpDT05GSUdfVVNCX0dTUENBX01BUlM9bQpDT05GSUdfVVNC X0dTUENBX01SOTczMTBBPW0KQ09ORklHX1VTQl9HU1BDQV9OVzgwWD1tCkNPTkZJR19VU0JfR1NQ Q0FfT1Y1MTk9bQpDT05GSUdfVVNCX0dTUENBX09WNTM0PW0KQ09ORklHX1VTQl9HU1BDQV9PVjUz NF85PW0KQ09ORklHX1VTQl9HU1BDQV9QQUMyMDc9bQpDT05GSUdfVVNCX0dTUENBX1BBQzczMDI9 bQpDT05GSUdfVVNCX0dTUENBX1BBQzczMTE9bQpDT05GSUdfVVNCX0dTUENBX1NFNDAxPW0KQ09O RklHX1VTQl9HU1BDQV9TTjlDMjAyOD1tCkNPTkZJR19VU0JfR1NQQ0FfU045QzIwWD1tCkNPTkZJ R19VU0JfR1NQQ0FfU09OSVhCPW0KQ09ORklHX1VTQl9HU1BDQV9TT05JWEo9bQpDT05GSUdfVVNC X0dTUENBX1NQQ0E1MDA9bQpDT05GSUdfVVNCX0dTUENBX1NQQ0E1MDE9bQpDT05GSUdfVVNCX0dT UENBX1NQQ0E1MDU9bQpDT05GSUdfVVNCX0dTUENBX1NQQ0E1MDY9bQpDT05GSUdfVVNCX0dTUENB X1NQQ0E1MDg9bQpDT05GSUdfVVNCX0dTUENBX1NQQ0E1NjE9bQpDT05GSUdfVVNCX0dTUENBX1NQ Q0ExNTI4PW0KQ09ORklHX1VTQl9HU1BDQV9TUTkwNT1tCkNPTkZJR19VU0JfR1NQQ0FfU1E5MDVD PW0KQ09ORklHX1VTQl9HU1BDQV9TUTkzMFg9bQpDT05GSUdfVVNCX0dTUENBX1NUSzAxND1tCiMg Q09ORklHX1VTQl9HU1BDQV9TVEsxMTM1IGlzIG5vdCBzZXQKQ09ORklHX1VTQl9HU1BDQV9TVFYw NjgwPW0KQ09ORklHX1VTQl9HU1BDQV9TVU5QTFVTPW0KQ09ORklHX1VTQl9HU1BDQV9UNjEzPW0K Q09ORklHX1VTQl9HU1BDQV9UT1BSTz1tCiMgQ09ORklHX1VTQl9HU1BDQV9UT1VQVEVLIGlzIG5v dCBzZXQKQ09ORklHX1VTQl9HU1BDQV9UVjg1MzI9bQpDT05GSUdfVVNCX0dTUENBX1ZDMDMyWD1t CkNPTkZJR19VU0JfR1NQQ0FfVklDQU09bQpDT05GSUdfVVNCX0dTUENBX1hJUkxJTktfQ0lUPW0K Q09ORklHX1VTQl9HU1BDQV9aQzNYWD1tCkNPTkZJR19VU0JfUFdDPW0KIyBDT05GSUdfVVNCX1BX Q19ERUJVRyBpcyBub3Qgc2V0CkNPTkZJR19VU0JfUFdDX0lOUFVUX0VWREVWPXkKIyBDT05GSUdf VklERU9fQ1BJQTIgaXMgbm90IHNldApDT05GSUdfVVNCX1pSMzY0WFg9bQpDT05GSUdfVVNCX1NU S1dFQkNBTT1tCkNPTkZJR19VU0JfUzIyNTU9bQojIENPTkZJR19WSURFT19VU0JUViBpcyBub3Qg c2V0CgojCiMgQW5hbG9nIFRWIFVTQiBkZXZpY2VzCiMKQ09ORklHX1ZJREVPX1BWUlVTQjI9bQpD T05GSUdfVklERU9fUFZSVVNCMl9TWVNGUz15CkNPTkZJR19WSURFT19QVlJVU0IyX0RWQj15CiMg Q09ORklHX1ZJREVPX1BWUlVTQjJfREVCVUdJRkMgaXMgbm90IHNldApDT05GSUdfVklERU9fSERQ VlI9bQpDT05GSUdfVklERU9fVVNCVklTSU9OPW0KIyBDT05GSUdfVklERU9fU1RLMTE2MF9DT01N T04gaXMgbm90IHNldAojIENPTkZJR19WSURFT19HTzcwMDcgaXMgbm90IHNldAoKIwojIEFuYWxv Zy9kaWdpdGFsIFRWIFVTQiBkZXZpY2VzCiMKQ09ORklHX1ZJREVPX0FVMDgyOD1tCkNPTkZJR19W SURFT19BVTA4MjhfVjRMMj15CiMgQ09ORklHX1ZJREVPX0FVMDgyOF9SQyBpcyBub3Qgc2V0CkNP TkZJR19WSURFT19DWDIzMVhYPW0KQ09ORklHX1ZJREVPX0NYMjMxWFhfUkM9eQpDT05GSUdfVklE RU9fQ1gyMzFYWF9BTFNBPW0KQ09ORklHX1ZJREVPX0NYMjMxWFhfRFZCPW0KQ09ORklHX1ZJREVP X1RNNjAwMD1tCkNPTkZJR19WSURFT19UTTYwMDBfQUxTQT1tCkNPTkZJR19WSURFT19UTTYwMDBf RFZCPW0KCiMKIyBEaWdpdGFsIFRWIFVTQiBkZXZpY2VzCiMKQ09ORklHX0RWQl9VU0I9bQojIENP TkZJR19EVkJfVVNCX0RFQlVHIGlzIG5vdCBzZXQKQ09ORklHX0RWQl9VU0JfRElCMzAwME1DPW0K Q09ORklHX0RWQl9VU0JfQTgwMD1tCkNPTkZJR19EVkJfVVNCX0RJQlVTQl9NQj1tCiMgQ09ORklH X0RWQl9VU0JfRElCVVNCX01CX0ZBVUxUWSBpcyBub3Qgc2V0CkNPTkZJR19EVkJfVVNCX0RJQlVT Ql9NQz1tCkNPTkZJR19EVkJfVVNCX0RJQjA3MDA9bQpDT05GSUdfRFZCX1VTQl9VTVRfMDEwPW0K Q09ORklHX0RWQl9VU0JfQ1hVU0I9bQojIENPTkZJR19EVkJfVVNCX0NYVVNCX0FOQUxPRyBpcyBu b3Qgc2V0CkNPTkZJR19EVkJfVVNCX005MjBYPW0KQ09ORklHX0RWQl9VU0JfRElHSVRWPW0KQ09O RklHX0RWQl9VU0JfVlA3MDQ1PW0KQ09ORklHX0RWQl9VU0JfVlA3MDJYPW0KQ09ORklHX0RWQl9V U0JfR1A4UFNLPW0KQ09ORklHX0RWQl9VU0JfTk9WQV9UX1VTQjI9bQpDT05GSUdfRFZCX1VTQl9U VFVTQjI9bQpDT05GSUdfRFZCX1VTQl9EVFQyMDBVPW0KQ09ORklHX0RWQl9VU0JfT1BFUkExPW0K Q09ORklHX0RWQl9VU0JfQUY5MDA1PW0KQ09ORklHX0RWQl9VU0JfQUY5MDA1X1JFTU9URT1tCkNP TkZJR19EVkJfVVNCX1BDVFY0NTJFPW0KQ09ORklHX0RWQl9VU0JfRFcyMTAyPW0KQ09ORklHX0RW Ql9VU0JfQ0lORVJHWV9UMj1tCkNPTkZJR19EVkJfVVNCX0RUVjUxMDA9bQpDT05GSUdfRFZCX1VT Ql9BWjYwMjc9bQpDT05GSUdfRFZCX1VTQl9URUNITklTQVRfVVNCMj1tCkNPTkZJR19EVkJfVVNC X1YyPW0KQ09ORklHX0RWQl9VU0JfQUY5MDE1PW0KQ09ORklHX0RWQl9VU0JfQUY5MDM1PW0KQ09O RklHX0RWQl9VU0JfQU5ZU0VFPW0KQ09ORklHX0RWQl9VU0JfQVU2NjEwPW0KQ09ORklHX0RWQl9V U0JfQVo2MDA3PW0KQ09ORklHX0RWQl9VU0JfQ0U2MjMwPW0KQ09ORklHX0RWQl9VU0JfRUMxNjg9 bQpDT05GSUdfRFZCX1VTQl9HTDg2MT1tCkNPTkZJR19EVkJfVVNCX0xNRTI1MTA9bQpDT05GSUdf RFZCX1VTQl9NWEwxMTFTRj1tCkNPTkZJR19EVkJfVVNCX1JUTDI4WFhVPW0KIyBDT05GSUdfRFZC X1VTQl9EVkJTS1kgaXMgbm90IHNldAojIENPTkZJR19EVkJfVVNCX1pEMTMwMSBpcyBub3Qgc2V0 CkNPTkZJR19EVkJfVFRVU0JfQlVER0VUPW0KQ09ORklHX0RWQl9UVFVTQl9ERUM9bQpDT05GSUdf U01TX1VTQl9EUlY9bQpDT05GSUdfRFZCX0IyQzJfRkxFWENPUF9VU0I9bQojIENPTkZJR19EVkJf QjJDMl9GTEVYQ09QX1VTQl9ERUJVRyBpcyBub3Qgc2V0CiMgQ09ORklHX0RWQl9BUzEwMiBpcyBu b3Qgc2V0CgojCiMgV2ViY2FtLCBUViAoYW5hbG9nL2RpZ2l0YWwpIFVTQiBkZXZpY2VzCiMKQ09O RklHX1ZJREVPX0VNMjhYWD1tCiMgQ09ORklHX1ZJREVPX0VNMjhYWF9WNEwyIGlzIG5vdCBzZXQK Q09ORklHX1ZJREVPX0VNMjhYWF9BTFNBPW0KQ09ORklHX1ZJREVPX0VNMjhYWF9EVkI9bQpDT05G SUdfVklERU9fRU0yOFhYX1JDPW0KQ09ORklHX01FRElBX1BDSV9TVVBQT1JUPXkKCiMKIyBNZWRp YSBjYXB0dXJlIHN1cHBvcnQKIwojIENPTkZJR19WSURFT19NRVlFIGlzIG5vdCBzZXQKIyBDT05G SUdfVklERU9fU09MTzZYMTAgaXMgbm90IHNldAojIENPTkZJR19WSURFT19UVzU4NjQgaXMgbm90 IHNldAojIENPTkZJR19WSURFT19UVzY4IGlzIG5vdCBzZXQKIyBDT05GSUdfVklERU9fVFc2ODZY IGlzIG5vdCBzZXQKCiMKIyBNZWRpYSBjYXB0dXJlL2FuYWxvZyBUViBzdXBwb3J0CiMKQ09ORklH X1ZJREVPX0lWVFY9bQojIENPTkZJR19WSURFT19JVlRWX0RFUFJFQ0FURURfSU9DVExTIGlzIG5v dCBzZXQKIyBDT05GSUdfVklERU9fSVZUVl9BTFNBIGlzIG5vdCBzZXQKQ09ORklHX1ZJREVPX0ZC X0lWVFY9bQojIENPTkZJR19WSURFT19GQl9JVlRWX0ZPUkNFX1BBVCBpcyBub3Qgc2V0CiMgQ09O RklHX1ZJREVPX0hFWElVTV9HRU1JTkkgaXMgbm90IHNldAojIENPTkZJR19WSURFT19IRVhJVU1f T1JJT04gaXMgbm90IHNldAojIENPTkZJR19WSURFT19NWEIgaXMgbm90IHNldAojIENPTkZJR19W SURFT19EVDMxNTUgaXMgbm90IHNldAoKIwojIE1lZGlhIGNhcHR1cmUvYW5hbG9nL2h5YnJpZCBU ViBzdXBwb3J0CiMKQ09ORklHX1ZJREVPX0NYMTg9bQpDT05GSUdfVklERU9fQ1gxOF9BTFNBPW0K Q09ORklHX1ZJREVPX0NYMjM4ODU9bQpDT05GSUdfTUVESUFfQUxURVJBX0NJPW0KIyBDT05GSUdf VklERU9fQ1gyNTgyMSBpcyBub3Qgc2V0CkNPTkZJR19WSURFT19DWDg4PW0KQ09ORklHX1ZJREVP X0NYODhfQUxTQT1tCkNPTkZJR19WSURFT19DWDg4X0JMQUNLQklSRD1tCkNPTkZJR19WSURFT19D WDg4X0RWQj1tCkNPTkZJR19WSURFT19DWDg4X0VOQUJMRV9WUDMwNTQ9eQpDT05GSUdfVklERU9f Q1g4OF9WUDMwNTQ9bQpDT05GSUdfVklERU9fQ1g4OF9NUEVHPW0KQ09ORklHX1ZJREVPX0JUODQ4 PW0KQ09ORklHX0RWQl9CVDhYWD1tCkNPTkZJR19WSURFT19TQUE3MTM0PW0KQ09ORklHX1ZJREVP X1NBQTcxMzRfQUxTQT1tCkNPTkZJR19WSURFT19TQUE3MTM0X1JDPXkKQ09ORklHX1ZJREVPX1NB QTcxMzRfRFZCPW0KQ09ORklHX1ZJREVPX1NBQTcxNjQ9bQoKIwojIE1lZGlhIGRpZ2l0YWwgVFYg UENJIEFkYXB0ZXJzCiMKQ09ORklHX0RWQl9BVjcxMTBfSVI9eQpDT05GSUdfRFZCX0FWNzExMD1t CkNPTkZJR19EVkJfQVY3MTEwX09TRD15CkNPTkZJR19EVkJfQlVER0VUX0NPUkU9bQpDT05GSUdf RFZCX0JVREdFVD1tCkNPTkZJR19EVkJfQlVER0VUX0NJPW0KQ09ORklHX0RWQl9CVURHRVRfQVY9 bQpDT05GSUdfRFZCX0JVREdFVF9QQVRDSD1tCkNPTkZJR19EVkJfQjJDMl9GTEVYQ09QX1BDST1t CiMgQ09ORklHX0RWQl9CMkMyX0ZMRVhDT1BfUENJX0RFQlVHIGlzIG5vdCBzZXQKQ09ORklHX0RW Ql9QTFVUTzI9bQpDT05GSUdfRFZCX0RNMTEwNT1tCkNPTkZJR19EVkJfUFQxPW0KIyBDT05GSUdf RFZCX1BUMyBpcyBub3Qgc2V0CkNPTkZJR19NQU5USVNfQ09SRT1tCkNPTkZJR19EVkJfTUFOVElT PW0KQ09ORklHX0RWQl9IT1BQRVI9bQpDT05GSUdfRFZCX05HRU5FPW0KQ09ORklHX0RWQl9EREJS SURHRT1tCiMgQ09ORklHX0RWQl9EREJSSURHRV9NU0lFTkFCTEUgaXMgbm90IHNldAojIENPTkZJ R19EVkJfU01JUENJRSBpcyBub3Qgc2V0CiMgQ09ORklHX0RWQl9ORVRVUF9VTklEVkIgaXMgbm90 IHNldAojIENPTkZJR19WNExfUExBVEZPUk1fRFJJVkVSUyBpcyBub3Qgc2V0CiMgQ09ORklHX1Y0 TF9NRU0yTUVNX0RSSVZFUlMgaXMgbm90IHNldAojIENPTkZJR19WNExfVEVTVF9EUklWRVJTIGlz IG5vdCBzZXQKIyBDT05GSUdfRFZCX1BMQVRGT1JNX0RSSVZFUlMgaXMgbm90IHNldAoKIwojIFN1 cHBvcnRlZCBNTUMvU0RJTyBhZGFwdGVycwojCkNPTkZJR19TTVNfU0RJT19EUlY9bQpDT05GSUdf UkFESU9fQURBUFRFUlM9eQpDT05GSUdfUkFESU9fVEVBNTc1WD1tCiMgQ09ORklHX1JBRElPX1NJ NDcwWCBpcyBub3Qgc2V0CiMgQ09ORklHX1JBRElPX1NJNDcxMyBpcyBub3Qgc2V0CiMgQ09ORklH X1VTQl9NUjgwMCBpcyBub3Qgc2V0CiMgQ09ORklHX1VTQl9EU0JSIGlzIG5vdCBzZXQKIyBDT05G SUdfUkFESU9fTUFYSVJBRElPIGlzIG5vdCBzZXQKIyBDT05GSUdfUkFESU9fU0hBUksgaXMgbm90 IHNldAojIENPTkZJR19SQURJT19TSEFSSzIgaXMgbm90IHNldAojIENPTkZJR19VU0JfS0VFTkUg aXMgbm90IHNldAojIENPTkZJR19VU0JfUkFSRU1PTk8gaXMgbm90IHNldAojIENPTkZJR19VU0Jf TUE5MDEgaXMgbm90IHNldAojIENPTkZJR19SQURJT19URUE1NzY0IGlzIG5vdCBzZXQKIyBDT05G SUdfUkFESU9fU0FBNzcwNkggaXMgbm90IHNldAojIENPTkZJR19SQURJT19URUY2ODYyIGlzIG5v dCBzZXQKIyBDT05GSUdfUkFESU9fV0wxMjczIGlzIG5vdCBzZXQKCiMKIyBUZXhhcyBJbnN0cnVt ZW50cyBXTDEyOHggRk0gZHJpdmVyIChTVCBiYXNlZCkKIwojIGVuZCBvZiBUZXhhcyBJbnN0cnVt ZW50cyBXTDEyOHggRk0gZHJpdmVyIChTVCBiYXNlZCkKCiMKIyBTdXBwb3J0ZWQgRmlyZVdpcmUg KElFRUUgMTM5NCkgQWRhcHRlcnMKIwpDT05GSUdfRFZCX0ZJUkVEVFY9bQpDT05GSUdfRFZCX0ZJ UkVEVFZfSU5QVVQ9eQpDT05GSUdfTUVESUFfQ09NTU9OX09QVElPTlM9eQoKIwojIGNvbW1vbiBk cml2ZXIgb3B0aW9ucwojCkNPTkZJR19WSURFT19DWDIzNDFYPW0KQ09ORklHX1ZJREVPX1RWRUVQ Uk9NPW0KQ09ORklHX0NZUFJFU1NfRklSTVdBUkU9bQpDT05GSUdfVklERU9CVUYyX0NPUkU9bQpD T05GSUdfVklERU9CVUYyX1Y0TDI9bQpDT05GSUdfVklERU9CVUYyX01FTU9QUz1tCkNPTkZJR19W SURFT0JVRjJfVk1BTExPQz1tCkNPTkZJR19WSURFT0JVRjJfRE1BX1NHPW0KQ09ORklHX1ZJREVP QlVGMl9EVkI9bQpDT05GSUdfRFZCX0IyQzJfRkxFWENPUD1tCkNPTkZJR19WSURFT19TQUE3MTQ2 PW0KQ09ORklHX1ZJREVPX1NBQTcxNDZfVlY9bQpDT05GSUdfU01TX1NJQU5PX01EVFY9bQpDT05G SUdfU01TX1NJQU5PX1JDPXkKIyBDT05GSUdfU01TX1NJQU5PX0RFQlVHRlMgaXMgbm90IHNldAoK IwojIE1lZGlhIGFuY2lsbGFyeSBkcml2ZXJzICh0dW5lcnMsIHNlbnNvcnMsIGkyYywgc3BpLCBm cm9udGVuZHMpCiMKQ09ORklHX01FRElBX1NVQkRSVl9BVVRPU0VMRUNUPXkKQ09ORklHX01FRElB X0FUVEFDSD15CkNPTkZJR19WSURFT19JUl9JMkM9bQoKIwojIEkyQyBFbmNvZGVycywgZGVjb2Rl cnMsIHNlbnNvcnMgYW5kIG90aGVyIGhlbHBlciBjaGlwcwojCgojCiMgQXVkaW8gZGVjb2RlcnMs IHByb2Nlc3NvcnMgYW5kIG1peGVycwojCkNPTkZJR19WSURFT19UVkFVRElPPW0KQ09ORklHX1ZJ REVPX1REQTc0MzI9bQojIENPTkZJR19WSURFT19UREE5ODQwIGlzIG5vdCBzZXQKIyBDT05GSUdf VklERU9fVEVBNjQxNUMgaXMgbm90IHNldAojIENPTkZJR19WSURFT19URUE2NDIwIGlzIG5vdCBz ZXQKQ09ORklHX1ZJREVPX01TUDM0MDA9bQpDT05GSUdfVklERU9fQ1MzMzA4PW0KQ09ORklHX1ZJ REVPX0NTNTM0NT1tCkNPTkZJR19WSURFT19DUzUzTDMyQT1tCiMgQ09ORklHX1ZJREVPX1RMVjMy MEFJQzIzQiBpcyBub3Qgc2V0CiMgQ09ORklHX1ZJREVPX1VEQTEzNDIgaXMgbm90IHNldApDT05G SUdfVklERU9fV004Nzc1PW0KQ09ORklHX1ZJREVPX1dNODczOT1tCkNPTkZJR19WSURFT19WUDI3 U01QWD1tCiMgQ09ORklHX1ZJREVPX1NPTllfQlRGX01QWCBpcyBub3Qgc2V0CgojCiMgUkRTIGRl Y29kZXJzCiMKQ09ORklHX1ZJREVPX1NBQTY1ODg9bQoKIwojIFZpZGVvIGRlY29kZXJzCiMKIyBD T05GSUdfVklERU9fQURWNzE4MyBpcyBub3Qgc2V0CiMgQ09ORklHX1ZJREVPX0JUODE5IGlzIG5v dCBzZXQKIyBDT05GSUdfVklERU9fQlQ4NTYgaXMgbm90IHNldAojIENPTkZJR19WSURFT19CVDg2 NiBpcyBub3Qgc2V0CiMgQ09ORklHX1ZJREVPX0tTMDEyNyBpcyBub3Qgc2V0CiMgQ09ORklHX1ZJ REVPX01MODZWNzY2NyBpcyBub3Qgc2V0CiMgQ09ORklHX1ZJREVPX1NBQTcxMTAgaXMgbm90IHNl dApDT05GSUdfVklERU9fU0FBNzExWD1tCiMgQ09ORklHX1ZJREVPX1RWUDUxNFggaXMgbm90IHNl dAojIENPTkZJR19WSURFT19UVlA1MTUwIGlzIG5vdCBzZXQKIyBDT05GSUdfVklERU9fVFZQNzAw MiBpcyBub3Qgc2V0CiMgQ09ORklHX1ZJREVPX1RXMjgwNCBpcyBub3Qgc2V0CiMgQ09ORklHX1ZJ REVPX1RXOTkwMyBpcyBub3Qgc2V0CiMgQ09ORklHX1ZJREVPX1RXOTkwNiBpcyBub3Qgc2V0CiMg Q09ORklHX1ZJREVPX1RXOTkxMCBpcyBub3Qgc2V0CiMgQ09ORklHX1ZJREVPX1ZQWDMyMjAgaXMg bm90IHNldAoKIwojIFZpZGVvIGFuZCBhdWRpbyBkZWNvZGVycwojCkNPTkZJR19WSURFT19TQUE3 MTdYPW0KQ09ORklHX1ZJREVPX0NYMjU4NDA9bQoKIwojIFZpZGVvIGVuY29kZXJzCiMKQ09ORklH X1ZJREVPX1NBQTcxMjc9bQojIENPTkZJR19WSURFT19TQUE3MTg1IGlzIG5vdCBzZXQKIyBDT05G SUdfVklERU9fQURWNzE3MCBpcyBub3Qgc2V0CiMgQ09ORklHX1ZJREVPX0FEVjcxNzUgaXMgbm90 IHNldAojIENPTkZJR19WSURFT19BRFY3MzQzIGlzIG5vdCBzZXQKIyBDT05GSUdfVklERU9fQURW NzM5MyBpcyBub3Qgc2V0CiMgQ09ORklHX1ZJREVPX0FLODgxWCBpcyBub3Qgc2V0CiMgQ09ORklH X1ZJREVPX1RIUzgyMDAgaXMgbm90IHNldAoKIwojIENhbWVyYSBzZW5zb3IgZGV2aWNlcwojCiMg Q09ORklHX1ZJREVPX09WMjY0MCBpcyBub3Qgc2V0CiMgQ09ORklHX1ZJREVPX09WMjY1OSBpcyBu b3Qgc2V0CiMgQ09ORklHX1ZJREVPX09WMjY4MCBpcyBub3Qgc2V0CiMgQ09ORklHX1ZJREVPX09W MjY4NSBpcyBub3Qgc2V0CiMgQ09ORklHX1ZJREVPX09WNjY1MCBpcyBub3Qgc2V0CiMgQ09ORklH X1ZJREVPX09WNTY5NSBpcyBub3Qgc2V0CiMgQ09ORklHX1ZJREVPX09WNzcyWCBpcyBub3Qgc2V0 CiMgQ09ORklHX1ZJREVPX09WNzY0MCBpcyBub3Qgc2V0CiMgQ09ORklHX1ZJREVPX09WNzY3MCBp cyBub3Qgc2V0CiMgQ09ORklHX1ZJREVPX09WNzc0MCBpcyBub3Qgc2V0CiMgQ09ORklHX1ZJREVP X09WOTY0MCBpcyBub3Qgc2V0CiMgQ09ORklHX1ZJREVPX1ZTNjYyNCBpcyBub3Qgc2V0CiMgQ09O RklHX1ZJREVPX01UOU0xMTEgaXMgbm90IHNldAojIENPTkZJR19WSURFT19NVDlUMTEyIGlzIG5v dCBzZXQKIyBDT05GSUdfVklERU9fTVQ5VjAxMSBpcyBub3Qgc2V0CiMgQ09ORklHX1ZJREVPX01U OVYxMTEgaXMgbm90IHNldAojIENPTkZJR19WSURFT19TUjAzMFBDMzAgaXMgbm90IHNldAojIENP TkZJR19WSURFT19SSjU0TjEgaXMgbm90IHNldAoKIwojIExlbnMgZHJpdmVycwojCiMgQ09ORklH X1ZJREVPX0FENTgyMCBpcyBub3Qgc2V0CgojCiMgRmxhc2ggZGV2aWNlcwojCiMgQ09ORklHX1ZJ REVPX0FEUDE2NTMgaXMgbm90IHNldAojIENPTkZJR19WSURFT19MTTM1NjAgaXMgbm90IHNldAoj IENPTkZJR19WSURFT19MTTM2NDYgaXMgbm90IHNldAoKIwojIFZpZGVvIGltcHJvdmVtZW50IGNo aXBzCiMKQ09ORklHX1ZJREVPX1VQRDY0MDMxQT1tCkNPTkZJR19WSURFT19VUEQ2NDA4Mz1tCgoj CiMgQXVkaW8vVmlkZW8gY29tcHJlc3Npb24gY2hpcHMKIwpDT05GSUdfVklERU9fU0FBNjc1MkhT PW0KCiMKIyBTRFIgdHVuZXIgY2hpcHMKIwoKIwojIE1pc2NlbGxhbmVvdXMgaGVscGVyIGNoaXBz CiMKIyBDT05GSUdfVklERU9fVEhTNzMwMyBpcyBub3Qgc2V0CkNPTkZJR19WSURFT19NNTI3OTA9 bQojIENPTkZJR19WSURFT19JMkMgaXMgbm90IHNldAojIGVuZCBvZiBJMkMgRW5jb2RlcnMsIGRl Y29kZXJzLCBzZW5zb3JzIGFuZCBvdGhlciBoZWxwZXIgY2hpcHMKCiMKIyBTUEkgaGVscGVyIGNo aXBzCiMKIyBlbmQgb2YgU1BJIGhlbHBlciBjaGlwcwoKIwojIE1lZGlhIFNQSSBBZGFwdGVycwoj CiMgQ09ORklHX0NYRDI4ODBfU1BJX0RSViBpcyBub3Qgc2V0CiMgZW5kIG9mIE1lZGlhIFNQSSBB ZGFwdGVycwoKQ09ORklHX01FRElBX1RVTkVSPW0KCiMKIyBDdXN0b21pemUgVFYgdHVuZXJzCiMK Q09ORklHX01FRElBX1RVTkVSX1NJTVBMRT1tCkNPTkZJR19NRURJQV9UVU5FUl9UREExODI1MD1t CkNPTkZJR19NRURJQV9UVU5FUl9UREE4MjkwPW0KQ09ORklHX01FRElBX1RVTkVSX1REQTgyN1g9 bQpDT05GSUdfTUVESUFfVFVORVJfVERBMTgyNzE9bQpDT05GSUdfTUVESUFfVFVORVJfVERBOTg4 Nz1tCkNPTkZJR19NRURJQV9UVU5FUl9URUE1NzYxPW0KQ09ORklHX01FRElBX1RVTkVSX1RFQTU3 Njc9bQojIENPTkZJR19NRURJQV9UVU5FUl9NU0kwMDEgaXMgbm90IHNldApDT05GSUdfTUVESUFf VFVORVJfTVQyMFhYPW0KQ09ORklHX01FRElBX1RVTkVSX01UMjA2MD1tCkNPTkZJR19NRURJQV9U VU5FUl9NVDIwNjM9bQpDT05GSUdfTUVESUFfVFVORVJfTVQyMjY2PW0KQ09ORklHX01FRElBX1RV TkVSX01UMjEzMT1tCkNPTkZJR19NRURJQV9UVU5FUl9RVDEwMTA9bQpDT05GSUdfTUVESUFfVFVO RVJfWEMyMDI4PW0KQ09ORklHX01FRElBX1RVTkVSX1hDNTAwMD1tCkNPTkZJR19NRURJQV9UVU5F Ul9YQzQwMDA9bQpDT05GSUdfTUVESUFfVFVORVJfTVhMNTAwNVM9bQpDT05GSUdfTUVESUFfVFVO RVJfTVhMNTAwN1Q9bQpDT05GSUdfTUVESUFfVFVORVJfTUM0NFM4MDM9bQpDT05GSUdfTUVESUFf VFVORVJfTUFYMjE2NT1tCkNPTkZJR19NRURJQV9UVU5FUl9UREExODIxOD1tCkNPTkZJR19NRURJ QV9UVU5FUl9GQzAwMTE9bQpDT05GSUdfTUVESUFfVFVORVJfRkMwMDEyPW0KQ09ORklHX01FRElB X1RVTkVSX0ZDMDAxMz1tCkNPTkZJR19NRURJQV9UVU5FUl9UREExODIxMj1tCkNPTkZJR19NRURJ QV9UVU5FUl9FNDAwMD1tCkNPTkZJR19NRURJQV9UVU5FUl9GQzI1ODA9bQpDT05GSUdfTUVESUFf VFVORVJfTTg4UlM2MDAwVD1tCkNPTkZJR19NRURJQV9UVU5FUl9UVUE5MDAxPW0KQ09ORklHX01F RElBX1RVTkVSX1NJMjE1Nz1tCkNPTkZJR19NRURJQV9UVU5FUl9JVDkxM1g9bQpDT05GSUdfTUVE SUFfVFVORVJfUjgyMFQ9bQojIENPTkZJR19NRURJQV9UVU5FUl9NWEwzMDFSRiBpcyBub3Qgc2V0 CkNPTkZJR19NRURJQV9UVU5FUl9RTTFEMUMwMDQyPW0KQ09ORklHX01FRElBX1RVTkVSX1FNMUQx QjAwMDQ9bQojIGVuZCBvZiBDdXN0b21pemUgVFYgdHVuZXJzCgojCiMgQ3VzdG9taXNlIERWQiBG cm9udGVuZHMKIwoKIwojIE11bHRpc3RhbmRhcmQgKHNhdGVsbGl0ZSkgZnJvbnRlbmRzCiMKQ09O RklHX0RWQl9TVEIwODk5PW0KQ09ORklHX0RWQl9TVEI2MTAwPW0KQ09ORklHX0RWQl9TVFYwOTB4 PW0KQ09ORklHX0RWQl9TVFYwOTEwPW0KQ09ORklHX0RWQl9TVFY2MTEweD1tCkNPTkZJR19EVkJf U1RWNjExMT1tCkNPTkZJR19EVkJfTVhMNVhYPW0KQ09ORklHX0RWQl9NODhEUzMxMDM9bQoKIwoj IE11bHRpc3RhbmRhcmQgKGNhYmxlICsgdGVycmVzdHJpYWwpIGZyb250ZW5kcwojCkNPTkZJR19E VkJfRFJYSz1tCkNPTkZJR19EVkJfVERBMTgyNzFDMkREPW0KQ09ORklHX0RWQl9TSTIxNjU9bQpD T05GSUdfRFZCX01OODg0NzI9bQpDT05GSUdfRFZCX01OODg0NzM9bQoKIwojIERWQi1TIChzYXRl bGxpdGUpIGZyb250ZW5kcwojCkNPTkZJR19EVkJfQ1gyNDExMD1tCkNPTkZJR19EVkJfQ1gyNDEy Mz1tCkNPTkZJR19EVkJfTVQzMTI9bQpDT05GSUdfRFZCX1pMMTAwMzY9bQpDT05GSUdfRFZCX1pM MTAwMzk9bQpDT05GSUdfRFZCX1M1SDE0MjA9bQpDT05GSUdfRFZCX1NUVjAyODg9bQpDT05GSUdf RFZCX1NUQjYwMDA9bQpDT05GSUdfRFZCX1NUVjAyOTk9bQpDT05GSUdfRFZCX1NUVjYxMTA9bQpD T05GSUdfRFZCX1NUVjA5MDA9bQpDT05GSUdfRFZCX1REQTgwODM9bQpDT05GSUdfRFZCX1REQTEw MDg2PW0KQ09ORklHX0RWQl9UREE4MjYxPW0KQ09ORklHX0RWQl9WRVMxWDkzPW0KQ09ORklHX0RW Ql9UVU5FUl9JVEQxMDAwPW0KQ09ORklHX0RWQl9UVU5FUl9DWDI0MTEzPW0KQ09ORklHX0RWQl9U REE4MjZYPW0KQ09ORklHX0RWQl9UVUE2MTAwPW0KQ09ORklHX0RWQl9DWDI0MTE2PW0KQ09ORklH X0RWQl9DWDI0MTE3PW0KQ09ORklHX0RWQl9DWDI0MTIwPW0KQ09ORklHX0RWQl9TSTIxWFg9bQpD T05GSUdfRFZCX1RTMjAyMD1tCkNPTkZJR19EVkJfRFMzMDAwPW0KQ09ORklHX0RWQl9NQjg2QTE2 PW0KQ09ORklHX0RWQl9UREExMDA3MT1tCgojCiMgRFZCLVQgKHRlcnJlc3RyaWFsKSBmcm9udGVu ZHMKIwpDT05GSUdfRFZCX1NQODg3MD1tCkNPTkZJR19EVkJfU1A4ODdYPW0KQ09ORklHX0RWQl9D WDIyNzAwPW0KQ09ORklHX0RWQl9DWDIyNzAyPW0KIyBDT05GSUdfRFZCX1M1SDE0MzIgaXMgbm90 IHNldApDT05GSUdfRFZCX0RSWEQ9bQpDT05GSUdfRFZCX0w2NDc4MT1tCkNPTkZJR19EVkJfVERB MTAwNFg9bQpDT05GSUdfRFZCX05YVDYwMDA9bQpDT05GSUdfRFZCX01UMzUyPW0KQ09ORklHX0RW Ql9aTDEwMzUzPW0KQ09ORklHX0RWQl9ESUIzMDAwTUI9bQpDT05GSUdfRFZCX0RJQjMwMDBNQz1t CkNPTkZJR19EVkJfRElCNzAwME09bQpDT05GSUdfRFZCX0RJQjcwMDBQPW0KIyBDT05GSUdfRFZC X0RJQjkwMDAgaXMgbm90IHNldApDT05GSUdfRFZCX1REQTEwMDQ4PW0KQ09ORklHX0RWQl9BRjkw MTM9bQpDT05GSUdfRFZCX0VDMTAwPW0KQ09ORklHX0RWQl9TVFYwMzY3PW0KQ09ORklHX0RWQl9D WEQyODIwUj1tCkNPTkZJR19EVkJfQ1hEMjg0MUVSPW0KQ09ORklHX0RWQl9SVEwyODMwPW0KQ09O RklHX0RWQl9SVEwyODMyPW0KQ09ORklHX0RWQl9TSTIxNjg9bQojIENPTkZJR19EVkJfWkQxMzAx X0RFTU9EIGlzIG5vdCBzZXQKQ09ORklHX0RWQl9HUDhQU0tfRkU9bQojIENPTkZJR19EVkJfQ1hE Mjg4MCBpcyBub3Qgc2V0CgojCiMgRFZCLUMgKGNhYmxlKSBmcm9udGVuZHMKIwpDT05GSUdfRFZC X1ZFUzE4MjA9bQpDT05GSUdfRFZCX1REQTEwMDIxPW0KQ09ORklHX0RWQl9UREExMDAyMz1tCkNP TkZJR19EVkJfU1RWMDI5Nz1tCgojCiMgQVRTQyAoTm9ydGggQW1lcmljYW4vS29yZWFuIFRlcnJl c3RyaWFsL0NhYmxlIERUVikgZnJvbnRlbmRzCiMKQ09ORklHX0RWQl9OWFQyMDBYPW0KQ09ORklH X0RWQl9PUjUxMjExPW0KQ09ORklHX0RWQl9PUjUxMTMyPW0KQ09ORklHX0RWQl9CQ00zNTEwPW0K Q09ORklHX0RWQl9MR0RUMzMwWD1tCkNPTkZJR19EVkJfTEdEVDMzMDU9bQpDT05GSUdfRFZCX0xH RFQzMzA2QT1tCkNPTkZJR19EVkJfTEcyMTYwPW0KQ09ORklHX0RWQl9TNUgxNDA5PW0KQ09ORklH X0RWQl9BVTg1MjI9bQpDT05GSUdfRFZCX0FVODUyMl9EVFY9bQpDT05GSUdfRFZCX0FVODUyMl9W NEw9bQpDT05GSUdfRFZCX1M1SDE0MTE9bQoKIwojIElTREItVCAodGVycmVzdHJpYWwpIGZyb250 ZW5kcwojCkNPTkZJR19EVkJfUzkyMT1tCkNPTkZJR19EVkJfRElCODAwMD1tCkNPTkZJR19EVkJf TUI4NkEyMFM9bQoKIwojIElTREItUyAoc2F0ZWxsaXRlKSAmIElTREItVCAodGVycmVzdHJpYWwp IGZyb250ZW5kcwojCkNPTkZJR19EVkJfVEM5MDUyMj1tCiMgQ09ORklHX0RWQl9NTjg4NDQzWCBp cyBub3Qgc2V0CgojCiMgRGlnaXRhbCB0ZXJyZXN0cmlhbCBvbmx5IHR1bmVycy9QTEwKIwpDT05G SUdfRFZCX1BMTD1tCkNPTkZJR19EVkJfVFVORVJfRElCMDA3MD1tCkNPTkZJR19EVkJfVFVORVJf RElCMDA5MD1tCgojCiMgU0VDIGNvbnRyb2wgZGV2aWNlcyBmb3IgRFZCLVMKIwpDT05GSUdfRFZC X0RSWDM5WFlKPW0KQ09ORklHX0RWQl9MTkJIMjU9bQojIENPTkZJR19EVkJfTE5CSDI5IGlzIG5v dCBzZXQKQ09ORklHX0RWQl9MTkJQMjE9bQpDT05GSUdfRFZCX0xOQlAyMj1tCkNPTkZJR19EVkJf SVNMNjQwNT1tCkNPTkZJR19EVkJfSVNMNjQyMT1tCkNPTkZJR19EVkJfSVNMNjQyMz1tCkNPTkZJ R19EVkJfQTgyOTM9bQojIENPTkZJR19EVkJfTEdTOEdMNSBpcyBub3Qgc2V0CkNPTkZJR19EVkJf TEdTOEdYWD1tCkNPTkZJR19EVkJfQVRCTTg4MzA9bQpDT05GSUdfRFZCX1REQTY2NXg9bQpDT05G SUdfRFZCX0lYMjUwNVY9bQpDT05GSUdfRFZCX004OFJTMjAwMD1tCkNPTkZJR19EVkJfQUY5MDMz PW0KIyBDT05GSUdfRFZCX0hPUlVTM0EgaXMgbm90IHNldAojIENPTkZJR19EVkJfQVNDT1QyRSBp cyBub3Qgc2V0CiMgQ09ORklHX0RWQl9IRUxFTkUgaXMgbm90IHNldAoKIwojIENvbW1vbiBJbnRl cmZhY2UgKEVONTAyMjEpIGNvbnRyb2xsZXIgZHJpdmVycwojCkNPTkZJR19EVkJfQ1hEMjA5OT1t CiMgQ09ORklHX0RWQl9TUDIgaXMgbm90IHNldAoKIwojIFRvb2xzIHRvIGRldmVsb3AgbmV3IGZy b250ZW5kcwojCkNPTkZJR19EVkJfRFVNTVlfRkU9bQojIGVuZCBvZiBDdXN0b21pc2UgRFZCIEZy b250ZW5kcwoKIwojIEdyYXBoaWNzIHN1cHBvcnQKIwpDT05GSUdfQUdQPXkKQ09ORklHX0FHUF9B TUQ2ND15CkNPTkZJR19BR1BfSU5URUw9eQpDT05GSUdfQUdQX1NJUz15CkNPTkZJR19BR1BfVklB PXkKQ09ORklHX0lOVEVMX0dUVD15CkNPTkZJR19WR0FfQVJCPXkKQ09ORklHX1ZHQV9BUkJfTUFY X0dQVVM9NjQKQ09ORklHX1ZHQV9TV0lUQ0hFUk9PPXkKQ09ORklHX0RSTT1tCkNPTkZJR19EUk1f TUlQSV9EU0k9eQpDT05GSUdfRFJNX0RQX0FVWF9DSEFSREVWPXkKQ09ORklHX0RSTV9FWFBPUlRf Rk9SX1RFU1RTPXkKQ09ORklHX0RSTV9ERUJVR19TRUxGVEVTVD1tCkNPTkZJR19EUk1fS01TX0hF TFBFUj1tCkNPTkZJR19EUk1fS01TX0ZCX0hFTFBFUj15CiMgQ09ORklHX0RSTV9ERUJVR19EUF9N U1RfVE9QT0xPR1lfUkVGUyBpcyBub3Qgc2V0CkNPTkZJR19EUk1fRkJERVZfRU1VTEFUSU9OPXkK Q09ORklHX0RSTV9GQkRFVl9PVkVSQUxMT0M9MTAwCiMgQ09ORklHX0RSTV9GQkRFVl9MRUFLX1BI WVNfU01FTSBpcyBub3Qgc2V0CkNPTkZJR19EUk1fTE9BRF9FRElEX0ZJUk1XQVJFPXkKIyBDT05G SUdfRFJNX0RQX0NFQyBpcyBub3Qgc2V0CkNPTkZJR19EUk1fVFRNPW0KQ09ORklHX0RSTV9UVE1f RE1BX1BBR0VfUE9PTD15CkNPTkZJR19EUk1fVlJBTV9IRUxQRVI9bQpDT05GSUdfRFJNX1RUTV9I RUxQRVI9bQpDT05GSUdfRFJNX0dFTV9TSE1FTV9IRUxQRVI9eQoKIwojIEkyQyBlbmNvZGVyIG9y IGhlbHBlciBjaGlwcwojCkNPTkZJR19EUk1fSTJDX0NINzAwNj1tCkNPTkZJR19EUk1fSTJDX1NJ TDE2ND1tCiMgQ09ORklHX0RSTV9JMkNfTlhQX1REQTk5OFggaXMgbm90IHNldAojIENPTkZJR19E Uk1fSTJDX05YUF9UREE5OTUwIGlzIG5vdCBzZXQKIyBlbmQgb2YgSTJDIGVuY29kZXIgb3IgaGVs cGVyIGNoaXBzCgojCiMgQVJNIGRldmljZXMKIwojIGVuZCBvZiBBUk0gZGV2aWNlcwoKIyBDT05G SUdfRFJNX1JBREVPTiBpcyBub3Qgc2V0CiMgQ09ORklHX0RSTV9BTURHUFUgaXMgbm90IHNldAoK IwojIEFDUCAoQXVkaW8gQ29Qcm9jZXNzb3IpIENvbmZpZ3VyYXRpb24KIwojIGVuZCBvZiBBQ1Ag KEF1ZGlvIENvUHJvY2Vzc29yKSBDb25maWd1cmF0aW9uCgojIENPTkZJR19EUk1fTk9VVkVBVSBp cyBub3Qgc2V0CkNPTkZJR19EUk1fSTkxNT1tCiMgQ09ORklHX0RSTV9JOTE1X0FMUEhBX1NVUFBP UlQgaXMgbm90IHNldApDT05GSUdfRFJNX0k5MTVfRk9SQ0VfUFJPQkU9IiIKQ09ORklHX0RSTV9J OTE1X0NBUFRVUkVfRVJST1I9eQpDT05GSUdfRFJNX0k5MTVfQ09NUFJFU1NfRVJST1I9eQpDT05G SUdfRFJNX0k5MTVfVVNFUlBUUj15CkNPTkZJR19EUk1fSTkxNV9HVlQ9eQpDT05GSUdfRFJNX0k5 MTVfR1ZUX0tWTUdUPW0KCiMKIyBkcm0vaTkxNSBEZWJ1Z2dpbmcKIwojIENPTkZJR19EUk1fSTkx NV9XRVJST1IgaXMgbm90IHNldAojIENPTkZJR19EUk1fSTkxNV9ERUJVRyBpcyBub3Qgc2V0CiMg Q09ORklHX0RSTV9JOTE1X0RFQlVHX01NSU8gaXMgbm90IHNldAojIENPTkZJR19EUk1fSTkxNV9T V19GRU5DRV9ERUJVR19PQkpFQ1RTIGlzIG5vdCBzZXQKIyBDT05GSUdfRFJNX0k5MTVfU1dfRkVO Q0VfQ0hFQ0tfREFHIGlzIG5vdCBzZXQKIyBDT05GSUdfRFJNX0k5MTVfREVCVUdfR1VDIGlzIG5v dCBzZXQKIyBDT05GSUdfRFJNX0k5MTVfU0VMRlRFU1QgaXMgbm90IHNldAojIENPTkZJR19EUk1f STkxNV9MT1dfTEVWRUxfVFJBQ0VQT0lOVFMgaXMgbm90IHNldAojIENPTkZJR19EUk1fSTkxNV9E RUJVR19WQkxBTktfRVZBREUgaXMgbm90IHNldAojIENPTkZJR19EUk1fSTkxNV9ERUJVR19SVU5U SU1FX1BNIGlzIG5vdCBzZXQKIyBlbmQgb2YgZHJtL2k5MTUgRGVidWdnaW5nCgojCiMgZHJtL2k5 MTUgUHJvZmlsZSBHdWlkZWQgT3B0aW1pc2F0aW9uCiMKQ09ORklHX0RSTV9JOTE1X1VTRVJGQVVM VF9BVVRPU1VTUEVORD0yNTAKQ09ORklHX0RSTV9JOTE1X0hFQVJUQkVBVF9JTlRFUlZBTD0yNTAw CkNPTkZJR19EUk1fSTkxNV9QUkVFTVBUX1RJTUVPVVQ9NjQwCkNPTkZJR19EUk1fSTkxNV9TUElO X1JFUVVFU1Q9NQpDT05GSUdfRFJNX0k5MTVfU1RPUF9USU1FT1VUPTEwMApDT05GSUdfRFJNX0k5 MTVfVElNRVNMSUNFX0RVUkFUSU9OPTEKIyBlbmQgb2YgZHJtL2k5MTUgUHJvZmlsZSBHdWlkZWQg T3B0aW1pc2F0aW9uCgpDT05GSUdfRFJNX1ZHRU09bQojIENPTkZJR19EUk1fVktNUyBpcyBub3Qg c2V0CkNPTkZJR19EUk1fVk1XR0ZYPW0KQ09ORklHX0RSTV9WTVdHRlhfRkJDT049eQpDT05GSUdf RFJNX0dNQTUwMD1tCkNPTkZJR19EUk1fR01BNjAwPXkKQ09ORklHX0RSTV9HTUEzNjAwPXkKQ09O RklHX0RSTV9VREw9bQpDT05GSUdfRFJNX0FTVD1tCkNPTkZJR19EUk1fTUdBRzIwMD1tCkNPTkZJ R19EUk1fQ0lSUlVTX1FFTVU9bQpDT05GSUdfRFJNX1FYTD1tCkNPTkZJR19EUk1fQk9DSFM9bQpD T05GSUdfRFJNX1ZJUlRJT19HUFU9bQpDT05GSUdfRFJNX1BBTkVMPXkKCiMKIyBEaXNwbGF5IFBh bmVscwojCiMgQ09ORklHX0RSTV9QQU5FTF9SQVNQQkVSUllQSV9UT1VDSFNDUkVFTiBpcyBub3Qg c2V0CiMgZW5kIG9mIERpc3BsYXkgUGFuZWxzCgpDT05GSUdfRFJNX0JSSURHRT15CkNPTkZJR19E Uk1fUEFORUxfQlJJREdFPXkKCiMKIyBEaXNwbGF5IEludGVyZmFjZSBCcmlkZ2VzCiMKIyBDT05G SUdfRFJNX0FOQUxPR0lYX0FOWDc4WFggaXMgbm90IHNldAojIGVuZCBvZiBEaXNwbGF5IEludGVy ZmFjZSBCcmlkZ2VzCgojIENPTkZJR19EUk1fRVROQVZJViBpcyBub3Qgc2V0CiMgQ09ORklHX0RS TV9HTTEyVTMyMCBpcyBub3Qgc2V0CiMgQ09ORklHX1RJTllEUk1fSFg4MzU3RCBpcyBub3Qgc2V0 CiMgQ09ORklHX1RJTllEUk1fSUxJOTIyNSBpcyBub3Qgc2V0CiMgQ09ORklHX1RJTllEUk1fSUxJ OTM0MSBpcyBub3Qgc2V0CiMgQ09ORklHX1RJTllEUk1fTUkwMjgzUVQgaXMgbm90IHNldAojIENP TkZJR19USU5ZRFJNX1JFUEFQRVIgaXMgbm90IHNldAojIENPTkZJR19USU5ZRFJNX1NUNzU4NiBp cyBub3Qgc2V0CiMgQ09ORklHX1RJTllEUk1fU1Q3NzM1UiBpcyBub3Qgc2V0CiMgQ09ORklHX0RS TV9YRU4gaXMgbm90IHNldAojIENPTkZJR19EUk1fVkJPWFZJREVPIGlzIG5vdCBzZXQKIyBDT05G SUdfRFJNX0xFR0FDWSBpcyBub3Qgc2V0CkNPTkZJR19EUk1fUEFORUxfT1JJRU5UQVRJT05fUVVJ UktTPXkKQ09ORklHX0RSTV9MSUJfUkFORE9NPXkKCiMKIyBGcmFtZSBidWZmZXIgRGV2aWNlcwoj CkNPTkZJR19GQl9DTURMSU5FPXkKQ09ORklHX0ZCX05PVElGWT15CkNPTkZJR19GQj15CiMgQ09O RklHX0ZJUk1XQVJFX0VESUQgaXMgbm90IHNldApDT05GSUdfRkJfQk9PVF9WRVNBX1NVUFBPUlQ9 eQpDT05GSUdfRkJfQ0ZCX0ZJTExSRUNUPXkKQ09ORklHX0ZCX0NGQl9DT1BZQVJFQT15CkNPTkZJ R19GQl9DRkJfSU1BR0VCTElUPXkKQ09ORklHX0ZCX1NZU19GSUxMUkVDVD1tCkNPTkZJR19GQl9T WVNfQ09QWUFSRUE9bQpDT05GSUdfRkJfU1lTX0lNQUdFQkxJVD1tCiMgQ09ORklHX0ZCX0ZPUkVJ R05fRU5ESUFOIGlzIG5vdCBzZXQKQ09ORklHX0ZCX1NZU19GT1BTPW0KQ09ORklHX0ZCX0RFRkVS UkVEX0lPPXkKIyBDT05GSUdfRkJfTU9ERV9IRUxQRVJTIGlzIG5vdCBzZXQKQ09ORklHX0ZCX1RJ TEVCTElUVElORz15CgojCiMgRnJhbWUgYnVmZmVyIGhhcmR3YXJlIGRyaXZlcnMKIwojIENPTkZJ R19GQl9DSVJSVVMgaXMgbm90IHNldAojIENPTkZJR19GQl9QTTIgaXMgbm90IHNldAojIENPTkZJ R19GQl9DWUJFUjIwMDAgaXMgbm90IHNldAojIENPTkZJR19GQl9BUkMgaXMgbm90IHNldAojIENP TkZJR19GQl9BU0lMSUFOVCBpcyBub3Qgc2V0CiMgQ09ORklHX0ZCX0lNU1RUIGlzIG5vdCBzZXQK IyBDT05GSUdfRkJfVkdBMTYgaXMgbm90IHNldAojIENPTkZJR19GQl9VVkVTQSBpcyBub3Qgc2V0 CkNPTkZJR19GQl9WRVNBPXkKQ09ORklHX0ZCX0VGST15CiMgQ09ORklHX0ZCX040MTEgaXMgbm90 IHNldAojIENPTkZJR19GQl9IR0EgaXMgbm90IHNldAojIENPTkZJR19GQl9PUEVOQ09SRVMgaXMg bm90IHNldAojIENPTkZJR19GQl9TMUQxM1hYWCBpcyBub3Qgc2V0CiMgQ09ORklHX0ZCX05WSURJ QSBpcyBub3Qgc2V0CiMgQ09ORklHX0ZCX1JJVkEgaXMgbm90IHNldAojIENPTkZJR19GQl9JNzQw IGlzIG5vdCBzZXQKIyBDT05GSUdfRkJfTEU4MDU3OCBpcyBub3Qgc2V0CiMgQ09ORklHX0ZCX0lO VEVMIGlzIG5vdCBzZXQKIyBDT05GSUdfRkJfTUFUUk9YIGlzIG5vdCBzZXQKIyBDT05GSUdfRkJf UkFERU9OIGlzIG5vdCBzZXQKIyBDT05GSUdfRkJfQVRZMTI4IGlzIG5vdCBzZXQKIyBDT05GSUdf RkJfQVRZIGlzIG5vdCBzZXQKIyBDT05GSUdfRkJfUzMgaXMgbm90IHNldAojIENPTkZJR19GQl9T QVZBR0UgaXMgbm90IHNldAojIENPTkZJR19GQl9TSVMgaXMgbm90IHNldAojIENPTkZJR19GQl9W SUEgaXMgbm90IHNldAojIENPTkZJR19GQl9ORU9NQUdJQyBpcyBub3Qgc2V0CiMgQ09ORklHX0ZC X0tZUk8gaXMgbm90IHNldAojIENPTkZJR19GQl8zREZYIGlzIG5vdCBzZXQKIyBDT05GSUdfRkJf Vk9PRE9PMSBpcyBub3Qgc2V0CiMgQ09ORklHX0ZCX1ZUODYyMyBpcyBub3Qgc2V0CiMgQ09ORklH X0ZCX1RSSURFTlQgaXMgbm90IHNldAojIENPTkZJR19GQl9BUksgaXMgbm90IHNldAojIENPTkZJ R19GQl9QTTMgaXMgbm90IHNldAojIENPTkZJR19GQl9DQVJNSU5FIGlzIG5vdCBzZXQKIyBDT05G SUdfRkJfU001MDEgaXMgbm90IHNldAojIENPTkZJR19GQl9TTVNDVUZYIGlzIG5vdCBzZXQKIyBD T05GSUdfRkJfVURMIGlzIG5vdCBzZXQKIyBDT05GSUdfRkJfSUJNX0dYVDQ1MDAgaXMgbm90IHNl dAojIENPTkZJR19GQl9WSVJUVUFMIGlzIG5vdCBzZXQKIyBDT05GSUdfWEVOX0ZCREVWX0ZST05U RU5EIGlzIG5vdCBzZXQKIyBDT05GSUdfRkJfTUVUUk9OT01FIGlzIG5vdCBzZXQKIyBDT05GSUdf RkJfTUI4NjJYWCBpcyBub3Qgc2V0CkNPTkZJR19GQl9IWVBFUlY9bQojIENPTkZJR19GQl9TSU1Q TEUgaXMgbm90IHNldAojIENPTkZJR19GQl9TTTcxMiBpcyBub3Qgc2V0CiMgZW5kIG9mIEZyYW1l IGJ1ZmZlciBEZXZpY2VzCgojCiMgQmFja2xpZ2h0ICYgTENEIGRldmljZSBzdXBwb3J0CiMKQ09O RklHX0xDRF9DTEFTU19ERVZJQ0U9bQojIENPTkZJR19MQ0RfTDRGMDAyNDJUMDMgaXMgbm90IHNl dAojIENPTkZJR19MQ0RfTE1TMjgzR0YwNSBpcyBub3Qgc2V0CiMgQ09ORklHX0xDRF9MVFYzNTBR ViBpcyBub3Qgc2V0CiMgQ09ORklHX0xDRF9JTEk5MjJYIGlzIG5vdCBzZXQKIyBDT05GSUdfTENE X0lMSTkzMjAgaXMgbm90IHNldAojIENPTkZJR19MQ0RfVERPMjRNIGlzIG5vdCBzZXQKIyBDT05G SUdfTENEX1ZHRzI0MzJBNCBpcyBub3Qgc2V0CkNPTkZJR19MQ0RfUExBVEZPUk09bQojIENPTkZJ R19MQ0RfQU1TMzY5RkcwNiBpcyBub3Qgc2V0CiMgQ09ORklHX0xDRF9MTVM1MDFLRjAzIGlzIG5v dCBzZXQKIyBDT05GSUdfTENEX0hYODM1NyBpcyBub3Qgc2V0CiMgQ09ORklHX0xDRF9PVE0zMjI1 QSBpcyBub3Qgc2V0CkNPTkZJR19CQUNLTElHSFRfQ0xBU1NfREVWSUNFPXkKIyBDT05GSUdfQkFD S0xJR0hUX0dFTkVSSUMgaXMgbm90IHNldAojIENPTkZJR19CQUNLTElHSFRfUFdNIGlzIG5vdCBz ZXQKQ09ORklHX0JBQ0tMSUdIVF9BUFBMRT1tCiMgQ09ORklHX0JBQ0tMSUdIVF9RQ09NX1dMRUQg aXMgbm90IHNldAojIENPTkZJR19CQUNLTElHSFRfU0FIQVJBIGlzIG5vdCBzZXQKIyBDT05GSUdf QkFDS0xJR0hUX0FEUDg4NjAgaXMgbm90IHNldAojIENPTkZJR19CQUNLTElHSFRfQURQODg3MCBp cyBub3Qgc2V0CiMgQ09ORklHX0JBQ0tMSUdIVF9MTTM2MzBBIGlzIG5vdCBzZXQKIyBDT05GSUdf QkFDS0xJR0hUX0xNMzYzOSBpcyBub3Qgc2V0CkNPTkZJR19CQUNLTElHSFRfTFA4NTVYPW0KIyBD T05GSUdfQkFDS0xJR0hUX0dQSU8gaXMgbm90IHNldAojIENPTkZJR19CQUNLTElHSFRfTFY1MjA3 TFAgaXMgbm90IHNldAojIENPTkZJR19CQUNLTElHSFRfQkQ2MTA3IGlzIG5vdCBzZXQKIyBDT05G SUdfQkFDS0xJR0hUX0FSQ1hDTk4gaXMgbm90IHNldAojIGVuZCBvZiBCYWNrbGlnaHQgJiBMQ0Qg ZGV2aWNlIHN1cHBvcnQKCkNPTkZJR19IRE1JPXkKCiMKIyBDb25zb2xlIGRpc3BsYXkgZHJpdmVy IHN1cHBvcnQKIwpDT05GSUdfVkdBX0NPTlNPTEU9eQpDT05GSUdfVkdBQ09OX1NPRlRfU0NST0xM QkFDSz15CkNPTkZJR19WR0FDT05fU09GVF9TQ1JPTExCQUNLX1NJWkU9NjQKIyBDT05GSUdfVkdB Q09OX1NPRlRfU0NST0xMQkFDS19QRVJTSVNURU5UX0VOQUJMRV9CWV9ERUZBVUxUIGlzIG5vdCBz ZXQKQ09ORklHX0RVTU1ZX0NPTlNPTEU9eQpDT05GSUdfRFVNTVlfQ09OU09MRV9DT0xVTU5TPTgw CkNPTkZJR19EVU1NWV9DT05TT0xFX1JPV1M9MjUKQ09ORklHX0ZSQU1FQlVGRkVSX0NPTlNPTEU9 eQpDT05GSUdfRlJBTUVCVUZGRVJfQ09OU09MRV9ERVRFQ1RfUFJJTUFSWT15CkNPTkZJR19GUkFN RUJVRkZFUl9DT05TT0xFX1JPVEFUSU9OPXkKIyBDT05GSUdfRlJBTUVCVUZGRVJfQ09OU09MRV9E RUZFUlJFRF9UQUtFT1ZFUiBpcyBub3Qgc2V0CiMgZW5kIG9mIENvbnNvbGUgZGlzcGxheSBkcml2 ZXIgc3VwcG9ydAoKQ09ORklHX0xPR089eQojIENPTkZJR19MT0dPX0xJTlVYX01PTk8gaXMgbm90 IHNldAojIENPTkZJR19MT0dPX0xJTlVYX1ZHQTE2IGlzIG5vdCBzZXQKQ09ORklHX0xPR09fTElO VVhfQ0xVVDIyND15CiMgZW5kIG9mIEdyYXBoaWNzIHN1cHBvcnQKCkNPTkZJR19TT1VORD1tCkNP TkZJR19TT1VORF9PU1NfQ09SRT15CkNPTkZJR19TT1VORF9PU1NfQ09SRV9QUkVDTEFJTT15CkNP TkZJR19TTkQ9bQpDT05GSUdfU05EX1RJTUVSPW0KQ09ORklHX1NORF9QQ009bQpDT05GSUdfU05E X1BDTV9FTEQ9eQpDT05GSUdfU05EX0hXREVQPW0KQ09ORklHX1NORF9TRVFfREVWSUNFPW0KQ09O RklHX1NORF9SQVdNSURJPW0KQ09ORklHX1NORF9DT01QUkVTU19PRkZMT0FEPW0KQ09ORklHX1NO RF9KQUNLPXkKQ09ORklHX1NORF9KQUNLX0lOUFVUX0RFVj15CkNPTkZJR19TTkRfT1NTRU1VTD15 CiMgQ09ORklHX1NORF9NSVhFUl9PU1MgaXMgbm90IHNldAojIENPTkZJR19TTkRfUENNX09TUyBp cyBub3Qgc2V0CkNPTkZJR19TTkRfUENNX1RJTUVSPXkKQ09ORklHX1NORF9IUlRJTUVSPW0KQ09O RklHX1NORF9EWU5BTUlDX01JTk9SUz15CkNPTkZJR19TTkRfTUFYX0NBUkRTPTMyCiMgQ09ORklH X1NORF9TVVBQT1JUX09MRF9BUEkgaXMgbm90IHNldApDT05GSUdfU05EX1BST0NfRlM9eQpDT05G SUdfU05EX1ZFUkJPU0VfUFJPQ0ZTPXkKIyBDT05GSUdfU05EX1ZFUkJPU0VfUFJJTlRLIGlzIG5v dCBzZXQKIyBDT05GSUdfU05EX0RFQlVHIGlzIG5vdCBzZXQKQ09ORklHX1NORF9WTUFTVEVSPXkK Q09ORklHX1NORF9ETUFfU0dCVUY9eQpDT05GSUdfU05EX1NFUVVFTkNFUj1tCkNPTkZJR19TTkRf U0VRX0RVTU1ZPW0KQ09ORklHX1NORF9TRVFVRU5DRVJfT1NTPW0KQ09ORklHX1NORF9TRVFfSFJU SU1FUl9ERUZBVUxUPXkKQ09ORklHX1NORF9TRVFfTUlESV9FVkVOVD1tCkNPTkZJR19TTkRfU0VR X01JREk9bQpDT05GSUdfU05EX1NFUV9NSURJX0VNVUw9bQpDT05GSUdfU05EX1NFUV9WSVJNSURJ PW0KQ09ORklHX1NORF9NUFU0MDFfVUFSVD1tCkNPTkZJR19TTkRfT1BMM19MSUI9bQpDT05GSUdf U05EX09QTDNfTElCX1NFUT1tCkNPTkZJR19TTkRfVlhfTElCPW0KQ09ORklHX1NORF9BQzk3X0NP REVDPW0KQ09ORklHX1NORF9EUklWRVJTPXkKQ09ORklHX1NORF9QQ1NQPW0KQ09ORklHX1NORF9E VU1NWT1tCkNPTkZJR19TTkRfQUxPT1A9bQpDT05GSUdfU05EX1ZJUk1JREk9bQpDT05GSUdfU05E X01UUEFWPW0KIyBDT05GSUdfU05EX01UUzY0IGlzIG5vdCBzZXQKIyBDT05GSUdfU05EX1NFUklB TF9VMTY1NTAgaXMgbm90IHNldApDT05GSUdfU05EX01QVTQwMT1tCiMgQ09ORklHX1NORF9QT1JU TUFOMlg0IGlzIG5vdCBzZXQKQ09ORklHX1NORF9BQzk3X1BPV0VSX1NBVkU9eQpDT05GSUdfU05E X0FDOTdfUE9XRVJfU0FWRV9ERUZBVUxUPTUKQ09ORklHX1NORF9QQ0k9eQpDT05GSUdfU05EX0FE MTg4OT1tCiMgQ09ORklHX1NORF9BTFMzMDAgaXMgbm90IHNldAojIENPTkZJR19TTkRfQUxTNDAw MCBpcyBub3Qgc2V0CkNPTkZJR19TTkRfQUxJNTQ1MT1tCkNPTkZJR19TTkRfQVNJSFBJPW0KQ09O RklHX1NORF9BVElJWFA9bQpDT05GSUdfU05EX0FUSUlYUF9NT0RFTT1tCkNPTkZJR19TTkRfQVU4 ODEwPW0KQ09ORklHX1NORF9BVTg4MjA9bQpDT05GSUdfU05EX0FVODgzMD1tCiMgQ09ORklHX1NO RF9BVzIgaXMgbm90IHNldAojIENPTkZJR19TTkRfQVpUMzMyOCBpcyBub3Qgc2V0CkNPTkZJR19T TkRfQlQ4N1g9bQojIENPTkZJR19TTkRfQlQ4N1hfT1ZFUkNMT0NLIGlzIG5vdCBzZXQKQ09ORklH X1NORF9DQTAxMDY9bQpDT05GSUdfU05EX0NNSVBDST1tCkNPTkZJR19TTkRfT1hZR0VOX0xJQj1t CkNPTkZJR19TTkRfT1hZR0VOPW0KIyBDT05GSUdfU05EX0NTNDI4MSBpcyBub3Qgc2V0CkNPTkZJ R19TTkRfQ1M0NlhYPW0KQ09ORklHX1NORF9DUzQ2WFhfTkVXX0RTUD15CkNPTkZJR19TTkRfQ1RY Rkk9bQpDT05GSUdfU05EX0RBUkxBMjA9bQpDT05GSUdfU05EX0dJTkEyMD1tCkNPTkZJR19TTkRf TEFZTEEyMD1tCkNPTkZJR19TTkRfREFSTEEyND1tCkNPTkZJR19TTkRfR0lOQTI0PW0KQ09ORklH X1NORF9MQVlMQTI0PW0KQ09ORklHX1NORF9NT05BPW0KQ09ORklHX1NORF9NSUE9bQpDT05GSUdf U05EX0VDSE8zRz1tCkNPTkZJR19TTkRfSU5ESUdPPW0KQ09ORklHX1NORF9JTkRJR09JTz1tCkNP TkZJR19TTkRfSU5ESUdPREo9bQpDT05GSUdfU05EX0lORElHT0lPWD1tCkNPTkZJR19TTkRfSU5E SUdPREpYPW0KQ09ORklHX1NORF9FTVUxMEsxPW0KQ09ORklHX1NORF9FTVUxMEsxX1NFUT1tCkNP TkZJR19TTkRfRU1VMTBLMVg9bQpDT05GSUdfU05EX0VOUzEzNzA9bQpDT05GSUdfU05EX0VOUzEz NzE9bQojIENPTkZJR19TTkRfRVMxOTM4IGlzIG5vdCBzZXQKQ09ORklHX1NORF9FUzE5Njg9bQpD T05GSUdfU05EX0VTMTk2OF9JTlBVVD15CkNPTkZJR19TTkRfRVMxOTY4X1JBRElPPXkKIyBDT05G SUdfU05EX0ZNODAxIGlzIG5vdCBzZXQKQ09ORklHX1NORF9IRFNQPW0KQ09ORklHX1NORF9IRFNQ TT1tCkNPTkZJR19TTkRfSUNFMTcxMj1tCkNPTkZJR19TTkRfSUNFMTcyND1tCkNPTkZJR19TTkRf SU5URUw4WDA9bQpDT05GSUdfU05EX0lOVEVMOFgwTT1tCkNPTkZJR19TTkRfS09SRzEyMTI9bQpD T05GSUdfU05EX0xPTEE9bQpDT05GSUdfU05EX0xYNjQ2NEVTPW0KQ09ORklHX1NORF9NQUVTVFJP Mz1tCkNPTkZJR19TTkRfTUFFU1RSTzNfSU5QVVQ9eQpDT05GSUdfU05EX01JWEFSVD1tCiMgQ09O RklHX1NORF9OTTI1NiBpcyBub3Qgc2V0CkNPTkZJR19TTkRfUENYSFI9bQojIENPTkZJR19TTkRf UklQVElERSBpcyBub3Qgc2V0CkNPTkZJR19TTkRfUk1FMzI9bQpDT05GSUdfU05EX1JNRTk2PW0K Q09ORklHX1NORF9STUU5NjUyPW0KIyBDT05GSUdfU05EX1NPTklDVklCRVMgaXMgbm90IHNldApD T05GSUdfU05EX1RSSURFTlQ9bQpDT05GSUdfU05EX1ZJQTgyWFg9bQpDT05GSUdfU05EX1ZJQTgy WFhfTU9ERU09bQpDT05GSUdfU05EX1ZJUlRVT1NPPW0KQ09ORklHX1NORF9WWDIyMj1tCiMgQ09O RklHX1NORF9ZTUZQQ0kgaXMgbm90IHNldAoKIwojIEhELUF1ZGlvCiMKQ09ORklHX1NORF9IREE9 bQpDT05GSUdfU05EX0hEQV9JTlRFTD1tCkNPTkZJR19TTkRfSERBX0hXREVQPXkKQ09ORklHX1NO RF9IREFfUkVDT05GSUc9eQpDT05GSUdfU05EX0hEQV9JTlBVVF9CRUVQPXkKQ09ORklHX1NORF9I REFfSU5QVVRfQkVFUF9NT0RFPTAKQ09ORklHX1NORF9IREFfUEFUQ0hfTE9BREVSPXkKQ09ORklH X1NORF9IREFfQ09ERUNfUkVBTFRFSz1tCkNPTkZJR19TTkRfSERBX0NPREVDX0FOQUxPRz1tCkNP TkZJR19TTkRfSERBX0NPREVDX1NJR01BVEVMPW0KQ09ORklHX1NORF9IREFfQ09ERUNfVklBPW0K Q09ORklHX1NORF9IREFfQ09ERUNfSERNST1tCkNPTkZJR19TTkRfSERBX0NPREVDX0NJUlJVUz1t CkNPTkZJR19TTkRfSERBX0NPREVDX0NPTkVYQU5UPW0KQ09ORklHX1NORF9IREFfQ09ERUNfQ0Ew MTEwPW0KQ09ORklHX1NORF9IREFfQ09ERUNfQ0EwMTMyPW0KQ09ORklHX1NORF9IREFfQ09ERUNf Q0EwMTMyX0RTUD15CkNPTkZJR19TTkRfSERBX0NPREVDX0NNRURJQT1tCkNPTkZJR19TTkRfSERB X0NPREVDX1NJMzA1ND1tCkNPTkZJR19TTkRfSERBX0dFTkVSSUM9bQpDT05GSUdfU05EX0hEQV9Q T1dFUl9TQVZFX0RFRkFVTFQ9MAojIGVuZCBvZiBIRC1BdWRpbwoKQ09ORklHX1NORF9IREFfQ09S RT1tCkNPTkZJR19TTkRfSERBX0RTUF9MT0FERVI9eQpDT05GSUdfU05EX0hEQV9DT01QT05FTlQ9 eQpDT05GSUdfU05EX0hEQV9JOTE1PXkKQ09ORklHX1NORF9IREFfRVhUX0NPUkU9bQpDT05GSUdf U05EX0hEQV9QUkVBTExPQ19TSVpFPTAKQ09ORklHX1NORF9JTlRFTF9OSExUPXkKQ09ORklHX1NO RF9JTlRFTF9EU1BfQ09ORklHPW0KIyBDT05GSUdfU05EX1NQSSBpcyBub3Qgc2V0CkNPTkZJR19T TkRfVVNCPXkKQ09ORklHX1NORF9VU0JfQVVESU89bQpDT05GSUdfU05EX1VTQl9BVURJT19VU0Vf TUVESUFfQ09OVFJPTExFUj15CkNPTkZJR19TTkRfVVNCX1VBMTAxPW0KQ09ORklHX1NORF9VU0Jf VVNYMlk9bQpDT05GSUdfU05EX1VTQl9DQUlBUT1tCkNPTkZJR19TTkRfVVNCX0NBSUFRX0lOUFVU PXkKQ09ORklHX1NORF9VU0JfVVMxMjJMPW0KQ09ORklHX1NORF9VU0JfNkZJUkU9bQpDT05GSUdf U05EX1VTQl9ISUZBQ0U9bQpDT05GSUdfU05EX0JDRDIwMDA9bQpDT05GSUdfU05EX1VTQl9MSU5F Nj1tCkNPTkZJR19TTkRfVVNCX1BPRD1tCkNPTkZJR19TTkRfVVNCX1BPREhEPW0KQ09ORklHX1NO RF9VU0JfVE9ORVBPUlQ9bQpDT05GSUdfU05EX1VTQl9WQVJJQVg9bQpDT05GSUdfU05EX0ZJUkVX SVJFPXkKQ09ORklHX1NORF9GSVJFV0lSRV9MSUI9bQojIENPTkZJR19TTkRfRElDRSBpcyBub3Qg c2V0CiMgQ09ORklHX1NORF9PWEZXIGlzIG5vdCBzZXQKQ09ORklHX1NORF9JU0lHSFQ9bQojIENP TkZJR19TTkRfRklSRVdPUktTIGlzIG5vdCBzZXQKIyBDT05GSUdfU05EX0JFQk9CIGlzIG5vdCBz ZXQKIyBDT05GSUdfU05EX0ZJUkVXSVJFX0RJR0kwMFggaXMgbm90IHNldAojIENPTkZJR19TTkRf RklSRVdJUkVfVEFTQ0FNIGlzIG5vdCBzZXQKIyBDT05GSUdfU05EX0ZJUkVXSVJFX01PVFUgaXMg bm90IHNldAojIENPTkZJR19TTkRfRklSRUZBQ0UgaXMgbm90IHNldApDT05GSUdfU05EX1NPQz1t CkNPTkZJR19TTkRfU09DX0NPTVBSRVNTPXkKQ09ORklHX1NORF9TT0NfVE9QT0xPR1k9eQpDT05G SUdfU05EX1NPQ19BQ1BJPW0KIyBDT05GSUdfU05EX1NPQ19BTURfQUNQIGlzIG5vdCBzZXQKIyBD T05GSUdfU05EX1NPQ19BTURfQUNQM3ggaXMgbm90IHNldAojIENPTkZJR19TTkRfQVRNRUxfU09D IGlzIG5vdCBzZXQKIyBDT05GSUdfU05EX0RFU0lHTldBUkVfSTJTIGlzIG5vdCBzZXQKCiMKIyBT b0MgQXVkaW8gZm9yIEZyZWVzY2FsZSBDUFVzCiMKCiMKIyBDb21tb24gU29DIEF1ZGlvIG9wdGlv bnMgZm9yIEZyZWVzY2FsZSBDUFVzOgojCiMgQ09ORklHX1NORF9TT0NfRlNMX0FTUkMgaXMgbm90 IHNldAojIENPTkZJR19TTkRfU09DX0ZTTF9TQUkgaXMgbm90IHNldAojIENPTkZJR19TTkRfU09D X0ZTTF9BVURNSVggaXMgbm90IHNldAojIENPTkZJR19TTkRfU09DX0ZTTF9TU0kgaXMgbm90IHNl dAojIENPTkZJR19TTkRfU09DX0ZTTF9TUERJRiBpcyBub3Qgc2V0CiMgQ09ORklHX1NORF9TT0Nf RlNMX0VTQUkgaXMgbm90IHNldAojIENPTkZJR19TTkRfU09DX0ZTTF9NSUNGSUwgaXMgbm90IHNl dAojIENPTkZJR19TTkRfU09DX0lNWF9BVURNVVggaXMgbm90IHNldAojIGVuZCBvZiBTb0MgQXVk aW8gZm9yIEZyZWVzY2FsZSBDUFVzCgojIENPTkZJR19TTkRfSTJTX0hJNjIxMF9JMlMgaXMgbm90 IHNldAojIENPTkZJR19TTkRfU09DX0lNRyBpcyBub3Qgc2V0CkNPTkZJR19TTkRfU09DX0lOVEVM X1NTVF9UT1BMRVZFTD15CkNPTkZJR19TTkRfU1NUX0lQQz1tCkNPTkZJR19TTkRfU1NUX0lQQ19B Q1BJPW0KQ09ORklHX1NORF9TT0NfSU5URUxfU1NUX0FDUEk9bQpDT05GSUdfU05EX1NPQ19JTlRF TF9TU1Q9bQpDT05GSUdfU05EX1NPQ19JTlRFTF9TU1RfRklSTVdBUkU9bQpDT05GSUdfU05EX1NP Q19JTlRFTF9IQVNXRUxMPW0KQ09ORklHX1NORF9TU1RfQVRPTV9ISUZJMl9QTEFURk9STT1tCiMg Q09ORklHX1NORF9TU1RfQVRPTV9ISUZJMl9QTEFURk9STV9QQ0kgaXMgbm90IHNldApDT05GSUdf U05EX1NTVF9BVE9NX0hJRkkyX1BMQVRGT1JNX0FDUEk9bQpDT05GSUdfU05EX1NPQ19JTlRFTF9T S1lMQUtFPW0KQ09ORklHX1NORF9TT0NfSU5URUxfU0tMPW0KQ09ORklHX1NORF9TT0NfSU5URUxf QVBMPW0KQ09ORklHX1NORF9TT0NfSU5URUxfS0JMPW0KQ09ORklHX1NORF9TT0NfSU5URUxfR0xL PW0KQ09ORklHX1NORF9TT0NfSU5URUxfQ05MPW0KQ09ORklHX1NORF9TT0NfSU5URUxfQ0ZMPW0K IyBDT05GSUdfU05EX1NPQ19JTlRFTF9DTUxfSCBpcyBub3Qgc2V0CiMgQ09ORklHX1NORF9TT0Nf SU5URUxfQ01MX0xQIGlzIG5vdCBzZXQKQ09ORklHX1NORF9TT0NfSU5URUxfU0tZTEFLRV9GQU1J TFk9bQpDT05GSUdfU05EX1NPQ19JTlRFTF9TS1lMQUtFX1NTUF9DTEs9bQojIENPTkZJR19TTkRf U09DX0lOVEVMX1NLWUxBS0VfSERBVURJT19DT0RFQyBpcyBub3Qgc2V0CkNPTkZJR19TTkRfU09D X0lOVEVMX1NLWUxBS0VfQ09NTU9OPW0KQ09ORklHX1NORF9TT0NfQUNQSV9JTlRFTF9NQVRDSD1t CkNPTkZJR19TTkRfU09DX0lOVEVMX01BQ0g9eQojIENPTkZJR19TTkRfU09DX0lOVEVMX1VTRVJf RlJJRU5ETFlfTE9OR19OQU1FUyBpcyBub3Qgc2V0CkNPTkZJR19TTkRfU09DX0lOVEVMX0hBU1dF TExfTUFDSD1tCiMgQ09ORklHX1NORF9TT0NfSU5URUxfQkRXX1JUNTY1MF9NQUNIIGlzIG5vdCBz ZXQKQ09ORklHX1NORF9TT0NfSU5URUxfQkRXX1JUNTY3N19NQUNIPW0KQ09ORklHX1NORF9TT0Nf SU5URUxfQlJPQURXRUxMX01BQ0g9bQpDT05GSUdfU05EX1NPQ19JTlRFTF9CWVRDUl9SVDU2NDBf TUFDSD1tCkNPTkZJR19TTkRfU09DX0lOVEVMX0JZVENSX1JUNTY1MV9NQUNIPW0KQ09ORklHX1NO RF9TT0NfSU5URUxfQ0hUX0JTV19SVDU2NzJfTUFDSD1tCkNPTkZJR19TTkRfU09DX0lOVEVMX0NI VF9CU1dfUlQ1NjQ1X01BQ0g9bQpDT05GSUdfU05EX1NPQ19JTlRFTF9DSFRfQlNXX01BWDk4MDkw X1RJX01BQ0g9bQojIENPTkZJR19TTkRfU09DX0lOVEVMX0NIVF9CU1dfTkFVODgyNF9NQUNIIGlz IG5vdCBzZXQKIyBDT05GSUdfU05EX1NPQ19JTlRFTF9CWVRfQ0hUX0NYMjA3MlhfTUFDSCBpcyBu b3Qgc2V0CkNPTkZJR19TTkRfU09DX0lOVEVMX0JZVF9DSFRfREE3MjEzX01BQ0g9bQpDT05GSUdf U05EX1NPQ19JTlRFTF9CWVRfQ0hUX0VTODMxNl9NQUNIPW0KQ09ORklHX1NORF9TT0NfSU5URUxf QllUX0NIVF9OT0NPREVDX01BQ0g9bQpDT05GSUdfU05EX1NPQ19JTlRFTF9TS0xfUlQyODZfTUFD SD1tCkNPTkZJR19TTkRfU09DX0lOVEVMX1NLTF9OQVU4OEwyNV9TU000NTY3X01BQ0g9bQpDT05G SUdfU05EX1NPQ19JTlRFTF9TS0xfTkFVODhMMjVfTUFYOTgzNTdBX01BQ0g9bQpDT05GSUdfU05E X1NPQ19JTlRFTF9EQTcyMTlfTUFYOTgzNTdBX0dFTkVSSUM9bQpDT05GSUdfU05EX1NPQ19JTlRF TF9CWFRfREE3MjE5X01BWDk4MzU3QV9DT01NT049bQpDT05GSUdfU05EX1NPQ19JTlRFTF9CWFRf REE3MjE5X01BWDk4MzU3QV9NQUNIPW0KQ09ORklHX1NORF9TT0NfSU5URUxfQlhUX1JUMjk4X01B Q0g9bQpDT05GSUdfU05EX1NPQ19JTlRFTF9LQkxfUlQ1NjYzX01BWDk4OTI3X01BQ0g9bQpDT05G SUdfU05EX1NPQ19JTlRFTF9LQkxfUlQ1NjYzX1JUNTUxNF9NQVg5ODkyN19NQUNIPW0KIyBDT05G SUdfU05EX1NPQ19JTlRFTF9LQkxfREE3MjE5X01BWDk4MzU3QV9NQUNIIGlzIG5vdCBzZXQKIyBD T05GSUdfU05EX1NPQ19JTlRFTF9LQkxfREE3MjE5X01BWDk4OTI3X01BQ0ggaXMgbm90IHNldAoj IENPTkZJR19TTkRfU09DX0lOVEVMX0tCTF9SVDU2NjBfTUFDSCBpcyBub3Qgc2V0CiMgQ09ORklH X1NORF9TT0NfTVRLX0JUQ1ZTRCBpcyBub3Qgc2V0CiMgQ09ORklHX1NORF9TT0NfU09GX1RPUExF VkVMIGlzIG5vdCBzZXQKCiMKIyBTVE1pY3JvZWxlY3Ryb25pY3MgU1RNMzIgU09DIGF1ZGlvIHN1 cHBvcnQKIwojIGVuZCBvZiBTVE1pY3JvZWxlY3Ryb25pY3MgU1RNMzIgU09DIGF1ZGlvIHN1cHBv cnQKCiMgQ09ORklHX1NORF9TT0NfWElMSU5YX0kyUyBpcyBub3Qgc2V0CiMgQ09ORklHX1NORF9T T0NfWElMSU5YX0FVRElPX0ZPUk1BVFRFUiBpcyBub3Qgc2V0CiMgQ09ORklHX1NORF9TT0NfWElM SU5YX1NQRElGIGlzIG5vdCBzZXQKIyBDT05GSUdfU05EX1NPQ19YVEZQR0FfSTJTIGlzIG5vdCBz ZXQKIyBDT05GSUdfWlhfVERNIGlzIG5vdCBzZXQKQ09ORklHX1NORF9TT0NfSTJDX0FORF9TUEk9 bQoKIwojIENPREVDIGRyaXZlcnMKIwojIENPTkZJR19TTkRfU09DX0FDOTdfQ09ERUMgaXMgbm90 IHNldAojIENPTkZJR19TTkRfU09DX0FEQVUxNzAxIGlzIG5vdCBzZXQKIyBDT05GSUdfU05EX1NP Q19BREFVMTc2MV9JMkMgaXMgbm90IHNldAojIENPTkZJR19TTkRfU09DX0FEQVUxNzYxX1NQSSBp cyBub3Qgc2V0CiMgQ09ORklHX1NORF9TT0NfQURBVTcwMDIgaXMgbm90IHNldAojIENPTkZJR19T TkRfU09DX0FEQVU3MTE4X0hXIGlzIG5vdCBzZXQKIyBDT05GSUdfU05EX1NPQ19BREFVNzExOF9J MkMgaXMgbm90IHNldAojIENPTkZJR19TTkRfU09DX0FLNDEwNCBpcyBub3Qgc2V0CiMgQ09ORklH X1NORF9TT0NfQUs0MTE4IGlzIG5vdCBzZXQKIyBDT05GSUdfU05EX1NPQ19BSzQ0NTggaXMgbm90 IHNldAojIENPTkZJR19TTkRfU09DX0FLNDU1NCBpcyBub3Qgc2V0CiMgQ09ORklHX1NORF9TT0Nf QUs0NjEzIGlzIG5vdCBzZXQKIyBDT05GSUdfU05EX1NPQ19BSzQ2NDIgaXMgbm90IHNldAojIENP TkZJR19TTkRfU09DX0FLNTM4NiBpcyBub3Qgc2V0CiMgQ09ORklHX1NORF9TT0NfQUs1NTU4IGlz IG5vdCBzZXQKIyBDT05GSUdfU05EX1NPQ19BTEM1NjIzIGlzIG5vdCBzZXQKIyBDT05GSUdfU05E X1NPQ19CRDI4NjIzIGlzIG5vdCBzZXQKIyBDT05GSUdfU05EX1NPQ19CVF9TQ08gaXMgbm90IHNl dAojIENPTkZJR19TTkRfU09DX0NTMzVMMzIgaXMgbm90IHNldAojIENPTkZJR19TTkRfU09DX0NT MzVMMzMgaXMgbm90IHNldAojIENPTkZJR19TTkRfU09DX0NTMzVMMzQgaXMgbm90IHNldAojIENP TkZJR19TTkRfU09DX0NTMzVMMzUgaXMgbm90IHNldAojIENPTkZJR19TTkRfU09DX0NTMzVMMzYg aXMgbm90IHNldAojIENPTkZJR19TTkRfU09DX0NTNDJMNDIgaXMgbm90IHNldAojIENPTkZJR19T TkRfU09DX0NTNDJMNTFfSTJDIGlzIG5vdCBzZXQKIyBDT05GSUdfU05EX1NPQ19DUzQyTDUyIGlz IG5vdCBzZXQKIyBDT05GSUdfU05EX1NPQ19DUzQyTDU2IGlzIG5vdCBzZXQKIyBDT05GSUdfU05E X1NPQ19DUzQyTDczIGlzIG5vdCBzZXQKIyBDT05GSUdfU05EX1NPQ19DUzQyNjUgaXMgbm90IHNl dAojIENPTkZJR19TTkRfU09DX0NTNDI3MCBpcyBub3Qgc2V0CiMgQ09ORklHX1NORF9TT0NfQ1M0 MjcxX0kyQyBpcyBub3Qgc2V0CiMgQ09ORklHX1NORF9TT0NfQ1M0MjcxX1NQSSBpcyBub3Qgc2V0 CiMgQ09ORklHX1NORF9TT0NfQ1M0MlhYOF9JMkMgaXMgbm90IHNldAojIENPTkZJR19TTkRfU09D X0NTNDMxMzAgaXMgbm90IHNldAojIENPTkZJR19TTkRfU09DX0NTNDM0MSBpcyBub3Qgc2V0CiMg Q09ORklHX1NORF9TT0NfQ1M0MzQ5IGlzIG5vdCBzZXQKIyBDT05GSUdfU05EX1NPQ19DUzUzTDMw IGlzIG5vdCBzZXQKIyBDT05GSUdfU05EX1NPQ19DWDIwNzJYIGlzIG5vdCBzZXQKQ09ORklHX1NO RF9TT0NfREE3MjEzPW0KQ09ORklHX1NORF9TT0NfREE3MjE5PW0KQ09ORklHX1NORF9TT0NfRE1J Qz1tCiMgQ09ORklHX1NORF9TT0NfRVM3MTM0IGlzIG5vdCBzZXQKIyBDT05GSUdfU05EX1NPQ19F UzcyNDEgaXMgbm90IHNldApDT05GSUdfU05EX1NPQ19FUzgzMTY9bQojIENPTkZJR19TTkRfU09D X0VTODMyOF9JMkMgaXMgbm90IHNldAojIENPTkZJR19TTkRfU09DX0VTODMyOF9TUEkgaXMgbm90 IHNldAojIENPTkZJR19TTkRfU09DX0dUTTYwMSBpcyBub3Qgc2V0CkNPTkZJR19TTkRfU09DX0hE QUNfSERNST1tCiMgQ09ORklHX1NORF9TT0NfSU5OT19SSzMwMzYgaXMgbm90IHNldAojIENPTkZJ R19TTkRfU09DX01BWDk4MDg4IGlzIG5vdCBzZXQKQ09ORklHX1NORF9TT0NfTUFYOTgwOTA9bQpD T05GSUdfU05EX1NPQ19NQVg5ODM1N0E9bQojIENPTkZJR19TTkRfU09DX01BWDk4NTA0IGlzIG5v dCBzZXQKIyBDT05GSUdfU05EX1NPQ19NQVg5ODY3IGlzIG5vdCBzZXQKQ09ORklHX1NORF9TT0Nf TUFYOTg5Mjc9bQojIENPTkZJR19TTkRfU09DX01BWDk4MzczIGlzIG5vdCBzZXQKIyBDT05GSUdf U05EX1NPQ19NQVg5ODYwIGlzIG5vdCBzZXQKIyBDT05GSUdfU05EX1NPQ19NU004OTE2X1dDRF9E SUdJVEFMIGlzIG5vdCBzZXQKIyBDT05GSUdfU05EX1NPQ19QQ00xNjgxIGlzIG5vdCBzZXQKIyBD T05GSUdfU05EX1NPQ19QQ00xNzg5X0kyQyBpcyBub3Qgc2V0CiMgQ09ORklHX1NORF9TT0NfUENN MTc5WF9JMkMgaXMgbm90IHNldAojIENPTkZJR19TTkRfU09DX1BDTTE3OVhfU1BJIGlzIG5vdCBz ZXQKIyBDT05GSUdfU05EX1NPQ19QQ00xODZYX0kyQyBpcyBub3Qgc2V0CiMgQ09ORklHX1NORF9T T0NfUENNMTg2WF9TUEkgaXMgbm90IHNldAojIENPTkZJR19TTkRfU09DX1BDTTMwNjBfSTJDIGlz IG5vdCBzZXQKIyBDT05GSUdfU05EX1NPQ19QQ00zMDYwX1NQSSBpcyBub3Qgc2V0CiMgQ09ORklH X1NORF9TT0NfUENNMzE2OEFfSTJDIGlzIG5vdCBzZXQKIyBDT05GSUdfU05EX1NPQ19QQ00zMTY4 QV9TUEkgaXMgbm90IHNldAojIENPTkZJR19TTkRfU09DX1BDTTUxMnhfSTJDIGlzIG5vdCBzZXQK IyBDT05GSUdfU05EX1NPQ19QQ001MTJ4X1NQSSBpcyBub3Qgc2V0CiMgQ09ORklHX1NORF9TT0Nf UkszMzI4IGlzIG5vdCBzZXQKQ09ORklHX1NORF9TT0NfUkw2MjMxPW0KQ09ORklHX1NORF9TT0Nf Ukw2MzQ3QT1tCkNPTkZJR19TTkRfU09DX1JUMjg2PW0KQ09ORklHX1NORF9TT0NfUlQyOTg9bQpD T05GSUdfU05EX1NPQ19SVDU1MTQ9bQpDT05GSUdfU05EX1NPQ19SVDU1MTRfU1BJPW0KIyBDT05G SUdfU05EX1NPQ19SVDU2MTYgaXMgbm90IHNldAojIENPTkZJR19TTkRfU09DX1JUNTYzMSBpcyBu b3Qgc2V0CkNPTkZJR19TTkRfU09DX1JUNTY0MD1tCkNPTkZJR19TTkRfU09DX1JUNTY0NT1tCkNP TkZJR19TTkRfU09DX1JUNTY1MT1tCkNPTkZJR19TTkRfU09DX1JUNTY2Mz1tCkNPTkZJR19TTkRf U09DX1JUNTY3MD1tCkNPTkZJR19TTkRfU09DX1JUNTY3Nz1tCkNPTkZJR19TTkRfU09DX1JUNTY3 N19TUEk9bQojIENPTkZJR19TTkRfU09DX1NHVEw1MDAwIGlzIG5vdCBzZXQKIyBDT05GSUdfU05E X1NPQ19TSU1QTEVfQU1QTElGSUVSIGlzIG5vdCBzZXQKIyBDT05GSUdfU05EX1NPQ19TSVJGX0FV RElPX0NPREVDIGlzIG5vdCBzZXQKIyBDT05GSUdfU05EX1NPQ19TUERJRiBpcyBub3Qgc2V0CiMg Q09ORklHX1NORF9TT0NfU1NNMjMwNSBpcyBub3Qgc2V0CiMgQ09ORklHX1NORF9TT0NfU1NNMjYw Ml9TUEkgaXMgbm90IHNldAojIENPTkZJR19TTkRfU09DX1NTTTI2MDJfSTJDIGlzIG5vdCBzZXQK Q09ORklHX1NORF9TT0NfU1NNNDU2Nz1tCiMgQ09ORklHX1NORF9TT0NfU1RBMzJYIGlzIG5vdCBz ZXQKIyBDT05GSUdfU05EX1NPQ19TVEEzNTAgaXMgbm90IHNldAojIENPTkZJR19TTkRfU09DX1NU SV9TQVMgaXMgbm90IHNldAojIENPTkZJR19TTkRfU09DX1RBUzI1NTIgaXMgbm90IHNldAojIENP TkZJR19TTkRfU09DX1RBUzI1NjIgaXMgbm90IHNldAojIENPTkZJR19TTkRfU09DX1RBUzI3NzAg aXMgbm90IHNldAojIENPTkZJR19TTkRfU09DX1RBUzUwODYgaXMgbm90IHNldAojIENPTkZJR19T TkRfU09DX1RBUzU3MVggaXMgbm90IHNldAojIENPTkZJR19TTkRfU09DX1RBUzU3MjAgaXMgbm90 IHNldAojIENPTkZJR19TTkRfU09DX1RBUzY0MjQgaXMgbm90IHNldAojIENPTkZJR19TTkRfU09D X1REQTc0MTkgaXMgbm90IHNldAojIENPTkZJR19TTkRfU09DX1RGQTk4NzkgaXMgbm90IHNldAoj IENPTkZJR19TTkRfU09DX1RMVjMyMEFJQzIzX0kyQyBpcyBub3Qgc2V0CiMgQ09ORklHX1NORF9T T0NfVExWMzIwQUlDMjNfU1BJIGlzIG5vdCBzZXQKIyBDT05GSUdfU05EX1NPQ19UTFYzMjBBSUMz MVhYIGlzIG5vdCBzZXQKIyBDT05GSUdfU05EX1NPQ19UTFYzMjBBSUMzMlg0X0kyQyBpcyBub3Qg c2V0CiMgQ09ORklHX1NORF9TT0NfVExWMzIwQUlDMzJYNF9TUEkgaXMgbm90IHNldAojIENPTkZJ R19TTkRfU09DX1RMVjMyMEFJQzNYIGlzIG5vdCBzZXQKQ09ORklHX1NORF9TT0NfVFMzQTIyN0U9 bQojIENPTkZJR19TTkRfU09DX1RTQ1M0MlhYIGlzIG5vdCBzZXQKIyBDT05GSUdfU05EX1NPQ19U U0NTNDU0IGlzIG5vdCBzZXQKIyBDT05GSUdfU05EX1NPQ19VREExMzM0IGlzIG5vdCBzZXQKIyBD T05GSUdfU05EX1NPQ19XTTg1MTAgaXMgbm90IHNldAojIENPTkZJR19TTkRfU09DX1dNODUyMyBp cyBub3Qgc2V0CiMgQ09ORklHX1NORF9TT0NfV004NTI0IGlzIG5vdCBzZXQKIyBDT05GSUdfU05E X1NPQ19XTTg1ODAgaXMgbm90IHNldAojIENPTkZJR19TTkRfU09DX1dNODcxMSBpcyBub3Qgc2V0 CiMgQ09ORklHX1NORF9TT0NfV004NzI4IGlzIG5vdCBzZXQKIyBDT05GSUdfU05EX1NPQ19XTTg3 MzEgaXMgbm90IHNldAojIENPTkZJR19TTkRfU09DX1dNODczNyBpcyBub3Qgc2V0CiMgQ09ORklH X1NORF9TT0NfV004NzQxIGlzIG5vdCBzZXQKIyBDT05GSUdfU05EX1NPQ19XTTg3NTAgaXMgbm90 IHNldAojIENPTkZJR19TTkRfU09DX1dNODc1MyBpcyBub3Qgc2V0CiMgQ09ORklHX1NORF9TT0Nf V004NzcwIGlzIG5vdCBzZXQKIyBDT05GSUdfU05EX1NPQ19XTTg3NzYgaXMgbm90IHNldAojIENP TkZJR19TTkRfU09DX1dNODc4MiBpcyBub3Qgc2V0CiMgQ09ORklHX1NORF9TT0NfV004ODA0X0ky QyBpcyBub3Qgc2V0CiMgQ09ORklHX1NORF9TT0NfV004ODA0X1NQSSBpcyBub3Qgc2V0CiMgQ09O RklHX1NORF9TT0NfV004OTAzIGlzIG5vdCBzZXQKIyBDT05GSUdfU05EX1NPQ19XTTg5MDQgaXMg bm90IHNldAojIENPTkZJR19TTkRfU09DX1dNODk2MCBpcyBub3Qgc2V0CiMgQ09ORklHX1NORF9T T0NfV004OTYyIGlzIG5vdCBzZXQKIyBDT05GSUdfU05EX1NPQ19XTTg5NzQgaXMgbm90IHNldAoj IENPTkZJR19TTkRfU09DX1dNODk3OCBpcyBub3Qgc2V0CiMgQ09ORklHX1NORF9TT0NfV004OTg1 IGlzIG5vdCBzZXQKIyBDT05GSUdfU05EX1NPQ19aWF9BVUQ5NlAyMiBpcyBub3Qgc2V0CiMgQ09O RklHX1NORF9TT0NfTUFYOTc1OSBpcyBub3Qgc2V0CiMgQ09ORklHX1NORF9TT0NfTVQ2MzUxIGlz IG5vdCBzZXQKIyBDT05GSUdfU05EX1NPQ19NVDYzNTggaXMgbm90IHNldAojIENPTkZJR19TTkRf U09DX01UNjY2MCBpcyBub3Qgc2V0CiMgQ09ORklHX1NORF9TT0NfTkFVODU0MCBpcyBub3Qgc2V0 CiMgQ09ORklHX1NORF9TT0NfTkFVODgxMCBpcyBub3Qgc2V0CiMgQ09ORklHX1NORF9TT0NfTkFV ODgyMiBpcyBub3Qgc2V0CkNPTkZJR19TTkRfU09DX05BVTg4MjQ9bQpDT05GSUdfU05EX1NPQ19O QVU4ODI1PW0KIyBDT05GSUdfU05EX1NPQ19UUEE2MTMwQTIgaXMgbm90IHNldAojIGVuZCBvZiBD T0RFQyBkcml2ZXJzCgojIENPTkZJR19TTkRfU0lNUExFX0NBUkQgaXMgbm90IHNldApDT05GSUdf U05EX1g4Nj15CkNPTkZJR19IRE1JX0xQRV9BVURJTz1tCkNPTkZJR19TTkRfU1lOVEhfRU1VWD1t CiMgQ09ORklHX1NORF9YRU5fRlJPTlRFTkQgaXMgbm90IHNldApDT05GSUdfQUM5N19CVVM9bQoK IwojIEhJRCBzdXBwb3J0CiMKQ09ORklHX0hJRD15CkNPTkZJR19ISURfQkFUVEVSWV9TVFJFTkdU SD15CkNPTkZJR19ISURSQVc9eQpDT05GSUdfVUhJRD1tCkNPTkZJR19ISURfR0VORVJJQz15Cgoj CiMgU3BlY2lhbCBISUQgZHJpdmVycwojCkNPTkZJR19ISURfQTRURUNIPXkKIyBDT05GSUdfSElE X0FDQ1VUT1VDSCBpcyBub3Qgc2V0CkNPTkZJR19ISURfQUNSVVg9bQojIENPTkZJR19ISURfQUNS VVhfRkYgaXMgbm90IHNldApDT05GSUdfSElEX0FQUExFPXkKQ09ORklHX0hJRF9BUFBMRUlSPW0K IyBDT05GSUdfSElEX0FTVVMgaXMgbm90IHNldApDT05GSUdfSElEX0FVUkVBTD1tCkNPTkZJR19I SURfQkVMS0lOPXkKIyBDT05GSUdfSElEX0JFVE9QX0ZGIGlzIG5vdCBzZXQKIyBDT05GSUdfSElE X0JJR0JFTl9GRiBpcyBub3Qgc2V0CkNPTkZJR19ISURfQ0hFUlJZPXkKQ09ORklHX0hJRF9DSElD T05ZPXkKIyBDT05GSUdfSElEX0NPUlNBSVIgaXMgbm90IHNldAojIENPTkZJR19ISURfQ09VR0FS IGlzIG5vdCBzZXQKIyBDT05GSUdfSElEX01BQ0FMTFkgaXMgbm90IHNldApDT05GSUdfSElEX1BS T0RJS0VZUz1tCiMgQ09ORklHX0hJRF9DTUVESUEgaXMgbm90IHNldAojIENPTkZJR19ISURfQ1Ay MTEyIGlzIG5vdCBzZXQKIyBDT05GSUdfSElEX0NSRUFUSVZFX1NCMDU0MCBpcyBub3Qgc2V0CkNP TkZJR19ISURfQ1lQUkVTUz15CkNPTkZJR19ISURfRFJBR09OUklTRT1tCiMgQ09ORklHX0RSQUdP TlJJU0VfRkYgaXMgbm90IHNldAojIENPTkZJR19ISURfRU1TX0ZGIGlzIG5vdCBzZXQKIyBDT05G SUdfSElEX0VMQU4gaXMgbm90IHNldApDT05GSUdfSElEX0VMRUNPTT1tCiMgQ09ORklHX0hJRF9F TE8gaXMgbm90IHNldApDT05GSUdfSElEX0VaS0VZPXkKIyBDT05GSUdfSElEX0dFTUJJUkQgaXMg bm90IHNldAojIENPTkZJR19ISURfR0ZSTSBpcyBub3Qgc2V0CkNPTkZJR19ISURfSE9MVEVLPW0K IyBDT05GSUdfSE9MVEVLX0ZGIGlzIG5vdCBzZXQKIyBDT05GSUdfSElEX0dUNjgzUiBpcyBub3Qg c2V0CkNPTkZJR19ISURfS0VZVE9VQ0g9bQpDT05GSUdfSElEX0tZRT1tCkNPTkZJR19ISURfVUNM T0dJQz1tCkNPTkZJR19ISURfV0FMVE9QPW0KIyBDT05GSUdfSElEX1ZJRVdTT05JQyBpcyBub3Qg c2V0CkNPTkZJR19ISURfR1lSQVRJT049bQpDT05GSUdfSElEX0lDQURFPW0KQ09ORklHX0hJRF9J VEU9eQojIENPTkZJR19ISURfSkFCUkEgaXMgbm90IHNldApDT05GSUdfSElEX1RXSU5IQU49bQpD T05GSUdfSElEX0tFTlNJTkdUT049eQpDT05GSUdfSElEX0xDUE9XRVI9bQpDT05GSUdfSElEX0xF RD1tCiMgQ09ORklHX0hJRF9MRU5PVk8gaXMgbm90IHNldApDT05GSUdfSElEX0xPR0lURUNIPXkK Q09ORklHX0hJRF9MT0dJVEVDSF9ESj1tCkNPTkZJR19ISURfTE9HSVRFQ0hfSElEUFA9bQojIENP TkZJR19MT0dJVEVDSF9GRiBpcyBub3Qgc2V0CiMgQ09ORklHX0xPR0lSVU1CTEVQQUQyX0ZGIGlz IG5vdCBzZXQKIyBDT05GSUdfTE9HSUc5NDBfRkYgaXMgbm90IHNldAojIENPTkZJR19MT0dJV0hF RUxTX0ZGIGlzIG5vdCBzZXQKQ09ORklHX0hJRF9NQUdJQ01PVVNFPXkKIyBDT05GSUdfSElEX01B TFRST04gaXMgbm90IHNldAojIENPTkZJR19ISURfTUFZRkxBU0ggaXMgbm90IHNldApDT05GSUdf SElEX1JFRFJBR09OPXkKQ09ORklHX0hJRF9NSUNST1NPRlQ9eQpDT05GSUdfSElEX01PTlRFUkVZ PXkKQ09ORklHX0hJRF9NVUxUSVRPVUNIPW0KIyBDT05GSUdfSElEX05USSBpcyBub3Qgc2V0CkNP TkZJR19ISURfTlRSSUc9eQpDT05GSUdfSElEX09SVEVLPW0KQ09ORklHX0hJRF9QQU5USEVSTE9S RD1tCiMgQ09ORklHX1BBTlRIRVJMT1JEX0ZGIGlzIG5vdCBzZXQKIyBDT05GSUdfSElEX1BFTk1P VU5UIGlzIG5vdCBzZXQKQ09ORklHX0hJRF9QRVRBTFlOWD1tCkNPTkZJR19ISURfUElDT0xDRD1t CkNPTkZJR19ISURfUElDT0xDRF9GQj15CkNPTkZJR19ISURfUElDT0xDRF9CQUNLTElHSFQ9eQpD T05GSUdfSElEX1BJQ09MQ0RfTENEPXkKQ09ORklHX0hJRF9QSUNPTENEX0xFRFM9eQpDT05GSUdf SElEX1BJQ09MQ0RfQ0lSPXkKQ09ORklHX0hJRF9QTEFOVFJPTklDUz15CkNPTkZJR19ISURfUFJJ TUFYPW0KIyBDT05GSUdfSElEX1JFVFJPREUgaXMgbm90IHNldApDT05GSUdfSElEX1JPQ0NBVD1t CkNPTkZJR19ISURfU0FJVEVLPW0KQ09ORklHX0hJRF9TQU1TVU5HPW0KQ09ORklHX0hJRF9TT05Z PW0KIyBDT05GSUdfU09OWV9GRiBpcyBub3Qgc2V0CkNPTkZJR19ISURfU1BFRURMSU5LPW0KIyBD T05GSUdfSElEX1NURUFNIGlzIG5vdCBzZXQKQ09ORklHX0hJRF9TVEVFTFNFUklFUz1tCkNPTkZJ R19ISURfU1VOUExVUz1tCkNPTkZJR19ISURfUk1JPW0KQ09ORklHX0hJRF9HUkVFTkFTSUE9bQoj IENPTkZJR19HUkVFTkFTSUFfRkYgaXMgbm90IHNldApDT05GSUdfSElEX0hZUEVSVl9NT1VTRT1t CkNPTkZJR19ISURfU01BUlRKT1lQTFVTPW0KIyBDT05GSUdfU01BUlRKT1lQTFVTX0ZGIGlzIG5v dCBzZXQKQ09ORklHX0hJRF9USVZPPW0KQ09ORklHX0hJRF9UT1BTRUVEPW0KQ09ORklHX0hJRF9U SElOR009bQpDT05GSUdfSElEX1RIUlVTVE1BU1RFUj1tCiMgQ09ORklHX1RIUlVTVE1BU1RFUl9G RiBpcyBub3Qgc2V0CiMgQ09ORklHX0hJRF9VRFJBV19QUzMgaXMgbm90IHNldAojIENPTkZJR19I SURfVTJGWkVSTyBpcyBub3Qgc2V0CkNPTkZJR19ISURfV0FDT009bQpDT05GSUdfSElEX1dJSU1P VEU9bQojIENPTkZJR19ISURfWElOTU8gaXMgbm90IHNldApDT05GSUdfSElEX1pFUk9QTFVTPW0K IyBDT05GSUdfWkVST1BMVVNfRkYgaXMgbm90IHNldApDT05GSUdfSElEX1pZREFDUk9OPW0KQ09O RklHX0hJRF9TRU5TT1JfSFVCPW0KQ09ORklHX0hJRF9TRU5TT1JfQ1VTVE9NX1NFTlNPUj1tCkNP TkZJR19ISURfQUxQUz1tCiMgZW5kIG9mIFNwZWNpYWwgSElEIGRyaXZlcnMKCiMKIyBVU0IgSElE IHN1cHBvcnQKIwpDT05GSUdfVVNCX0hJRD15CkNPTkZJR19ISURfUElEPXkKQ09ORklHX1VTQl9I SURERVY9eQojIGVuZCBvZiBVU0IgSElEIHN1cHBvcnQKCiMKIyBJMkMgSElEIHN1cHBvcnQKIwpD T05GSUdfSTJDX0hJRD1tCiMgZW5kIG9mIEkyQyBISUQgc3VwcG9ydAoKIwojIEludGVsIElTSCBI SUQgc3VwcG9ydAojCkNPTkZJR19JTlRFTF9JU0hfSElEPXkKIyBDT05GSUdfSU5URUxfSVNIX0ZJ Uk1XQVJFX0RPV05MT0FERVIgaXMgbm90IHNldAojIGVuZCBvZiBJbnRlbCBJU0ggSElEIHN1cHBv cnQKIyBlbmQgb2YgSElEIHN1cHBvcnQKCkNPTkZJR19VU0JfT0hDSV9MSVRUTEVfRU5ESUFOPXkK Q09ORklHX1VTQl9TVVBQT1JUPXkKQ09ORklHX1VTQl9DT01NT049eQojIENPTkZJR19VU0JfTEVE X1RSSUcgaXMgbm90IHNldAojIENPTkZJR19VU0JfVUxQSV9CVVMgaXMgbm90IHNldAojIENPTkZJ R19VU0JfQ09OTl9HUElPIGlzIG5vdCBzZXQKQ09ORklHX1VTQl9BUkNIX0hBU19IQ0Q9eQpDT05G SUdfVVNCPXkKQ09ORklHX1VTQl9QQ0k9eQpDT05GSUdfVVNCX0FOTk9VTkNFX05FV19ERVZJQ0VT PXkKCiMKIyBNaXNjZWxsYW5lb3VzIFVTQiBvcHRpb25zCiMKQ09ORklHX1VTQl9ERUZBVUxUX1BF UlNJU1Q9eQojIENPTkZJR19VU0JfRFlOQU1JQ19NSU5PUlMgaXMgbm90IHNldAojIENPTkZJR19V U0JfT1RHIGlzIG5vdCBzZXQKIyBDT05GSUdfVVNCX09UR19XSElURUxJU1QgaXMgbm90IHNldAoj IENPTkZJR19VU0JfT1RHX0JMQUNLTElTVF9IVUIgaXMgbm90IHNldApDT05GSUdfVVNCX0xFRFNf VFJJR0dFUl9VU0JQT1JUPW0KQ09ORklHX1VTQl9BVVRPU1VTUEVORF9ERUxBWT0yCkNPTkZJR19V U0JfTU9OPXkKCiMKIyBVU0IgSG9zdCBDb250cm9sbGVyIERyaXZlcnMKIwojIENPTkZJR19VU0Jf QzY3WDAwX0hDRCBpcyBub3Qgc2V0CkNPTkZJR19VU0JfWEhDSV9IQ0Q9eQojIENPTkZJR19VU0Jf WEhDSV9EQkdDQVAgaXMgbm90IHNldApDT05GSUdfVVNCX1hIQ0lfUENJPXkKIyBDT05GSUdfVVNC X1hIQ0lfUExBVEZPUk0gaXMgbm90IHNldApDT05GSUdfVVNCX0VIQ0lfSENEPXkKQ09ORklHX1VT Ql9FSENJX1JPT1RfSFVCX1RUPXkKQ09ORklHX1VTQl9FSENJX1RUX05FV1NDSEVEPXkKQ09ORklH X1VTQl9FSENJX1BDST15CiMgQ09ORklHX1VTQl9FSENJX0ZTTCBpcyBub3Qgc2V0CiMgQ09ORklH X1VTQl9FSENJX0hDRF9QTEFURk9STSBpcyBub3Qgc2V0CiMgQ09ORklHX1VTQl9PWFUyMTBIUF9I Q0QgaXMgbm90IHNldAojIENPTkZJR19VU0JfSVNQMTE2WF9IQ0QgaXMgbm90IHNldAojIENPTkZJ R19VU0JfRk9URzIxMF9IQ0QgaXMgbm90IHNldAojIENPTkZJR19VU0JfTUFYMzQyMV9IQ0QgaXMg bm90IHNldApDT05GSUdfVVNCX09IQ0lfSENEPXkKQ09ORklHX1VTQl9PSENJX0hDRF9QQ0k9eQoj IENPTkZJR19VU0JfT0hDSV9IQ0RfUExBVEZPUk0gaXMgbm90IHNldApDT05GSUdfVVNCX1VIQ0lf SENEPXkKIyBDT05GSUdfVVNCX1UxMzJfSENEIGlzIG5vdCBzZXQKIyBDT05GSUdfVVNCX1NMODEx X0hDRCBpcyBub3Qgc2V0CiMgQ09ORklHX1VTQl9SOEE2NjU5N19IQ0QgaXMgbm90IHNldAojIENP TkZJR19VU0JfSENEX0JDTUEgaXMgbm90IHNldAojIENPTkZJR19VU0JfSENEX1NTQiBpcyBub3Qg c2V0CiMgQ09ORklHX1VTQl9IQ0RfVEVTVF9NT0RFIGlzIG5vdCBzZXQKCiMKIyBVU0IgRGV2aWNl IENsYXNzIGRyaXZlcnMKIwpDT05GSUdfVVNCX0FDTT1tCkNPTkZJR19VU0JfUFJJTlRFUj1tCkNP TkZJR19VU0JfV0RNPW0KQ09ORklHX1VTQl9UTUM9bQoKIwojIE5PVEU6IFVTQl9TVE9SQUdFIGRl cGVuZHMgb24gU0NTSSBidXQgQkxLX0RFVl9TRCBtYXkKIwoKIwojIGFsc28gYmUgbmVlZGVkOyBz ZWUgVVNCX1NUT1JBR0UgSGVscCBmb3IgbW9yZSBpbmZvCiMKQ09ORklHX1VTQl9TVE9SQUdFPW0K IyBDT05GSUdfVVNCX1NUT1JBR0VfREVCVUcgaXMgbm90IHNldApDT05GSUdfVVNCX1NUT1JBR0Vf UkVBTFRFSz1tCkNPTkZJR19SRUFMVEVLX0FVVE9QTT15CkNPTkZJR19VU0JfU1RPUkFHRV9EQVRB RkFCPW0KQ09ORklHX1VTQl9TVE9SQUdFX0ZSRUVDT009bQpDT05GSUdfVVNCX1NUT1JBR0VfSVNE MjAwPW0KQ09ORklHX1VTQl9TVE9SQUdFX1VTQkFUPW0KQ09ORklHX1VTQl9TVE9SQUdFX1NERFIw OT1tCkNPTkZJR19VU0JfU1RPUkFHRV9TRERSNTU9bQpDT05GSUdfVVNCX1NUT1JBR0VfSlVNUFNI T1Q9bQpDT05GSUdfVVNCX1NUT1JBR0VfQUxBVURBPW0KQ09ORklHX1VTQl9TVE9SQUdFX09ORVRP VUNIPW0KQ09ORklHX1VTQl9TVE9SQUdFX0tBUk1BPW0KQ09ORklHX1VTQl9TVE9SQUdFX0NZUFJF U1NfQVRBQ0I9bQpDT05GSUdfVVNCX1NUT1JBR0VfRU5FX1VCNjI1MD1tCkNPTkZJR19VU0JfVUFT PW0KCiMKIyBVU0IgSW1hZ2luZyBkZXZpY2VzCiMKQ09ORklHX1VTQl9NREM4MDA9bQpDT05GSUdf VVNCX01JQ1JPVEVLPW0KQ09ORklHX1VTQklQX0NPUkU9bQojIENPTkZJR19VU0JJUF9WSENJX0hD RCBpcyBub3Qgc2V0CiMgQ09ORklHX1VTQklQX0hPU1QgaXMgbm90IHNldAojIENPTkZJR19VU0JJ UF9ERUJVRyBpcyBub3Qgc2V0CiMgQ09ORklHX1VTQl9DRE5TMyBpcyBub3Qgc2V0CiMgQ09ORklH X1VTQl9NVVNCX0hEUkMgaXMgbm90IHNldAojIENPTkZJR19VU0JfRFdDMyBpcyBub3Qgc2V0CiMg Q09ORklHX1VTQl9EV0MyIGlzIG5vdCBzZXQKIyBDT05GSUdfVVNCX0NISVBJREVBIGlzIG5vdCBz ZXQKIyBDT05GSUdfVVNCX0lTUDE3NjAgaXMgbm90IHNldAoKIwojIFVTQiBwb3J0IGRyaXZlcnMK IwpDT05GSUdfVVNCX1VTUzcyMD1tCkNPTkZJR19VU0JfU0VSSUFMPXkKQ09ORklHX1VTQl9TRVJJ QUxfQ09OU09MRT15CkNPTkZJR19VU0JfU0VSSUFMX0dFTkVSSUM9eQojIENPTkZJR19VU0JfU0VS SUFMX1NJTVBMRSBpcyBub3Qgc2V0CkNPTkZJR19VU0JfU0VSSUFMX0FJUkNBQkxFPW0KQ09ORklH X1VTQl9TRVJJQUxfQVJLMzExNj1tCkNPTkZJR19VU0JfU0VSSUFMX0JFTEtJTj1tCkNPTkZJR19V U0JfU0VSSUFMX0NIMzQxPW0KQ09ORklHX1VTQl9TRVJJQUxfV0hJVEVIRUFUPW0KQ09ORklHX1VT Ql9TRVJJQUxfRElHSV9BQ0NFTEVQT1JUPW0KQ09ORklHX1VTQl9TRVJJQUxfQ1AyMTBYPW0KQ09O RklHX1VTQl9TRVJJQUxfQ1lQUkVTU19NOD1tCkNPTkZJR19VU0JfU0VSSUFMX0VNUEVHPW0KQ09O RklHX1VTQl9TRVJJQUxfRlRESV9TSU89bQpDT05GSUdfVVNCX1NFUklBTF9WSVNPUj1tCkNPTkZJ R19VU0JfU0VSSUFMX0lQQVE9bQpDT05GSUdfVVNCX1NFUklBTF9JUj1tCkNPTkZJR19VU0JfU0VS SUFMX0VER0VQT1JUPW0KQ09ORklHX1VTQl9TRVJJQUxfRURHRVBPUlRfVEk9bQojIENPTkZJR19V U0JfU0VSSUFMX0Y4MTIzMiBpcyBub3Qgc2V0CiMgQ09ORklHX1VTQl9TRVJJQUxfRjgxNTNYIGlz IG5vdCBzZXQKQ09ORklHX1VTQl9TRVJJQUxfR0FSTUlOPW0KQ09ORklHX1VTQl9TRVJJQUxfSVBX PW0KQ09ORklHX1VTQl9TRVJJQUxfSVVVPW0KQ09ORklHX1VTQl9TRVJJQUxfS0VZU1BBTl9QREE9 bQpDT05GSUdfVVNCX1NFUklBTF9LRVlTUEFOPW0KQ09ORklHX1VTQl9TRVJJQUxfS0xTST1tCkNP TkZJR19VU0JfU0VSSUFMX0tPQklMX1NDVD1tCkNPTkZJR19VU0JfU0VSSUFMX01DVF9VMjMyPW0K IyBDT05GSUdfVVNCX1NFUklBTF9NRVRSTyBpcyBub3Qgc2V0CkNPTkZJR19VU0JfU0VSSUFMX01P Uzc3MjA9bQpDT05GSUdfVVNCX1NFUklBTF9NT1M3NzE1X1BBUlBPUlQ9eQpDT05GSUdfVVNCX1NF UklBTF9NT1M3ODQwPW0KIyBDT05GSUdfVVNCX1NFUklBTF9NWFVQT1JUIGlzIG5vdCBzZXQKQ09O RklHX1VTQl9TRVJJQUxfTkFWTUFOPW0KQ09ORklHX1VTQl9TRVJJQUxfUEwyMzAzPW0KQ09ORklH X1VTQl9TRVJJQUxfT1RJNjg1OD1tCkNPTkZJR19VU0JfU0VSSUFMX1FDQVVYPW0KQ09ORklHX1VT Ql9TRVJJQUxfUVVBTENPTU09bQpDT05GSUdfVVNCX1NFUklBTF9TUENQOFg1PW0KQ09ORklHX1VT Ql9TRVJJQUxfU0FGRT1tCkNPTkZJR19VU0JfU0VSSUFMX1NBRkVfUEFEREVEPXkKQ09ORklHX1VT Ql9TRVJJQUxfU0lFUlJBV0lSRUxFU1M9bQpDT05GSUdfVVNCX1NFUklBTF9TWU1CT0w9bQojIENP TkZJR19VU0JfU0VSSUFMX1RJIGlzIG5vdCBzZXQKQ09ORklHX1VTQl9TRVJJQUxfQ1lCRVJKQUNL PW0KQ09ORklHX1VTQl9TRVJJQUxfWElSQ09NPW0KQ09ORklHX1VTQl9TRVJJQUxfV1dBTj1tCkNP TkZJR19VU0JfU0VSSUFMX09QVElPTj1tCkNPTkZJR19VU0JfU0VSSUFMX09NTklORVQ9bQpDT05G SUdfVVNCX1NFUklBTF9PUFRJQ09OPW0KQ09ORklHX1VTQl9TRVJJQUxfWFNFTlNfTVQ9bQojIENP TkZJR19VU0JfU0VSSUFMX1dJU0hCT05FIGlzIG5vdCBzZXQKQ09ORklHX1VTQl9TRVJJQUxfU1NV MTAwPW0KQ09ORklHX1VTQl9TRVJJQUxfUVQyPW0KIyBDT05GSUdfVVNCX1NFUklBTF9VUEQ3OEYw NzMwIGlzIG5vdCBzZXQKQ09ORklHX1VTQl9TRVJJQUxfREVCVUc9bQoKIwojIFVTQiBNaXNjZWxs YW5lb3VzIGRyaXZlcnMKIwpDT05GSUdfVVNCX0VNSTYyPW0KQ09ORklHX1VTQl9FTUkyNj1tCkNP TkZJR19VU0JfQURVVFVYPW0KQ09ORklHX1VTQl9TRVZTRUc9bQpDT05GSUdfVVNCX0xFR09UT1dF Uj1tCkNPTkZJR19VU0JfTENEPW0KIyBDT05GSUdfVVNCX0NZUFJFU1NfQ1k3QzYzIGlzIG5vdCBz ZXQKIyBDT05GSUdfVVNCX0NZVEhFUk0gaXMgbm90IHNldApDT05GSUdfVVNCX0lETU9VU0U9bQpD T05GSUdfVVNCX0ZURElfRUxBTj1tCkNPTkZJR19VU0JfQVBQTEVESVNQTEFZPW0KQ09ORklHX1VT Ql9TSVNVU0JWR0E9bQpDT05GSUdfVVNCX1NJU1VTQlZHQV9DT049eQpDT05GSUdfVVNCX0xEPW0K IyBDT05GSUdfVVNCX1RSQU5DRVZJQlJBVE9SIGlzIG5vdCBzZXQKQ09ORklHX1VTQl9JT1dBUlJJ T1I9bQojIENPTkZJR19VU0JfVEVTVCBpcyBub3Qgc2V0CiMgQ09ORklHX1VTQl9FSFNFVF9URVNU X0ZJWFRVUkUgaXMgbm90IHNldApDT05GSUdfVVNCX0lTSUdIVEZXPW0KIyBDT05GSUdfVVNCX1lV UkVYIGlzIG5vdCBzZXQKQ09ORklHX1VTQl9FWlVTQl9GWDI9bQojIENPTkZJR19VU0JfSFVCX1VT QjI1MVhCIGlzIG5vdCBzZXQKQ09ORklHX1VTQl9IU0lDX1VTQjM1MDM9bQojIENPTkZJR19VU0Jf SFNJQ19VU0I0NjA0IGlzIG5vdCBzZXQKIyBDT05GSUdfVVNCX0xJTktfTEFZRVJfVEVTVCBpcyBu b3Qgc2V0CiMgQ09ORklHX1VTQl9DSEFPU0tFWSBpcyBub3Qgc2V0CkNPTkZJR19VU0JfQVRNPW0K Q09ORklHX1VTQl9TUEVFRFRPVUNIPW0KQ09ORklHX1VTQl9DWEFDUlU9bQpDT05GSUdfVVNCX1VF QUdMRUFUTT1tCkNPTkZJR19VU0JfWFVTQkFUTT1tCgojCiMgVVNCIFBoeXNpY2FsIExheWVyIGRy aXZlcnMKIwojIENPTkZJR19OT1BfVVNCX1hDRUlWIGlzIG5vdCBzZXQKIyBDT05GSUdfVVNCX0dQ SU9fVkJVUyBpcyBub3Qgc2V0CiMgQ09ORklHX1VTQl9JU1AxMzAxIGlzIG5vdCBzZXQKIyBlbmQg b2YgVVNCIFBoeXNpY2FsIExheWVyIGRyaXZlcnMKCiMgQ09ORklHX1VTQl9HQURHRVQgaXMgbm90 IHNldApDT05GSUdfVFlQRUM9eQojIENPTkZJR19UWVBFQ19UQ1BNIGlzIG5vdCBzZXQKQ09ORklH X1RZUEVDX1VDU0k9eQojIENPTkZJR19VQ1NJX0NDRyBpcyBub3Qgc2V0CkNPTkZJR19VQ1NJX0FD UEk9eQojIENPTkZJR19UWVBFQ19UUFM2NTk4WCBpcyBub3Qgc2V0CgojCiMgVVNCIFR5cGUtQyBN dWx0aXBsZXhlci9EZU11bHRpcGxleGVyIFN3aXRjaCBzdXBwb3J0CiMKIyBDT05GSUdfVFlQRUNf TVVYX1BJM1VTQjMwNTMyIGlzIG5vdCBzZXQKIyBlbmQgb2YgVVNCIFR5cGUtQyBNdWx0aXBsZXhl ci9EZU11bHRpcGxleGVyIFN3aXRjaCBzdXBwb3J0CgojCiMgVVNCIFR5cGUtQyBBbHRlcm5hdGUg TW9kZSBkcml2ZXJzCiMKIyBDT05GSUdfVFlQRUNfRFBfQUxUTU9ERSBpcyBub3Qgc2V0CiMgZW5k IG9mIFVTQiBUeXBlLUMgQWx0ZXJuYXRlIE1vZGUgZHJpdmVycwoKIyBDT05GSUdfVVNCX1JPTEVf U1dJVENIIGlzIG5vdCBzZXQKQ09ORklHX01NQz1tCkNPTkZJR19NTUNfQkxPQ0s9bQpDT05GSUdf TU1DX0JMT0NLX01JTk9SUz04CkNPTkZJR19TRElPX1VBUlQ9bQojIENPTkZJR19NTUNfVEVTVCBp cyBub3Qgc2V0CgojCiMgTU1DL1NEL1NESU8gSG9zdCBDb250cm9sbGVyIERyaXZlcnMKIwojIENP TkZJR19NTUNfREVCVUcgaXMgbm90IHNldApDT05GSUdfTU1DX1NESENJPW0KQ09ORklHX01NQ19T REhDSV9JT19BQ0NFU1NPUlM9eQpDT05GSUdfTU1DX1NESENJX1BDST1tCkNPTkZJR19NTUNfUklD T0hfTU1DPXkKQ09ORklHX01NQ19TREhDSV9BQ1BJPW0KQ09ORklHX01NQ19TREhDSV9QTFRGTT1t CiMgQ09ORklHX01NQ19TREhDSV9GX1NESDMwIGlzIG5vdCBzZXQKIyBDT05GSUdfTU1DX1dCU0Qg aXMgbm90IHNldApDT05GSUdfTU1DX1RJRk1fU0Q9bQojIENPTkZJR19NTUNfU1BJIGlzIG5vdCBz ZXQKQ09ORklHX01NQ19DQjcxMD1tCkNPTkZJR19NTUNfVklBX1NETU1DPW0KQ09ORklHX01NQ19W VUIzMDA9bQpDT05GSUdfTU1DX1VTSEM9bQojIENPTkZJR19NTUNfVVNESEk2Uk9MMCBpcyBub3Qg c2V0CkNPTkZJR19NTUNfQ1FIQ0k9bQojIENPTkZJR19NTUNfVE9TSElCQV9QQ0kgaXMgbm90IHNl dAojIENPTkZJR19NTUNfTVRLIGlzIG5vdCBzZXQKIyBDT05GSUdfTU1DX1NESENJX1hFTk9OIGlz IG5vdCBzZXQKQ09ORklHX01FTVNUSUNLPW0KIyBDT05GSUdfTUVNU1RJQ0tfREVCVUcgaXMgbm90 IHNldAoKIwojIE1lbW9yeVN0aWNrIGRyaXZlcnMKIwojIENPTkZJR19NRU1TVElDS19VTlNBRkVf UkVTVU1FIGlzIG5vdCBzZXQKQ09ORklHX01TUFJPX0JMT0NLPW0KIyBDT05GSUdfTVNfQkxPQ0sg aXMgbm90IHNldAoKIwojIE1lbW9yeVN0aWNrIEhvc3QgQ29udHJvbGxlciBEcml2ZXJzCiMKQ09O RklHX01FTVNUSUNLX1RJRk1fTVM9bQpDT05GSUdfTUVNU1RJQ0tfSk1JQ1JPTl8zOFg9bQpDT05G SUdfTUVNU1RJQ0tfUjU5Mj1tCkNPTkZJR19ORVdfTEVEUz15CkNPTkZJR19MRURTX0NMQVNTPXkK IyBDT05GSUdfTEVEU19DTEFTU19GTEFTSCBpcyBub3Qgc2V0CiMgQ09ORklHX0xFRFNfQlJJR0hU TkVTU19IV19DSEFOR0VEIGlzIG5vdCBzZXQKCiMKIyBMRUQgZHJpdmVycwojCiMgQ09ORklHX0xF RFNfQVBVIGlzIG5vdCBzZXQKQ09ORklHX0xFRFNfTE0zNTMwPW0KIyBDT05GSUdfTEVEU19MTTM1 MzIgaXMgbm90IHNldAojIENPTkZJR19MRURTX0xNMzY0MiBpcyBub3Qgc2V0CiMgQ09ORklHX0xF RFNfUENBOTUzMiBpcyBub3Qgc2V0CiMgQ09ORklHX0xFRFNfR1BJTyBpcyBub3Qgc2V0CkNPTkZJ R19MRURTX0xQMzk0ND1tCiMgQ09ORklHX0xFRFNfTFAzOTUyIGlzIG5vdCBzZXQKQ09ORklHX0xF RFNfTFA1NVhYX0NPTU1PTj1tCkNPTkZJR19MRURTX0xQNTUyMT1tCkNPTkZJR19MRURTX0xQNTUy Mz1tCkNPTkZJR19MRURTX0xQNTU2Mj1tCiMgQ09ORklHX0xFRFNfTFA4NTAxIGlzIG5vdCBzZXQK Q09ORklHX0xFRFNfQ0xFVk9fTUFJTD1tCiMgQ09ORklHX0xFRFNfUENBOTU1WCBpcyBub3Qgc2V0 CiMgQ09ORklHX0xFRFNfUENBOTYzWCBpcyBub3Qgc2V0CiMgQ09ORklHX0xFRFNfREFDMTI0UzA4 NSBpcyBub3Qgc2V0CiMgQ09ORklHX0xFRFNfUFdNIGlzIG5vdCBzZXQKIyBDT05GSUdfTEVEU19C RDI4MDIgaXMgbm90IHNldApDT05GSUdfTEVEU19JTlRFTF9TUzQyMDA9bQojIENPTkZJR19MRURT X1RDQTY1MDcgaXMgbm90IHNldAojIENPTkZJR19MRURTX1RMQzU5MVhYIGlzIG5vdCBzZXQKIyBD T05GSUdfTEVEU19MTTM1NXggaXMgbm90IHNldAoKIwojIExFRCBkcml2ZXIgZm9yIGJsaW5rKDEp IFVTQiBSR0IgTEVEIGlzIHVuZGVyIFNwZWNpYWwgSElEIGRyaXZlcnMgKEhJRF9USElOR00pCiMK Q09ORklHX0xFRFNfQkxJTktNPW0KIyBDT05GSUdfTEVEU19NTFhDUExEIGlzIG5vdCBzZXQKIyBD T05GSUdfTEVEU19NTFhSRUcgaXMgbm90IHNldAojIENPTkZJR19MRURTX1VTRVIgaXMgbm90IHNl dAojIENPTkZJR19MRURTX05JQzc4QlggaXMgbm90IHNldAojIENPTkZJR19MRURTX1RJX0xNVV9D T01NT04gaXMgbm90IHNldAoKIwojIExFRCBUcmlnZ2VycwojCkNPTkZJR19MRURTX1RSSUdHRVJT PXkKQ09ORklHX0xFRFNfVFJJR0dFUl9USU1FUj1tCkNPTkZJR19MRURTX1RSSUdHRVJfT05FU0hP VD1tCiMgQ09ORklHX0xFRFNfVFJJR0dFUl9ESVNLIGlzIG5vdCBzZXQKIyBDT05GSUdfTEVEU19U UklHR0VSX01URCBpcyBub3Qgc2V0CkNPTkZJR19MRURTX1RSSUdHRVJfSEVBUlRCRUFUPW0KQ09O RklHX0xFRFNfVFJJR0dFUl9CQUNLTElHSFQ9bQojIENPTkZJR19MRURTX1RSSUdHRVJfQ1BVIGlz IG5vdCBzZXQKIyBDT05GSUdfTEVEU19UUklHR0VSX0FDVElWSVRZIGlzIG5vdCBzZXQKQ09ORklH X0xFRFNfVFJJR0dFUl9HUElPPW0KQ09ORklHX0xFRFNfVFJJR0dFUl9ERUZBVUxUX09OPW0KCiMK IyBpcHRhYmxlcyB0cmlnZ2VyIGlzIHVuZGVyIE5ldGZpbHRlciBjb25maWcgKExFRCB0YXJnZXQp CiMKQ09ORklHX0xFRFNfVFJJR0dFUl9UUkFOU0lFTlQ9bQpDT05GSUdfTEVEU19UUklHR0VSX0NB TUVSQT1tCiMgQ09ORklHX0xFRFNfVFJJR0dFUl9QQU5JQyBpcyBub3Qgc2V0CiMgQ09ORklHX0xF RFNfVFJJR0dFUl9ORVRERVYgaXMgbm90IHNldAojIENPTkZJR19MRURTX1RSSUdHRVJfUEFUVEVS TiBpcyBub3Qgc2V0CkNPTkZJR19MRURTX1RSSUdHRVJfQVVESU89bQojIENPTkZJR19BQ0NFU1NJ QklMSVRZIGlzIG5vdCBzZXQKIyBDT05GSUdfSU5GSU5JQkFORCBpcyBub3Qgc2V0CkNPTkZJR19F REFDX0FUT01JQ19TQ1JVQj15CkNPTkZJR19FREFDX1NVUFBPUlQ9eQpDT05GSUdfRURBQz15CkNP TkZJR19FREFDX0xFR0FDWV9TWVNGUz15CiMgQ09ORklHX0VEQUNfREVCVUcgaXMgbm90IHNldApD T05GSUdfRURBQ19ERUNPREVfTUNFPW0KQ09ORklHX0VEQUNfR0hFUz15CkNPTkZJR19FREFDX0FN RDY0PW0KIyBDT05GSUdfRURBQ19BTUQ2NF9FUlJPUl9JTkpFQ1RJT04gaXMgbm90IHNldApDT05G SUdfRURBQ19FNzUyWD1tCkNPTkZJR19FREFDX0k4Mjk3NVg9bQpDT05GSUdfRURBQ19JMzAwMD1t CkNPTkZJR19FREFDX0kzMjAwPW0KQ09ORklHX0VEQUNfSUUzMTIwMD1tCkNPTkZJR19FREFDX1gz OD1tCkNPTkZJR19FREFDX0k1NDAwPW0KQ09ORklHX0VEQUNfSTdDT1JFPW0KQ09ORklHX0VEQUNf STUwMDA9bQpDT05GSUdfRURBQ19JNTEwMD1tCkNPTkZJR19FREFDX0k3MzAwPW0KQ09ORklHX0VE QUNfU0JSSURHRT1tCkNPTkZJR19FREFDX1NLWD1tCiMgQ09ORklHX0VEQUNfSTEwTk0gaXMgbm90 IHNldApDT05GSUdfRURBQ19QTkQyPW0KQ09ORklHX1JUQ19MSUI9eQpDT05GSUdfUlRDX01DMTQ2 ODE4X0xJQj15CkNPTkZJR19SVENfQ0xBU1M9eQpDT05GSUdfUlRDX0hDVE9TWVM9eQpDT05GSUdf UlRDX0hDVE9TWVNfREVWSUNFPSJydGMwIgojIENPTkZJR19SVENfU1lTVE9IQyBpcyBub3Qgc2V0 CiMgQ09ORklHX1JUQ19ERUJVRyBpcyBub3Qgc2V0CkNPTkZJR19SVENfTlZNRU09eQoKIwojIFJU QyBpbnRlcmZhY2VzCiMKQ09ORklHX1JUQ19JTlRGX1NZU0ZTPXkKQ09ORklHX1JUQ19JTlRGX1BS T0M9eQpDT05GSUdfUlRDX0lOVEZfREVWPXkKIyBDT05GSUdfUlRDX0lOVEZfREVWX1VJRV9FTVVM IGlzIG5vdCBzZXQKIyBDT05GSUdfUlRDX0RSVl9URVNUIGlzIG5vdCBzZXQKCiMKIyBJMkMgUlRD IGRyaXZlcnMKIwojIENPTkZJR19SVENfRFJWX0FCQjVaRVMzIGlzIG5vdCBzZXQKIyBDT05GSUdf UlRDX0RSVl9BQkVPWjkgaXMgbm90IHNldAojIENPTkZJR19SVENfRFJWX0FCWDgwWCBpcyBub3Qg c2V0CkNPTkZJR19SVENfRFJWX0RTMTMwNz1tCiMgQ09ORklHX1JUQ19EUlZfRFMxMzA3X0NFTlRV UlkgaXMgbm90IHNldApDT05GSUdfUlRDX0RSVl9EUzEzNzQ9bQojIENPTkZJR19SVENfRFJWX0RT MTM3NF9XRFQgaXMgbm90IHNldApDT05GSUdfUlRDX0RSVl9EUzE2NzI9bQpDT05GSUdfUlRDX0RS Vl9NQVg2OTAwPW0KQ09ORklHX1JUQ19EUlZfUlM1QzM3Mj1tCkNPTkZJR19SVENfRFJWX0lTTDEy MDg9bQpDT05GSUdfUlRDX0RSVl9JU0wxMjAyMj1tCkNPTkZJR19SVENfRFJWX1gxMjA1PW0KQ09O RklHX1JUQ19EUlZfUENGODUyMz1tCiMgQ09ORklHX1JUQ19EUlZfUENGODUwNjMgaXMgbm90IHNl dAojIENPTkZJR19SVENfRFJWX1BDRjg1MzYzIGlzIG5vdCBzZXQKQ09ORklHX1JUQ19EUlZfUENG ODU2Mz1tCkNPTkZJR19SVENfRFJWX1BDRjg1ODM9bQpDT05GSUdfUlRDX0RSVl9NNDFUODA9bQpD T05GSUdfUlRDX0RSVl9NNDFUODBfV0RUPXkKQ09ORklHX1JUQ19EUlZfQlEzMks9bQojIENPTkZJ R19SVENfRFJWX1MzNTM5MEEgaXMgbm90IHNldApDT05GSUdfUlRDX0RSVl9GTTMxMzA9bQojIENP TkZJR19SVENfRFJWX1JYODAxMCBpcyBub3Qgc2V0CkNPTkZJR19SVENfRFJWX1JYODU4MT1tCkNP TkZJR19SVENfRFJWX1JYODAyNT1tCkNPTkZJR19SVENfRFJWX0VNMzAyNz1tCiMgQ09ORklHX1JU Q19EUlZfUlYzMDI4IGlzIG5vdCBzZXQKIyBDT05GSUdfUlRDX0RSVl9SVjg4MDMgaXMgbm90IHNl dAojIENPTkZJR19SVENfRFJWX1NEMzA3OCBpcyBub3Qgc2V0CgojCiMgU1BJIFJUQyBkcml2ZXJz CiMKIyBDT05GSUdfUlRDX0RSVl9NNDFUOTMgaXMgbm90IHNldAojIENPTkZJR19SVENfRFJWX000 MVQ5NCBpcyBub3Qgc2V0CiMgQ09ORklHX1JUQ19EUlZfRFMxMzAyIGlzIG5vdCBzZXQKIyBDT05G SUdfUlRDX0RSVl9EUzEzMDUgaXMgbm90IHNldAojIENPTkZJR19SVENfRFJWX0RTMTM0MyBpcyBu b3Qgc2V0CiMgQ09ORklHX1JUQ19EUlZfRFMxMzQ3IGlzIG5vdCBzZXQKIyBDT05GSUdfUlRDX0RS Vl9EUzEzOTAgaXMgbm90IHNldAojIENPTkZJR19SVENfRFJWX01BWDY5MTYgaXMgbm90IHNldAoj IENPTkZJR19SVENfRFJWX1I5NzAxIGlzIG5vdCBzZXQKQ09ORklHX1JUQ19EUlZfUlg0NTgxPW0K IyBDT05GSUdfUlRDX0RSVl9SWDYxMTAgaXMgbm90IHNldAojIENPTkZJR19SVENfRFJWX1JTNUMz NDggaXMgbm90IHNldAojIENPTkZJR19SVENfRFJWX01BWDY5MDIgaXMgbm90IHNldAojIENPTkZJ R19SVENfRFJWX1BDRjIxMjMgaXMgbm90IHNldAojIENPTkZJR19SVENfRFJWX01DUDc5NSBpcyBu b3Qgc2V0CkNPTkZJR19SVENfSTJDX0FORF9TUEk9eQoKIwojIFNQSSBhbmQgSTJDIFJUQyBkcml2 ZXJzCiMKQ09ORklHX1JUQ19EUlZfRFMzMjMyPW0KQ09ORklHX1JUQ19EUlZfRFMzMjMyX0hXTU9O PXkKIyBDT05GSUdfUlRDX0RSVl9QQ0YyMTI3IGlzIG5vdCBzZXQKQ09ORklHX1JUQ19EUlZfUlYz MDI5QzI9bQpDT05GSUdfUlRDX0RSVl9SVjMwMjlfSFdNT049eQoKIwojIFBsYXRmb3JtIFJUQyBk cml2ZXJzCiMKQ09ORklHX1JUQ19EUlZfQ01PUz15CkNPTkZJR19SVENfRFJWX0RTMTI4Nj1tCkNP TkZJR19SVENfRFJWX0RTMTUxMT1tCkNPTkZJR19SVENfRFJWX0RTMTU1Mz1tCiMgQ09ORklHX1JU Q19EUlZfRFMxNjg1X0ZBTUlMWSBpcyBub3Qgc2V0CkNPTkZJR19SVENfRFJWX0RTMTc0Mj1tCkNP TkZJR19SVENfRFJWX0RTMjQwND1tCkNPTkZJR19SVENfRFJWX1NUSzE3VEE4PW0KIyBDT05GSUdf UlRDX0RSVl9NNDhUODYgaXMgbm90IHNldApDT05GSUdfUlRDX0RSVl9NNDhUMzU9bQpDT05GSUdf UlRDX0RSVl9NNDhUNTk9bQpDT05GSUdfUlRDX0RSVl9NU002MjQyPW0KQ09ORklHX1JUQ19EUlZf QlE0ODAyPW0KQ09ORklHX1JUQ19EUlZfUlA1QzAxPW0KQ09ORklHX1JUQ19EUlZfVjMwMjA9bQoK IwojIG9uLUNQVSBSVEMgZHJpdmVycwojCiMgQ09ORklHX1JUQ19EUlZfRlRSVEMwMTAgaXMgbm90 IHNldAoKIwojIEhJRCBTZW5zb3IgUlRDIGRyaXZlcnMKIwojIENPTkZJR19SVENfRFJWX0hJRF9T RU5TT1JfVElNRSBpcyBub3Qgc2V0CkNPTkZJR19ETUFERVZJQ0VTPXkKIyBDT05GSUdfRE1BREVW SUNFU19ERUJVRyBpcyBub3Qgc2V0CgojCiMgRE1BIERldmljZXMKIwpDT05GSUdfRE1BX0VOR0lO RT15CkNPTkZJR19ETUFfVklSVFVBTF9DSEFOTkVMUz15CkNPTkZJR19ETUFfQUNQST15CiMgQ09O RklHX0FMVEVSQV9NU0dETUEgaXMgbm90IHNldAojIENPTkZJR19JTlRFTF9JRE1BNjQgaXMgbm90 IHNldAojIENPTkZJR19JTlRFTF9JRFhEIGlzIG5vdCBzZXQKQ09ORklHX0lOVEVMX0lPQVRETUE9 bQojIENPTkZJR19QTFhfRE1BIGlzIG5vdCBzZXQKIyBDT05GSUdfUUNPTV9ISURNQV9NR01UIGlz IG5vdCBzZXQKIyBDT05GSUdfUUNPTV9ISURNQSBpcyBub3Qgc2V0CkNPTkZJR19EV19ETUFDX0NP UkU9eQpDT05GSUdfRFdfRE1BQz1tCkNPTkZJR19EV19ETUFDX1BDST15CiMgQ09ORklHX0RXX0VE TUEgaXMgbm90IHNldAojIENPTkZJR19EV19FRE1BX1BDSUUgaXMgbm90IHNldApDT05GSUdfSFNV X0RNQT15CiMgQ09ORklHX1NGX1BETUEgaXMgbm90IHNldAoKIwojIERNQSBDbGllbnRzCiMKQ09O RklHX0FTWU5DX1RYX0RNQT15CiMgQ09ORklHX0RNQVRFU1QgaXMgbm90IHNldApDT05GSUdfRE1B X0VOR0lORV9SQUlEPXkKCiMKIyBETUFCVUYgb3B0aW9ucwojCkNPTkZJR19TWU5DX0ZJTEU9eQpD T05GSUdfU1dfU1lOQz15CiMgQ09ORklHX1VETUFCVUYgaXMgbm90IHNldAojIENPTkZJR19ETUFC VUZfU0VMRlRFU1RTIGlzIG5vdCBzZXQKIyBDT05GSUdfRE1BQlVGX0hFQVBTIGlzIG5vdCBzZXQK IyBlbmQgb2YgRE1BQlVGIG9wdGlvbnMKCkNPTkZJR19EQ0E9bQpDT05GSUdfQVVYRElTUExBWT15 CiMgQ09ORklHX0hENDQ3ODAgaXMgbm90IHNldApDT05GSUdfS1MwMTA4PW0KQ09ORklHX0tTMDEw OF9QT1JUPTB4Mzc4CkNPTkZJR19LUzAxMDhfREVMQVk9MgpDT05GSUdfQ0ZBRzEyODY0Qj1tCkNP TkZJR19DRkFHMTI4NjRCX1JBVEU9MjAKIyBDT05GSUdfSU1HX0FTQ0lJX0xDRCBpcyBub3Qgc2V0 CiMgQ09ORklHX1BBUlBPUlRfUEFORUwgaXMgbm90IHNldAojIENPTkZJR19DSEFSTENEX0JMX09G RiBpcyBub3Qgc2V0CiMgQ09ORklHX0NIQVJMQ0RfQkxfT04gaXMgbm90IHNldApDT05GSUdfQ0hB UkxDRF9CTF9GTEFTSD15CiMgQ09ORklHX1BBTkVMIGlzIG5vdCBzZXQKQ09ORklHX1VJTz1tCkNP TkZJR19VSU9fQ0lGPW0KQ09ORklHX1VJT19QRFJWX0dFTklSUT1tCiMgQ09ORklHX1VJT19ETUVN X0dFTklSUSBpcyBub3Qgc2V0CkNPTkZJR19VSU9fQUVDPW0KQ09ORklHX1VJT19TRVJDT1MzPW0K Q09ORklHX1VJT19QQ0lfR0VORVJJQz1tCiMgQ09ORklHX1VJT19ORVRYIGlzIG5vdCBzZXQKIyBD T05GSUdfVUlPX1BSVVNTIGlzIG5vdCBzZXQKIyBDT05GSUdfVUlPX01GNjI0IGlzIG5vdCBzZXQK Q09ORklHX1VJT19IVl9HRU5FUklDPW0KQ09ORklHX1ZGSU9fSU9NTVVfVFlQRTE9bQpDT05GSUdf VkZJT19WSVJRRkQ9bQpDT05GSUdfVkZJTz1tCkNPTkZJR19WRklPX05PSU9NTVU9eQpDT05GSUdf VkZJT19QQ0k9bQojIENPTkZJR19WRklPX1BDSV9WR0EgaXMgbm90IHNldApDT05GSUdfVkZJT19Q Q0lfTU1BUD15CkNPTkZJR19WRklPX1BDSV9JTlRYPXkKIyBDT05GSUdfVkZJT19QQ0lfSUdEIGlz IG5vdCBzZXQKQ09ORklHX1ZGSU9fTURFVj1tCkNPTkZJR19WRklPX01ERVZfREVWSUNFPW0KQ09O RklHX0lSUV9CWVBBU1NfTUFOQUdFUj1tCiMgQ09ORklHX1ZJUlRfRFJJVkVSUyBpcyBub3Qgc2V0 CkNPTkZJR19WSVJUSU89eQpDT05GSUdfVklSVElPX01FTlU9eQpDT05GSUdfVklSVElPX1BDST15 CkNPTkZJR19WSVJUSU9fUENJX0xFR0FDWT15CiMgQ09ORklHX1ZJUlRJT19QTUVNIGlzIG5vdCBz ZXQKQ09ORklHX1ZJUlRJT19CQUxMT09OPXkKQ09ORklHX1ZJUlRJT19JTlBVVD1tCiMgQ09ORklH X1ZJUlRJT19NTUlPIGlzIG5vdCBzZXQKCiMKIyBNaWNyb3NvZnQgSHlwZXItViBndWVzdCBzdXBw b3J0CiMKQ09ORklHX0hZUEVSVj1tCkNPTkZJR19IWVBFUlZfVElNRVI9eQpDT05GSUdfSFlQRVJW X1VUSUxTPW0KQ09ORklHX0hZUEVSVl9CQUxMT09OPW0KIyBlbmQgb2YgTWljcm9zb2Z0IEh5cGVy LVYgZ3Vlc3Qgc3VwcG9ydAoKIwojIFhlbiBkcml2ZXIgc3VwcG9ydAojCkNPTkZJR19YRU5fQkFM TE9PTj15CiMgQ09ORklHX1hFTl9CQUxMT09OX01FTU9SWV9IT1RQTFVHIGlzIG5vdCBzZXQKQ09O RklHX1hFTl9TQ1JVQl9QQUdFU19ERUZBVUxUPXkKQ09ORklHX1hFTl9ERVZfRVZUQ0hOPW0KIyBD T05GSUdfWEVOX0JBQ0tFTkQgaXMgbm90IHNldApDT05GSUdfWEVORlM9bQpDT05GSUdfWEVOX0NP TVBBVF9YRU5GUz15CkNPTkZJR19YRU5fU1lTX0hZUEVSVklTT1I9eQpDT05GSUdfWEVOX1hFTkJV U19GUk9OVEVORD15CiMgQ09ORklHX1hFTl9HTlRERVYgaXMgbm90IHNldAojIENPTkZJR19YRU5f R1JBTlRfREVWX0FMTE9DIGlzIG5vdCBzZXQKIyBDT05GSUdfWEVOX0dSQU5UX0RNQV9BTExPQyBp cyBub3Qgc2V0CkNPTkZJR19TV0lPVExCX1hFTj15CiMgQ09ORklHX1hFTl9QVkNBTExTX0ZST05U RU5EIGlzIG5vdCBzZXQKQ09ORklHX1hFTl9QUklWQ01EPW0KQ09ORklHX1hFTl9IQVZFX1BWTU1V PXkKQ09ORklHX1hFTl9FRkk9eQpDT05GSUdfWEVOX0FVVE9fWExBVEU9eQpDT05GSUdfWEVOX0FD UEk9eQpDT05GSUdfWEVOX0hBVkVfVlBNVT15CiMgZW5kIG9mIFhlbiBkcml2ZXIgc3VwcG9ydAoK IyBDT05GSUdfR1JFWUJVUyBpcyBub3Qgc2V0CkNPTkZJR19TVEFHSU5HPXkKIyBDT05GSUdfUFJJ U00yX1VTQiBpcyBub3Qgc2V0CiMgQ09ORklHX0NPTUVESSBpcyBub3Qgc2V0CiMgQ09ORklHX1JU TDgxOTJVIGlzIG5vdCBzZXQKQ09ORklHX1JUTExJQj1tCkNPTkZJR19SVExMSUJfQ1JZUFRPX0ND TVA9bQpDT05GSUdfUlRMTElCX0NSWVBUT19US0lQPW0KQ09ORklHX1JUTExJQl9DUllQVE9fV0VQ PW0KQ09ORklHX1JUTDgxOTJFPW0KIyBDT05GSUdfUlRMODcyM0JTIGlzIG5vdCBzZXQKQ09ORklH X1I4NzEyVT1tCiMgQ09ORklHX1I4MTg4RVUgaXMgbm90IHNldAojIENPTkZJR19SVFM1MjA4IGlz IG5vdCBzZXQKIyBDT05GSUdfVlQ2NjU1IGlzIG5vdCBzZXQKIyBDT05GSUdfVlQ2NjU2IGlzIG5v dCBzZXQKCiMKIyBJSU8gc3RhZ2luZyBkcml2ZXJzCiMKCiMKIyBBY2NlbGVyb21ldGVycwojCiMg Q09ORklHX0FESVMxNjIwMyBpcyBub3Qgc2V0CiMgQ09ORklHX0FESVMxNjI0MCBpcyBub3Qgc2V0 CiMgZW5kIG9mIEFjY2VsZXJvbWV0ZXJzCgojCiMgQW5hbG9nIHRvIGRpZ2l0YWwgY29udmVydGVy cwojCiMgQ09ORklHX0FENzgxNiBpcyBub3Qgc2V0CiMgQ09ORklHX0FENzE5MiBpcyBub3Qgc2V0 CiMgQ09ORklHX0FENzI4MCBpcyBub3Qgc2V0CiMgZW5kIG9mIEFuYWxvZyB0byBkaWdpdGFsIGNv bnZlcnRlcnMKCiMKIyBBbmFsb2cgZGlnaXRhbCBiaS1kaXJlY3Rpb24gY29udmVydGVycwojCiMg Q09ORklHX0FEVDczMTYgaXMgbm90IHNldAojIGVuZCBvZiBBbmFsb2cgZGlnaXRhbCBiaS1kaXJl Y3Rpb24gY29udmVydGVycwoKIwojIENhcGFjaXRhbmNlIHRvIGRpZ2l0YWwgY29udmVydGVycwoj CiMgQ09ORklHX0FENzE1MCBpcyBub3Qgc2V0CiMgQ09ORklHX0FENzc0NiBpcyBub3Qgc2V0CiMg ZW5kIG9mIENhcGFjaXRhbmNlIHRvIGRpZ2l0YWwgY29udmVydGVycwoKIwojIERpcmVjdCBEaWdp dGFsIFN5bnRoZXNpcwojCiMgQ09ORklHX0FEOTgzMiBpcyBub3Qgc2V0CiMgQ09ORklHX0FEOTgz NCBpcyBub3Qgc2V0CiMgZW5kIG9mIERpcmVjdCBEaWdpdGFsIFN5bnRoZXNpcwoKIwojIE5ldHdv cmsgQW5hbHl6ZXIsIEltcGVkYW5jZSBDb252ZXJ0ZXJzCiMKIyBDT05GSUdfQUQ1OTMzIGlzIG5v dCBzZXQKIyBlbmQgb2YgTmV0d29yayBBbmFseXplciwgSW1wZWRhbmNlIENvbnZlcnRlcnMKCiMK IyBBY3RpdmUgZW5lcmd5IG1ldGVyaW5nIElDCiMKIyBDT05GSUdfQURFNzg1NCBpcyBub3Qgc2V0 CiMgZW5kIG9mIEFjdGl2ZSBlbmVyZ3kgbWV0ZXJpbmcgSUMKCiMKIyBSZXNvbHZlciB0byBkaWdp dGFsIGNvbnZlcnRlcnMKIwojIENPTkZJR19BRDJTMTIxMCBpcyBub3Qgc2V0CiMgZW5kIG9mIFJl c29sdmVyIHRvIGRpZ2l0YWwgY29udmVydGVycwojIGVuZCBvZiBJSU8gc3RhZ2luZyBkcml2ZXJz CgojIENPTkZJR19GQl9TTTc1MCBpcyBub3Qgc2V0CgojCiMgU3BlYWt1cCBjb25zb2xlIHNwZWVj aAojCiMgQ09ORklHX1NQRUFLVVAgaXMgbm90IHNldAojIGVuZCBvZiBTcGVha3VwIGNvbnNvbGUg c3BlZWNoCgojIENPTkZJR19TVEFHSU5HX01FRElBIGlzIG5vdCBzZXQKCiMKIyBBbmRyb2lkCiMK IyBDT05GSUdfQVNITUVNIGlzIG5vdCBzZXQKQ09ORklHX0lPTj15CkNPTkZJR19JT05fU1lTVEVN X0hFQVA9eQojIENPTkZJR19JT05fQ01BX0hFQVAgaXMgbm90IHNldAojIGVuZCBvZiBBbmRyb2lk CgojIENPTkZJR19MVEVfR0RNNzI0WCBpcyBub3Qgc2V0CkNPTkZJR19GSVJFV0lSRV9TRVJJQUw9 bQpDT05GSUdfRldUVFlfTUFYX1RPVEFMX1BPUlRTPTY0CkNPTkZJR19GV1RUWV9NQVhfQ0FSRF9Q T1JUUz0zMgojIENPTkZJR19HU19GUEdBQk9PVCBpcyBub3Qgc2V0CiMgQ09ORklHX1VOSVNZU1NQ QVIgaXMgbm90IHNldAojIENPTkZJR19GQl9URlQgaXMgbm90IHNldAojIENPTkZJR19XSUxDMTAw MF9TRElPIGlzIG5vdCBzZXQKIyBDT05GSUdfV0lMQzEwMDBfU1BJIGlzIG5vdCBzZXQKIyBDT05G SUdfTU9TVCBpcyBub3Qgc2V0CiMgQ09ORklHX0tTNzAxMCBpcyBub3Qgc2V0CiMgQ09ORklHX1BJ NDMzIGlzIG5vdCBzZXQKCiMKIyBHYXNrZXQgZGV2aWNlcwojCiMgQ09ORklHX1NUQUdJTkdfR0FT S0VUX0ZSQU1FV09SSyBpcyBub3Qgc2V0CiMgZW5kIG9mIEdhc2tldCBkZXZpY2VzCgojIENPTkZJ R19GSUVMREJVU19ERVYgaXMgbm90IHNldAojIENPTkZJR19LUEMyMDAwIGlzIG5vdCBzZXQKQ09O RklHX1VTQl9XVVNCPW0KQ09ORklHX1VTQl9XVVNCX0NCQUY9bQojIENPTkZJR19VU0JfV1VTQl9D QkFGX0RFQlVHIGlzIG5vdCBzZXQKIyBDT05GSUdfVVNCX1dIQ0lfSENEIGlzIG5vdCBzZXQKQ09O RklHX1VTQl9IV0FfSENEPW0KQ09ORklHX1VXQj1tCkNPTkZJR19VV0JfSFdBPW0KQ09ORklHX1VX Ql9XSENJPW0KQ09ORklHX1VXQl9JMTQ4MFU9bQojIENPTkZJR19TVEFHSU5HX0VYRkFUX0ZTIGlz IG5vdCBzZXQKQ09ORklHX1FMR0U9bQojIENPTkZJR19ORVRfVkVORE9SX0hQIGlzIG5vdCBzZXQK IyBDT05GSUdfV0ZYIGlzIG5vdCBzZXQKQ09ORklHX1g4Nl9QTEFURk9STV9ERVZJQ0VTPXkKQ09O RklHX0FDRVJfV01JPW0KIyBDT05GSUdfQUNFUl9XSVJFTEVTUyBpcyBub3Qgc2V0CkNPTkZJR19B Q0VSSERGPW0KIyBDT05GSUdfQUxJRU5XQVJFX1dNSSBpcyBub3Qgc2V0CkNPTkZJR19BU1VTX0xB UFRPUD1tCkNPTkZJR19EQ0RCQVM9bQpDT05GSUdfREVMTF9TTUJJT1M9bQpDT05GSUdfREVMTF9T TUJJT1NfV01JPXkKQ09ORklHX0RFTExfU01CSU9TX1NNTT15CkNPTkZJR19ERUxMX0xBUFRPUD1t CkNPTkZJR19ERUxMX1dNST1tCkNPTkZJR19ERUxMX1dNSV9ERVNDUklQVE9SPW0KQ09ORklHX0RF TExfV01JX0FJTz1tCiMgQ09ORklHX0RFTExfV01JX0xFRCBpcyBub3Qgc2V0CkNPTkZJR19ERUxM X1NNTzg4MDA9bQpDT05GSUdfREVMTF9SQlROPW0KQ09ORklHX0RFTExfUkJVPW0KQ09ORklHX0ZV SklUU1VfTEFQVE9QPW0KQ09ORklHX0ZVSklUU1VfVEFCTEVUPW0KQ09ORklHX0FNSUxPX1JGS0lM TD1tCiMgQ09ORklHX0dQRF9QT0NLRVRfRkFOIGlzIG5vdCBzZXQKQ09ORklHX0hQX0FDQ0VMPW0K Q09ORklHX0hQX1dJUkVMRVNTPW0KQ09ORklHX0hQX1dNST1tCiMgQ09ORklHX0xHX0xBUFRPUCBp cyBub3Qgc2V0CkNPTkZJR19NU0lfTEFQVE9QPW0KQ09ORklHX1BBTkFTT05JQ19MQVBUT1A9bQpD T05GSUdfQ09NUEFMX0xBUFRPUD1tCkNPTkZJR19TT05ZX0xBUFRPUD1tCkNPTkZJR19TT05ZUElf Q09NUEFUPXkKQ09ORklHX0lERUFQQURfTEFQVE9QPW0KIyBDT05GSUdfU1VSRkFDRTNfV01JIGlz IG5vdCBzZXQKQ09ORklHX1RISU5LUEFEX0FDUEk9bQpDT05GSUdfVEhJTktQQURfQUNQSV9BTFNB X1NVUFBPUlQ9eQojIENPTkZJR19USElOS1BBRF9BQ1BJX0RFQlVHRkFDSUxJVElFUyBpcyBub3Qg c2V0CiMgQ09ORklHX1RISU5LUEFEX0FDUElfREVCVUcgaXMgbm90IHNldAojIENPTkZJR19USElO S1BBRF9BQ1BJX1VOU0FGRV9MRURTIGlzIG5vdCBzZXQKQ09ORklHX1RISU5LUEFEX0FDUElfVklE RU89eQpDT05GSUdfVEhJTktQQURfQUNQSV9IT1RLRVlfUE9MTD15CkNPTkZJR19TRU5TT1JTX0hE QVBTPW0KIyBDT05GSUdfSU5URUxfTUVOTE9XIGlzIG5vdCBzZXQKQ09ORklHX0VFRVBDX0xBUFRP UD1tCkNPTkZJR19BU1VTX1dNST1tCkNPTkZJR19BU1VTX05CX1dNST1tCkNPTkZJR19FRUVQQ19X TUk9bQojIENPTkZJR19BU1VTX1dJUkVMRVNTIGlzIG5vdCBzZXQKQ09ORklHX0FDUElfV01JPW0K Q09ORklHX1dNSV9CTU9GPW0KQ09ORklHX0lOVEVMX1dNSV9USFVOREVSQk9MVD1tCiMgQ09ORklH X1hJQU9NSV9XTUkgaXMgbm90IHNldApDT05GSUdfTVNJX1dNST1tCiMgQ09ORklHX1BFQVFfV01J IGlzIG5vdCBzZXQKQ09ORklHX1RPUFNUQVJfTEFQVE9QPW0KQ09ORklHX0FDUElfVE9TSElCQT1t CkNPTkZJR19UT1NISUJBX0JUX1JGS0lMTD1tCiMgQ09ORklHX1RPU0hJQkFfSEFQUyBpcyBub3Qg c2V0CiMgQ09ORklHX1RPU0hJQkFfV01JIGlzIG5vdCBzZXQKQ09ORklHX0FDUElfQ01QQz1tCiMg Q09ORklHX0lOVEVMX0lOVDAwMDJfVkdQSU8gaXMgbm90IHNldApDT05GSUdfSU5URUxfSElEX0VW RU5UPW0KQ09ORklHX0lOVEVMX1ZCVE49bQpDT05GSUdfSU5URUxfSVBTPW0KQ09ORklHX0lOVEVM X1BNQ19DT1JFPW0KIyBDT05GSUdfSUJNX1JUTCBpcyBub3Qgc2V0CkNPTkZJR19TQU1TVU5HX0xB UFRPUD1tCkNPTkZJR19NWE1fV01JPW0KQ09ORklHX0lOVEVMX09BS1RSQUlMPW0KQ09ORklHX1NB TVNVTkdfUTEwPW0KQ09ORklHX0FQUExFX0dNVVg9bQojIENPTkZJR19JTlRFTF9SU1QgaXMgbm90 IHNldAojIENPTkZJR19JTlRFTF9TTUFSVENPTk5FQ1QgaXMgbm90IHNldAojIENPTkZJR19JTlRF TF9QTUNfSVBDIGlzIG5vdCBzZXQKIyBDT05GSUdfU1VSRkFDRV9QUk8zX0JVVFRPTiBpcyBub3Qg c2V0CiMgQ09ORklHX0lOVEVMX1BVTklUX0lQQyBpcyBub3Qgc2V0CiMgQ09ORklHX01MWF9QTEFU Rk9STSBpcyBub3Qgc2V0CiMgQ09ORklHX0lOVEVMX1RVUkJPX01BWF8zIGlzIG5vdCBzZXQKIyBD T05GSUdfSTJDX01VTFRJX0lOU1RBTlRJQVRFIGlzIG5vdCBzZXQKIyBDT05GSUdfSU5URUxfQVRP TUlTUDJfUE0gaXMgbm90IHNldAojIENPTkZJR19IVUFXRUlfV01JIGlzIG5vdCBzZXQKIyBDT05G SUdfUENFTkdJTkVTX0FQVTIgaXMgbm90IHNldAojIENPTkZJR19JTlRFTF9VTkNPUkVfRlJFUV9D T05UUk9MIGlzIG5vdCBzZXQKCiMKIyBJbnRlbCBTcGVlZCBTZWxlY3QgVGVjaG5vbG9neSBpbnRl cmZhY2Ugc3VwcG9ydAojCiMgQ09ORklHX0lOVEVMX1NQRUVEX1NFTEVDVF9JTlRFUkZBQ0UgaXMg bm90IHNldAojIGVuZCBvZiBJbnRlbCBTcGVlZCBTZWxlY3QgVGVjaG5vbG9neSBpbnRlcmZhY2Ug c3VwcG9ydAoKIyBDT05GSUdfU1lTVEVNNzZfQUNQSSBpcyBub3Qgc2V0CkNPTkZJR19QTUNfQVRP TT15CiMgQ09ORklHX01GRF9DUk9TX0VDIGlzIG5vdCBzZXQKIyBDT05GSUdfQ0hST01FX1BMQVRG T1JNUyBpcyBub3Qgc2V0CiMgQ09ORklHX01FTExBTk9YX1BMQVRGT1JNIGlzIG5vdCBzZXQKQ09O RklHX0NMS0RFVl9MT09LVVA9eQpDT05GSUdfSEFWRV9DTEtfUFJFUEFSRT15CkNPTkZJR19DT01N T05fQ0xLPXkKCiMKIyBDb21tb24gQ2xvY2sgRnJhbWV3b3JrCiMKIyBDT05GSUdfQ09NTU9OX0NM S19NQVg5NDg1IGlzIG5vdCBzZXQKIyBDT05GSUdfQ09NTU9OX0NMS19TSTUzNDEgaXMgbm90IHNl dAojIENPTkZJR19DT01NT05fQ0xLX1NJNTM1MSBpcyBub3Qgc2V0CiMgQ09ORklHX0NPTU1PTl9D TEtfU0k1NDQgaXMgbm90IHNldAojIENPTkZJR19DT01NT05fQ0xLX0NEQ0U3MDYgaXMgbm90IHNl dAojIENPTkZJR19DT01NT05fQ0xLX0NTMjAwMF9DUCBpcyBub3Qgc2V0CiMgQ09ORklHX0NPTU1P Tl9DTEtfUFdNIGlzIG5vdCBzZXQKIyBlbmQgb2YgQ29tbW9uIENsb2NrIEZyYW1ld29yawoKIyBD T05GSUdfSFdTUElOTE9DSyBpcyBub3Qgc2V0CgojCiMgQ2xvY2sgU291cmNlIGRyaXZlcnMKIwpD T05GSUdfQ0xLRVZUX0k4MjUzPXkKQ09ORklHX0k4MjUzX0xPQ0s9eQpDT05GSUdfQ0xLQkxEX0k4 MjUzPXkKIyBlbmQgb2YgQ2xvY2sgU291cmNlIGRyaXZlcnMKCkNPTkZJR19NQUlMQk9YPXkKQ09O RklHX1BDQz15CiMgQ09ORklHX0FMVEVSQV9NQk9YIGlzIG5vdCBzZXQKQ09ORklHX0lPTU1VX0lP VkE9eQpDT05GSUdfSU9NTVVfQVBJPXkKQ09ORklHX0lPTU1VX1NVUFBPUlQ9eQoKIwojIEdlbmVy aWMgSU9NTVUgUGFnZXRhYmxlIFN1cHBvcnQKIwojIGVuZCBvZiBHZW5lcmljIElPTU1VIFBhZ2V0 YWJsZSBTdXBwb3J0CgojIENPTkZJR19JT01NVV9ERUJVR0ZTIGlzIG5vdCBzZXQKIyBDT05GSUdf SU9NTVVfREVGQVVMVF9QQVNTVEhST1VHSCBpcyBub3Qgc2V0CkNPTkZJR19JT01NVV9ETUE9eQpD T05GSUdfQU1EX0lPTU1VPXkKQ09ORklHX0FNRF9JT01NVV9WMj1tCkNPTkZJR19ETUFSX1RBQkxF PXkKQ09ORklHX0lOVEVMX0lPTU1VPXkKIyBDT05GSUdfSU5URUxfSU9NTVVfU1ZNIGlzIG5vdCBz ZXQKIyBDT05GSUdfSU5URUxfSU9NTVVfREVGQVVMVF9PTiBpcyBub3Qgc2V0CkNPTkZJR19JTlRF TF9JT01NVV9GTE9QUFlfV0E9eQojIENPTkZJR19JTlRFTF9JT01NVV9TQ0FMQUJMRV9NT0RFX0RF RkFVTFRfT04gaXMgbm90IHNldApDT05GSUdfSVJRX1JFTUFQPXkKQ09ORklHX0hZUEVSVl9JT01N VT15CgojCiMgUmVtb3RlcHJvYyBkcml2ZXJzCiMKIyBDT05GSUdfUkVNT1RFUFJPQyBpcyBub3Qg c2V0CiMgZW5kIG9mIFJlbW90ZXByb2MgZHJpdmVycwoKIwojIFJwbXNnIGRyaXZlcnMKIwojIENP TkZJR19SUE1TR19RQ09NX0dMSU5LX1JQTSBpcyBub3Qgc2V0CiMgQ09ORklHX1JQTVNHX1ZJUlRJ TyBpcyBub3Qgc2V0CiMgZW5kIG9mIFJwbXNnIGRyaXZlcnMKCiMgQ09ORklHX1NPVU5EV0lSRSBp cyBub3Qgc2V0CgojCiMgU09DIChTeXN0ZW0gT24gQ2hpcCkgc3BlY2lmaWMgRHJpdmVycwojCgoj CiMgQW1sb2dpYyBTb0MgZHJpdmVycwojCiMgZW5kIG9mIEFtbG9naWMgU29DIGRyaXZlcnMKCiMK IyBBc3BlZWQgU29DIGRyaXZlcnMKIwojIGVuZCBvZiBBc3BlZWQgU29DIGRyaXZlcnMKCiMKIyBC cm9hZGNvbSBTb0MgZHJpdmVycwojCiMgZW5kIG9mIEJyb2FkY29tIFNvQyBkcml2ZXJzCgojCiMg TlhQL0ZyZWVzY2FsZSBRb3JJUSBTb0MgZHJpdmVycwojCiMgZW5kIG9mIE5YUC9GcmVlc2NhbGUg UW9ySVEgU29DIGRyaXZlcnMKCiMKIyBpLk1YIFNvQyBkcml2ZXJzCiMKIyBlbmQgb2YgaS5NWCBT b0MgZHJpdmVycwoKIwojIFF1YWxjb21tIFNvQyBkcml2ZXJzCiMKIyBlbmQgb2YgUXVhbGNvbW0g U29DIGRyaXZlcnMKCiMgQ09ORklHX1NPQ19USSBpcyBub3Qgc2V0CgojCiMgWGlsaW54IFNvQyBk cml2ZXJzCiMKIyBDT05GSUdfWElMSU5YX1ZDVSBpcyBub3Qgc2V0CiMgZW5kIG9mIFhpbGlueCBT b0MgZHJpdmVycwojIGVuZCBvZiBTT0MgKFN5c3RlbSBPbiBDaGlwKSBzcGVjaWZpYyBEcml2ZXJz CgpDT05GSUdfUE1fREVWRlJFUT15CgojCiMgREVWRlJFUSBHb3Zlcm5vcnMKIwpDT05GSUdfREVW RlJFUV9HT1ZfU0lNUExFX09OREVNQU5EPW0KIyBDT05GSUdfREVWRlJFUV9HT1ZfUEVSRk9STUFO Q0UgaXMgbm90IHNldAojIENPTkZJR19ERVZGUkVRX0dPVl9QT1dFUlNBVkUgaXMgbm90IHNldAoj IENPTkZJR19ERVZGUkVRX0dPVl9VU0VSU1BBQ0UgaXMgbm90IHNldAojIENPTkZJR19ERVZGUkVR X0dPVl9QQVNTSVZFIGlzIG5vdCBzZXQKCiMKIyBERVZGUkVRIERyaXZlcnMKIwojIENPTkZJR19Q TV9ERVZGUkVRX0VWRU5UIGlzIG5vdCBzZXQKIyBDT05GSUdfRVhUQ09OIGlzIG5vdCBzZXQKIyBD T05GSUdfTUVNT1JZIGlzIG5vdCBzZXQKQ09ORklHX0lJTz15CkNPTkZJR19JSU9fQlVGRkVSPXkK Q09ORklHX0lJT19CVUZGRVJfQ0I9eQojIENPTkZJR19JSU9fQlVGRkVSX0hXX0NPTlNVTUVSIGlz IG5vdCBzZXQKQ09ORklHX0lJT19LRklGT19CVUY9eQpDT05GSUdfSUlPX1RSSUdHRVJFRF9CVUZG RVI9bQojIENPTkZJR19JSU9fQ09ORklHRlMgaXMgbm90IHNldApDT05GSUdfSUlPX1RSSUdHRVI9 eQpDT05GSUdfSUlPX0NPTlNVTUVSU19QRVJfVFJJR0dFUj0yCiMgQ09ORklHX0lJT19TV19ERVZJ Q0UgaXMgbm90IHNldAojIENPTkZJR19JSU9fU1dfVFJJR0dFUiBpcyBub3Qgc2V0CgojCiMgQWNj ZWxlcm9tZXRlcnMKIwojIENPTkZJR19BRElTMTYyMDEgaXMgbm90IHNldAojIENPTkZJR19BRElT MTYyMDkgaXMgbm90IHNldAojIENPTkZJR19BRFhMMzQ1X0kyQyBpcyBub3Qgc2V0CiMgQ09ORklH X0FEWEwzNDVfU1BJIGlzIG5vdCBzZXQKIyBDT05GSUdfQURYTDM3Ml9TUEkgaXMgbm90IHNldAoj IENPTkZJR19BRFhMMzcyX0kyQyBpcyBub3Qgc2V0CiMgQ09ORklHX0JNQTE4MCBpcyBub3Qgc2V0 CiMgQ09ORklHX0JNQTIyMCBpcyBub3Qgc2V0CiMgQ09ORklHX0JNQTQwMCBpcyBub3Qgc2V0CiMg Q09ORklHX0JNQzE1MF9BQ0NFTCBpcyBub3Qgc2V0CiMgQ09ORklHX0RBMjgwIGlzIG5vdCBzZXQK IyBDT05GSUdfREEzMTEgaXMgbm90IHNldAojIENPTkZJR19ETUFSRDA5IGlzIG5vdCBzZXQKIyBD T05GSUdfRE1BUkQxMCBpcyBub3Qgc2V0CkNPTkZJR19ISURfU0VOU09SX0FDQ0VMXzNEPW0KIyBD T05GSUdfSUlPX1NUX0FDQ0VMXzNBWElTIGlzIG5vdCBzZXQKIyBDT05GSUdfS1hTRDkgaXMgbm90 IHNldAojIENPTkZJR19LWENKSzEwMTMgaXMgbm90IHNldAojIENPTkZJR19NQzMyMzAgaXMgbm90 IHNldAojIENPTkZJR19NTUE3NDU1X0kyQyBpcyBub3Qgc2V0CiMgQ09ORklHX01NQTc0NTVfU1BJ IGlzIG5vdCBzZXQKIyBDT05GSUdfTU1BNzY2MCBpcyBub3Qgc2V0CiMgQ09ORklHX01NQTg0NTIg aXMgbm90IHNldAojIENPTkZJR19NTUE5NTUxIGlzIG5vdCBzZXQKIyBDT05GSUdfTU1BOTU1MyBp cyBub3Qgc2V0CiMgQ09ORklHX01YQzQwMDUgaXMgbm90IHNldAojIENPTkZJR19NWEM2MjU1IGlz IG5vdCBzZXQKIyBDT05GSUdfU0NBMzAwMCBpcyBub3Qgc2V0CiMgQ09ORklHX1NUSzgzMTIgaXMg bm90IHNldAojIENPTkZJR19TVEs4QkE1MCBpcyBub3Qgc2V0CiMgZW5kIG9mIEFjY2VsZXJvbWV0 ZXJzCgojCiMgQW5hbG9nIHRvIGRpZ2l0YWwgY29udmVydGVycwojCiMgQ09ORklHX0FENzA5MVI1 IGlzIG5vdCBzZXQKIyBDT05GSUdfQUQ3MTI0IGlzIG5vdCBzZXQKIyBDT05GSUdfQUQ3MjY2IGlz IG5vdCBzZXQKIyBDT05GSUdfQUQ3MjkxIGlzIG5vdCBzZXQKIyBDT05GSUdfQUQ3MjkyIGlzIG5v dCBzZXQKIyBDT05GSUdfQUQ3Mjk4IGlzIG5vdCBzZXQKIyBDT05GSUdfQUQ3NDc2IGlzIG5vdCBz ZXQKIyBDT05GSUdfQUQ3NjA2X0lGQUNFX1BBUkFMTEVMIGlzIG5vdCBzZXQKIyBDT05GSUdfQUQ3 NjA2X0lGQUNFX1NQSSBpcyBub3Qgc2V0CiMgQ09ORklHX0FENzc2NiBpcyBub3Qgc2V0CiMgQ09O RklHX0FENzc2OF8xIGlzIG5vdCBzZXQKIyBDT05GSUdfQUQ3NzgwIGlzIG5vdCBzZXQKIyBDT05G SUdfQUQ3NzkxIGlzIG5vdCBzZXQKIyBDT05GSUdfQUQ3NzkzIGlzIG5vdCBzZXQKIyBDT05GSUdf QUQ3ODg3IGlzIG5vdCBzZXQKIyBDT05GSUdfQUQ3OTIzIGlzIG5vdCBzZXQKIyBDT05GSUdfQUQ3 OTQ5IGlzIG5vdCBzZXQKIyBDT05GSUdfQUQ3OTlYIGlzIG5vdCBzZXQKIyBDT05GSUdfSEk4NDM1 IGlzIG5vdCBzZXQKIyBDT05GSUdfSFg3MTEgaXMgbm90IHNldAojIENPTkZJR19JTkEyWFhfQURD IGlzIG5vdCBzZXQKIyBDT05GSUdfTFRDMjQ3MSBpcyBub3Qgc2V0CiMgQ09ORklHX0xUQzI0ODUg aXMgbm90IHNldAojIENPTkZJR19MVEMyNDk2IGlzIG5vdCBzZXQKIyBDT05GSUdfTFRDMjQ5NyBp cyBub3Qgc2V0CiMgQ09ORklHX01BWDEwMjcgaXMgbm90IHNldAojIENPTkZJR19NQVgxMTEwMCBp cyBub3Qgc2V0CiMgQ09ORklHX01BWDExMTggaXMgbm90IHNldAojIENPTkZJR19NQVgxMzYzIGlz IG5vdCBzZXQKIyBDT05GSUdfTUFYOTYxMSBpcyBub3Qgc2V0CiMgQ09ORklHX01DUDMyMFggaXMg bm90IHNldAojIENPTkZJR19NQ1AzNDIyIGlzIG5vdCBzZXQKIyBDT05GSUdfTUNQMzkxMSBpcyBu b3Qgc2V0CiMgQ09ORklHX05BVTc4MDIgaXMgbm90IHNldAojIENPTkZJR19USV9BREMwODFDIGlz IG5vdCBzZXQKIyBDT05GSUdfVElfQURDMDgzMiBpcyBub3Qgc2V0CiMgQ09ORklHX1RJX0FEQzA4 NFMwMjEgaXMgbm90IHNldAojIENPTkZJR19USV9BREMxMjEzOCBpcyBub3Qgc2V0CiMgQ09ORklH X1RJX0FEQzEwOFMxMDIgaXMgbm90IHNldAojIENPTkZJR19USV9BREMxMjhTMDUyIGlzIG5vdCBz ZXQKIyBDT05GSUdfVElfQURDMTYxUzYyNiBpcyBub3Qgc2V0CiMgQ09ORklHX1RJX0FEUzEwMTUg aXMgbm90IHNldAojIENPTkZJR19USV9BRFM3OTUwIGlzIG5vdCBzZXQKIyBDT05GSUdfVElfVExD NDU0MSBpcyBub3Qgc2V0CiMgQ09ORklHX1ZJUEVSQk9BUkRfQURDIGlzIG5vdCBzZXQKIyBDT05G SUdfWElMSU5YX1hBREMgaXMgbm90IHNldAojIGVuZCBvZiBBbmFsb2cgdG8gZGlnaXRhbCBjb252 ZXJ0ZXJzCgojCiMgQW5hbG9nIEZyb250IEVuZHMKIwojIGVuZCBvZiBBbmFsb2cgRnJvbnQgRW5k cwoKIwojIEFtcGxpZmllcnMKIwojIENPTkZJR19BRDgzNjYgaXMgbm90IHNldAojIGVuZCBvZiBB bXBsaWZpZXJzCgojCiMgQ2hlbWljYWwgU2Vuc29ycwojCiMgQ09ORklHX0FUTEFTX1BIX1NFTlNP UiBpcyBub3Qgc2V0CiMgQ09ORklHX0JNRTY4MCBpcyBub3Qgc2V0CiMgQ09ORklHX0NDUzgxMSBp cyBub3Qgc2V0CiMgQ09ORklHX0lBUUNPUkUgaXMgbm90IHNldAojIENPTkZJR19TRU5TSVJJT05f U0dQMzAgaXMgbm90IHNldAojIENPTkZJR19TUFMzMCBpcyBub3Qgc2V0CiMgQ09ORklHX1ZaODlY IGlzIG5vdCBzZXQKIyBlbmQgb2YgQ2hlbWljYWwgU2Vuc29ycwoKIwojIEhpZCBTZW5zb3IgSUlP IENvbW1vbgojCkNPTkZJR19ISURfU0VOU09SX0lJT19DT01NT049bQpDT05GSUdfSElEX1NFTlNP Ul9JSU9fVFJJR0dFUj1tCiMgZW5kIG9mIEhpZCBTZW5zb3IgSUlPIENvbW1vbgoKIwojIFNTUCBT ZW5zb3IgQ29tbW9uCiMKIyBDT05GSUdfSUlPX1NTUF9TRU5TT1JIVUIgaXMgbm90IHNldAojIGVu ZCBvZiBTU1AgU2Vuc29yIENvbW1vbgoKIwojIERpZ2l0YWwgdG8gYW5hbG9nIGNvbnZlcnRlcnMK IwojIENPTkZJR19BRDUwNjQgaXMgbm90IHNldAojIENPTkZJR19BRDUzNjAgaXMgbm90IHNldAoj IENPTkZJR19BRDUzODAgaXMgbm90IHNldAojIENPTkZJR19BRDU0MjEgaXMgbm90IHNldAojIENP TkZJR19BRDU0NDYgaXMgbm90IHNldAojIENPTkZJR19BRDU0NDkgaXMgbm90IHNldAojIENPTkZJ R19BRDU1OTJSIGlzIG5vdCBzZXQKIyBDT05GSUdfQUQ1NTkzUiBpcyBub3Qgc2V0CiMgQ09ORklH X0FENTUwNCBpcyBub3Qgc2V0CiMgQ09ORklHX0FENTYyNFJfU1BJIGlzIG5vdCBzZXQKIyBDT05G SUdfTFRDMTY2MCBpcyBub3Qgc2V0CiMgQ09ORklHX0xUQzI2MzIgaXMgbm90IHNldAojIENPTkZJ R19BRDU2ODZfU1BJIGlzIG5vdCBzZXQKIyBDT05GSUdfQUQ1Njk2X0kyQyBpcyBub3Qgc2V0CiMg Q09ORklHX0FENTc1NSBpcyBub3Qgc2V0CiMgQ09ORklHX0FENTc1OCBpcyBub3Qgc2V0CiMgQ09O RklHX0FENTc2MSBpcyBub3Qgc2V0CiMgQ09ORklHX0FENTc2NCBpcyBub3Qgc2V0CiMgQ09ORklH X0FENTc5MSBpcyBub3Qgc2V0CiMgQ09ORklHX0FENzMwMyBpcyBub3Qgc2V0CiMgQ09ORklHX0FE ODgwMSBpcyBub3Qgc2V0CiMgQ09ORklHX0RTNDQyNCBpcyBub3Qgc2V0CiMgQ09ORklHX002MjMz MiBpcyBub3Qgc2V0CiMgQ09ORklHX01BWDUxNyBpcyBub3Qgc2V0CiMgQ09ORklHX01DUDQ3MjUg aXMgbm90IHNldAojIENPTkZJR19NQ1A0OTIyIGlzIG5vdCBzZXQKIyBDT05GSUdfVElfREFDMDgy UzA4NSBpcyBub3Qgc2V0CiMgQ09ORklHX1RJX0RBQzU1NzEgaXMgbm90IHNldAojIENPTkZJR19U SV9EQUM3MzExIGlzIG5vdCBzZXQKIyBDT05GSUdfVElfREFDNzYxMiBpcyBub3Qgc2V0CiMgZW5k IG9mIERpZ2l0YWwgdG8gYW5hbG9nIGNvbnZlcnRlcnMKCiMKIyBJSU8gZHVtbXkgZHJpdmVyCiMK IyBlbmQgb2YgSUlPIGR1bW15IGRyaXZlcgoKIwojIEZyZXF1ZW5jeSBTeW50aGVzaXplcnMgRERT L1BMTAojCgojCiMgQ2xvY2sgR2VuZXJhdG9yL0Rpc3RyaWJ1dGlvbgojCiMgQ09ORklHX0FEOTUy MyBpcyBub3Qgc2V0CiMgZW5kIG9mIENsb2NrIEdlbmVyYXRvci9EaXN0cmlidXRpb24KCiMKIyBQ aGFzZS1Mb2NrZWQgTG9vcCAoUExMKSBmcmVxdWVuY3kgc3ludGhlc2l6ZXJzCiMKIyBDT05GSUdf QURGNDM1MCBpcyBub3Qgc2V0CiMgQ09ORklHX0FERjQzNzEgaXMgbm90IHNldAojIGVuZCBvZiBQ aGFzZS1Mb2NrZWQgTG9vcCAoUExMKSBmcmVxdWVuY3kgc3ludGhlc2l6ZXJzCiMgZW5kIG9mIEZy ZXF1ZW5jeSBTeW50aGVzaXplcnMgRERTL1BMTAoKIwojIERpZ2l0YWwgZ3lyb3Njb3BlIHNlbnNv cnMKIwojIENPTkZJR19BRElTMTYwODAgaXMgbm90IHNldAojIENPTkZJR19BRElTMTYxMzAgaXMg bm90IHNldAojIENPTkZJR19BRElTMTYxMzYgaXMgbm90IHNldAojIENPTkZJR19BRElTMTYyNjAg aXMgbm90IHNldAojIENPTkZJR19BRFhSUzQ1MCBpcyBub3Qgc2V0CiMgQ09ORklHX0JNRzE2MCBp cyBub3Qgc2V0CiMgQ09ORklHX0ZYQVMyMTAwMkMgaXMgbm90IHNldApDT05GSUdfSElEX1NFTlNP Ul9HWVJPXzNEPW0KIyBDT05GSUdfTVBVMzA1MF9JMkMgaXMgbm90IHNldAojIENPTkZJR19JSU9f U1RfR1lST18zQVhJUyBpcyBub3Qgc2V0CiMgQ09ORklHX0lURzMyMDAgaXMgbm90IHNldAojIGVu ZCBvZiBEaWdpdGFsIGd5cm9zY29wZSBzZW5zb3JzCgojCiMgSGVhbHRoIFNlbnNvcnMKIwoKIwoj IEhlYXJ0IFJhdGUgTW9uaXRvcnMKIwojIENPTkZJR19BRkU0NDAzIGlzIG5vdCBzZXQKIyBDT05G SUdfQUZFNDQwNCBpcyBub3Qgc2V0CiMgQ09ORklHX01BWDMwMTAwIGlzIG5vdCBzZXQKIyBDT05G SUdfTUFYMzAxMDIgaXMgbm90IHNldAojIGVuZCBvZiBIZWFydCBSYXRlIE1vbml0b3JzCiMgZW5k IG9mIEhlYWx0aCBTZW5zb3JzCgojCiMgSHVtaWRpdHkgc2Vuc29ycwojCiMgQ09ORklHX0FNMjMx NSBpcyBub3Qgc2V0CiMgQ09ORklHX0RIVDExIGlzIG5vdCBzZXQKIyBDT05GSUdfSERDMTAwWCBp cyBub3Qgc2V0CiMgQ09ORklHX0hJRF9TRU5TT1JfSFVNSURJVFkgaXMgbm90IHNldAojIENPTkZJ R19IVFMyMjEgaXMgbm90IHNldAojIENPTkZJR19IVFUyMSBpcyBub3Qgc2V0CiMgQ09ORklHX1NJ NzAwNSBpcyBub3Qgc2V0CiMgQ09ORklHX1NJNzAyMCBpcyBub3Qgc2V0CiMgZW5kIG9mIEh1bWlk aXR5IHNlbnNvcnMKCiMKIyBJbmVydGlhbCBtZWFzdXJlbWVudCB1bml0cwojCiMgQ09ORklHX0FE SVMxNjQwMCBpcyBub3Qgc2V0CiMgQ09ORklHX0FESVMxNjQ2MCBpcyBub3Qgc2V0CiMgQ09ORklH X0FESVMxNjQ4MCBpcyBub3Qgc2V0CiMgQ09ORklHX0JNSTE2MF9JMkMgaXMgbm90IHNldAojIENP TkZJR19CTUkxNjBfU1BJIGlzIG5vdCBzZXQKIyBDT05GSUdfRlhPUzg3MDBfSTJDIGlzIG5vdCBz ZXQKIyBDT05GSUdfRlhPUzg3MDBfU1BJIGlzIG5vdCBzZXQKIyBDT05GSUdfS01YNjEgaXMgbm90 IHNldAojIENPTkZJR19JTlZfTVBVNjA1MF9JMkMgaXMgbm90IHNldAojIENPTkZJR19JTlZfTVBV NjA1MF9TUEkgaXMgbm90IHNldAojIENPTkZJR19JSU9fU1RfTFNNNkRTWCBpcyBub3Qgc2V0CiMg ZW5kIG9mIEluZXJ0aWFsIG1lYXN1cmVtZW50IHVuaXRzCgojCiMgTGlnaHQgc2Vuc29ycwojCiMg Q09ORklHX0FDUElfQUxTIGlzIG5vdCBzZXQKIyBDT05GSUdfQURKRF9TMzExIGlzIG5vdCBzZXQK IyBDT05GSUdfQURVWDEwMjAgaXMgbm90IHNldAojIENPTkZJR19BTDMzMjBBIGlzIG5vdCBzZXQK IyBDT05GSUdfQVBEUzkzMDAgaXMgbm90IHNldAojIENPTkZJR19BUERTOTk2MCBpcyBub3Qgc2V0 CiMgQ09ORklHX0JIMTc1MCBpcyBub3Qgc2V0CiMgQ09ORklHX0JIMTc4MCBpcyBub3Qgc2V0CiMg Q09ORklHX0NNMzIxODEgaXMgbm90IHNldAojIENPTkZJR19DTTMyMzIgaXMgbm90IHNldAojIENP TkZJR19DTTMzMjMgaXMgbm90IHNldAojIENPTkZJR19DTTM2NjUxIGlzIG5vdCBzZXQKIyBDT05G SUdfR1AyQVAwMjBBMDBGIGlzIG5vdCBzZXQKIyBDT05GSUdfU0VOU09SU19JU0wyOTAxOCBpcyBu b3Qgc2V0CiMgQ09ORklHX1NFTlNPUlNfSVNMMjkwMjggaXMgbm90IHNldAojIENPTkZJR19JU0wy OTEyNSBpcyBub3Qgc2V0CkNPTkZJR19ISURfU0VOU09SX0FMUz1tCkNPTkZJR19ISURfU0VOU09S X1BST1g9bQojIENPTkZJR19KU0ExMjEyIGlzIG5vdCBzZXQKIyBDT05GSUdfUlBSMDUyMSBpcyBu b3Qgc2V0CiMgQ09ORklHX0xUUjUwMSBpcyBub3Qgc2V0CiMgQ09ORklHX0xWMDEwNENTIGlzIG5v dCBzZXQKIyBDT05GSUdfTUFYNDQwMDAgaXMgbm90IHNldAojIENPTkZJR19NQVg0NDAwOSBpcyBu b3Qgc2V0CiMgQ09ORklHX05PQTEzMDUgaXMgbm90IHNldAojIENPTkZJR19PUFQzMDAxIGlzIG5v dCBzZXQKIyBDT05GSUdfUEExMjIwMzAwMSBpcyBub3Qgc2V0CiMgQ09ORklHX1NJMTEzMyBpcyBu b3Qgc2V0CiMgQ09ORklHX1NJMTE0NSBpcyBub3Qgc2V0CiMgQ09ORklHX1NUSzMzMTAgaXMgbm90 IHNldAojIENPTkZJR19TVF9VVklTMjUgaXMgbm90IHNldAojIENPTkZJR19UQ1MzNDE0IGlzIG5v dCBzZXQKIyBDT05GSUdfVENTMzQ3MiBpcyBub3Qgc2V0CiMgQ09ORklHX1NFTlNPUlNfVFNMMjU2 MyBpcyBub3Qgc2V0CiMgQ09ORklHX1RTTDI1ODMgaXMgbm90IHNldAojIENPTkZJR19UU0wyNzcy IGlzIG5vdCBzZXQKIyBDT05GSUdfVFNMNDUzMSBpcyBub3Qgc2V0CiMgQ09ORklHX1VTNTE4MkQg aXMgbm90IHNldAojIENPTkZJR19WQ05MNDAwMCBpcyBub3Qgc2V0CiMgQ09ORklHX1ZDTkw0MDM1 IGlzIG5vdCBzZXQKIyBDT05GSUdfVkVNTDYwMzAgaXMgbm90IHNldAojIENPTkZJR19WRU1MNjA3 MCBpcyBub3Qgc2V0CiMgQ09ORklHX1ZMNjE4MCBpcyBub3Qgc2V0CiMgQ09ORklHX1pPUFQyMjAx IGlzIG5vdCBzZXQKIyBlbmQgb2YgTGlnaHQgc2Vuc29ycwoKIwojIE1hZ25ldG9tZXRlciBzZW5z b3JzCiMKIyBDT05GSUdfQUs4OTc1IGlzIG5vdCBzZXQKIyBDT05GSUdfQUswOTkxMSBpcyBub3Qg c2V0CiMgQ09ORklHX0JNQzE1MF9NQUdOX0kyQyBpcyBub3Qgc2V0CiMgQ09ORklHX0JNQzE1MF9N QUdOX1NQSSBpcyBub3Qgc2V0CiMgQ09ORklHX01BRzMxMTAgaXMgbm90IHNldApDT05GSUdfSElE X1NFTlNPUl9NQUdORVRPTUVURVJfM0Q9bQojIENPTkZJR19NTUMzNTI0MCBpcyBub3Qgc2V0CiMg Q09ORklHX0lJT19TVF9NQUdOXzNBWElTIGlzIG5vdCBzZXQKIyBDT05GSUdfU0VOU09SU19ITUM1 ODQzX0kyQyBpcyBub3Qgc2V0CiMgQ09ORklHX1NFTlNPUlNfSE1DNTg0M19TUEkgaXMgbm90IHNl dAojIENPTkZJR19TRU5TT1JTX1JNMzEwMF9JMkMgaXMgbm90IHNldAojIENPTkZJR19TRU5TT1JT X1JNMzEwMF9TUEkgaXMgbm90IHNldAojIGVuZCBvZiBNYWduZXRvbWV0ZXIgc2Vuc29ycwoKIwoj IE11bHRpcGxleGVycwojCiMgZW5kIG9mIE11bHRpcGxleGVycwoKIwojIEluY2xpbm9tZXRlciBz ZW5zb3JzCiMKQ09ORklHX0hJRF9TRU5TT1JfSU5DTElOT01FVEVSXzNEPW0KQ09ORklHX0hJRF9T RU5TT1JfREVWSUNFX1JPVEFUSU9OPW0KIyBlbmQgb2YgSW5jbGlub21ldGVyIHNlbnNvcnMKCiMK IyBUcmlnZ2VycyAtIHN0YW5kYWxvbmUKIwojIENPTkZJR19JSU9fSU5URVJSVVBUX1RSSUdHRVIg aXMgbm90IHNldAojIENPTkZJR19JSU9fU1lTRlNfVFJJR0dFUiBpcyBub3Qgc2V0CiMgZW5kIG9m IFRyaWdnZXJzIC0gc3RhbmRhbG9uZQoKIwojIERpZ2l0YWwgcG90ZW50aW9tZXRlcnMKIwojIENP TkZJR19BRDUyNzIgaXMgbm90IHNldAojIENPTkZJR19EUzE4MDMgaXMgbm90IHNldAojIENPTkZJ R19NQVg1NDMyIGlzIG5vdCBzZXQKIyBDT05GSUdfTUFYNTQ4MSBpcyBub3Qgc2V0CiMgQ09ORklH X01BWDU0ODcgaXMgbm90IHNldAojIENPTkZJR19NQ1A0MDE4IGlzIG5vdCBzZXQKIyBDT05GSUdf TUNQNDEzMSBpcyBub3Qgc2V0CiMgQ09ORklHX01DUDQ1MzEgaXMgbm90IHNldAojIENPTkZJR19N Q1A0MTAxMCBpcyBub3Qgc2V0CiMgQ09ORklHX1RQTDAxMDIgaXMgbm90IHNldAojIGVuZCBvZiBE aWdpdGFsIHBvdGVudGlvbWV0ZXJzCgojCiMgRGlnaXRhbCBwb3RlbnRpb3N0YXRzCiMKIyBDT05G SUdfTE1QOTEwMDAgaXMgbm90IHNldAojIGVuZCBvZiBEaWdpdGFsIHBvdGVudGlvc3RhdHMKCiMK IyBQcmVzc3VyZSBzZW5zb3JzCiMKIyBDT05GSUdfQUJQMDYwTUcgaXMgbm90IHNldAojIENPTkZJ R19CTVAyODAgaXMgbm90IHNldAojIENPTkZJR19ETEhMNjBEIGlzIG5vdCBzZXQKIyBDT05GSUdf RFBTMzEwIGlzIG5vdCBzZXQKQ09ORklHX0hJRF9TRU5TT1JfUFJFU1M9bQojIENPTkZJR19IUDAz IGlzIG5vdCBzZXQKIyBDT05GSUdfTVBMMTE1X0kyQyBpcyBub3Qgc2V0CiMgQ09ORklHX01QTDEx NV9TUEkgaXMgbm90IHNldAojIENPTkZJR19NUEwzMTE1IGlzIG5vdCBzZXQKIyBDT05GSUdfTVM1 NjExIGlzIG5vdCBzZXQKIyBDT05GSUdfTVM1NjM3IGlzIG5vdCBzZXQKIyBDT05GSUdfSUlPX1NU X1BSRVNTIGlzIG5vdCBzZXQKIyBDT05GSUdfVDU0MDMgaXMgbm90IHNldAojIENPTkZJR19IUDIw NkMgaXMgbm90IHNldAojIENPTkZJR19aUEEyMzI2IGlzIG5vdCBzZXQKIyBlbmQgb2YgUHJlc3N1 cmUgc2Vuc29ycwoKIwojIExpZ2h0bmluZyBzZW5zb3JzCiMKIyBDT05GSUdfQVMzOTM1IGlzIG5v dCBzZXQKIyBlbmQgb2YgTGlnaHRuaW5nIHNlbnNvcnMKCiMKIyBQcm94aW1pdHkgYW5kIGRpc3Rh bmNlIHNlbnNvcnMKIwojIENPTkZJR19JU0wyOTUwMSBpcyBub3Qgc2V0CiMgQ09ORklHX0xJREFS X0xJVEVfVjIgaXMgbm90IHNldAojIENPTkZJR19NQjEyMzIgaXMgbm90IHNldAojIENPTkZJR19Q SU5HIGlzIG5vdCBzZXQKIyBDT05GSUdfUkZENzc0MDIgaXMgbm90IHNldAojIENPTkZJR19TUkYw NCBpcyBub3Qgc2V0CiMgQ09ORklHX1NYOTUwMCBpcyBub3Qgc2V0CiMgQ09ORklHX1NSRjA4IGlz IG5vdCBzZXQKIyBDT05GSUdfVkw1M0wwWF9JMkMgaXMgbm90IHNldAojIGVuZCBvZiBQcm94aW1p dHkgYW5kIGRpc3RhbmNlIHNlbnNvcnMKCiMKIyBSZXNvbHZlciB0byBkaWdpdGFsIGNvbnZlcnRl cnMKIwojIENPTkZJR19BRDJTOTAgaXMgbm90IHNldAojIENPTkZJR19BRDJTMTIwMCBpcyBub3Qg c2V0CiMgZW5kIG9mIFJlc29sdmVyIHRvIGRpZ2l0YWwgY29udmVydGVycwoKIwojIFRlbXBlcmF0 dXJlIHNlbnNvcnMKIwojIENPTkZJR19MVEMyOTgzIGlzIG5vdCBzZXQKIyBDT05GSUdfTUFYSU1f VEhFUk1PQ09VUExFIGlzIG5vdCBzZXQKIyBDT05GSUdfSElEX1NFTlNPUl9URU1QIGlzIG5vdCBz ZXQKIyBDT05GSUdfTUxYOTA2MTQgaXMgbm90IHNldAojIENPTkZJR19NTFg5MDYzMiBpcyBub3Qg c2V0CiMgQ09ORklHX1RNUDAwNiBpcyBub3Qgc2V0CiMgQ09ORklHX1RNUDAwNyBpcyBub3Qgc2V0 CiMgQ09ORklHX1RTWVMwMSBpcyBub3Qgc2V0CiMgQ09ORklHX1RTWVMwMkQgaXMgbm90IHNldAoj IENPTkZJR19NQVgzMTg1NiBpcyBub3Qgc2V0CiMgZW5kIG9mIFRlbXBlcmF0dXJlIHNlbnNvcnMK CkNPTkZJR19OVEI9bQojIENPTkZJR19OVEJfTVNJIGlzIG5vdCBzZXQKQ09ORklHX05UQl9BTUQ9 bQojIENPTkZJR19OVEJfSURUIGlzIG5vdCBzZXQKIyBDT05GSUdfTlRCX0lOVEVMIGlzIG5vdCBz ZXQKIyBDT05GSUdfTlRCX1NXSVRDSFRFQyBpcyBub3Qgc2V0CiMgQ09ORklHX05UQl9QSU5HUE9O RyBpcyBub3Qgc2V0CiMgQ09ORklHX05UQl9UT09MIGlzIG5vdCBzZXQKQ09ORklHX05UQl9QRVJG PW0KQ09ORklHX05UQl9UUkFOU1BPUlQ9bQojIENPTkZJR19WTUVfQlVTIGlzIG5vdCBzZXQKQ09O RklHX1BXTT15CkNPTkZJR19QV01fU1lTRlM9eQojIENPTkZJR19QV01fTFBTU19QQ0kgaXMgbm90 IHNldAojIENPTkZJR19QV01fTFBTU19QTEFURk9STSBpcyBub3Qgc2V0CiMgQ09ORklHX1BXTV9Q Q0E5Njg1IGlzIG5vdCBzZXQKCiMKIyBJUlEgY2hpcCBzdXBwb3J0CiMKIyBlbmQgb2YgSVJRIGNo aXAgc3VwcG9ydAoKIyBDT05GSUdfSVBBQ0tfQlVTIGlzIG5vdCBzZXQKIyBDT05GSUdfUkVTRVRf Q09OVFJPTExFUiBpcyBub3Qgc2V0CgojCiMgUEhZIFN1YnN5c3RlbQojCkNPTkZJR19HRU5FUklD X1BIWT15CiMgQ09ORklHX0JDTV9LT05BX1VTQjJfUEhZIGlzIG5vdCBzZXQKIyBDT05GSUdfUEhZ X1BYQV8yOE5NX0hTSUMgaXMgbm90IHNldAojIENPTkZJR19QSFlfUFhBXzI4Tk1fVVNCMiBpcyBu b3Qgc2V0CiMgQ09ORklHX1BIWV9DUENBUF9VU0IgaXMgbm90IHNldAojIENPTkZJR19QSFlfSU5U RUxfRU1NQyBpcyBub3Qgc2V0CiMgZW5kIG9mIFBIWSBTdWJzeXN0ZW0KCkNPTkZJR19QT1dFUkNB UD15CkNPTkZJR19JTlRFTF9SQVBMX0NPUkU9bQpDT05GSUdfSU5URUxfUkFQTD1tCiMgQ09ORklH X0lETEVfSU5KRUNUIGlzIG5vdCBzZXQKIyBDT05GSUdfTUNCIGlzIG5vdCBzZXQKCiMKIyBQZXJm b3JtYW5jZSBtb25pdG9yIHN1cHBvcnQKIwojIGVuZCBvZiBQZXJmb3JtYW5jZSBtb25pdG9yIHN1 cHBvcnQKCkNPTkZJR19SQVM9eQojIENPTkZJR19SQVNfQ0VDIGlzIG5vdCBzZXQKIyBDT05GSUdf VVNCNCBpcyBub3Qgc2V0CgojCiMgQW5kcm9pZAojCkNPTkZJR19BTkRST0lEPXkKIyBDT05GSUdf QU5EUk9JRF9CSU5ERVJfSVBDIGlzIG5vdCBzZXQKIyBlbmQgb2YgQW5kcm9pZAoKQ09ORklHX0xJ Qk5WRElNTT1tCkNPTkZJR19CTEtfREVWX1BNRU09bQpDT05GSUdfTkRfQkxLPW0KQ09ORklHX05E X0NMQUlNPXkKQ09ORklHX05EX0JUVD1tCkNPTkZJR19CVFQ9eQpDT05GSUdfTkRfUEZOPW0KQ09O RklHX05WRElNTV9QRk49eQpDT05GSUdfTlZESU1NX0RBWD15CkNPTkZJR19OVkRJTU1fS0VZUz15 CkNPTkZJR19EQVhfRFJJVkVSPXkKQ09ORklHX0RBWD15CkNPTkZJR19ERVZfREFYPW0KQ09ORklH X0RFVl9EQVhfUE1FTT1tCkNPTkZJR19ERVZfREFYX0tNRU09bQpDT05GSUdfREVWX0RBWF9QTUVN X0NPTVBBVD1tCkNPTkZJR19OVk1FTT15CkNPTkZJR19OVk1FTV9TWVNGUz15CgojCiMgSFcgdHJh Y2luZyBzdXBwb3J0CiMKIyBDT05GSUdfU1RNIGlzIG5vdCBzZXQKIyBDT05GSUdfSU5URUxfVEgg aXMgbm90IHNldAojIGVuZCBvZiBIVyB0cmFjaW5nIHN1cHBvcnQKCiMgQ09ORklHX0ZQR0EgaXMg bm90IHNldAojIENPTkZJR19URUUgaXMgbm90IHNldApDT05GSUdfUE1fT1BQPXkKIyBDT05GSUdf VU5JU1lTX1ZJU09SQlVTIGlzIG5vdCBzZXQKIyBDT05GSUdfU0lPWCBpcyBub3Qgc2V0CiMgQ09O RklHX1NMSU1CVVMgaXMgbm90IHNldAojIENPTkZJR19JTlRFUkNPTk5FQ1QgaXMgbm90IHNldAoj IENPTkZJR19DT1VOVEVSIGlzIG5vdCBzZXQKIyBlbmQgb2YgRGV2aWNlIERyaXZlcnMKCiMKIyBG aWxlIHN5c3RlbXMKIwpDT05GSUdfRENBQ0hFX1dPUkRfQUNDRVNTPXkKIyBDT05GSUdfVkFMSURB VEVfRlNfUEFSU0VSIGlzIG5vdCBzZXQKQ09ORklHX0ZTX0lPTUFQPXkKIyBDT05GSUdfRVhUMl9G UyBpcyBub3Qgc2V0CiMgQ09ORklHX0VYVDNfRlMgaXMgbm90IHNldApDT05GSUdfRVhUNF9GUz1t CkNPTkZJR19FWFQ0X1VTRV9GT1JfRVhUMj15CkNPTkZJR19FWFQ0X0ZTX1BPU0lYX0FDTD15CkNP TkZJR19FWFQ0X0ZTX1NFQ1VSSVRZPXkKIyBDT05GSUdfRVhUNF9ERUJVRyBpcyBub3Qgc2V0CkNP TkZJR19KQkQyPW0KIyBDT05GSUdfSkJEMl9ERUJVRyBpcyBub3Qgc2V0CkNPTkZJR19GU19NQkNB Q0hFPW0KIyBDT05GSUdfUkVJU0VSRlNfRlMgaXMgbm90IHNldAojIENPTkZJR19KRlNfRlMgaXMg bm90IHNldApDT05GSUdfWEZTX0ZTPW0KQ09ORklHX1hGU19RVU9UQT15CkNPTkZJR19YRlNfUE9T SVhfQUNMPXkKQ09ORklHX1hGU19SVD15CkNPTkZJR19YRlNfT05MSU5FX1NDUlVCPXkKQ09ORklH X1hGU19PTkxJTkVfUkVQQUlSPXkKQ09ORklHX1hGU19ERUJVRz15CkNPTkZJR19YRlNfQVNTRVJU X0ZBVEFMPXkKQ09ORklHX0dGUzJfRlM9bQpDT05GSUdfR0ZTMl9GU19MT0NLSU5HX0RMTT15CkNP TkZJR19PQ0ZTMl9GUz1tCkNPTkZJR19PQ0ZTMl9GU19PMkNCPW0KQ09ORklHX09DRlMyX0ZTX1VT RVJTUEFDRV9DTFVTVEVSPW0KQ09ORklHX09DRlMyX0ZTX1NUQVRTPXkKQ09ORklHX09DRlMyX0RF QlVHX01BU0tMT0c9eQojIENPTkZJR19PQ0ZTMl9ERUJVR19GUyBpcyBub3Qgc2V0CkNPTkZJR19C VFJGU19GUz1tCkNPTkZJR19CVFJGU19GU19QT1NJWF9BQ0w9eQojIENPTkZJR19CVFJGU19GU19D SEVDS19JTlRFR1JJVFkgaXMgbm90IHNldAojIENPTkZJR19CVFJGU19GU19SVU5fU0FOSVRZX1RF U1RTIGlzIG5vdCBzZXQKIyBDT05GSUdfQlRSRlNfREVCVUcgaXMgbm90IHNldAojIENPTkZJR19C VFJGU19BU1NFUlQgaXMgbm90IHNldAojIENPTkZJR19CVFJGU19GU19SRUZfVkVSSUZZIGlzIG5v dCBzZXQKIyBDT05GSUdfTklMRlMyX0ZTIGlzIG5vdCBzZXQKQ09ORklHX0YyRlNfRlM9bQpDT05G SUdfRjJGU19TVEFUX0ZTPXkKQ09ORklHX0YyRlNfRlNfWEFUVFI9eQpDT05GSUdfRjJGU19GU19Q T1NJWF9BQ0w9eQojIENPTkZJR19GMkZTX0ZTX1NFQ1VSSVRZIGlzIG5vdCBzZXQKIyBDT05GSUdf RjJGU19DSEVDS19GUyBpcyBub3Qgc2V0CiMgQ09ORklHX0YyRlNfSU9fVFJBQ0UgaXMgbm90IHNl dAojIENPTkZJR19GMkZTX0ZBVUxUX0lOSkVDVElPTiBpcyBub3Qgc2V0CiMgQ09ORklHX0YyRlNf RlNfQ09NUFJFU1NJT04gaXMgbm90IHNldAojIENPTkZJR19aT05FRlNfRlMgaXMgbm90IHNldApD T05GSUdfRlNfREFYPXkKQ09ORklHX0ZTX0RBWF9QTUQ9eQpDT05GSUdfRlNfUE9TSVhfQUNMPXkK Q09ORklHX0VYUE9SVEZTPXkKQ09ORklHX0VYUE9SVEZTX0JMT0NLX09QUz15CkNPTkZJR19GSUxF X0xPQ0tJTkc9eQpDT05GSUdfTUFOREFUT1JZX0ZJTEVfTE9DS0lORz15CkNPTkZJR19GU19FTkNS WVBUSU9OPXkKQ09ORklHX0ZTX0VOQ1JZUFRJT05fQUxHUz1tCiMgQ09ORklHX0ZTX1ZFUklUWSBp cyBub3Qgc2V0CkNPTkZJR19GU05PVElGWT15CkNPTkZJR19ETk9USUZZPXkKQ09ORklHX0lOT1RJ RllfVVNFUj15CkNPTkZJR19GQU5PVElGWT15CkNPTkZJR19GQU5PVElGWV9BQ0NFU1NfUEVSTUlT U0lPTlM9eQpDT05GSUdfUVVPVEE9eQpDT05GSUdfUVVPVEFfTkVUTElOS19JTlRFUkZBQ0U9eQpD T05GSUdfUFJJTlRfUVVPVEFfV0FSTklORz15CiMgQ09ORklHX1FVT1RBX0RFQlVHIGlzIG5vdCBz ZXQKQ09ORklHX1FVT1RBX1RSRUU9eQojIENPTkZJR19RRk1UX1YxIGlzIG5vdCBzZXQKQ09ORklH X1FGTVRfVjI9eQpDT05GSUdfUVVPVEFDVEw9eQpDT05GSUdfUVVPVEFDVExfQ09NUEFUPXkKQ09O RklHX0FVVE9GUzRfRlM9eQpDT05GSUdfQVVUT0ZTX0ZTPXkKQ09ORklHX0ZVU0VfRlM9bQpDT05G SUdfQ1VTRT1tCiMgQ09ORklHX1ZJUlRJT19GUyBpcyBub3Qgc2V0CkNPTkZJR19PVkVSTEFZX0ZT PW0KIyBDT05GSUdfT1ZFUkxBWV9GU19SRURJUkVDVF9ESVIgaXMgbm90IHNldAojIENPTkZJR19P VkVSTEFZX0ZTX1JFRElSRUNUX0FMV0FZU19GT0xMT1cgaXMgbm90IHNldAojIENPTkZJR19PVkVS TEFZX0ZTX0lOREVYIGlzIG5vdCBzZXQKIyBDT05GSUdfT1ZFUkxBWV9GU19YSU5PX0FVVE8gaXMg bm90IHNldAojIENPTkZJR19PVkVSTEFZX0ZTX01FVEFDT1BZIGlzIG5vdCBzZXQKCiMKIyBDYWNo ZXMKIwpDT05GSUdfRlNDQUNIRT1tCkNPTkZJR19GU0NBQ0hFX1NUQVRTPXkKIyBDT05GSUdfRlND QUNIRV9ISVNUT0dSQU0gaXMgbm90IHNldAojIENPTkZJR19GU0NBQ0hFX0RFQlVHIGlzIG5vdCBz ZXQKIyBDT05GSUdfRlNDQUNIRV9PQkpFQ1RfTElTVCBpcyBub3Qgc2V0CkNPTkZJR19DQUNIRUZJ TEVTPW0KIyBDT05GSUdfQ0FDSEVGSUxFU19ERUJVRyBpcyBub3Qgc2V0CiMgQ09ORklHX0NBQ0hF RklMRVNfSElTVE9HUkFNIGlzIG5vdCBzZXQKIyBlbmQgb2YgQ2FjaGVzCgojCiMgQ0QtUk9NL0RW RCBGaWxlc3lzdGVtcwojCkNPTkZJR19JU085NjYwX0ZTPW0KQ09ORklHX0pPTElFVD15CkNPTkZJ R19aSVNPRlM9eQpDT05GSUdfVURGX0ZTPW0KIyBlbmQgb2YgQ0QtUk9NL0RWRCBGaWxlc3lzdGVt cwoKIwojIERPUy9GQVQvTlQgRmlsZXN5c3RlbXMKIwpDT05GSUdfRkFUX0ZTPW0KQ09ORklHX01T RE9TX0ZTPW0KQ09ORklHX1ZGQVRfRlM9bQpDT05GSUdfRkFUX0RFRkFVTFRfQ09ERVBBR0U9NDM3 CkNPTkZJR19GQVRfREVGQVVMVF9JT0NIQVJTRVQ9ImFzY2lpIgojIENPTkZJR19GQVRfREVGQVVM VF9VVEY4IGlzIG5vdCBzZXQKIyBDT05GSUdfTlRGU19GUyBpcyBub3Qgc2V0CiMgZW5kIG9mIERP Uy9GQVQvTlQgRmlsZXN5c3RlbXMKCiMKIyBQc2V1ZG8gZmlsZXN5c3RlbXMKIwpDT05GSUdfUFJP Q19GUz15CkNPTkZJR19QUk9DX0tDT1JFPXkKQ09ORklHX1BST0NfVk1DT1JFPXkKIyBDT05GSUdf UFJPQ19WTUNPUkVfREVWSUNFX0RVTVAgaXMgbm90IHNldApDT05GSUdfUFJPQ19TWVNDVEw9eQpD T05GSUdfUFJPQ19QQUdFX01PTklUT1I9eQpDT05GSUdfUFJPQ19DSElMRFJFTj15CkNPTkZJR19Q Uk9DX1BJRF9BUkNIX1NUQVRVUz15CkNPTkZJR19QUk9DX0NQVV9SRVNDVFJMPXkKQ09ORklHX0tF Uk5GUz15CkNPTkZJR19TWVNGUz15CkNPTkZJR19UTVBGUz15CkNPTkZJR19UTVBGU19QT1NJWF9B Q0w9eQpDT05GSUdfVE1QRlNfWEFUVFI9eQpDT05GSUdfSFVHRVRMQkZTPXkKQ09ORklHX0hVR0VU TEJfUEFHRT15CkNPTkZJR19NRU1GRF9DUkVBVEU9eQpDT05GSUdfQVJDSF9IQVNfR0lHQU5USUNf UEFHRT15CkNPTkZJR19DT05GSUdGU19GUz15CkNPTkZJR19FRklWQVJfRlM9eQojIGVuZCBvZiBQ c2V1ZG8gZmlsZXN5c3RlbXMKCkNPTkZJR19NSVNDX0ZJTEVTWVNURU1TPXkKIyBDT05GSUdfT1JB TkdFRlNfRlMgaXMgbm90IHNldAojIENPTkZJR19BREZTX0ZTIGlzIG5vdCBzZXQKIyBDT05GSUdf QUZGU19GUyBpcyBub3Qgc2V0CiMgQ09ORklHX0VDUllQVF9GUyBpcyBub3Qgc2V0CiMgQ09ORklH X0hGU19GUyBpcyBub3Qgc2V0CiMgQ09ORklHX0hGU1BMVVNfRlMgaXMgbm90IHNldAojIENPTkZJ R19CRUZTX0ZTIGlzIG5vdCBzZXQKIyBDT05GSUdfQkZTX0ZTIGlzIG5vdCBzZXQKIyBDT05GSUdf RUZTX0ZTIGlzIG5vdCBzZXQKIyBDT05GSUdfSkZGUzJfRlMgaXMgbm90IHNldAojIENPTkZJR19V QklGU19GUyBpcyBub3Qgc2V0CkNPTkZJR19DUkFNRlM9bQpDT05GSUdfQ1JBTUZTX0JMT0NLREVW PXkKIyBDT05GSUdfQ1JBTUZTX01URCBpcyBub3Qgc2V0CkNPTkZJR19TUVVBU0hGUz1tCkNPTkZJ R19TUVVBU0hGU19GSUxFX0NBQ0hFPXkKIyBDT05GSUdfU1FVQVNIRlNfRklMRV9ESVJFQ1QgaXMg bm90IHNldApDT05GSUdfU1FVQVNIRlNfREVDT01QX1NJTkdMRT15CiMgQ09ORklHX1NRVUFTSEZT X0RFQ09NUF9NVUxUSSBpcyBub3Qgc2V0CiMgQ09ORklHX1NRVUFTSEZTX0RFQ09NUF9NVUxUSV9Q RVJDUFUgaXMgbm90IHNldApDT05GSUdfU1FVQVNIRlNfWEFUVFI9eQpDT05GSUdfU1FVQVNIRlNf WkxJQj15CiMgQ09ORklHX1NRVUFTSEZTX0xaNCBpcyBub3Qgc2V0CkNPTkZJR19TUVVBU0hGU19M Wk89eQpDT05GSUdfU1FVQVNIRlNfWFo9eQojIENPTkZJR19TUVVBU0hGU19aU1REIGlzIG5vdCBz ZXQKIyBDT05GSUdfU1FVQVNIRlNfNEtfREVWQkxLX1NJWkUgaXMgbm90IHNldAojIENPTkZJR19T UVVBU0hGU19FTUJFRERFRCBpcyBub3Qgc2V0CkNPTkZJR19TUVVBU0hGU19GUkFHTUVOVF9DQUNI RV9TSVpFPTMKIyBDT05GSUdfVlhGU19GUyBpcyBub3Qgc2V0CkNPTkZJR19NSU5JWF9GUz1tCiMg Q09ORklHX09NRlNfRlMgaXMgbm90IHNldAojIENPTkZJR19IUEZTX0ZTIGlzIG5vdCBzZXQKIyBD T05GSUdfUU5YNEZTX0ZTIGlzIG5vdCBzZXQKIyBDT05GSUdfUU5YNkZTX0ZTIGlzIG5vdCBzZXQK IyBDT05GSUdfUk9NRlNfRlMgaXMgbm90IHNldApDT05GSUdfUFNUT1JFPXkKQ09ORklHX1BTVE9S RV9ERUZMQVRFX0NPTVBSRVNTPXkKIyBDT05GSUdfUFNUT1JFX0xaT19DT01QUkVTUyBpcyBub3Qg c2V0CiMgQ09ORklHX1BTVE9SRV9MWjRfQ09NUFJFU1MgaXMgbm90IHNldAojIENPTkZJR19QU1RP UkVfTFo0SENfQ09NUFJFU1MgaXMgbm90IHNldAojIENPTkZJR19QU1RPUkVfODQyX0NPTVBSRVNT IGlzIG5vdCBzZXQKIyBDT05GSUdfUFNUT1JFX1pTVERfQ09NUFJFU1MgaXMgbm90IHNldApDT05G SUdfUFNUT1JFX0NPTVBSRVNTPXkKQ09ORklHX1BTVE9SRV9ERUZMQVRFX0NPTVBSRVNTX0RFRkFV TFQ9eQpDT05GSUdfUFNUT1JFX0NPTVBSRVNTX0RFRkFVTFQ9ImRlZmxhdGUiCkNPTkZJR19QU1RP UkVfQ09OU09MRT15CkNPTkZJR19QU1RPUkVfUE1TRz15CiMgQ09ORklHX1BTVE9SRV9GVFJBQ0Ug aXMgbm90IHNldApDT05GSUdfUFNUT1JFX1JBTT1tCiMgQ09ORklHX1NZU1ZfRlMgaXMgbm90IHNl dAojIENPTkZJR19VRlNfRlMgaXMgbm90IHNldAojIENPTkZJR19FUk9GU19GUyBpcyBub3Qgc2V0 CkNPTkZJR19ORVRXT1JLX0ZJTEVTWVNURU1TPXkKQ09ORklHX05GU19GUz15CiMgQ09ORklHX05G U19WMiBpcyBub3Qgc2V0CkNPTkZJR19ORlNfVjM9eQpDT05GSUdfTkZTX1YzX0FDTD15CkNPTkZJ R19ORlNfVjQ9bQojIENPTkZJR19ORlNfU1dBUCBpcyBub3Qgc2V0CkNPTkZJR19ORlNfVjRfMT15 CkNPTkZJR19ORlNfVjRfMj15CkNPTkZJR19QTkZTX0ZJTEVfTEFZT1VUPW0KQ09ORklHX1BORlNf QkxPQ0s9bQpDT05GSUdfUE5GU19GTEVYRklMRV9MQVlPVVQ9bQpDT05GSUdfTkZTX1Y0XzFfSU1Q TEVNRU5UQVRJT05fSURfRE9NQUlOPSJrZXJuZWwub3JnIgojIENPTkZJR19ORlNfVjRfMV9NSUdS QVRJT04gaXMgbm90IHNldApDT05GSUdfTkZTX1Y0X1NFQ1VSSVRZX0xBQkVMPXkKQ09ORklHX1JP T1RfTkZTPXkKIyBDT05GSUdfTkZTX1VTRV9MRUdBQ1lfRE5TIGlzIG5vdCBzZXQKQ09ORklHX05G U19VU0VfS0VSTkVMX0ROUz15CkNPTkZJR19ORlNfREVCVUc9eQpDT05GSUdfTkZTX0RJU0FCTEVf VURQX1NVUFBPUlQ9eQpDT05GSUdfTkZTRD1tCkNPTkZJR19ORlNEX1YyX0FDTD15CkNPTkZJR19O RlNEX1YzPXkKQ09ORklHX05GU0RfVjNfQUNMPXkKQ09ORklHX05GU0RfVjQ9eQpDT05GSUdfTkZT RF9QTkZTPXkKIyBDT05GSUdfTkZTRF9CTE9DS0xBWU9VVCBpcyBub3Qgc2V0CkNPTkZJR19ORlNE X1NDU0lMQVlPVVQ9eQojIENPTkZJR19ORlNEX0ZMRVhGSUxFTEFZT1VUIGlzIG5vdCBzZXQKIyBD T05GSUdfTkZTRF9WNF8yX0lOVEVSX1NTQyBpcyBub3Qgc2V0CkNPTkZJR19ORlNEX1Y0X1NFQ1VS SVRZX0xBQkVMPXkKQ09ORklHX0dSQUNFX1BFUklPRD15CkNPTkZJR19MT0NLRD15CkNPTkZJR19M T0NLRF9WND15CkNPTkZJR19ORlNfQUNMX1NVUFBPUlQ9eQpDT05GSUdfTkZTX0NPTU1PTj15CkNP TkZJR19TVU5SUEM9eQpDT05GSUdfU1VOUlBDX0dTUz1tCkNPTkZJR19TVU5SUENfQkFDS0NIQU5O RUw9eQpDT05GSUdfUlBDU0VDX0dTU19LUkI1PW0KIyBDT05GSUdfU1VOUlBDX0RJU0FCTEVfSU5T RUNVUkVfRU5DVFlQRVMgaXMgbm90IHNldApDT05GSUdfU1VOUlBDX0RFQlVHPXkKQ09ORklHX0NF UEhfRlM9bQojIENPTkZJR19DRVBIX0ZTQ0FDSEUgaXMgbm90IHNldApDT05GSUdfQ0VQSF9GU19Q T1NJWF9BQ0w9eQojIENPTkZJR19DRVBIX0ZTX1NFQ1VSSVRZX0xBQkVMIGlzIG5vdCBzZXQKQ09O RklHX0NJRlM9bQojIENPTkZJR19DSUZTX1NUQVRTMiBpcyBub3Qgc2V0CkNPTkZJR19DSUZTX0FM TE9XX0lOU0VDVVJFX0xFR0FDWT15CkNPTkZJR19DSUZTX1dFQUtfUFdfSEFTSD15CkNPTkZJR19D SUZTX1VQQ0FMTD15CkNPTkZJR19DSUZTX1hBVFRSPXkKQ09ORklHX0NJRlNfUE9TSVg9eQpDT05G SUdfQ0lGU19ERUJVRz15CiMgQ09ORklHX0NJRlNfREVCVUcyIGlzIG5vdCBzZXQKIyBDT05GSUdf Q0lGU19ERUJVR19EVU1QX0tFWVMgaXMgbm90IHNldApDT05GSUdfQ0lGU19ERlNfVVBDQUxMPXkK IyBDT05GSUdfQ0lGU19GU0NBQ0hFIGlzIG5vdCBzZXQKIyBDT05GSUdfQ09EQV9GUyBpcyBub3Qg c2V0CiMgQ09ORklHX0FGU19GUyBpcyBub3Qgc2V0CkNPTkZJR185UF9GUz15CkNPTkZJR185UF9G U19QT1NJWF9BQ0w9eQojIENPTkZJR185UF9GU19TRUNVUklUWSBpcyBub3Qgc2V0CkNPTkZJR19O TFM9eQpDT05GSUdfTkxTX0RFRkFVTFQ9InV0ZjgiCkNPTkZJR19OTFNfQ09ERVBBR0VfNDM3PXkK Q09ORklHX05MU19DT0RFUEFHRV83Mzc9bQpDT05GSUdfTkxTX0NPREVQQUdFXzc3NT1tCkNPTkZJ R19OTFNfQ09ERVBBR0VfODUwPW0KQ09ORklHX05MU19DT0RFUEFHRV84NTI9bQpDT05GSUdfTkxT X0NPREVQQUdFXzg1NT1tCkNPTkZJR19OTFNfQ09ERVBBR0VfODU3PW0KQ09ORklHX05MU19DT0RF UEFHRV84NjA9bQpDT05GSUdfTkxTX0NPREVQQUdFXzg2MT1tCkNPTkZJR19OTFNfQ09ERVBBR0Vf ODYyPW0KQ09ORklHX05MU19DT0RFUEFHRV84NjM9bQpDT05GSUdfTkxTX0NPREVQQUdFXzg2ND1t CkNPTkZJR19OTFNfQ09ERVBBR0VfODY1PW0KQ09ORklHX05MU19DT0RFUEFHRV84NjY9bQpDT05G SUdfTkxTX0NPREVQQUdFXzg2OT1tCkNPTkZJR19OTFNfQ09ERVBBR0VfOTM2PW0KQ09ORklHX05M U19DT0RFUEFHRV85NTA9bQpDT05GSUdfTkxTX0NPREVQQUdFXzkzMj1tCkNPTkZJR19OTFNfQ09E RVBBR0VfOTQ5PW0KQ09ORklHX05MU19DT0RFUEFHRV84NzQ9bQpDT05GSUdfTkxTX0lTTzg4NTlf OD1tCkNPTkZJR19OTFNfQ09ERVBBR0VfMTI1MD1tCkNPTkZJR19OTFNfQ09ERVBBR0VfMTI1MT1t CkNPTkZJR19OTFNfQVNDSUk9eQpDT05GSUdfTkxTX0lTTzg4NTlfMT1tCkNPTkZJR19OTFNfSVNP ODg1OV8yPW0KQ09ORklHX05MU19JU084ODU5XzM9bQpDT05GSUdfTkxTX0lTTzg4NTlfND1tCkNP TkZJR19OTFNfSVNPODg1OV81PW0KQ09ORklHX05MU19JU084ODU5XzY9bQpDT05GSUdfTkxTX0lT Tzg4NTlfNz1tCkNPTkZJR19OTFNfSVNPODg1OV85PW0KQ09ORklHX05MU19JU084ODU5XzEzPW0K Q09ORklHX05MU19JU084ODU5XzE0PW0KQ09ORklHX05MU19JU084ODU5XzE1PW0KQ09ORklHX05M U19LT0k4X1I9bQpDT05GSUdfTkxTX0tPSThfVT1tCkNPTkZJR19OTFNfTUFDX1JPTUFOPW0KQ09O RklHX05MU19NQUNfQ0VMVElDPW0KQ09ORklHX05MU19NQUNfQ0VOVEVVUk89bQpDT05GSUdfTkxT X01BQ19DUk9BVElBTj1tCkNPTkZJR19OTFNfTUFDX0NZUklMTElDPW0KQ09ORklHX05MU19NQUNf R0FFTElDPW0KQ09ORklHX05MU19NQUNfR1JFRUs9bQpDT05GSUdfTkxTX01BQ19JQ0VMQU5EPW0K Q09ORklHX05MU19NQUNfSU5VSVQ9bQpDT05GSUdfTkxTX01BQ19ST01BTklBTj1tCkNPTkZJR19O TFNfTUFDX1RVUktJU0g9bQpDT05GSUdfTkxTX1VURjg9bQpDT05GSUdfRExNPW0KQ09ORklHX0RM TV9ERUJVRz15CiMgQ09ORklHX1VOSUNPREUgaXMgbm90IHNldApDT05GSUdfSU9fV1E9eQojIGVu ZCBvZiBGaWxlIHN5c3RlbXMKCiMKIyBTZWN1cml0eSBvcHRpb25zCiMKQ09ORklHX0tFWVM9eQoj IENPTkZJR19LRVlTX1JFUVVFU1RfQ0FDSEUgaXMgbm90IHNldApDT05GSUdfUEVSU0lTVEVOVF9L RVlSSU5HUz15CkNPTkZJR19CSUdfS0VZUz15CkNPTkZJR19UUlVTVEVEX0tFWVM9eQpDT05GSUdf RU5DUllQVEVEX0tFWVM9eQojIENPTkZJR19LRVlfREhfT1BFUkFUSU9OUyBpcyBub3Qgc2V0CiMg Q09ORklHX1NFQ1VSSVRZX0RNRVNHX1JFU1RSSUNUIGlzIG5vdCBzZXQKQ09ORklHX1NFQ1VSSVRZ PXkKQ09ORklHX1NFQ1VSSVRZRlM9eQpDT05GSUdfU0VDVVJJVFlfTkVUV09SSz15CkNPTkZJR19Q QUdFX1RBQkxFX0lTT0xBVElPTj15CkNPTkZJR19TRUNVUklUWV9ORVRXT1JLX1hGUk09eQpDT05G SUdfU0VDVVJJVFlfUEFUSD15CkNPTkZJR19JTlRFTF9UWFQ9eQpDT05GSUdfTFNNX01NQVBfTUlO X0FERFI9NjU1MzUKQ09ORklHX0hBVkVfSEFSREVORURfVVNFUkNPUFlfQUxMT0NBVE9SPXkKQ09O RklHX0hBUkRFTkVEX1VTRVJDT1BZPXkKQ09ORklHX0hBUkRFTkVEX1VTRVJDT1BZX0ZBTExCQUNL PXkKIyBDT05GSUdfSEFSREVORURfVVNFUkNPUFlfUEFHRVNQQU4gaXMgbm90IHNldAojIENPTkZJ R19GT1JUSUZZX1NPVVJDRSBpcyBub3Qgc2V0CiMgQ09ORklHX1NUQVRJQ19VU0VSTU9ERUhFTFBF UiBpcyBub3Qgc2V0CkNPTkZJR19TRUNVUklUWV9TRUxJTlVYPXkKQ09ORklHX1NFQ1VSSVRZX1NF TElOVVhfQk9PVFBBUkFNPXkKIyBDT05GSUdfU0VDVVJJVFlfU0VMSU5VWF9ESVNBQkxFIGlzIG5v dCBzZXQKQ09ORklHX1NFQ1VSSVRZX1NFTElOVVhfREVWRUxPUD15CkNPTkZJR19TRUNVUklUWV9T RUxJTlVYX0FWQ19TVEFUUz15CkNPTkZJR19TRUNVUklUWV9TRUxJTlVYX0NIRUNLUkVRUFJPVF9W QUxVRT0xCkNPTkZJR19TRUNVUklUWV9TRUxJTlVYX1NJRFRBQl9IQVNIX0JJVFM9OQpDT05GSUdf U0VDVVJJVFlfU0VMSU5VWF9TSUQyU1RSX0NBQ0hFX1NJWkU9MjU2CiMgQ09ORklHX1NFQ1VSSVRZ X1NNQUNLIGlzIG5vdCBzZXQKIyBDT05GSUdfU0VDVVJJVFlfVE9NT1lPIGlzIG5vdCBzZXQKQ09O RklHX1NFQ1VSSVRZX0FQUEFSTU9SPXkKQ09ORklHX1NFQ1VSSVRZX0FQUEFSTU9SX0hBU0g9eQpD T05GSUdfU0VDVVJJVFlfQVBQQVJNT1JfSEFTSF9ERUZBVUxUPXkKIyBDT05GSUdfU0VDVVJJVFlf QVBQQVJNT1JfREVCVUcgaXMgbm90IHNldAojIENPTkZJR19TRUNVUklUWV9MT0FEUElOIGlzIG5v dCBzZXQKQ09ORklHX1NFQ1VSSVRZX1lBTUE9eQojIENPTkZJR19TRUNVUklUWV9TQUZFU0VUSUQg aXMgbm90IHNldAojIENPTkZJR19TRUNVUklUWV9MT0NLRE9XTl9MU00gaXMgbm90IHNldApDT05G SUdfSU5URUdSSVRZPXkKQ09ORklHX0lOVEVHUklUWV9TSUdOQVRVUkU9eQpDT05GSUdfSU5URUdS SVRZX0FTWU1NRVRSSUNfS0VZUz15CkNPTkZJR19JTlRFR1JJVFlfVFJVU1RFRF9LRVlSSU5HPXkK IyBDT05GSUdfSU5URUdSSVRZX1BMQVRGT1JNX0tFWVJJTkcgaXMgbm90IHNldApDT05GSUdfSU5U RUdSSVRZX0FVRElUPXkKQ09ORklHX0lNQT15CkNPTkZJR19JTUFfTUVBU1VSRV9QQ1JfSURYPTEw CkNPTkZJR19JTUFfTFNNX1JVTEVTPXkKIyBDT05GSUdfSU1BX1RFTVBMQVRFIGlzIG5vdCBzZXQK Q09ORklHX0lNQV9OR19URU1QTEFURT15CiMgQ09ORklHX0lNQV9TSUdfVEVNUExBVEUgaXMgbm90 IHNldApDT05GSUdfSU1BX0RFRkFVTFRfVEVNUExBVEU9ImltYS1uZyIKQ09ORklHX0lNQV9ERUZB VUxUX0hBU0hfU0hBMT15CiMgQ09ORklHX0lNQV9ERUZBVUxUX0hBU0hfU0hBMjU2IGlzIG5vdCBz ZXQKQ09ORklHX0lNQV9ERUZBVUxUX0hBU0g9InNoYTEiCiMgQ09ORklHX0lNQV9XUklURV9QT0xJ Q1kgaXMgbm90IHNldAojIENPTkZJR19JTUFfUkVBRF9QT0xJQ1kgaXMgbm90IHNldApDT05GSUdf SU1BX0FQUFJBSVNFPXkKIyBDT05GSUdfSU1BX0FSQ0hfUE9MSUNZIGlzIG5vdCBzZXQKIyBDT05G SUdfSU1BX0FQUFJBSVNFX0JVSUxEX1BPTElDWSBpcyBub3Qgc2V0CkNPTkZJR19JTUFfQVBQUkFJ U0VfQk9PVFBBUkFNPXkKIyBDT05GSUdfSU1BX0FQUFJBSVNFX01PRFNJRyBpcyBub3Qgc2V0CkNP TkZJR19JTUFfVFJVU1RFRF9LRVlSSU5HPXkKIyBDT05GSUdfSU1BX0JMQUNLTElTVF9LRVlSSU5H IGlzIG5vdCBzZXQKIyBDT05GSUdfSU1BX0xPQURfWDUwOSBpcyBub3Qgc2V0CkNPTkZJR19JTUFf TUVBU1VSRV9BU1lNTUVUUklDX0tFWVM9eQpDT05GSUdfSU1BX1FVRVVFX0VBUkxZX0JPT1RfS0VZ Uz15CkNPTkZJR19FVk09eQpDT05GSUdfRVZNX0FUVFJfRlNVVUlEPXkKIyBDT05GSUdfRVZNX0FE RF9YQVRUUlMgaXMgbm90IHNldAojIENPTkZJR19FVk1fTE9BRF9YNTA5IGlzIG5vdCBzZXQKQ09O RklHX0RFRkFVTFRfU0VDVVJJVFlfU0VMSU5VWD15CiMgQ09ORklHX0RFRkFVTFRfU0VDVVJJVFlf QVBQQVJNT1IgaXMgbm90IHNldAojIENPTkZJR19ERUZBVUxUX1NFQ1VSSVRZX0RBQyBpcyBub3Qg c2V0CkNPTkZJR19MU009ImxvY2tkb3duLHlhbWEsbG9hZHBpbixzYWZlc2V0aWQsaW50ZWdyaXR5 LHNlbGludXgsc21hY2ssdG9tb3lvLGFwcGFybW9yIgoKIwojIEtlcm5lbCBoYXJkZW5pbmcgb3B0 aW9ucwojCgojCiMgTWVtb3J5IGluaXRpYWxpemF0aW9uCiMKQ09ORklHX0lOSVRfU1RBQ0tfTk9O RT15CiMgQ09ORklHX0dDQ19QTFVHSU5fU1RSVUNUTEVBS19VU0VSIGlzIG5vdCBzZXQKIyBDT05G SUdfR0NDX1BMVUdJTl9TVFJVQ1RMRUFLX0JZUkVGIGlzIG5vdCBzZXQKIyBDT05GSUdfR0NDX1BM VUdJTl9TVFJVQ1RMRUFLX0JZUkVGX0FMTCBpcyBub3Qgc2V0CiMgQ09ORklHX0dDQ19QTFVHSU5f U1RBQ0tMRUFLIGlzIG5vdCBzZXQKIyBDT05GSUdfSU5JVF9PTl9BTExPQ19ERUZBVUxUX09OIGlz IG5vdCBzZXQKIyBDT05GSUdfSU5JVF9PTl9GUkVFX0RFRkFVTFRfT04gaXMgbm90IHNldAojIGVu ZCBvZiBNZW1vcnkgaW5pdGlhbGl6YXRpb24KIyBlbmQgb2YgS2VybmVsIGhhcmRlbmluZyBvcHRp b25zCiMgZW5kIG9mIFNlY3VyaXR5IG9wdGlvbnMKCkNPTkZJR19YT1JfQkxPQ0tTPW0KQ09ORklH X0FTWU5DX0NPUkU9bQpDT05GSUdfQVNZTkNfTUVNQ1BZPW0KQ09ORklHX0FTWU5DX1hPUj1tCkNP TkZJR19BU1lOQ19QUT1tCkNPTkZJR19BU1lOQ19SQUlENl9SRUNPVj1tCkNPTkZJR19DUllQVE89 eQoKIwojIENyeXB0byBjb3JlIG9yIGhlbHBlcgojCkNPTkZJR19DUllQVE9fQUxHQVBJPXkKQ09O RklHX0NSWVBUT19BTEdBUEkyPXkKQ09ORklHX0NSWVBUT19BRUFEPXkKQ09ORklHX0NSWVBUT19B RUFEMj15CkNPTkZJR19DUllQVE9fU0tDSVBIRVI9eQpDT05GSUdfQ1JZUFRPX1NLQ0lQSEVSMj15 CkNPTkZJR19DUllQVE9fSEFTSD15CkNPTkZJR19DUllQVE9fSEFTSDI9eQpDT05GSUdfQ1JZUFRP X1JORz15CkNPTkZJR19DUllQVE9fUk5HMj15CkNPTkZJR19DUllQVE9fUk5HX0RFRkFVTFQ9eQpD T05GSUdfQ1JZUFRPX0FLQ0lQSEVSMj15CkNPTkZJR19DUllQVE9fQUtDSVBIRVI9eQpDT05GSUdf Q1JZUFRPX0tQUDI9eQpDT05GSUdfQ1JZUFRPX0tQUD1tCkNPTkZJR19DUllQVE9fQUNPTVAyPXkK Q09ORklHX0NSWVBUT19NQU5BR0VSPXkKQ09ORklHX0NSWVBUT19NQU5BR0VSMj15CkNPTkZJR19D UllQVE9fVVNFUj1tCkNPTkZJR19DUllQVE9fTUFOQUdFUl9ESVNBQkxFX1RFU1RTPXkKQ09ORklH X0NSWVBUT19HRjEyOE1VTD15CkNPTkZJR19DUllQVE9fTlVMTD15CkNPTkZJR19DUllQVE9fTlVM TDI9eQpDT05GSUdfQ1JZUFRPX1BDUllQVD1tCkNPTkZJR19DUllQVE9fQ1JZUFREPW0KQ09ORklH X0NSWVBUT19BVVRIRU5DPW0KQ09ORklHX0NSWVBUT19URVNUPW0KQ09ORklHX0NSWVBUT19TSU1E PW0KQ09ORklHX0NSWVBUT19HTFVFX0hFTFBFUl9YODY9bQpDT05GSUdfQ1JZUFRPX0VOR0lORT1t CgojCiMgUHVibGljLWtleSBjcnlwdG9ncmFwaHkKIwpDT05GSUdfQ1JZUFRPX1JTQT15CkNPTkZJ R19DUllQVE9fREg9bQpDT05GSUdfQ1JZUFRPX0VDQz1tCkNPTkZJR19DUllQVE9fRUNESD1tCiMg Q09ORklHX0NSWVBUT19FQ1JEU0EgaXMgbm90IHNldAojIENPTkZJR19DUllQVE9fQ1VSVkUyNTUx OSBpcyBub3Qgc2V0CiMgQ09ORklHX0NSWVBUT19DVVJWRTI1NTE5X1g4NiBpcyBub3Qgc2V0Cgoj CiMgQXV0aGVudGljYXRlZCBFbmNyeXB0aW9uIHdpdGggQXNzb2NpYXRlZCBEYXRhCiMKQ09ORklH X0NSWVBUT19DQ009bQpDT05GSUdfQ1JZUFRPX0dDTT15CiMgQ09ORklHX0NSWVBUT19DSEFDSEEy MFBPTFkxMzA1IGlzIG5vdCBzZXQKIyBDT05GSUdfQ1JZUFRPX0FFR0lTMTI4IGlzIG5vdCBzZXQK IyBDT05GSUdfQ1JZUFRPX0FFR0lTMTI4X0FFU05JX1NTRTIgaXMgbm90IHNldApDT05GSUdfQ1JZ UFRPX1NFUUlWPXkKQ09ORklHX0NSWVBUT19FQ0hBSU5JVj1tCgojCiMgQmxvY2sgbW9kZXMKIwpD T05GSUdfQ1JZUFRPX0NCQz15CiMgQ09ORklHX0NSWVBUT19DRkIgaXMgbm90IHNldApDT05GSUdf Q1JZUFRPX0NUUj15CkNPTkZJR19DUllQVE9fQ1RTPW0KQ09ORklHX0NSWVBUT19FQ0I9eQpDT05G SUdfQ1JZUFRPX0xSVz1tCiMgQ09ORklHX0NSWVBUT19PRkIgaXMgbm90IHNldApDT05GSUdfQ1JZ UFRPX1BDQkM9bQpDT05GSUdfQ1JZUFRPX1hUUz1tCiMgQ09ORklHX0NSWVBUT19LRVlXUkFQIGlz IG5vdCBzZXQKIyBDT05GSUdfQ1JZUFRPX05IUE9MWTEzMDVfU1NFMiBpcyBub3Qgc2V0CiMgQ09O RklHX0NSWVBUT19OSFBPTFkxMzA1X0FWWDIgaXMgbm90IHNldAojIENPTkZJR19DUllQVE9fQURJ QU5UVU0gaXMgbm90IHNldApDT05GSUdfQ1JZUFRPX0VTU0lWPW0KCiMKIyBIYXNoIG1vZGVzCiMK Q09ORklHX0NSWVBUT19DTUFDPW0KQ09ORklHX0NSWVBUT19ITUFDPXkKQ09ORklHX0NSWVBUT19Y Q0JDPW0KQ09ORklHX0NSWVBUT19WTUFDPW0KCiMKIyBEaWdlc3QKIwpDT05GSUdfQ1JZUFRPX0NS QzMyQz15CkNPTkZJR19DUllQVE9fQ1JDMzJDX0lOVEVMPW0KQ09ORklHX0NSWVBUT19DUkMzMj1t CkNPTkZJR19DUllQVE9fQ1JDMzJfUENMTVVMPW0KQ09ORklHX0NSWVBUT19YWEhBU0g9bQpDT05G SUdfQ1JZUFRPX0JMQUtFMkI9bQojIENPTkZJR19DUllQVE9fQkxBS0UyUyBpcyBub3Qgc2V0CiMg Q09ORklHX0NSWVBUT19CTEFLRTJTX1g4NiBpcyBub3Qgc2V0CkNPTkZJR19DUllQVE9fQ1JDVDEw RElGPXkKQ09ORklHX0NSWVBUT19DUkNUMTBESUZfUENMTVVMPW0KQ09ORklHX0NSWVBUT19HSEFT SD15CiMgQ09ORklHX0NSWVBUT19QT0xZMTMwNSBpcyBub3Qgc2V0CiMgQ09ORklHX0NSWVBUT19Q T0xZMTMwNV9YODZfNjQgaXMgbm90IHNldApDT05GSUdfQ1JZUFRPX01END1tCkNPTkZJR19DUllQ VE9fTUQ1PXkKQ09ORklHX0NSWVBUT19NSUNIQUVMX01JQz1tCkNPTkZJR19DUllQVE9fUk1EMTI4 PW0KQ09ORklHX0NSWVBUT19STUQxNjA9bQpDT05GSUdfQ1JZUFRPX1JNRDI1Nj1tCkNPTkZJR19D UllQVE9fUk1EMzIwPW0KQ09ORklHX0NSWVBUT19TSEExPXkKQ09ORklHX0NSWVBUT19TSEExX1NT U0UzPXkKQ09ORklHX0NSWVBUT19TSEEyNTZfU1NTRTM9eQpDT05GSUdfQ1JZUFRPX1NIQTUxMl9T U1NFMz1tCkNPTkZJR19DUllQVE9fU0hBMjU2PXkKQ09ORklHX0NSWVBUT19TSEE1MTI9bQojIENP TkZJR19DUllQVE9fU0hBMyBpcyBub3Qgc2V0CiMgQ09ORklHX0NSWVBUT19TTTMgaXMgbm90IHNl dAojIENPTkZJR19DUllQVE9fU1RSRUVCT0cgaXMgbm90IHNldApDT05GSUdfQ1JZUFRPX1RHUjE5 Mj1tCkNPTkZJR19DUllQVE9fV1A1MTI9bQpDT05GSUdfQ1JZUFRPX0dIQVNIX0NMTVVMX05JX0lO VEVMPW0KCiMKIyBDaXBoZXJzCiMKQ09ORklHX0NSWVBUT19BRVM9eQojIENPTkZJR19DUllQVE9f QUVTX1RJIGlzIG5vdCBzZXQKQ09ORklHX0NSWVBUT19BRVNfTklfSU5URUw9bQpDT05GSUdfQ1JZ UFRPX0FOVUJJUz1tCkNPTkZJR19DUllQVE9fQVJDND1tCkNPTkZJR19DUllQVE9fQkxPV0ZJU0g9 bQpDT05GSUdfQ1JZUFRPX0JMT1dGSVNIX0NPTU1PTj1tCkNPTkZJR19DUllQVE9fQkxPV0ZJU0hf WDg2XzY0PW0KQ09ORklHX0NSWVBUT19DQU1FTExJQT1tCkNPTkZJR19DUllQVE9fQ0FNRUxMSUFf WDg2XzY0PW0KQ09ORklHX0NSWVBUT19DQU1FTExJQV9BRVNOSV9BVlhfWDg2XzY0PW0KQ09ORklH X0NSWVBUT19DQU1FTExJQV9BRVNOSV9BVlgyX1g4Nl82ND1tCkNPTkZJR19DUllQVE9fQ0FTVF9D T01NT049bQpDT05GSUdfQ1JZUFRPX0NBU1Q1PW0KQ09ORklHX0NSWVBUT19DQVNUNV9BVlhfWDg2 XzY0PW0KQ09ORklHX0NSWVBUT19DQVNUNj1tCkNPTkZJR19DUllQVE9fQ0FTVDZfQVZYX1g4Nl82 ND1tCkNPTkZJR19DUllQVE9fREVTPW0KIyBDT05GSUdfQ1JZUFRPX0RFUzNfRURFX1g4Nl82NCBp cyBub3Qgc2V0CkNPTkZJR19DUllQVE9fRkNSWVBUPW0KQ09ORklHX0NSWVBUT19LSEFaQUQ9bQpD T05GSUdfQ1JZUFRPX1NBTFNBMjA9bQojIENPTkZJR19DUllQVE9fQ0hBQ0hBMjAgaXMgbm90IHNl dAojIENPTkZJR19DUllQVE9fQ0hBQ0hBMjBfWDg2XzY0IGlzIG5vdCBzZXQKQ09ORklHX0NSWVBU T19TRUVEPW0KQ09ORklHX0NSWVBUT19TRVJQRU5UPW0KQ09ORklHX0NSWVBUT19TRVJQRU5UX1NT RTJfWDg2XzY0PW0KQ09ORklHX0NSWVBUT19TRVJQRU5UX0FWWF9YODZfNjQ9bQpDT05GSUdfQ1JZ UFRPX1NFUlBFTlRfQVZYMl9YODZfNjQ9bQojIENPTkZJR19DUllQVE9fU000IGlzIG5vdCBzZXQK Q09ORklHX0NSWVBUT19URUE9bQpDT05GSUdfQ1JZUFRPX1RXT0ZJU0g9bQpDT05GSUdfQ1JZUFRP X1RXT0ZJU0hfQ09NTU9OPW0KQ09ORklHX0NSWVBUT19UV09GSVNIX1g4Nl82ND1tCkNPTkZJR19D UllQVE9fVFdPRklTSF9YODZfNjRfM1dBWT1tCkNPTkZJR19DUllQVE9fVFdPRklTSF9BVlhfWDg2 XzY0PW0KCiMKIyBDb21wcmVzc2lvbgojCkNPTkZJR19DUllQVE9fREVGTEFURT15CkNPTkZJR19D UllQVE9fTFpPPXkKIyBDT05GSUdfQ1JZUFRPXzg0MiBpcyBub3Qgc2V0CiMgQ09ORklHX0NSWVBU T19MWjQgaXMgbm90IHNldAojIENPTkZJR19DUllQVE9fTFo0SEMgaXMgbm90IHNldAojIENPTkZJ R19DUllQVE9fWlNURCBpcyBub3Qgc2V0CgojCiMgUmFuZG9tIE51bWJlciBHZW5lcmF0aW9uCiMK Q09ORklHX0NSWVBUT19BTlNJX0NQUk5HPW0KQ09ORklHX0NSWVBUT19EUkJHX01FTlU9eQpDT05G SUdfQ1JZUFRPX0RSQkdfSE1BQz15CkNPTkZJR19DUllQVE9fRFJCR19IQVNIPXkKQ09ORklHX0NS WVBUT19EUkJHX0NUUj15CkNPTkZJR19DUllQVE9fRFJCRz15CkNPTkZJR19DUllQVE9fSklUVEVS RU5UUk9QWT15CkNPTkZJR19DUllQVE9fVVNFUl9BUEk9eQpDT05GSUdfQ1JZUFRPX1VTRVJfQVBJ X0hBU0g9eQpDT05GSUdfQ1JZUFRPX1VTRVJfQVBJX1NLQ0lQSEVSPXkKQ09ORklHX0NSWVBUT19V U0VSX0FQSV9STkc9bQojIENPTkZJR19DUllQVE9fVVNFUl9BUElfQUVBRCBpcyBub3Qgc2V0CiMg Q09ORklHX0NSWVBUT19TVEFUUyBpcyBub3Qgc2V0CkNPTkZJR19DUllQVE9fSEFTSF9JTkZPPXkK CiMKIyBDcnlwdG8gbGlicmFyeSByb3V0aW5lcwojCkNPTkZJR19DUllQVE9fTElCX0FFUz15CkNP TkZJR19DUllQVE9fTElCX0FSQzQ9bQojIENPTkZJR19DUllQVE9fTElCX0JMQUtFMlMgaXMgbm90 IHNldAojIENPTkZJR19DUllQVE9fTElCX0NIQUNIQSBpcyBub3Qgc2V0CiMgQ09ORklHX0NSWVBU T19MSUJfQ1VSVkUyNTUxOSBpcyBub3Qgc2V0CkNPTkZJR19DUllQVE9fTElCX0RFUz1tCkNPTkZJ R19DUllQVE9fTElCX1BPTFkxMzA1X1JTSVpFPTExCiMgQ09ORklHX0NSWVBUT19MSUJfUE9MWTEz MDUgaXMgbm90IHNldAojIENPTkZJR19DUllQVE9fTElCX0NIQUNIQTIwUE9MWTEzMDUgaXMgbm90 IHNldApDT05GSUdfQ1JZUFRPX0xJQl9TSEEyNTY9eQpDT05GSUdfQ1JZUFRPX0hXPXkKQ09ORklH X0NSWVBUT19ERVZfUEFETE9DSz1tCkNPTkZJR19DUllQVE9fREVWX1BBRExPQ0tfQUVTPW0KQ09O RklHX0NSWVBUT19ERVZfUEFETE9DS19TSEE9bQojIENPTkZJR19DUllQVE9fREVWX0FUTUVMX0VD QyBpcyBub3Qgc2V0CiMgQ09ORklHX0NSWVBUT19ERVZfQVRNRUxfU0hBMjA0QSBpcyBub3Qgc2V0 CkNPTkZJR19DUllQVE9fREVWX0NDUD15CkNPTkZJR19DUllQVE9fREVWX0NDUF9ERD1tCkNPTkZJ R19DUllQVE9fREVWX1NQX0NDUD15CkNPTkZJR19DUllQVE9fREVWX0NDUF9DUllQVE89bQpDT05G SUdfQ1JZUFRPX0RFVl9TUF9QU1A9eQojIENPTkZJR19DUllQVE9fREVWX0NDUF9ERUJVR0ZTIGlz IG5vdCBzZXQKQ09ORklHX0NSWVBUT19ERVZfUUFUPW0KQ09ORklHX0NSWVBUT19ERVZfUUFUX0RI ODk1eENDPW0KQ09ORklHX0NSWVBUT19ERVZfUUFUX0MzWFhYPW0KQ09ORklHX0NSWVBUT19ERVZf UUFUX0M2Mlg9bQpDT05GSUdfQ1JZUFRPX0RFVl9RQVRfREg4OTV4Q0NWRj1tCkNPTkZJR19DUllQ VE9fREVWX1FBVF9DM1hYWFZGPW0KQ09ORklHX0NSWVBUT19ERVZfUUFUX0M2MlhWRj1tCiMgQ09O RklHX0NSWVBUT19ERVZfTklUUk9YX0NOTjU1WFggaXMgbm90IHNldApDT05GSUdfQ1JZUFRPX0RF Vl9DSEVMU0lPPW0KQ09ORklHX0NSWVBUT19ERVZfVklSVElPPW0KIyBDT05GSUdfQ1JZUFRPX0RF Vl9TQUZFWENFTCBpcyBub3Qgc2V0CiMgQ09ORklHX0NSWVBUT19ERVZfQU1MT0dJQ19HWEwgaXMg bm90IHNldApDT05GSUdfQVNZTU1FVFJJQ19LRVlfVFlQRT15CkNPTkZJR19BU1lNTUVUUklDX1BV QkxJQ19LRVlfU1VCVFlQRT15CiMgQ09ORklHX0FTWU1NRVRSSUNfVFBNX0tFWV9TVUJUWVBFIGlz IG5vdCBzZXQKQ09ORklHX1g1MDlfQ0VSVElGSUNBVEVfUEFSU0VSPXkKIyBDT05GSUdfUEtDUzhf UFJJVkFURV9LRVlfUEFSU0VSIGlzIG5vdCBzZXQKQ09ORklHX1BLQ1M3X01FU1NBR0VfUEFSU0VS PXkKIyBDT05GSUdfUEtDUzdfVEVTVF9LRVkgaXMgbm90IHNldApDT05GSUdfU0lHTkVEX1BFX0ZJ TEVfVkVSSUZJQ0FUSU9OPXkKCiMKIyBDZXJ0aWZpY2F0ZXMgZm9yIHNpZ25hdHVyZSBjaGVja2lu ZwojCkNPTkZJR19NT0RVTEVfU0lHX0tFWT0iY2VydHMvc2lnbmluZ19rZXkucGVtIgpDT05GSUdf U1lTVEVNX1RSVVNURURfS0VZUklORz15CkNPTkZJR19TWVNURU1fVFJVU1RFRF9LRVlTPSIiCiMg Q09ORklHX1NZU1RFTV9FWFRSQV9DRVJUSUZJQ0FURSBpcyBub3Qgc2V0CiMgQ09ORklHX1NFQ09O REFSWV9UUlVTVEVEX0tFWVJJTkcgaXMgbm90IHNldApDT05GSUdfU1lTVEVNX0JMQUNLTElTVF9L RVlSSU5HPXkKQ09ORklHX1NZU1RFTV9CTEFDS0xJU1RfSEFTSF9MSVNUPSIiCiMgZW5kIG9mIENl cnRpZmljYXRlcyBmb3Igc2lnbmF0dXJlIGNoZWNraW5nCgpDT05GSUdfQklOQVJZX1BSSU5URj15 CgojCiMgTGlicmFyeSByb3V0aW5lcwojCkNPTkZJR19SQUlENl9QUT1tCkNPTkZJR19SQUlENl9Q UV9CRU5DSE1BUks9eQojIENPTkZJR19QQUNLSU5HIGlzIG5vdCBzZXQKQ09ORklHX0JJVFJFVkVS U0U9eQpDT05GSUdfR0VORVJJQ19TVFJOQ1BZX0ZST01fVVNFUj15CkNPTkZJR19HRU5FUklDX1NU Uk5MRU5fVVNFUj15CkNPTkZJR19HRU5FUklDX05FVF9VVElMUz15CkNPTkZJR19HRU5FUklDX0ZJ TkRfRklSU1RfQklUPXkKQ09ORklHX0NPUkRJQz1tCkNPTkZJR19QUklNRV9OVU1CRVJTPW0KQ09O RklHX1JBVElPTkFMPXkKQ09ORklHX0dFTkVSSUNfUENJX0lPTUFQPXkKQ09ORklHX0dFTkVSSUNf SU9NQVA9eQpDT05GSUdfQVJDSF9VU0VfQ01QWENIR19MT0NLUkVGPXkKQ09ORklHX0FSQ0hfSEFT X0ZBU1RfTVVMVElQTElFUj15CkNPTkZJR19DUkNfQ0NJVFQ9eQpDT05GSUdfQ1JDMTY9eQpDT05G SUdfQ1JDX1QxMERJRj15CkNPTkZJR19DUkNfSVRVX1Q9bQpDT05GSUdfQ1JDMzI9eQojIENPTkZJ R19DUkMzMl9TRUxGVEVTVCBpcyBub3Qgc2V0CkNPTkZJR19DUkMzMl9TTElDRUJZOD15CiMgQ09O RklHX0NSQzMyX1NMSUNFQlk0IGlzIG5vdCBzZXQKIyBDT05GSUdfQ1JDMzJfU0FSV0FURSBpcyBu b3Qgc2V0CiMgQ09ORklHX0NSQzMyX0JJVCBpcyBub3Qgc2V0CiMgQ09ORklHX0NSQzY0IGlzIG5v dCBzZXQKIyBDT05GSUdfQ1JDNCBpcyBub3Qgc2V0CiMgQ09ORklHX0NSQzcgaXMgbm90IHNldApD T05GSUdfTElCQ1JDMzJDPW0KQ09ORklHX0NSQzg9bQpDT05GSUdfWFhIQVNIPXkKIyBDT05GSUdf UkFORE9NMzJfU0VMRlRFU1QgaXMgbm90IHNldApDT05GSUdfWkxJQl9JTkZMQVRFPXkKQ09ORklH X1pMSUJfREVGTEFURT15CkNPTkZJR19MWk9fQ09NUFJFU1M9eQpDT05GSUdfTFpPX0RFQ09NUFJF U1M9eQpDT05GSUdfTFo0X0RFQ09NUFJFU1M9eQpDT05GSUdfWlNURF9DT01QUkVTUz1tCkNPTkZJ R19aU1REX0RFQ09NUFJFU1M9bQpDT05GSUdfWFpfREVDPXkKQ09ORklHX1haX0RFQ19YODY9eQpD T05GSUdfWFpfREVDX1BPV0VSUEM9eQpDT05GSUdfWFpfREVDX0lBNjQ9eQpDT05GSUdfWFpfREVD X0FSTT15CkNPTkZJR19YWl9ERUNfQVJNVEhVTUI9eQpDT05GSUdfWFpfREVDX1NQQVJDPXkKQ09O RklHX1haX0RFQ19CQ0o9eQojIENPTkZJR19YWl9ERUNfVEVTVCBpcyBub3Qgc2V0CkNPTkZJR19E RUNPTVBSRVNTX0daSVA9eQpDT05GSUdfREVDT01QUkVTU19CWklQMj15CkNPTkZJR19ERUNPTVBS RVNTX0xaTUE9eQpDT05GSUdfREVDT01QUkVTU19YWj15CkNPTkZJR19ERUNPTVBSRVNTX0xaTz15 CkNPTkZJR19ERUNPTVBSRVNTX0xaND15CkNPTkZJR19HRU5FUklDX0FMTE9DQVRPUj15CkNPTkZJ R19SRUVEX1NPTE9NT049bQpDT05GSUdfUkVFRF9TT0xPTU9OX0VOQzg9eQpDT05GSUdfUkVFRF9T T0xPTU9OX0RFQzg9eQpDT05GSUdfVEVYVFNFQVJDSD15CkNPTkZJR19URVhUU0VBUkNIX0tNUD1t CkNPTkZJR19URVhUU0VBUkNIX0JNPW0KQ09ORklHX1RFWFRTRUFSQ0hfRlNNPW0KQ09ORklHX0JU UkVFPXkKQ09ORklHX0lOVEVSVkFMX1RSRUU9eQpDT05GSUdfWEFSUkFZX01VTFRJPXkKQ09ORklH X0FTU09DSUFUSVZFX0FSUkFZPXkKQ09ORklHX0hBU19JT01FTT15CkNPTkZJR19IQVNfSU9QT1JU X01BUD15CkNPTkZJR19IQVNfRE1BPXkKQ09ORklHX05FRURfU0dfRE1BX0xFTkdUSD15CkNPTkZJ R19ORUVEX0RNQV9NQVBfU1RBVEU9eQpDT05GSUdfQVJDSF9ETUFfQUREUl9UXzY0QklUPXkKQ09O RklHX0FSQ0hfSEFTX0ZPUkNFX0RNQV9VTkVOQ1JZUFRFRD15CkNPTkZJR19TV0lPVExCPXkKQ09O RklHX0RNQV9DTUE9eQoKIwojIERlZmF1bHQgY29udGlndW91cyBtZW1vcnkgYXJlYSBzaXplOgoj CkNPTkZJR19DTUFfU0laRV9NQllURVM9MjAwCkNPTkZJR19DTUFfU0laRV9TRUxfTUJZVEVTPXkK IyBDT05GSUdfQ01BX1NJWkVfU0VMX1BFUkNFTlRBR0UgaXMgbm90IHNldAojIENPTkZJR19DTUFf U0laRV9TRUxfTUlOIGlzIG5vdCBzZXQKIyBDT05GSUdfQ01BX1NJWkVfU0VMX01BWCBpcyBub3Qg c2V0CkNPTkZJR19DTUFfQUxJR05NRU5UPTgKIyBDT05GSUdfRE1BX0FQSV9ERUJVRyBpcyBub3Qg c2V0CkNPTkZJR19TR0xfQUxMT0M9eQpDT05GSUdfSU9NTVVfSEVMUEVSPXkKQ09ORklHX0NIRUNL X1NJR05BVFVSRT15CkNPTkZJR19DUFVNQVNLX09GRlNUQUNLPXkKQ09ORklHX0NQVV9STUFQPXkK Q09ORklHX0RRTD15CkNPTkZJR19HTE9CPXkKIyBDT05GSUdfR0xPQl9TRUxGVEVTVCBpcyBub3Qg c2V0CkNPTkZJR19OTEFUVFI9eQpDT05GSUdfQ0xaX1RBQj15CkNPTkZJR19JUlFfUE9MTD15CkNP TkZJR19NUElMSUI9eQpDT05GSUdfU0lHTkFUVVJFPXkKQ09ORklHX0RJTUxJQj15CkNPTkZJR19P SURfUkVHSVNUUlk9eQpDT05GSUdfVUNTMl9TVFJJTkc9eQpDT05GSUdfSEFWRV9HRU5FUklDX1ZE U089eQpDT05GSUdfR0VORVJJQ19HRVRUSU1FT0ZEQVk9eQpDT05GSUdfR0VORVJJQ19WRFNPX1RJ TUVfTlM9eQpDT05GSUdfRk9OVF9TVVBQT1JUPXkKIyBDT05GSUdfRk9OVFMgaXMgbm90IHNldApD T05GSUdfRk9OVF84eDg9eQpDT05GSUdfRk9OVF84eDE2PXkKQ09ORklHX1NHX1BPT0w9eQpDT05G SUdfQVJDSF9IQVNfUE1FTV9BUEk9eQpDT05GSUdfTUVNUkVHSU9OPXkKQ09ORklHX0FSQ0hfSEFT X1VBQ0NFU1NfRkxVU0hDQUNIRT15CkNPTkZJR19BUkNIX0hBU19VQUNDRVNTX01DU0FGRT15CkNP TkZJR19BUkNIX1NUQUNLV0FMSz15CkNPTkZJR19TQklUTUFQPXkKIyBDT05GSUdfU1RSSU5HX1NF TEZURVNUIGlzIG5vdCBzZXQKIyBlbmQgb2YgTGlicmFyeSByb3V0aW5lcwoKIwojIEtlcm5lbCBo YWNraW5nCiMKCiMKIyBwcmludGsgYW5kIGRtZXNnIG9wdGlvbnMKIwpDT05GSUdfUFJJTlRLX1RJ TUU9eQojIENPTkZJR19QUklOVEtfQ0FMTEVSIGlzIG5vdCBzZXQKQ09ORklHX0NPTlNPTEVfTE9H TEVWRUxfREVGQVVMVD03CkNPTkZJR19DT05TT0xFX0xPR0xFVkVMX1FVSUVUPTQKQ09ORklHX01F U1NBR0VfTE9HTEVWRUxfREVGQVVMVD00CkNPTkZJR19CT09UX1BSSU5US19ERUxBWT15CkNPTkZJ R19EWU5BTUlDX0RFQlVHPXkKQ09ORklHX1NZTUJPTElDX0VSUk5BTUU9eQpDT05GSUdfREVCVUdf QlVHVkVSQk9TRT15CiMgZW5kIG9mIHByaW50ayBhbmQgZG1lc2cgb3B0aW9ucwoKIwojIENvbXBp bGUtdGltZSBjaGVja3MgYW5kIGNvbXBpbGVyIG9wdGlvbnMKIwpDT05GSUdfREVCVUdfSU5GTz15 CkNPTkZJR19ERUJVR19JTkZPX1JFRFVDRUQ9eQojIENPTkZJR19ERUJVR19JTkZPX1NQTElUIGlz IG5vdCBzZXQKIyBDT05GSUdfREVCVUdfSU5GT19EV0FSRjQgaXMgbm90IHNldAojIENPTkZJR19E RUJVR19JTkZPX0JURiBpcyBub3Qgc2V0CiMgQ09ORklHX0dEQl9TQ1JJUFRTIGlzIG5vdCBzZXQK Q09ORklHX0VOQUJMRV9NVVNUX0NIRUNLPXkKQ09ORklHX0ZSQU1FX1dBUk49MjA0OApDT05GSUdf U1RSSVBfQVNNX1NZTVM9eQojIENPTkZJR19SRUFEQUJMRV9BU00gaXMgbm90IHNldAojIENPTkZJ R19IRUFERVJTX0lOU1RBTEwgaXMgbm90IHNldApDT05GSUdfT1BUSU1JWkVfSU5MSU5JTkc9eQpD T05GSUdfREVCVUdfU0VDVElPTl9NSVNNQVRDSD15CkNPTkZJR19TRUNUSU9OX01JU01BVENIX1dB Uk5fT05MWT15CkNPTkZJR19TVEFDS19WQUxJREFUSU9OPXkKIyBDT05GSUdfREVCVUdfRk9SQ0Vf V0VBS19QRVJfQ1BVIGlzIG5vdCBzZXQKIyBlbmQgb2YgQ29tcGlsZS10aW1lIGNoZWNrcyBhbmQg Y29tcGlsZXIgb3B0aW9ucwoKIwojIEdlbmVyaWMgS2VybmVsIERlYnVnZ2luZyBJbnN0cnVtZW50 cwojCkNPTkZJR19NQUdJQ19TWVNSUT15CkNPTkZJR19NQUdJQ19TWVNSUV9ERUZBVUxUX0VOQUJM RT0weDEKQ09ORklHX01BR0lDX1NZU1JRX1NFUklBTD15CkNPTkZJR19ERUJVR19GUz15CkNPTkZJ R19IQVZFX0FSQ0hfS0dEQj15CiMgQ09ORklHX0tHREIgaXMgbm90IHNldApDT05GSUdfQVJDSF9I QVNfVUJTQU5fU0FOSVRJWkVfQUxMPXkKIyBDT05GSUdfVUJTQU4gaXMgbm90IHNldApDT05GSUdf VUJTQU5fQUxJR05NRU5UPXkKIyBlbmQgb2YgR2VuZXJpYyBLZXJuZWwgRGVidWdnaW5nIEluc3Ry dW1lbnRzCgpDT05GSUdfREVCVUdfS0VSTkVMPXkKQ09ORklHX0RFQlVHX01JU0M9eQoKIwojIE1l bW9yeSBEZWJ1Z2dpbmcKIwojIENPTkZJR19QQUdFX0VYVEVOU0lPTiBpcyBub3Qgc2V0CiMgQ09O RklHX0RFQlVHX1BBR0VBTExPQyBpcyBub3Qgc2V0CiMgQ09ORklHX1BBR0VfT1dORVIgaXMgbm90 IHNldAojIENPTkZJR19QQUdFX1BPSVNPTklORyBpcyBub3Qgc2V0CiMgQ09ORklHX0RFQlVHX1BB R0VfUkVGIGlzIG5vdCBzZXQKQ09ORklHX0RFQlVHX1JPREFUQV9URVNUPXkKQ09ORklHX0dFTkVS SUNfUFREVU1QPXkKIyBDT05GSUdfUFREVU1QX0RFQlVHRlMgaXMgbm90IHNldAojIENPTkZJR19E RUJVR19PQkpFQ1RTIGlzIG5vdCBzZXQKIyBDT05GSUdfU0xVQl9ERUJVR19PTiBpcyBub3Qgc2V0 CiMgQ09ORklHX1NMVUJfU1RBVFMgaXMgbm90IHNldApDT05GSUdfSEFWRV9ERUJVR19LTUVNTEVB Sz15CiMgQ09ORklHX0RFQlVHX0tNRU1MRUFLIGlzIG5vdCBzZXQKIyBDT05GSUdfREVCVUdfU1RB Q0tfVVNBR0UgaXMgbm90IHNldAojIENPTkZJR19TQ0hFRF9TVEFDS19FTkRfQ0hFQ0sgaXMgbm90 IHNldAojIENPTkZJR19ERUJVR19WTSBpcyBub3Qgc2V0CkNPTkZJR19BUkNIX0hBU19ERUJVR19W SVJUVUFMPXkKIyBDT05GSUdfREVCVUdfVklSVFVBTCBpcyBub3Qgc2V0CkNPTkZJR19ERUJVR19N RU1PUllfSU5JVD15CkNPTkZJR19NRU1PUllfTk9USUZJRVJfRVJST1JfSU5KRUNUPW0KIyBDT05G SUdfREVCVUdfUEVSX0NQVV9NQVBTIGlzIG5vdCBzZXQKQ09ORklHX0hBVkVfQVJDSF9LQVNBTj15 CkNPTkZJR19IQVZFX0FSQ0hfS0FTQU5fVk1BTExPQz15CkNPTkZJR19DQ19IQVNfS0FTQU5fR0VO RVJJQz15CiMgQ09ORklHX0tBU0FOIGlzIG5vdCBzZXQKQ09ORklHX0tBU0FOX1NUQUNLPTEKIyBl bmQgb2YgTWVtb3J5IERlYnVnZ2luZwoKQ09ORklHX0RFQlVHX1NISVJRPXkKCiMKIyBEZWJ1ZyBP b3BzLCBMb2NrdXBzIGFuZCBIYW5ncwojCkNPTkZJR19QQU5JQ19PTl9PT1BTPXkKQ09ORklHX1BB TklDX09OX09PUFNfVkFMVUU9MQpDT05GSUdfUEFOSUNfVElNRU9VVD0wCkNPTkZJR19MT0NLVVBf REVURUNUT1I9eQpDT05GSUdfU09GVExPQ0tVUF9ERVRFQ1RPUj15CiMgQ09ORklHX0JPT1RQQVJB TV9TT0ZUTE9DS1VQX1BBTklDIGlzIG5vdCBzZXQKQ09ORklHX0JPT1RQQVJBTV9TT0ZUTE9DS1VQ X1BBTklDX1ZBTFVFPTAKQ09ORklHX0hBUkRMT0NLVVBfREVURUNUT1JfUEVSRj15CkNPTkZJR19I QVJETE9DS1VQX0NIRUNLX1RJTUVTVEFNUD15CkNPTkZJR19IQVJETE9DS1VQX0RFVEVDVE9SPXkK Q09ORklHX0JPT1RQQVJBTV9IQVJETE9DS1VQX1BBTklDPXkKQ09ORklHX0JPT1RQQVJBTV9IQVJE TE9DS1VQX1BBTklDX1ZBTFVFPTEKIyBDT05GSUdfREVURUNUX0hVTkdfVEFTSyBpcyBub3Qgc2V0 CiMgQ09ORklHX1dRX1dBVENIRE9HIGlzIG5vdCBzZXQKIyBlbmQgb2YgRGVidWcgT29wcywgTG9j a3VwcyBhbmQgSGFuZ3MKCiMKIyBTY2hlZHVsZXIgRGVidWdnaW5nCiMKQ09ORklHX1NDSEVEX0RF QlVHPXkKQ09ORklHX1NDSEVEX0lORk89eQpDT05GSUdfU0NIRURTVEFUUz15CiMgZW5kIG9mIFNj aGVkdWxlciBEZWJ1Z2dpbmcKCiMgQ09ORklHX0RFQlVHX1RJTUVLRUVQSU5HIGlzIG5vdCBzZXQK CiMKIyBMb2NrIERlYnVnZ2luZyAoc3BpbmxvY2tzLCBtdXRleGVzLCBldGMuLi4pCiMKQ09ORklH X0xPQ0tfREVCVUdHSU5HX1NVUFBPUlQ9eQojIENPTkZJR19QUk9WRV9MT0NLSU5HIGlzIG5vdCBz ZXQKIyBDT05GSUdfTE9DS19TVEFUIGlzIG5vdCBzZXQKIyBDT05GSUdfREVCVUdfUlRfTVVURVhF UyBpcyBub3Qgc2V0CiMgQ09ORklHX0RFQlVHX1NQSU5MT0NLIGlzIG5vdCBzZXQKIyBDT05GSUdf REVCVUdfTVVURVhFUyBpcyBub3Qgc2V0CiMgQ09ORklHX0RFQlVHX1dXX01VVEVYX1NMT1dQQVRI IGlzIG5vdCBzZXQKIyBDT05GSUdfREVCVUdfUldTRU1TIGlzIG5vdCBzZXQKIyBDT05GSUdfREVC VUdfTE9DS19BTExPQyBpcyBub3Qgc2V0CkNPTkZJR19ERUJVR19BVE9NSUNfU0xFRVA9eQojIENP TkZJR19ERUJVR19MT0NLSU5HX0FQSV9TRUxGVEVTVFMgaXMgbm90IHNldApDT05GSUdfTE9DS19U T1JUVVJFX1RFU1Q9bQpDT05GSUdfV1dfTVVURVhfU0VMRlRFU1Q9bQojIGVuZCBvZiBMb2NrIERl YnVnZ2luZyAoc3BpbmxvY2tzLCBtdXRleGVzLCBldGMuLi4pCgpDT05GSUdfU1RBQ0tUUkFDRT15 CiMgQ09ORklHX1dBUk5fQUxMX1VOU0VFREVEX1JBTkRPTSBpcyBub3Qgc2V0CiMgQ09ORklHX0RF QlVHX0tPQkpFQ1QgaXMgbm90IHNldAoKIwojIERlYnVnIGtlcm5lbCBkYXRhIHN0cnVjdHVyZXMK IwpDT05GSUdfREVCVUdfTElTVD15CiMgQ09ORklHX0RFQlVHX1BMSVNUIGlzIG5vdCBzZXQKIyBD T05GSUdfREVCVUdfU0cgaXMgbm90IHNldAojIENPTkZJR19ERUJVR19OT1RJRklFUlMgaXMgbm90 IHNldAojIENPTkZJR19CVUdfT05fREFUQV9DT1JSVVBUSU9OIGlzIG5vdCBzZXQKIyBlbmQgb2Yg RGVidWcga2VybmVsIGRhdGEgc3RydWN0dXJlcwoKIyBDT05GSUdfREVCVUdfQ1JFREVOVElBTFMg aXMgbm90IHNldAoKIwojIFJDVSBEZWJ1Z2dpbmcKIwpDT05GSUdfVE9SVFVSRV9URVNUPW0KQ09O RklHX1JDVV9QRVJGX1RFU1Q9bQpDT05GSUdfUkNVX1RPUlRVUkVfVEVTVD1tCkNPTkZJR19SQ1Vf Q1BVX1NUQUxMX1RJTUVPVVQ9NjAKIyBDT05GSUdfUkNVX1RSQUNFIGlzIG5vdCBzZXQKIyBDT05G SUdfUkNVX0VRU19ERUJVRyBpcyBub3Qgc2V0CiMgZW5kIG9mIFJDVSBEZWJ1Z2dpbmcKCiMgQ09O RklHX0RFQlVHX1dRX0ZPUkNFX1JSX0NQVSBpcyBub3Qgc2V0CiMgQ09ORklHX0RFQlVHX0JMT0NL X0VYVF9ERVZUIGlzIG5vdCBzZXQKIyBDT05GSUdfQ1BVX0hPVFBMVUdfU1RBVEVfQ09OVFJPTCBp cyBub3Qgc2V0CkNPTkZJR19MQVRFTkNZVE9QPXkKQ09ORklHX1VTRVJfU1RBQ0tUUkFDRV9TVVBQ T1JUPXkKQ09ORklHX05PUF9UUkFDRVI9eQpDT05GSUdfSEFWRV9GVU5DVElPTl9UUkFDRVI9eQpD T05GSUdfSEFWRV9GVU5DVElPTl9HUkFQSF9UUkFDRVI9eQpDT05GSUdfSEFWRV9EWU5BTUlDX0ZU UkFDRT15CkNPTkZJR19IQVZFX0RZTkFNSUNfRlRSQUNFX1dJVEhfUkVHUz15CkNPTkZJR19IQVZF X0RZTkFNSUNfRlRSQUNFX1dJVEhfRElSRUNUX0NBTExTPXkKQ09ORklHX0hBVkVfRlRSQUNFX01D T1VOVF9SRUNPUkQ9eQpDT05GSUdfSEFWRV9TWVNDQUxMX1RSQUNFUE9JTlRTPXkKQ09ORklHX0hB VkVfRkVOVFJZPXkKQ09ORklHX0hBVkVfQ19SRUNPUkRNQ09VTlQ9eQpDT05GSUdfVFJBQ0VSX01B WF9UUkFDRT15CkNPTkZJR19UUkFDRV9DTE9DSz15CkNPTkZJR19SSU5HX0JVRkZFUj15CkNPTkZJ R19FVkVOVF9UUkFDSU5HPXkKQ09ORklHX0NPTlRFWFRfU1dJVENIX1RSQUNFUj15CkNPTkZJR19S SU5HX0JVRkZFUl9BTExPV19TV0FQPXkKQ09ORklHX1RSQUNJTkc9eQpDT05GSUdfR0VORVJJQ19U UkFDRVI9eQpDT05GSUdfVFJBQ0lOR19TVVBQT1JUPXkKQ09ORklHX0ZUUkFDRT15CiMgQ09ORklH X0JPT1RUSU1FX1RSQUNJTkcgaXMgbm90IHNldApDT05GSUdfRlVOQ1RJT05fVFJBQ0VSPXkKQ09O RklHX0ZVTkNUSU9OX0dSQVBIX1RSQUNFUj15CkNPTkZJR19EWU5BTUlDX0ZUUkFDRT15CkNPTkZJ R19EWU5BTUlDX0ZUUkFDRV9XSVRIX1JFR1M9eQpDT05GSUdfRFlOQU1JQ19GVFJBQ0VfV0lUSF9E SVJFQ1RfQ0FMTFM9eQpDT05GSUdfRlVOQ1RJT05fUFJPRklMRVI9eQpDT05GSUdfU1RBQ0tfVFJB Q0VSPXkKIyBDT05GSUdfUFJFRU1QVElSUV9FVkVOVFMgaXMgbm90IHNldAojIENPTkZJR19JUlFT T0ZGX1RSQUNFUiBpcyBub3Qgc2V0CkNPTkZJR19TQ0hFRF9UUkFDRVI9eQpDT05GSUdfSFdMQVRf VFJBQ0VSPXkKIyBDT05GSUdfTU1JT1RSQUNFIGlzIG5vdCBzZXQKQ09ORklHX0ZUUkFDRV9TWVND QUxMUz15CkNPTkZJR19UUkFDRVJfU05BUFNIT1Q9eQojIENPTkZJR19UUkFDRVJfU05BUFNIT1Rf UEVSX0NQVV9TV0FQIGlzIG5vdCBzZXQKQ09ORklHX0JSQU5DSF9QUk9GSUxFX05PTkU9eQojIENP TkZJR19QUk9GSUxFX0FOTk9UQVRFRF9CUkFOQ0hFUyBpcyBub3Qgc2V0CiMgQ09ORklHX1BST0ZJ TEVfQUxMX0JSQU5DSEVTIGlzIG5vdCBzZXQKQ09ORklHX0JMS19ERVZfSU9fVFJBQ0U9eQpDT05G SUdfS1BST0JFX0VWRU5UUz15CiMgQ09ORklHX0tQUk9CRV9FVkVOVFNfT05fTk9UUkFDRSBpcyBu b3Qgc2V0CkNPTkZJR19VUFJPQkVfRVZFTlRTPXkKQ09ORklHX0JQRl9FVkVOVFM9eQpDT05GSUdf RFlOQU1JQ19FVkVOVFM9eQpDT05GSUdfUFJPQkVfRVZFTlRTPXkKIyBDT05GSUdfQlBGX0tQUk9C RV9PVkVSUklERSBpcyBub3Qgc2V0CkNPTkZJR19GVFJBQ0VfTUNPVU5UX1JFQ09SRD15CkNPTkZJ R19UUkFDSU5HX01BUD15CkNPTkZJR19ISVNUX1RSSUdHRVJTPXkKIyBDT05GSUdfVFJBQ0VfRVZF TlRfSU5KRUNUIGlzIG5vdCBzZXQKIyBDT05GSUdfVFJBQ0VQT0lOVF9CRU5DSE1BUksgaXMgbm90 IHNldApDT05GSUdfUklOR19CVUZGRVJfQkVOQ0hNQVJLPW0KIyBDT05GSUdfVFJBQ0VfRVZBTF9N QVBfRklMRSBpcyBub3Qgc2V0CiMgQ09ORklHX0ZUUkFDRV9TVEFSVFVQX1RFU1QgaXMgbm90IHNl dAojIENPTkZJR19SSU5HX0JVRkZFUl9TVEFSVFVQX1RFU1QgaXMgbm90IHNldAojIENPTkZJR19Q UkVFTVBUSVJRX0RFTEFZX1RFU1QgaXMgbm90IHNldAojIENPTkZJR19TWU5USF9FVkVOVF9HRU5f VEVTVCBpcyBub3Qgc2V0CiMgQ09ORklHX0tQUk9CRV9FVkVOVF9HRU5fVEVTVCBpcyBub3Qgc2V0 CkNPTkZJR19QUk9WSURFX09IQ0kxMzk0X0RNQV9JTklUPXkKIyBDT05GSUdfU0FNUExFUyBpcyBu b3Qgc2V0CkNPTkZJR19IQVZFX0FSQ0hfS0NTQU49eQojIENPTkZJR19LQ1NBTiBpcyBub3Qgc2V0 CkNPTkZJR19BUkNIX0hBU19ERVZNRU1fSVNfQUxMT1dFRD15CkNPTkZJR19TVFJJQ1RfREVWTUVN PXkKIyBDT05GSUdfSU9fU1RSSUNUX0RFVk1FTSBpcyBub3Qgc2V0CgojCiMgeDg2IERlYnVnZ2lu ZwojCkNPTkZJR19UUkFDRV9JUlFGTEFHU19TVVBQT1JUPXkKQ09ORklHX0VBUkxZX1BSSU5US19V U0I9eQpDT05GSUdfWDg2X1ZFUkJPU0VfQk9PVFVQPXkKQ09ORklHX0VBUkxZX1BSSU5USz15CkNP TkZJR19FQVJMWV9QUklOVEtfREJHUD15CiMgQ09ORklHX0VBUkxZX1BSSU5US19VU0JfWERCQyBp cyBub3Qgc2V0CiMgQ09ORklHX0VGSV9QR1RfRFVNUCBpcyBub3Qgc2V0CiMgQ09ORklHX0RFQlVH X1dYIGlzIG5vdCBzZXQKQ09ORklHX0RPVUJMRUZBVUxUPXkKIyBDT05GSUdfREVCVUdfVExCRkxV U0ggaXMgbm90IHNldAojIENPTkZJR19JT01NVV9ERUJVRyBpcyBub3Qgc2V0CkNPTkZJR19IQVZF X01NSU9UUkFDRV9TVVBQT1JUPXkKQ09ORklHX1g4Nl9ERUNPREVSX1NFTEZURVNUPXkKQ09ORklH X0lPX0RFTEFZXzBYODA9eQojIENPTkZJR19JT19ERUxBWV8wWEVEIGlzIG5vdCBzZXQKIyBDT05G SUdfSU9fREVMQVlfVURFTEFZIGlzIG5vdCBzZXQKIyBDT05GSUdfSU9fREVMQVlfTk9ORSBpcyBu b3Qgc2V0CkNPTkZJR19ERUJVR19CT09UX1BBUkFNUz15CiMgQ09ORklHX0NQQV9ERUJVRyBpcyBu b3Qgc2V0CiMgQ09ORklHX0RFQlVHX0VOVFJZIGlzIG5vdCBzZXQKIyBDT05GSUdfREVCVUdfTk1J X1NFTEZURVNUIGlzIG5vdCBzZXQKQ09ORklHX1g4Nl9ERUJVR19GUFU9eQojIENPTkZJR19QVU5J VF9BVE9NX0RFQlVHIGlzIG5vdCBzZXQKQ09ORklHX1VOV0lOREVSX09SQz15CiMgQ09ORklHX1VO V0lOREVSX0ZSQU1FX1BPSU5URVIgaXMgbm90IHNldAojIENPTkZJR19VTldJTkRFUl9HVUVTUyBp cyBub3Qgc2V0CiMgZW5kIG9mIHg4NiBEZWJ1Z2dpbmcKCiMKIyBLZXJuZWwgVGVzdGluZyBhbmQg Q292ZXJhZ2UKIwojIENPTkZJR19LVU5JVCBpcyBub3Qgc2V0CkNPTkZJR19OT1RJRklFUl9FUlJP Ul9JTkpFQ1RJT049bQpDT05GSUdfUE1fTk9USUZJRVJfRVJST1JfSU5KRUNUPW0KIyBDT05GSUdf TkVUREVWX05PVElGSUVSX0VSUk9SX0lOSkVDVCBpcyBub3Qgc2V0CkNPTkZJR19GVU5DVElPTl9F UlJPUl9JTkpFQ1RJT049eQpDT05GSUdfRkFVTFRfSU5KRUNUSU9OPXkKIyBDT05GSUdfRkFJTFNM QUIgaXMgbm90IHNldAojIENPTkZJR19GQUlMX1BBR0VfQUxMT0MgaXMgbm90IHNldApDT05GSUdf RkFJTF9NQUtFX1JFUVVFU1Q9eQojIENPTkZJR19GQUlMX0lPX1RJTUVPVVQgaXMgbm90IHNldAoj IENPTkZJR19GQUlMX0ZVVEVYIGlzIG5vdCBzZXQKQ09ORklHX0ZBVUxUX0lOSkVDVElPTl9ERUJV R19GUz15CiMgQ09ORklHX0ZBSUxfRlVOQ1RJT04gaXMgbm90IHNldAojIENPTkZJR19GQUlMX01N Q19SRVFVRVNUIGlzIG5vdCBzZXQKQ09ORklHX0FSQ0hfSEFTX0tDT1Y9eQpDT05GSUdfQ0NfSEFT X1NBTkNPVl9UUkFDRV9QQz15CiMgQ09ORklHX0tDT1YgaXMgbm90IHNldApDT05GSUdfUlVOVElN RV9URVNUSU5HX01FTlU9eQojIENPTkZJR19MS0RUTSBpcyBub3Qgc2V0CiMgQ09ORklHX1RFU1Rf TElTVF9TT1JUIGlzIG5vdCBzZXQKIyBDT05GSUdfVEVTVF9TT1JUIGlzIG5vdCBzZXQKIyBDT05G SUdfS1BST0JFU19TQU5JVFlfVEVTVCBpcyBub3Qgc2V0CiMgQ09ORklHX0JBQ0tUUkFDRV9TRUxG X1RFU1QgaXMgbm90IHNldAojIENPTkZJR19SQlRSRUVfVEVTVCBpcyBub3Qgc2V0CiMgQ09ORklH X1JFRURfU09MT01PTl9URVNUIGlzIG5vdCBzZXQKIyBDT05GSUdfSU5URVJWQUxfVFJFRV9URVNU IGlzIG5vdCBzZXQKIyBDT05GSUdfUEVSQ1BVX1RFU1QgaXMgbm90IHNldApDT05GSUdfQVRPTUlD NjRfU0VMRlRFU1Q9eQojIENPTkZJR19BU1lOQ19SQUlENl9URVNUIGlzIG5vdCBzZXQKIyBDT05G SUdfVEVTVF9IRVhEVU1QIGlzIG5vdCBzZXQKIyBDT05GSUdfVEVTVF9TVFJJTkdfSEVMUEVSUyBp cyBub3Qgc2V0CkNPTkZJR19URVNUX1NUUlNDUFk9bQojIENPTkZJR19URVNUX0tTVFJUT1ggaXMg bm90IHNldApDT05GSUdfVEVTVF9QUklOVEY9bQpDT05GSUdfVEVTVF9CSVRNQVA9bQojIENPTkZJ R19URVNUX0JJVEZJRUxEIGlzIG5vdCBzZXQKIyBDT05GSUdfVEVTVF9VVUlEIGlzIG5vdCBzZXQK IyBDT05GSUdfVEVTVF9YQVJSQVkgaXMgbm90IHNldAojIENPTkZJR19URVNUX09WRVJGTE9XIGlz IG5vdCBzZXQKIyBDT05GSUdfVEVTVF9SSEFTSFRBQkxFIGlzIG5vdCBzZXQKIyBDT05GSUdfVEVT VF9IQVNIIGlzIG5vdCBzZXQKIyBDT05GSUdfVEVTVF9JREEgaXMgbm90IHNldApDT05GSUdfVEVT VF9MS009bQpDT05GSUdfVEVTVF9WTUFMTE9DPW0KQ09ORklHX1RFU1RfVVNFUl9DT1BZPW0KQ09O RklHX1RFU1RfQlBGPW0KQ09ORklHX1RFU1RfQkxBQ0tIT0xFX0RFVj1tCiMgQ09ORklHX0ZJTkRf QklUX0JFTkNITUFSSyBpcyBub3Qgc2V0CkNPTkZJR19URVNUX0ZJUk1XQVJFPW0KQ09ORklHX1RF U1RfU1lTQ1RMPW0KIyBDT05GSUdfVEVTVF9VREVMQVkgaXMgbm90IHNldApDT05GSUdfVEVTVF9T VEFUSUNfS0VZUz1tCkNPTkZJR19URVNUX0tNT0Q9bQojIENPTkZJR19URVNUX01FTUNBVF9QIGlz IG5vdCBzZXQKQ09ORklHX1RFU1RfTElWRVBBVENIPW0KIyBDT05GSUdfVEVTVF9TVEFDS0lOSVQg aXMgbm90IHNldAojIENPTkZJR19URVNUX01FTUlOSVQgaXMgbm90IHNldAojIENPTkZJR19NRU1U RVNUIGlzIG5vdCBzZXQKIyBDT05GSUdfSFlQRVJWX1RFU1RJTkcgaXMgbm90IHNldAojIGVuZCBv ZiBLZXJuZWwgVGVzdGluZyBhbmQgQ292ZXJhZ2UKIyBlbmQgb2YgS2VybmVsIGhhY2tpbmcK --===============1362141115916973981== Content-Type: text/plain MIME-Version: 1.0 Content-Transfer-Encoding: base64 Content-Disposition: attachment; filename="job-script.ksh" IyEvYmluL3NoCgpleHBvcnRfdG9wX2VudigpCnsKCWV4cG9ydCBzdWl0ZT0nd2lsbC1pdC1zY2Fs ZScKCWV4cG9ydCB0ZXN0Y2FzZT0nd2lsbC1pdC1zY2FsZScKCWV4cG9ydCBjYXRlZ29yeT0nYmVu Y2htYXJrJwoJZXhwb3J0IG5yX3Rhc2s9Mjg4CglleHBvcnQgam9iX29yaWdpbj0nL2xrcC9sa3Av LnNyYy0yMDIwMDMwNi0xNTMyMDIvYWxsb3QvY3ljbGljOnAxOmxpbnV4LWRldmVsOmRldmVsLWhv dXJseS9sa3Ata25tMDEvd2lsbC1pdC1zY2FsZS0xMDAueWFtbCcKCWV4cG9ydCBxdWV1ZV9jbWRs aW5lX2tleXM9J2JyYW5jaApjb21taXQKcXVldWVfYXRfbGVhc3Rfb25jZScKCWV4cG9ydCBxdWV1 ZT0ndmFsaWRhdGUnCglleHBvcnQgdGVzdGJveD0nbGtwLWtubTAxJwoJZXhwb3J0IHRib3hfZ3Jv dXA9J2xrcC1rbm0wMScKCWV4cG9ydCBzdWJtaXRfaWQ9JzVlNjZjN2Y3NGViNTExNWEyZTdjOTZm ZScKCWV4cG9ydCBqb2JfZmlsZT0nL2xrcC9qb2JzL3NjaGVkdWxlZC9sa3Ata25tMDEvd2lsbC1p dC1zY2FsZS1wZXJmb3JtYW5jZS1wcm9jZXNzLTEwMCUtbW1hcDEtdWNvZGU9MHgxMS1kZWJpYW4t eDg2XzY0LTIwMTkxMTE0LmNnei1kYjhlOTc2ZTRhMDhmMWYxOTRhMzUwM2Y4OGRlYzEzMTlmOWVl MzRmLTIwMjAwMzEwLTIzMDg2LXpxZnM4My0zLnlhbWwnCglleHBvcnQgaWQ9J2U4YjEwNWI3ZDk3 Y2E0MTAxZGRhYWEyOTBkZTIwMjE0ZTQyZWNhOTInCglleHBvcnQgcXVldWVyX3ZlcnNpb249Jy9s a3Atc3JjJwoJZXhwb3J0IG1vZGVsPSdLbmlnaHRzIE1pbGwnCglleHBvcnQgbnJfbm9kZT0xCgll eHBvcnQgbnJfY3B1PTI4OAoJZXhwb3J0IG1lbW9yeT0nODBHJwoJZXhwb3J0IGhkZF9wYXJ0aXRp b25zPQoJZXhwb3J0IHN3YXBfcGFydGl0aW9ucz0nTEFCRUw9U1dBUCcKCWV4cG9ydCByb290ZnNf cGFydGl0aW9uPScvZGV2L2Rpc2svYnktaWQvYXRhLVdEQ19XRDMwRVpSWC0wMFNQRUIwX1dELVdD QzRFNEVLNUoyMy1wYXJ0MScKCWV4cG9ydCBicmFuZD0nSW50ZWwoUikgWGVvbiBQaGkoVE0pIENQ VSA3Mjk1IEAgMS41MEdIeicKCWV4cG9ydCBjb21taXQ9J2RiOGU5NzZlNGEwOGYxZjE5NGEzNTAz Zjg4ZGVjMTMxOWY5ZWUzNGYnCglleHBvcnQgbmVlZF9rY29uZmlnX2h3PSdDT05GSUdfSUdCPXkK Q09ORklHX1NBVEFfQUhDSScKCWV4cG9ydCB1Y29kZT0nMHgxMScKCWV4cG9ydCBrY29uZmlnPSd4 ODZfNjQtcmhlbC03LjYnCglleHBvcnQgY29tcGlsZXI9J2djYy03JwoJZXhwb3J0IGVucXVldWVf dGltZT0nMjAyMC0wMy0xMCAwNjo0OTozMSArMDgwMCcKCWV4cG9ydCBfaWQ9JzVlNjZjN2ZiNGVi NTExNWEyZTdjOTZmZicKCWV4cG9ydCBfcnQ9Jy9yZXN1bHQvd2lsbC1pdC1zY2FsZS9wZXJmb3Jt YW5jZS1wcm9jZXNzLTEwMCUtbW1hcDEtdWNvZGU9MHgxMS9sa3Ata25tMDEvZGViaWFuLXg4Nl82 NC0yMDE5MTExNC5jZ3oveDg2XzY0LXJoZWwtNy42L2djYy03L2RiOGU5NzZlNGEwOGYxZjE5NGEz NTAzZjg4ZGVjMTMxOWY5ZWUzNGYnCglleHBvcnQgdXNlcj0nbGtwJwoJZXhwb3J0IGhlYWRfY29t bWl0PSdkNGQ5NzdhNDgzYWM5MGNkOWYwMzlmZmQ0YjVhYjAyZmEyOGQ2ODgxJwoJZXhwb3J0IGJh c2VfY29tbWl0PScyYzUyM2IzNDRkZmE2NWEzNzM4ZTcwMzk4MzIwNDRhYTEzM2M3NWZiJwoJZXhw b3J0IGJyYW5jaD0nbGludXgtZGV2ZWwvZGV2ZWwtaG91cmx5LTIwMjAwMzA5MTAnCglleHBvcnQg cm9vdGZzPSdkZWJpYW4teDg2XzY0LTIwMTkxMTE0LmNneicKCWV4cG9ydCByZXN1bHRfcm9vdD0n L3Jlc3VsdC93aWxsLWl0LXNjYWxlL3BlcmZvcm1hbmNlLXByb2Nlc3MtMTAwJS1tbWFwMS11Y29k ZT0weDExL2xrcC1rbm0wMS9kZWJpYW4teDg2XzY0LTIwMTkxMTE0LmNnei94ODZfNjQtcmhlbC03 LjYvZ2NjLTcvZGI4ZTk3NmU0YTA4ZjFmMTk0YTM1MDNmODhkZWMxMzE5ZjllZTM0Zi8zJwoJZXhw b3J0IHNjaGVkdWxlcl92ZXJzaW9uPScvbGtwL2xrcC8uc3JjLTIwMjAwMzA2LTE1MzIwMicKCWV4 cG9ydCBMS1BfU0VSVkVSPSdpbm4nCglleHBvcnQgYXJjaD0neDg2XzY0JwoJZXhwb3J0IG1heF91 cHRpbWU9MTUwMAoJZXhwb3J0IGluaXRyZD0nL29zaW1hZ2UvZGViaWFuL2RlYmlhbi14ODZfNjQt MjAxOTExMTQuY2d6JwoJZXhwb3J0IGJvb3Rsb2FkZXJfYXBwZW5kPSdyb290PS9kZXYvcmFtMAp1 c2VyPWxrcApqb2I9L2xrcC9qb2JzL3NjaGVkdWxlZC9sa3Ata25tMDEvd2lsbC1pdC1zY2FsZS1w ZXJmb3JtYW5jZS1wcm9jZXNzLTEwMCUtbW1hcDEtdWNvZGU9MHgxMS1kZWJpYW4teDg2XzY0LTIw MTkxMTE0LmNnei1kYjhlOTc2ZTRhMDhmMWYxOTRhMzUwM2Y4OGRlYzEzMTlmOWVlMzRmLTIwMjAw MzEwLTIzMDg2LXpxZnM4My0zLnlhbWwKQVJDSD14ODZfNjQKa2NvbmZpZz14ODZfNjQtcmhlbC03 LjYKYnJhbmNoPWxpbnV4LWRldmVsL2RldmVsLWhvdXJseS0yMDIwMDMwOTEwCmNvbW1pdD1kYjhl OTc2ZTRhMDhmMWYxOTRhMzUwM2Y4OGRlYzEzMTlmOWVlMzRmCkJPT1RfSU1BR0U9L3BrZy9saW51 eC94ODZfNjQtcmhlbC03LjYvZ2NjLTcvZGI4ZTk3NmU0YTA4ZjFmMTk0YTM1MDNmODhkZWMxMzE5 ZjllZTM0Zi92bWxpbnV6LTUuNi4wLXJjNC0wMDMwMi1nZGI4ZTk3NmU0YTA4ZgptYXhfdXB0aW1l PTE1MDAKUkVTVUxUX1JPT1Q9L3Jlc3VsdC93aWxsLWl0LXNjYWxlL3BlcmZvcm1hbmNlLXByb2Nl c3MtMTAwJS1tbWFwMS11Y29kZT0weDExL2xrcC1rbm0wMS9kZWJpYW4teDg2XzY0LTIwMTkxMTE0 LmNnei94ODZfNjQtcmhlbC03LjYvZ2NjLTcvZGI4ZTk3NmU0YTA4ZjFmMTk0YTM1MDNmODhkZWMx MzE5ZjllZTM0Zi8zCkxLUF9TRVJWRVI9aW5uCm5va2FzbHIKc2VsaW51eD0wCmRlYnVnCmFwaWM9 ZGVidWcKc3lzcnFfYWx3YXlzX2VuYWJsZWQKcmN1cGRhdGUucmN1X2NwdV9zdGFsbF90aW1lb3V0 PTEwMApuZXQuaWZuYW1lcz0wCnByaW50ay5kZXZrbXNnPW9uCnBhbmljPS0xCnNvZnRsb2NrdXBf cGFuaWM9MQpubWlfd2F0Y2hkb2c9cGFuaWMKb29wcz1wYW5pYwpsb2FkX3JhbWRpc2s9Mgpwcm9t cHRfcmFtZGlzaz0wCmRyYmQubWlub3JfY291bnQ9OApzeXN0ZW1kLmxvZ19sZXZlbD1lcnIKaWdu b3JlX2xvZ2xldmVsCmNvbnNvbGU9dHR5MAplYXJseXByaW50az10dHlTMCwxMTUyMDAKY29uc29s ZT10dHlTMCwxMTUyMDAKdmdhPW5vcm1hbApydycKCWV4cG9ydCBtb2R1bGVzX2luaXRyZD0nL3Br Zy9saW51eC94ODZfNjQtcmhlbC03LjYvZ2NjLTcvZGI4ZTk3NmU0YTA4ZjFmMTk0YTM1MDNmODhk ZWMxMzE5ZjllZTM0Zi9tb2R1bGVzLmNneicKCWV4cG9ydCBibV9pbml0cmQ9Jy9vc2ltYWdlL2Rl cHMvZGViaWFuLXg4Nl82NC0yMDE4MDQwMy5jZ3ovcnVuLWlwY29uZmlnXzIwMTgtMDQtMDMuY2d6 LC9vc2ltYWdlL2RlcHMvZGViaWFuLXg4Nl82NC0yMDE4MDQwMy5jZ3ovbGtwXzIwMTktMDgtMDUu Y2d6LC9vc2ltYWdlL2RlcHMvZGViaWFuLXg4Nl82NC0yMDE4MDQwMy5jZ3ovcnN5bmMtcm9vdGZz XzIwMTgtMDQtMDMuY2d6LC9vc2ltYWdlL2RlcHMvZGViaWFuLXg4Nl82NC0yMDE4MDQwMy5jZ3ov d2lsbC1pdC1zY2FsZV8yMDIwLTAxLTA3LmNneiwvb3NpbWFnZS9wa2cvZGViaWFuLXg4Nl82NC0y MDE4MDQwMy5jZ3ovd2lsbC1pdC1zY2FsZS14ODZfNjQtMWVlZjg5ZS0xXzIwMjAtMDEtMDcuY2d6 LC9vc2ltYWdlL2RlcHMvZGViaWFuLXg4Nl82NC0yMDE4MDQwMy5jZ3ovbXBzdGF0XzIwMjAtMDEt MDMuY2d6LC9vc2ltYWdlL2RlcHMvZGViaWFuLXg4Nl82NC0yMDE4MDQwMy5jZ3ovdm1zdGF0XzIw MjAtMDEtMDcuY2d6LC9vc2ltYWdlL2RlcHMvZGViaWFuLXg4Nl82NC0yMDE4MDQwMy5jZ3ovcGVy Zl8yMDIwLTAxLTA0LmNneiwvb3NpbWFnZS9wa2cvZGViaWFuLXg4Nl82NC0yMDE4MDQwMy5jZ3ov cGVyZi14ODZfNjQtOThkNTRmODFlMzZiLTFfMjAyMDAzMDIuY2d6LC9vc2ltYWdlL3BrZy9kZWJp YW4teDg2XzY0LTIwMTgwNDAzLmNnei9zYXIteDg2XzY0LWUwMTFkOTctMV8yMDIwLTAxLTAzLmNn eiwvb3NpbWFnZS9kZXBzL2RlYmlhbi14ODZfNjQtMjAxODA0MDMuY2d6L2h3XzIwMjAtMDEtMDIu Y2d6JwoJZXhwb3J0IGxrcF9pbml0cmQ9Jy9vc2ltYWdlL3VzZXIvbGtwL2xrcC14ODZfNjQuY2d6 JwoJZXhwb3J0IHNpdGU9J2lubicKCWV4cG9ydCBMS1BfQ0dJX1BPUlQ9ODAKCWV4cG9ydCBMS1Bf Q0lGU19QT1JUPTEzOQoJZXhwb3J0IGxhc3Rfa2VybmVsPSc1LjYuMC1yYzUnCglleHBvcnQgcmVw ZWF0X3RvPTQKCWV4cG9ydCBzY2hlZHVsZV9ub3RpZnlfYWRkcmVzcz0KCWV4cG9ydCBxdWV1ZV9h dF9sZWFzdF9vbmNlPTEKCWV4cG9ydCBrZXJuZWw9Jy9wa2cvbGludXgveDg2XzY0LXJoZWwtNy42 L2djYy03L2RiOGU5NzZlNGEwOGYxZjE5NGEzNTAzZjg4ZGVjMTMxOWY5ZWUzNGYvdm1saW51ei01 LjYuMC1yYzQtMDAzMDItZ2RiOGU5NzZlNGEwOGYnCglleHBvcnQgZGVxdWV1ZV90aW1lPScyMDIw LTAzLTEwIDA3OjAxOjUwICswODAwJwoJZXhwb3J0IGpvYl9pbml0cmQ9Jy9sa3Avam9icy9zY2hl ZHVsZWQvbGtwLWtubTAxL3dpbGwtaXQtc2NhbGUtcGVyZm9ybWFuY2UtcHJvY2Vzcy0xMDAlLW1t YXAxLXVjb2RlPTB4MTEtZGViaWFuLXg4Nl82NC0yMDE5MTExNC5jZ3otZGI4ZTk3NmU0YTA4ZjFm MTk0YTM1MDNmODhkZWMxMzE5ZjllZTM0Zi0yMDIwMDMxMC0yMzA4Ni16cWZzODMtMy5jZ3onCgoJ WyAtbiAiJExLUF9TUkMiIF0gfHwKCWV4cG9ydCBMS1BfU1JDPS9sa3AvJHt1c2VyOi1sa3B9L3Ny Ywp9CgpydW5fam9iKCkKewoJZWNobyAkJCA+ICRUTVAvcnVuLWpvYi5waWQKCgkuICRMS1BfU1JD L2xpYi9odHRwLnNoCgkuICRMS1BfU1JDL2xpYi9qb2Iuc2gKCS4gJExLUF9TUkMvbGliL2Vudi5z aAoKCWV4cG9ydF90b3BfZW52CgoJcnVuX3NldHVwICRMS1BfU1JDL3NldHVwL2NwdWZyZXFfZ292 ZXJub3IgJ3BlcmZvcm1hbmNlJwoKCXJ1bl9tb25pdG9yICRMS1BfU1JDL21vbml0b3JzL3dyYXBw ZXIga21zZwoJcnVuX21vbml0b3IgJExLUF9TUkMvbW9uaXRvcnMvbm8tc3Rkb3V0L3dyYXBwZXIg Ym9vdC10aW1lCglydW5fbW9uaXRvciAkTEtQX1NSQy9tb25pdG9ycy93cmFwcGVyIGlvc3RhdAoJ cnVuX21vbml0b3IgJExLUF9TUkMvbW9uaXRvcnMvd3JhcHBlciBoZWFydGJlYXQKCXJ1bl9tb25p dG9yICRMS1BfU1JDL21vbml0b3JzL3dyYXBwZXIgdm1zdGF0CglydW5fbW9uaXRvciAkTEtQX1NS Qy9tb25pdG9ycy93cmFwcGVyIG51bWEtbnVtYXN0YXQKCXJ1bl9tb25pdG9yICRMS1BfU1JDL21v bml0b3JzL3dyYXBwZXIgbnVtYS12bXN0YXQKCXJ1bl9tb25pdG9yICRMS1BfU1JDL21vbml0b3Jz L3dyYXBwZXIgbnVtYS1tZW1pbmZvCglydW5fbW9uaXRvciAkTEtQX1NSQy9tb25pdG9ycy93cmFw cGVyIHByb2Mtdm1zdGF0CglydW5fbW9uaXRvciAkTEtQX1NSQy9tb25pdG9ycy93cmFwcGVyIHBy b2Mtc3RhdAoJcnVuX21vbml0b3IgJExLUF9TUkMvbW9uaXRvcnMvd3JhcHBlciBtZW1pbmZvCgly dW5fbW9uaXRvciAkTEtQX1NSQy9tb25pdG9ycy93cmFwcGVyIHNsYWJpbmZvCglydW5fbW9uaXRv ciAkTEtQX1NSQy9tb25pdG9ycy93cmFwcGVyIGludGVycnVwdHMKCXJ1bl9tb25pdG9yICRMS1Bf U1JDL21vbml0b3JzL3dyYXBwZXIgbG9ja19zdGF0CglydW5fbW9uaXRvciAkTEtQX1NSQy9tb25p dG9ycy93cmFwcGVyIGxhdGVuY3lfc3RhdHMKCXJ1bl9tb25pdG9yICRMS1BfU1JDL21vbml0b3Jz L3dyYXBwZXIgc29mdGlycXMKCXJ1bl9tb25pdG9yICRMS1BfU1JDL21vbml0b3JzL29uZS1zaG90 L3dyYXBwZXIgYmRpX2Rldl9tYXBwaW5nCglydW5fbW9uaXRvciAkTEtQX1NSQy9tb25pdG9ycy93 cmFwcGVyIGRpc2tzdGF0cwoJcnVuX21vbml0b3IgJExLUF9TUkMvbW9uaXRvcnMvd3JhcHBlciBu ZnNzdGF0CglydW5fbW9uaXRvciAkTEtQX1NSQy9tb25pdG9ycy93cmFwcGVyIGNwdWlkbGUKCXJ1 bl9tb25pdG9yICRMS1BfU1JDL21vbml0b3JzL3dyYXBwZXIgY3B1ZnJlcS1zdGF0cwoJcnVuX21v bml0b3IgJExLUF9TUkMvbW9uaXRvcnMvd3JhcHBlciBzY2hlZF9kZWJ1ZwoJcnVuX21vbml0b3Ig JExLUF9TUkMvbW9uaXRvcnMvd3JhcHBlciBwZXJmLXN0YXQKCXJ1bl9tb25pdG9yICRMS1BfU1JD L21vbml0b3JzL3dyYXBwZXIgbXBzdGF0CglydW5fbW9uaXRvciAkTEtQX1NSQy9tb25pdG9ycy9u by1zdGRvdXQvd3JhcHBlciBwZXJmLXByb2ZpbGUKCXJ1bl9tb25pdG9yICRMS1BfU1JDL21vbml0 b3JzL3dyYXBwZXIgb29tLWtpbGxlcgoJcnVuX21vbml0b3IgJExLUF9TUkMvbW9uaXRvcnMvcGxh aW4vd2F0Y2hkb2cKCglydW5fdGVzdCBtb2RlPSdwcm9jZXNzJyB0ZXN0PSdtbWFwMScgJExLUF9T UkMvdGVzdHMvd3JhcHBlciB3aWxsLWl0LXNjYWxlCn0KCmV4dHJhY3Rfc3RhdHMoKQp7CglleHBv cnQgc3RhdHNfcGFydF9iZWdpbj0KCWV4cG9ydCBzdGF0c19wYXJ0X2VuZD0KCgkkTEtQX1NSQy9z dGF0cy93cmFwcGVyIHdpbGwtaXQtc2NhbGUKCSRMS1BfU1JDL3N0YXRzL3dyYXBwZXIga21zZwoJ JExLUF9TUkMvc3RhdHMvd3JhcHBlciBib290LXRpbWUKCSRMS1BfU1JDL3N0YXRzL3dyYXBwZXIg aW9zdGF0CgkkTEtQX1NSQy9zdGF0cy93cmFwcGVyIHZtc3RhdAoJJExLUF9TUkMvc3RhdHMvd3Jh cHBlciBudW1hLW51bWFzdGF0CgkkTEtQX1NSQy9zdGF0cy93cmFwcGVyIG51bWEtdm1zdGF0Cgkk TEtQX1NSQy9zdGF0cy93cmFwcGVyIG51bWEtbWVtaW5mbwoJJExLUF9TUkMvc3RhdHMvd3JhcHBl ciBwcm9jLXZtc3RhdAoJJExLUF9TUkMvc3RhdHMvd3JhcHBlciBtZW1pbmZvCgkkTEtQX1NSQy9z dGF0cy93cmFwcGVyIHNsYWJpbmZvCgkkTEtQX1NSQy9zdGF0cy93cmFwcGVyIGludGVycnVwdHMK CSRMS1BfU1JDL3N0YXRzL3dyYXBwZXIgbG9ja19zdGF0CgkkTEtQX1NSQy9zdGF0cy93cmFwcGVy IGxhdGVuY3lfc3RhdHMKCSRMS1BfU1JDL3N0YXRzL3dyYXBwZXIgc29mdGlycXMKCSRMS1BfU1JD L3N0YXRzL3dyYXBwZXIgZGlza3N0YXRzCgkkTEtQX1NSQy9zdGF0cy93cmFwcGVyIG5mc3N0YXQK CSRMS1BfU1JDL3N0YXRzL3dyYXBwZXIgY3B1aWRsZQoJJExLUF9TUkMvc3RhdHMvd3JhcHBlciBz Y2hlZF9kZWJ1ZwoJJExLUF9TUkMvc3RhdHMvd3JhcHBlciBwZXJmLXN0YXQKCSRMS1BfU1JDL3N0 YXRzL3dyYXBwZXIgbXBzdGF0CgkkTEtQX1NSQy9zdGF0cy93cmFwcGVyIHBlcmYtcHJvZmlsZQoK CSRMS1BfU1JDL3N0YXRzL3dyYXBwZXIgdGltZSB3aWxsLWl0LXNjYWxlLnRpbWUKCSRMS1BfU1JD L3N0YXRzL3dyYXBwZXIgZG1lc2cKCSRMS1BfU1JDL3N0YXRzL3dyYXBwZXIga21zZwoJJExLUF9T UkMvc3RhdHMvd3JhcHBlciBsYXN0X3N0YXRlCgkkTEtQX1NSQy9zdGF0cy93cmFwcGVyIHN0ZGVy cgoJJExLUF9TUkMvc3RhdHMvd3JhcHBlciB0aW1lCn0KCiIkQCIK --===============1362141115916973981== Content-Type: text/plain MIME-Version: 1.0 Content-Transfer-Encoding: base64 Content-Disposition: attachment; filename="job.yaml" LS0tCgojISBqb2JzL3dpbGwtaXQtc2NhbGUtMTAwLnlhbWwKc3VpdGU6IHdpbGwtaXQtc2NhbGUK dGVzdGNhc2U6IHdpbGwtaXQtc2NhbGUKY2F0ZWdvcnk6IGJlbmNobWFyawpucl90YXNrOiAxMDAl CndpbGwtaXQtc2NhbGU6CiAgbW9kZTogcHJvY2VzcwogIHRlc3Q6IG1tYXAxCmpvYl9vcmlnaW46 ICIvbGtwL2xrcC8uc3JjLTIwMjAwMzA2LTE1MzIwMi9hbGxvdC9jeWNsaWM6cDE6bGludXgtZGV2 ZWw6ZGV2ZWwtaG91cmx5L2xrcC1rbm0wMS93aWxsLWl0LXNjYWxlLTEwMC55YW1sIgoKIyEgcXVl dWUgb3B0aW9ucwpxdWV1ZV9jbWRsaW5lX2tleXM6Ci0gYnJhbmNoCi0gY29tbWl0Ci0gcXVldWVf YXRfbGVhc3Rfb25jZQpxdWV1ZTogYmlzZWN0CnRlc3Rib3g6IGxrcC1rbm0wMQp0Ym94X2dyb3Vw OiBsa3Ata25tMDEKc3VibWl0X2lkOiA1ZTY2NzZkMjRlYjUxMTU0YWEwOTIwYjYKam9iX2ZpbGU6 ICIvbGtwL2pvYnMvc2NoZWR1bGVkL2xrcC1rbm0wMS93aWxsLWl0LXNjYWxlLXBlcmZvcm1hbmNl LXByb2Nlc3MtMTAwJS1tbWFwMS11Y29kZT0weDExLWRlYmlhbi14ODZfNjQtMjAxOTExMTQuY2d6 LWRiOGU5NzZlNGEwOGYxZjE5NGEzNTAzZjg4ZGVjMTMxOWY5ZWUzNGYtMjAyMDAzMTAtMjE2NzQt MWc4eWY5di0wLnlhbWwiCmlkOiA0NWU2YTdjY2M3Yjc5YTc5MTVlZjVjN2JjNjY0MDBlZWQ0MDNl NWU1CnF1ZXVlcl92ZXJzaW9uOiAiL2xrcC1zcmMiCgojISBob3N0cy9sa3Ata25tMDEKbW9kZWw6 IEtuaWdodHMgTWlsbApucl9ub2RlOiAxCm5yX2NwdTogMjg4Cm1lbW9yeTogODBHCmhkZF9wYXJ0 aXRpb25zOiAKc3dhcF9wYXJ0aXRpb25zOiBMQUJFTD1TV0FQCnJvb3Rmc19wYXJ0aXRpb246ICIv ZGV2L2Rpc2svYnktaWQvYXRhLVdEQ19XRDMwRVpSWC0wMFNQRUIwX1dELVdDQzRFNEVLNUoyMy1w YXJ0MSIKYnJhbmQ6IEludGVsKFIpIFhlb24gUGhpKFRNKSBDUFUgNzI5NSBAIDEuNTBHSHoKCiMh IGluY2x1ZGUvY2F0ZWdvcnkvYmVuY2htYXJrCmttc2c6IApib290LXRpbWU6IAppb3N0YXQ6IApo ZWFydGJlYXQ6IAp2bXN0YXQ6IApudW1hLW51bWFzdGF0OiAKbnVtYS12bXN0YXQ6IApudW1hLW1l bWluZm86IApwcm9jLXZtc3RhdDogCnByb2Mtc3RhdDogCm1lbWluZm86IApzbGFiaW5mbzogCmlu dGVycnVwdHM6IApsb2NrX3N0YXQ6IApsYXRlbmN5X3N0YXRzOiAKc29mdGlycXM6IApiZGlfZGV2 X21hcHBpbmc6IApkaXNrc3RhdHM6IApuZnNzdGF0OiAKY3B1aWRsZTogCmNwdWZyZXEtc3RhdHM6 IApzY2hlZF9kZWJ1ZzogCnBlcmYtc3RhdDogCm1wc3RhdDogCnBlcmYtcHJvZmlsZTogCgojISBp bmNsdWRlL2NhdGVnb3J5L0FMTApjcHVmcmVxX2dvdmVybm9yOiBwZXJmb3JtYW5jZQoKIyEgaW5j bHVkZS9xdWV1ZS9jeWNsaWMKY29tbWl0OiBkYjhlOTc2ZTRhMDhmMWYxOTRhMzUwM2Y4OGRlYzEz MTlmOWVlMzRmCgojISBpbmNsdWRlL3Rlc3Rib3gvbGtwLWtubTAxCm5lZWRfa2NvbmZpZ19odzoK LSBDT05GSUdfSUdCPXkKLSBDT05GSUdfU0FUQV9BSENJCnVjb2RlOiAnMHgxMScKCiMhIGRlZmF1 bHQgcGFyYW1zCmtjb25maWc6IHg4Nl82NC1yaGVsLTcuNgpjb21waWxlcjogZ2NjLTcKZW5xdWV1 ZV90aW1lOiAyMDIwLTAzLTEwIDAxOjAzOjE3Ljg5NTMwNjUwMiArMDg6MDAKX2lkOiA1ZTY2NzZk MjRlYjUxMTU0YWEwOTIwYjYKX3J0OiAiL3Jlc3VsdC93aWxsLWl0LXNjYWxlL3BlcmZvcm1hbmNl LXByb2Nlc3MtMTAwJS1tbWFwMS11Y29kZT0weDExL2xrcC1rbm0wMS9kZWJpYW4teDg2XzY0LTIw MTkxMTE0LmNnei94ODZfNjQtcmhlbC03LjYvZ2NjLTcvZGI4ZTk3NmU0YTA4ZjFmMTk0YTM1MDNm ODhkZWMxMzE5ZjllZTM0ZiIKCiMhIHNjaGVkdWxlIG9wdGlvbnMKdXNlcjogbGtwCmhlYWRfY29t bWl0OiBkNGQ5NzdhNDgzYWM5MGNkOWYwMzlmZmQ0YjVhYjAyZmEyOGQ2ODgxCmJhc2VfY29tbWl0 OiAyYzUyM2IzNDRkZmE2NWEzNzM4ZTcwMzk4MzIwNDRhYTEzM2M3NWZiCmJyYW5jaDogbGludXgt ZGV2ZWwvZGV2ZWwtaG91cmx5LTIwMjAwMzA5MTAKcm9vdGZzOiBkZWJpYW4teDg2XzY0LTIwMTkx MTE0LmNnegpyZXN1bHRfcm9vdDogIi9yZXN1bHQvd2lsbC1pdC1zY2FsZS9wZXJmb3JtYW5jZS1w cm9jZXNzLTEwMCUtbW1hcDEtdWNvZGU9MHgxMS9sa3Ata25tMDEvZGViaWFuLXg4Nl82NC0yMDE5 MTExNC5jZ3oveDg2XzY0LXJoZWwtNy42L2djYy03L2RiOGU5NzZlNGEwOGYxZjE5NGEzNTAzZjg4 ZGVjMTMxOWY5ZWUzNGYvMCIKc2NoZWR1bGVyX3ZlcnNpb246ICIvbGtwL2xrcC8uc3JjLTIwMjAw MzA2LTE1MzIwMiIKTEtQX1NFUlZFUjogaW5uCmFyY2g6IHg4Nl82NAptYXhfdXB0aW1lOiAxNTAw CmluaXRyZDogIi9vc2ltYWdlL2RlYmlhbi9kZWJpYW4teDg2XzY0LTIwMTkxMTE0LmNneiIKYm9v dGxvYWRlcl9hcHBlbmQ6Ci0gcm9vdD0vZGV2L3JhbTAKLSB1c2VyPWxrcAotIGpvYj0vbGtwL2pv YnMvc2NoZWR1bGVkL2xrcC1rbm0wMS93aWxsLWl0LXNjYWxlLXBlcmZvcm1hbmNlLXByb2Nlc3Mt MTAwJS1tbWFwMS11Y29kZT0weDExLWRlYmlhbi14ODZfNjQtMjAxOTExMTQuY2d6LWRiOGU5NzZl NGEwOGYxZjE5NGEzNTAzZjg4ZGVjMTMxOWY5ZWUzNGYtMjAyMDAzMTAtMjE2NzQtMWc4eWY5di0w LnlhbWwKLSBBUkNIPXg4Nl82NAotIGtjb25maWc9eDg2XzY0LXJoZWwtNy42Ci0gYnJhbmNoPWxp bnV4LWRldmVsL2RldmVsLWhvdXJseS0yMDIwMDMwOTEwCi0gY29tbWl0PWRiOGU5NzZlNGEwOGYx ZjE5NGEzNTAzZjg4ZGVjMTMxOWY5ZWUzNGYKLSBCT09UX0lNQUdFPS9wa2cvbGludXgveDg2XzY0 LXJoZWwtNy42L2djYy03L2RiOGU5NzZlNGEwOGYxZjE5NGEzNTAzZjg4ZGVjMTMxOWY5ZWUzNGYv dm1saW51ei01LjYuMC1yYzQtMDAzMDItZ2RiOGU5NzZlNGEwOGYKLSBtYXhfdXB0aW1lPTE1MDAK LSBSRVNVTFRfUk9PVD0vcmVzdWx0L3dpbGwtaXQtc2NhbGUvcGVyZm9ybWFuY2UtcHJvY2Vzcy0x MDAlLW1tYXAxLXVjb2RlPTB4MTEvbGtwLWtubTAxL2RlYmlhbi14ODZfNjQtMjAxOTExMTQuY2d6 L3g4Nl82NC1yaGVsLTcuNi9nY2MtNy9kYjhlOTc2ZTRhMDhmMWYxOTRhMzUwM2Y4OGRlYzEzMTlm OWVlMzRmLzAKLSBMS1BfU0VSVkVSPWlubgotIG5va2FzbHIKLSBzZWxpbnV4PTAKLSBkZWJ1Zwot IGFwaWM9ZGVidWcKLSBzeXNycV9hbHdheXNfZW5hYmxlZAotIHJjdXBkYXRlLnJjdV9jcHVfc3Rh bGxfdGltZW91dD0xMDAKLSBuZXQuaWZuYW1lcz0wCi0gcHJpbnRrLmRldmttc2c9b24KLSBwYW5p Yz0tMQotIHNvZnRsb2NrdXBfcGFuaWM9MQotIG5taV93YXRjaGRvZz1wYW5pYwotIG9vcHM9cGFu aWMKLSBsb2FkX3JhbWRpc2s9MgotIHByb21wdF9yYW1kaXNrPTAKLSBkcmJkLm1pbm9yX2NvdW50 PTgKLSBzeXN0ZW1kLmxvZ19sZXZlbD1lcnIKLSBpZ25vcmVfbG9nbGV2ZWwKLSBjb25zb2xlPXR0 eTAKLSBlYXJseXByaW50az10dHlTMCwxMTUyMDAKLSBjb25zb2xlPXR0eVMwLDExNTIwMAotIHZn YT1ub3JtYWwKLSBydwptb2R1bGVzX2luaXRyZDogIi9wa2cvbGludXgveDg2XzY0LXJoZWwtNy42 L2djYy03L2RiOGU5NzZlNGEwOGYxZjE5NGEzNTAzZjg4ZGVjMTMxOWY5ZWUzNGYvbW9kdWxlcy5j Z3oiCmJtX2luaXRyZDogIi9vc2ltYWdlL2RlcHMvZGViaWFuLXg4Nl82NC0yMDE4MDQwMy5jZ3ov cnVuLWlwY29uZmlnXzIwMTgtMDQtMDMuY2d6LC9vc2ltYWdlL2RlcHMvZGViaWFuLXg4Nl82NC0y MDE4MDQwMy5jZ3ovbGtwXzIwMTktMDgtMDUuY2d6LC9vc2ltYWdlL2RlcHMvZGViaWFuLXg4Nl82 NC0yMDE4MDQwMy5jZ3ovcnN5bmMtcm9vdGZzXzIwMTgtMDQtMDMuY2d6LC9vc2ltYWdlL2RlcHMv ZGViaWFuLXg4Nl82NC0yMDE4MDQwMy5jZ3ovd2lsbC1pdC1zY2FsZV8yMDIwLTAxLTA3LmNneiwv b3NpbWFnZS9wa2cvZGViaWFuLXg4Nl82NC0yMDE4MDQwMy5jZ3ovd2lsbC1pdC1zY2FsZS14ODZf NjQtMWVlZjg5ZS0xXzIwMjAtMDEtMDcuY2d6LC9vc2ltYWdlL2RlcHMvZGViaWFuLXg4Nl82NC0y MDE4MDQwMy5jZ3ovbXBzdGF0XzIwMjAtMDEtMDMuY2d6LC9vc2ltYWdlL2RlcHMvZGViaWFuLXg4 Nl82NC0yMDE4MDQwMy5jZ3ovdm1zdGF0XzIwMjAtMDEtMDcuY2d6LC9vc2ltYWdlL2RlcHMvZGVi aWFuLXg4Nl82NC0yMDE4MDQwMy5jZ3ovcGVyZl8yMDIwLTAxLTA0LmNneiwvb3NpbWFnZS9wa2cv ZGViaWFuLXg4Nl82NC0yMDE4MDQwMy5jZ3ovcGVyZi14ODZfNjQtOThkNTRmODFlMzZiLTFfMjAy MDAzMDIuY2d6LC9vc2ltYWdlL3BrZy9kZWJpYW4teDg2XzY0LTIwMTgwNDAzLmNnei9zYXIteDg2 XzY0LWUwMTFkOTctMV8yMDIwLTAxLTAzLmNneiwvb3NpbWFnZS9kZXBzL2RlYmlhbi14ODZfNjQt MjAxODA0MDMuY2d6L2h3XzIwMjAtMDEtMDIuY2d6Igpsa3BfaW5pdHJkOiAiL29zaW1hZ2UvdXNl ci9sa3AvbGtwLXg4Nl82NC5jZ3oiCnNpdGU6IGlubgoKIyEgL2xrcC9sa3AvLnNyYy0yMDIwMDMw Ni0xNTMyMDIvaW5jbHVkZS9zaXRlL2lubgpMS1BfQ0dJX1BPUlQ6IDgwCkxLUF9DSUZTX1BPUlQ6 IDEzOQpvb20ta2lsbGVyOiAKd2F0Y2hkb2c6IAoKIyEgcnVudGltZSBzdGF0dXMKbGFzdF9rZXJu ZWw6IDUuNi4wLXJjNQpyZXBlYXRfdG86IDIKc2NoZWR1bGVfbm90aWZ5X2FkZHJlc3M6IAoKIyEg dXNlciBvdmVycmlkZXMKcXVldWVfYXRfbGVhc3Rfb25jZTogMAprZXJuZWw6ICIvcGtnL2xpbnV4 L3g4Nl82NC1yaGVsLTcuNi9nY2MtNy9kYjhlOTc2ZTRhMDhmMWYxOTRhMzUwM2Y4OGRlYzEzMTlm OWVlMzRmL3ZtbGludXotNS42LjAtcmM0LTAwMzAyLWdkYjhlOTc2ZTRhMDhmIgpkZXF1ZXVlX3Rp bWU6IDIwMjAtMDMtMTAgMDE6MDg6NTQuMTU3NzU0OTU5ICswODowMApqb2Jfc3RhdGU6IGZpbmlz aGVkCmxvYWRhdmc6IDM5LjU3IDEyNi4wMCA3Mi44OCAxLzE4NTEgMTEzODMKc3RhcnRfdGltZTog JzE1ODM3NzM4MzcnCmVuZF90aW1lOiAnMTU4Mzc3NDE0NScKdmVyc2lvbjogIi9sa3AvbGtwLy5z cmMtMjAyMDAzMDYtMTUzMjM2Ojk2NzgyMmZjOmJkYTBiOTljNCIK --===============1362141115916973981== Content-Type: text/plain MIME-Version: 1.0 Content-Transfer-Encoding: base64 Content-Disposition: attachment; filename="reproduce.ksh" CmZvciBjcHVfZGlyIGluIC9zeXMvZGV2aWNlcy9zeXN0ZW0vY3B1L2NwdVswLTldKgpkbwoJb25s aW5lX2ZpbGU9IiRjcHVfZGlyIi9vbmxpbmUKCVsgLWYgIiRvbmxpbmVfZmlsZSIgXSAmJiBbICIk KGNhdCAiJG9ubGluZV9maWxlIikiIC1lcSAwIF0gJiYgY29udGludWUKCglmaWxlPSIkY3B1X2Rp ciIvY3B1ZnJlcS9zY2FsaW5nX2dvdmVybm9yCglbIC1mICIkZmlsZSIgXSAmJiBlY2hvICJwZXJm b3JtYW5jZSIgPiAiJGZpbGUiCmRvbmUKCiAicHl0aG9uMiIgIi4vcnVudGVzdC5weSIgIm1tYXAx IiAiMjk1IiAicHJvY2VzcyIgIjI4OCIK --===============1362141115916973981==-- From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.5 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS, UPPERCASE_50_75,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8F517C18E5B for ; Tue, 10 Mar 2020 08:44:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D79FE208E4 for ; Tue, 10 Mar 2020 08:44:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726623AbgCJIoD (ORCPT ); Tue, 10 Mar 2020 04:44:03 -0400 Received: from mga04.intel.com ([192.55.52.120]:31128 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726512AbgCJIoD (ORCPT ); Tue, 10 Mar 2020 04:44:03 -0400 X-Amp-Result: UNKNOWN X-Amp-Original-Verdict: FILE UNKNOWN X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 10 Mar 2020 01:43:54 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,518,1574150400"; d="yaml'?scan'208";a="321725278" Received: from shao2-debian.sh.intel.com (HELO localhost) ([10.239.13.3]) by orsmga001.jf.intel.com with ESMTP; 10 Mar 2020 01:43:47 -0700 Date: Tue, 10 Mar 2020 16:43:35 +0800 From: kernel test robot To: Xi Wang Cc: Ingo Molnar , Peter Zijlstra , Juri Lelli , Vincent Guittot , Dietmar Eggemann , Steven Rostedt , Josh Don , linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, Xi Wang , Paul Turner , lkp@lists.01.org Subject: [sched] db8e976e4a: will-it-scale.per_process_ops 15.8% improvement Message-ID: <20200310084335.GA5972@shao2-debian> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="oIMVlEQ///Q2JYC7" Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20200304213941.112303-1-xii@google.com> User-Agent: NeoMutt/20170113 (1.7.2) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --oIMVlEQ///Q2JYC7 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit Greeting, FYI, we noticed a 15.8% improvement of will-it-scale.per_process_ops due to commit: commit: db8e976e4a08f1f194a3503f88dec1319f9ee34f ("[PATCH] sched: watchdog: Touch kernel watchdog in sched code") url: https://github.com/0day-ci/linux/commits/Xi-Wang/sched-watchdog-Touch-kernel-watchdog-in-sched-code/20200305-062335 in testcase: will-it-scale on test machine: 288 threads Intel(R) Xeon Phi(TM) CPU 7295 @ 1.50GHz with 80G memory with following parameters: nr_task: 100% mode: process test: mmap1 cpufreq_governor: performance ucode: 0x11 test-description: Will It Scale takes a testcase and runs it from 1 through to n parallel copies to see if the testcase will scale. It builds both a process and threads based test in order to see any differences between the two. test-url: https://github.com/antonblanchard/will-it-scale Details are as below: --------------------------------------------------------------------------------------------------> To reproduce: git clone https://github.com/intel/lkp-tests.git cd lkp-tests bin/lkp install job.yaml # job file is attached in this email bin/lkp run job.yaml ========================================================================================= compiler/cpufreq_governor/kconfig/mode/nr_task/rootfs/tbox_group/test/testcase/ucode: gcc-7/performance/x86_64-rhel-7.6/process/100%/debian-x86_64-20191114.cgz/lkp-knm01/mmap1/will-it-scale/0x11 commit: 6f2bc932d8 ("Merge branch 'core/objtool'") db8e976e4a ("sched: watchdog: Touch kernel watchdog in sched code") 6f2bc932d8ff72b1 db8e976e4a08f1f194a3503f88d ---------------- --------------------------- fail:runs %reproduction fail:runs | | | 2:4 -50% :4 dmesg.WARNING:at#for_ip_swapgs_restore_regs_and_return_to_usermode/0x :4 50% 2:4 dmesg.WARNING:at_ip_perf_event_mmap_output/0x %stddev %change %stddev \ | \ 1426 +15.8% 1651 will-it-scale.per_process_ops 411035 +15.7% 475727 will-it-scale.workload 11380 ± 2% +2.6% 11674 boot-time.idle 2001 -6.9% 1862 ± 2% vmstat.system.cs 1385167 ± 2% +14.2% 1582207 ± 2% meminfo.DirectMap4k 11741 ± 4% +9.1% 12805 meminfo.max_used_kB 112158 +1.6% 113946 proc-vmstat.nr_anon_pages 41945 ± 2% -2.7% 40804 proc-vmstat.nr_shmem 606.55 ± 10% -28.5% 433.40 ± 11% sched_debug.cfs_rq:/.util_avg.min 186488 ± 5% +39.7% 260513 ± 14% sched_debug.cpu.max_idle_balance_cost.stddev 130.50 -23.1% 100.35 ± 4% sched_debug.cpu.ttwu_count.min 124.95 ± 2% -23.5% 95.55 ± 4% sched_debug.cpu.ttwu_local.min 9.733e+09 +2.8% 1e+10 perf-stat.i.branch-instructions 1.09 ± 2% +0.1 1.18 perf-stat.i.branch-miss-rate% 1.029e+08 ± 3% +12.7% 1.16e+08 perf-stat.i.branch-misses 1989 -6.3% 1863 perf-stat.i.context-switches 11.26 -2.6% 10.98 perf-stat.i.cpi 61009464 ± 2% +9.1% 66590176 perf-stat.i.iTLB-load-misses 3.973e+10 +2.8% 4.084e+10 perf-stat.i.iTLB-loads 3.968e+10 +2.8% 4.08e+10 perf-stat.i.instructions 653.29 ± 2% -5.9% 614.52 perf-stat.i.instructions-per-iTLB-miss 0.09 +2.4% 0.09 perf-stat.i.ipc 1.05 ± 2% +0.1 1.15 perf-stat.overall.branch-miss-rate% 11.29 -2.5% 11.00 perf-stat.overall.cpi 0.15 ± 2% +0.0 0.16 perf-stat.overall.iTLB-load-miss-rate% 649.22 ± 2% -5.9% 610.81 perf-stat.overall.instructions-per-iTLB-miss 0.09 +2.6% 0.09 perf-stat.overall.ipc 29737649 -11.6% 26299776 perf-stat.overall.path-length 9.723e+09 +2.5% 9.971e+09 perf-stat.ps.branch-instructions 1.023e+08 ± 3% +12.5% 1.15e+08 perf-stat.ps.branch-misses 1926 -7.3% 1786 ± 2% perf-stat.ps.context-switches 61101086 ± 3% +9.0% 66601356 perf-stat.ps.iTLB-load-misses 3.967e+10 +2.6% 4.069e+10 perf-stat.ps.iTLB-loads 3.964e+10 +2.6% 4.067e+10 perf-stat.ps.instructions 1.222e+13 +2.4% 1.251e+13 perf-stat.total.instructions 20.96 ± 59% -21.0 0.00 perf-profile.calltrace.cycles-pp.entry_SYSCALL_64_after_hwframe 20.95 ± 59% -21.0 0.00 perf-profile.calltrace.cycles-pp.do_syscall_64.entry_SYSCALL_64_after_hwframe 10.50 ± 58% -10.5 0.00 perf-profile.calltrace.cycles-pp.__x64_sys_munmap.do_syscall_64.entry_SYSCALL_64_after_hwframe 10.49 ± 58% -10.5 0.00 perf-profile.calltrace.cycles-pp.__vm_munmap.__x64_sys_munmap.do_syscall_64.entry_SYSCALL_64_after_hwframe 10.20 ± 59% -10.2 0.00 perf-profile.calltrace.cycles-pp.ksys_mmap_pgoff.do_syscall_64.entry_SYSCALL_64_after_hwframe 10.20 ± 59% -10.2 0.00 perf-profile.calltrace.cycles-pp.vm_mmap_pgoff.ksys_mmap_pgoff.do_syscall_64.entry_SYSCALL_64_after_hwframe 0.85 ± 17% +0.3 1.12 perf-profile.calltrace.cycles-pp.unmap_page_range.unmap_vmas.unmap_region.__do_munmap.__vm_munmap 0.92 ± 17% +0.3 1.21 perf-profile.calltrace.cycles-pp.unmap_vmas.unmap_region.__do_munmap.__vm_munmap.__x64_sys_munmap 1.18 ± 17% +0.4 1.55 perf-profile.calltrace.cycles-pp.unmap_region.__do_munmap.__vm_munmap.__x64_sys_munmap.do_syscall_64 38.17 ± 15% +10.3 48.45 perf-profile.calltrace.cycles-pp.vm_mmap_pgoff.ksys_mmap_pgoff.do_syscall_64.entry_SYSCALL_64_after_hwframe.mmap64 38.18 ± 15% +10.3 48.47 perf-profile.calltrace.cycles-pp.ksys_mmap_pgoff.do_syscall_64.entry_SYSCALL_64_after_hwframe.mmap64 38.45 ± 15% +10.4 48.86 perf-profile.calltrace.cycles-pp.do_syscall_64.entry_SYSCALL_64_after_hwframe.mmap64 38.46 ± 15% +10.4 48.88 perf-profile.calltrace.cycles-pp.entry_SYSCALL_64_after_hwframe.mmap64 38.66 ± 15% +10.5 49.12 perf-profile.calltrace.cycles-pp.mmap64 39.32 ± 15% +10.6 49.88 perf-profile.calltrace.cycles-pp.__vm_munmap.__x64_sys_munmap.do_syscall_64.entry_SYSCALL_64_after_hwframe.munmap 39.34 ± 15% +10.6 49.91 perf-profile.calltrace.cycles-pp.__x64_sys_munmap.do_syscall_64.entry_SYSCALL_64_after_hwframe.munmap 39.63 ± 15% +10.7 50.31 perf-profile.calltrace.cycles-pp.do_syscall_64.entry_SYSCALL_64_after_hwframe.munmap 39.64 ± 15% +10.7 50.33 perf-profile.calltrace.cycles-pp.entry_SYSCALL_64_after_hwframe.munmap 39.82 ± 15% +10.7 50.54 perf-profile.calltrace.cycles-pp.munmap 0.90 ± 6% -0.1 0.78 perf-profile.children.cycles-pp.tick_sched_handle 0.94 ± 6% -0.1 0.83 perf-profile.children.cycles-pp.tick_sched_timer 0.88 ± 6% -0.1 0.77 perf-profile.children.cycles-pp.update_process_times 0.69 ± 7% -0.1 0.60 perf-profile.children.cycles-pp.scheduler_tick 0.47 ± 2% -0.0 0.43 perf-profile.children.cycles-pp.task_tick_fair 0.14 ± 5% -0.0 0.12 ± 3% perf-profile.children.cycles-pp.update_curr 0.07 ± 7% +0.0 0.08 perf-profile.children.cycles-pp.remove_vma 0.14 ± 6% +0.0 0.17 ± 5% perf-profile.children.cycles-pp.entry_SYSCALL_64 0.15 ± 14% +0.0 0.19 ± 2% perf-profile.children.cycles-pp.perf_iterate_sb 1.12 ± 4% +0.0 1.17 perf-profile.children.cycles-pp.unmap_page_range 0.00 +0.1 0.05 perf-profile.children.cycles-pp.perf_event_mmap_output 1.17 ± 4% +0.1 1.22 perf-profile.children.cycles-pp.unmap_vmas 0.00 +0.1 0.09 ± 13% perf-profile.children.cycles-pp.userfaultfd_unmap_complete 0.27 ± 8% +0.1 0.41 perf-profile.children.cycles-pp.perf_event_mmap 38.67 ± 15% +10.5 49.12 perf-profile.children.cycles-pp.mmap64 39.84 ± 15% +10.7 50.56 perf-profile.children.cycles-pp.munmap 0.08 ± 5% -0.0 0.07 ± 5% perf-profile.self.cycles-pp.update_curr 0.12 ± 4% +0.0 0.15 ± 5% perf-profile.self.cycles-pp.entry_SYSCALL_64 0.52 ± 3% +0.0 0.55 perf-profile.self.cycles-pp.___might_sleep 0.09 ± 14% +0.0 0.14 ± 11% perf-profile.self.cycles-pp.do_syscall_64 0.00 +0.1 0.05 perf-profile.self.cycles-pp.perf_event_mmap_output 0.00 +0.1 0.09 ± 14% perf-profile.self.cycles-pp.userfaultfd_unmap_complete 0.14 ± 16% +0.1 0.23 perf-profile.self.cycles-pp._raw_spin_unlock_irqrestore 0.07 ± 6% +0.1 0.17 ± 3% perf-profile.self.cycles-pp.perf_event_mmap 136047 -10.3% 122085 softirqs.CPU0.TIMER 142844 ± 7% -12.9% 124359 softirqs.CPU1.TIMER 135746 -9.4% 123045 softirqs.CPU10.TIMER 52171 ± 13% +30.0% 67833 ± 11% softirqs.CPU105.RCU 43570 ± 12% +32.7% 57800 ± 6% softirqs.CPU109.RCU 135354 -9.8% 122137 softirqs.CPU11.TIMER 61775 ± 6% -15.1% 52429 ± 2% softirqs.CPU112.RCU 65779 ± 7% -24.4% 49713 ± 11% softirqs.CPU116.RCU 67826 ± 7% -11.6% 59956 ± 6% softirqs.CPU119.RCU 136890 -11.2% 121517 softirqs.CPU12.TIMER 67497 ± 10% -26.7% 49495 ± 8% softirqs.CPU126.RCU 66978 ± 8% -14.4% 57348 softirqs.CPU127.RCU 68007 ± 8% -19.1% 55010 ± 4% softirqs.CPU128.RCU 73177 ± 20% -23.7% 55863 ± 5% softirqs.CPU129.RCU 137065 -10.8% 122305 softirqs.CPU13.TIMER 45451 ± 13% +36.0% 61809 ± 9% softirqs.CPU134.RCU 42557 ± 15% +40.1% 59639 ± 3% softirqs.CPU135.RCU 135866 ± 2% -10.3% 121860 softirqs.CPU14.TIMER 62809 ± 9% -17.9% 51590 ± 17% softirqs.CPU142.RCU 134061 -10.4% 120146 softirqs.CPU145.TIMER 47655 ± 10% +36.4% 65020 ± 11% softirqs.CPU146.RCU 46689 ± 14% +43.6% 67028 ± 22% softirqs.CPU147.RCU 132777 -9.0% 120864 softirqs.CPU147.TIMER 58663 ± 17% -21.4% 46097 ± 8% softirqs.CPU148.RCU 135185 -10.3% 121233 softirqs.CPU15.TIMER 45147 ± 18% +31.8% 59524 ± 8% softirqs.CPU150.RCU 43131 ± 10% +30.8% 56431 ± 12% softirqs.CPU151.RCU 45028 ± 14% +29.6% 58361 ± 8% softirqs.CPU156.RCU 66885 ± 19% -28.2% 48046 ± 9% softirqs.CPU158.RCU 54669 ± 11% +15.7% 63279 ± 5% softirqs.CPU16.RCU 135175 -10.2% 121330 softirqs.CPU16.TIMER 65572 ± 12% -23.8% 49957 ± 13% softirqs.CPU164.RCU 44791 ± 16% +38.3% 61959 ± 9% softirqs.CPU169.RCU 135558 -10.6% 121159 softirqs.CPU17.TIMER 133452 -9.2% 121202 softirqs.CPU170.TIMER 133532 -9.3% 121141 softirqs.CPU171.TIMER 47392 ± 11% +24.7% 59117 ± 8% softirqs.CPU173.RCU 133403 -9.0% 121345 softirqs.CPU174.TIMER 135163 -9.9% 121727 softirqs.CPU18.TIMER 135425 -10.3% 121530 softirqs.CPU19.TIMER 42257 ± 12% +42.4% 60184 ± 4% softirqs.CPU195.RCU 53072 ± 7% +20.6% 64002 ± 4% softirqs.CPU199.RCU 135802 -10.5% 121598 softirqs.CPU2.TIMER 135522 -10.3% 121496 softirqs.CPU20.TIMER 69873 ± 8% -23.1% 53716 ± 15% softirqs.CPU206.RCU 66999 ± 6% -26.7% 49080 ± 11% softirqs.CPU207.RCU 70738 ± 5% -18.3% 57793 ± 5% softirqs.CPU208.RCU 73865 ± 20% -26.2% 54482 ± 7% softirqs.CPU209.RCU 135015 -9.9% 121582 softirqs.CPU21.TIMER 46523 ± 13% +31.6% 61230 ± 8% softirqs.CPU211.RCU 133727 -9.8% 120658 softirqs.CPU214.TIMER 52296 ± 15% +25.3% 65529 ± 11% softirqs.CPU215.RCU 43894 ± 10% +37.8% 60485 ± 8% softirqs.CPU217.RCU 73420 ± 21% -27.1% 53490 ± 6% softirqs.CPU219.RCU 135360 -10.0% 121811 softirqs.CPU22.TIMER 132373 -9.1% 120338 softirqs.CPU220.TIMER 133390 -9.3% 121016 softirqs.CPU222.TIMER 55865 ± 4% -9.0% 50834 ± 6% softirqs.CPU225.RCU 136998 -11.4% 121423 softirqs.CPU23.TIMER 54255 ± 5% -14.3% 46491 ± 9% softirqs.CPU232.RCU 133106 -9.4% 120627 softirqs.CPU232.TIMER 44670 ± 12% +18.6% 52956 ± 10% softirqs.CPU234.RCU 52856 ± 10% +17.3% 62004 ± 4% softirqs.CPU238.RCU 48377 ± 11% +23.2% 59609 ± 5% softirqs.CPU239.RCU 135035 -10.1% 121361 softirqs.CPU24.TIMER 77763 ± 21% -35.8% 49895 ± 13% softirqs.CPU243.RCU 63845 ± 11% -19.5% 51400 ± 13% softirqs.CPU249.RCU 135168 -10.2% 121439 softirqs.CPU25.TIMER 138499 ± 2% -12.5% 121152 softirqs.CPU26.TIMER 132357 -9.2% 120182 softirqs.CPU264.TIMER 132170 -9.3% 119886 softirqs.CPU266.TIMER 42781 ± 12% +20.9% 51738 ± 3% softirqs.CPU267.RCU 133062 -9.7% 120174 softirqs.CPU267.TIMER 132712 -10.1% 119303 softirqs.CPU268.TIMER 131632 -9.0% 119730 softirqs.CPU269.TIMER 135175 -10.7% 120773 softirqs.CPU27.TIMER 133004 -9.9% 119900 softirqs.CPU270.TIMER 133270 -10.3% 119510 softirqs.CPU271.TIMER 132916 -10.0% 119643 softirqs.CPU272.TIMER 133082 -10.0% 119776 softirqs.CPU274.TIMER 133786 -10.6% 119578 softirqs.CPU275.TIMER 132309 -9.6% 119672 softirqs.CPU276.TIMER 132662 -9.9% 119494 softirqs.CPU278.TIMER 134886 -9.4% 122225 softirqs.CPU28.TIMER 132521 -9.6% 119769 softirqs.CPU280.TIMER 134159 ± 2% -10.4% 120251 softirqs.CPU282.TIMER 133004 -9.3% 120668 softirqs.CPU283.TIMER 132418 -9.9% 119268 softirqs.CPU284.TIMER 131960 -9.5% 119474 softirqs.CPU285.TIMER 132179 ± 2% -9.6% 119440 softirqs.CPU286.TIMER 134987 -10.2% 121232 softirqs.CPU29.TIMER 134984 -10.0% 121436 softirqs.CPU3.TIMER 134885 -9.3% 122324 ± 2% softirqs.CPU30.TIMER 135262 -10.4% 121151 softirqs.CPU31.TIMER 134900 -10.0% 121406 softirqs.CPU32.TIMER 135067 -10.3% 121138 softirqs.CPU33.TIMER 135436 -10.5% 121240 softirqs.CPU34.TIMER 134709 -9.5% 121965 softirqs.CPU35.TIMER 134664 -10.1% 121053 softirqs.CPU36.TIMER 134921 -10.0% 121492 softirqs.CPU38.TIMER 55252 ± 5% -20.1% 44140 ± 10% softirqs.CPU39.RCU 137516 ± 3% -11.8% 121343 softirqs.CPU39.TIMER 134929 -10.0% 121470 softirqs.CPU40.TIMER 138809 ± 6% -12.2% 121885 softirqs.CPU41.TIMER 134871 -10.1% 121298 softirqs.CPU43.TIMER 134766 -9.6% 121772 softirqs.CPU44.TIMER 149033 ± 12% -18.5% 121486 softirqs.CPU45.TIMER 134119 -9.7% 121157 softirqs.CPU46.TIMER 134773 -10.0% 121245 softirqs.CPU47.TIMER 138113 ± 5% -12.3% 121156 softirqs.CPU48.TIMER 133896 -9.9% 120615 softirqs.CPU49.TIMER 135352 -10.5% 121195 softirqs.CPU5.TIMER 134644 -9.9% 121354 softirqs.CPU50.TIMER 134956 -9.6% 122021 ± 2% softirqs.CPU51.TIMER 137890 ± 4% -12.1% 121232 softirqs.CPU52.TIMER 143732 ± 6% -13.4% 124469 ± 4% softirqs.CPU53.TIMER 134524 -9.5% 121793 softirqs.CPU54.TIMER 134248 -9.7% 121285 softirqs.CPU56.TIMER 133592 -9.2% 121293 softirqs.CPU57.TIMER 52449 ± 6% +11.9% 58710 ± 3% softirqs.CPU58.RCU 134725 -10.0% 121290 softirqs.CPU58.TIMER 134055 -9.6% 121131 softirqs.CPU59.TIMER 135888 -10.6% 121534 softirqs.CPU6.TIMER 133889 -9.3% 121489 softirqs.CPU60.TIMER 134347 -9.6% 121505 softirqs.CPU61.TIMER 134305 -9.3% 121753 softirqs.CPU62.TIMER 134645 -9.5% 121901 ± 2% softirqs.CPU63.TIMER 134588 -9.6% 121707 softirqs.CPU64.TIMER 134167 -9.9% 120874 softirqs.CPU65.TIMER 134594 -9.4% 121950 softirqs.CPU66.TIMER 133648 -9.2% 121319 softirqs.CPU68.TIMER 63238 ± 6% -12.5% 55351 ± 2% softirqs.CPU69.RCU 134627 -10.0% 121216 softirqs.CPU69.TIMER 135395 -10.4% 121298 softirqs.CPU7.TIMER 142231 ± 9% -14.6% 121503 softirqs.CPU70.TIMER 64567 ± 11% -25.3% 48263 ± 9% softirqs.CPU73.RCU 69013 ± 38% -30.1% 48221 ± 14% softirqs.CPU76.RCU 136051 ± 3% -10.6% 121631 softirqs.CPU78.TIMER 135859 ± 2% -10.6% 121477 softirqs.CPU8.TIMER 45091 ± 11% +34.3% 60576 ± 2% softirqs.CPU84.RCU 134229 -8.8% 122430 ± 2% softirqs.CPU84.TIMER 134922 -9.6% 121932 softirqs.CPU85.TIMER 72255 ± 10% -21.2% 56910 ± 6% softirqs.CPU86.RCU 67986 ± 5% -20.4% 54106 ± 8% softirqs.CPU87.RCU 134602 -9.9% 121326 softirqs.CPU9.TIMER 45407 ± 14% +35.4% 61490 ± 3% softirqs.CPU94.RCU 352236 ± 4% +8.9% 383520 ± 4% interrupts.CAL:Function_call_interrupts 1223 ± 4% +9.0% 1333 ± 4% interrupts.CPU1.CAL:Function_call_interrupts 698.00 ± 23% +71.2% 1195 ± 11% interrupts.CPU1.RES:Rescheduling_interrupts 1223 ± 4% +9.0% 1333 ± 3% interrupts.CPU10.CAL:Function_call_interrupts 1221 ± 4% +8.9% 1329 ± 4% interrupts.CPU100.CAL:Function_call_interrupts 1221 ± 4% +9.1% 1332 ± 4% interrupts.CPU101.CAL:Function_call_interrupts 1221 ± 4% +8.9% 1329 ± 4% interrupts.CPU102.CAL:Function_call_interrupts 1222 ± 4% +8.8% 1329 ± 4% interrupts.CPU103.CAL:Function_call_interrupts 1217 ± 3% +9.2% 1329 ± 4% interrupts.CPU104.CAL:Function_call_interrupts 1222 ± 4% +8.8% 1329 ± 4% interrupts.CPU105.CAL:Function_call_interrupts 1221 ± 4% +8.8% 1329 ± 4% interrupts.CPU106.CAL:Function_call_interrupts 1222 ± 4% +8.8% 1329 ± 4% interrupts.CPU107.CAL:Function_call_interrupts 1221 ± 4% +8.8% 1328 ± 3% interrupts.CPU108.CAL:Function_call_interrupts 1221 ± 4% +8.7% 1328 ± 3% interrupts.CPU109.CAL:Function_call_interrupts 1224 ± 3% +8.9% 1333 ± 4% interrupts.CPU11.CAL:Function_call_interrupts 1221 ± 4% +8.7% 1327 ± 4% interrupts.CPU110.CAL:Function_call_interrupts 1221 ± 4% +8.8% 1329 ± 4% interrupts.CPU111.CAL:Function_call_interrupts 1221 ± 4% +8.9% 1329 ± 4% interrupts.CPU112.CAL:Function_call_interrupts 1222 ± 4% +8.7% 1327 ± 4% interrupts.CPU114.CAL:Function_call_interrupts 1222 ± 4% +8.8% 1329 ± 4% interrupts.CPU115.CAL:Function_call_interrupts 1222 ± 4% +8.7% 1328 ± 3% interrupts.CPU116.CAL:Function_call_interrupts 1223 ± 4% +8.8% 1330 ± 4% interrupts.CPU117.CAL:Function_call_interrupts 1221 ± 4% +8.9% 1330 ± 4% interrupts.CPU118.CAL:Function_call_interrupts 1222 ± 4% +8.9% 1331 ± 4% interrupts.CPU119.CAL:Function_call_interrupts 1223 ± 3% +9.1% 1334 ± 4% interrupts.CPU12.CAL:Function_call_interrupts 1222 ± 4% +8.7% 1328 ± 4% interrupts.CPU120.CAL:Function_call_interrupts 1223 ± 4% +8.2% 1323 ± 3% interrupts.CPU121.CAL:Function_call_interrupts 1223 ± 4% +8.6% 1328 ± 3% interrupts.CPU122.CAL:Function_call_interrupts 1223 ± 4% +8.8% 1330 ± 4% interrupts.CPU123.CAL:Function_call_interrupts 1222 ± 4% +8.6% 1327 ± 3% interrupts.CPU124.CAL:Function_call_interrupts 6560 ± 24% -27.9% 4729 ± 34% interrupts.CPU124.NMI:Non-maskable_interrupts 6560 ± 24% -27.9% 4729 ± 34% interrupts.CPU124.PMI:Performance_monitoring_interrupts 1222 ± 4% +8.7% 1329 ± 4% interrupts.CPU126.CAL:Function_call_interrupts 1225 ± 4% +8.2% 1325 ± 4% interrupts.CPU127.CAL:Function_call_interrupts 1222 ± 4% +8.9% 1330 ± 3% interrupts.CPU128.CAL:Function_call_interrupts 1222 ± 4% +8.9% 1331 ± 4% interrupts.CPU129.CAL:Function_call_interrupts 1221 ± 4% +9.2% 1334 ± 4% interrupts.CPU13.CAL:Function_call_interrupts 1222 ± 4% +8.8% 1330 ± 4% interrupts.CPU130.CAL:Function_call_interrupts 1223 ± 4% +8.8% 1331 ± 4% interrupts.CPU131.CAL:Function_call_interrupts 1220 ± 3% +9.0% 1330 ± 4% interrupts.CPU132.CAL:Function_call_interrupts 117.75 ± 41% -68.6% 37.00 ± 4% interrupts.CPU132.RES:Rescheduling_interrupts 1222 ± 3% +8.9% 1331 ± 3% interrupts.CPU133.CAL:Function_call_interrupts 1222 ± 4% +8.8% 1330 ± 4% interrupts.CPU134.CAL:Function_call_interrupts 1222 ± 4% +8.9% 1331 ± 3% interrupts.CPU135.CAL:Function_call_interrupts 1222 ± 4% +8.8% 1330 ± 4% interrupts.CPU136.CAL:Function_call_interrupts 1222 ± 4% +8.9% 1331 ± 4% interrupts.CPU137.CAL:Function_call_interrupts 1222 ± 4% +8.9% 1330 ± 4% interrupts.CPU138.CAL:Function_call_interrupts 1223 ± 4% +8.7% 1330 ± 3% interrupts.CPU139.CAL:Function_call_interrupts 1225 ± 4% +8.9% 1334 ± 4% interrupts.CPU14.CAL:Function_call_interrupts 1223 ± 4% +8.8% 1330 ± 4% interrupts.CPU140.CAL:Function_call_interrupts 1222 ± 4% +8.9% 1331 ± 4% interrupts.CPU141.CAL:Function_call_interrupts 1223 ± 4% +8.8% 1331 ± 3% interrupts.CPU142.CAL:Function_call_interrupts 1223 ± 4% +8.8% 1331 ± 4% interrupts.CPU143.CAL:Function_call_interrupts 1223 ± 4% +8.9% 1332 ± 3% interrupts.CPU144.CAL:Function_call_interrupts 1233 ± 3% +8.0% 1331 ± 3% interrupts.CPU145.CAL:Function_call_interrupts 1223 ± 4% +8.8% 1331 ± 3% interrupts.CPU146.CAL:Function_call_interrupts 7510 -37.1% 4725 ± 34% interrupts.CPU146.NMI:Non-maskable_interrupts 7510 -37.1% 4725 ± 34% interrupts.CPU146.PMI:Performance_monitoring_interrupts 1224 ± 4% +8.7% 1330 ± 3% interrupts.CPU147.CAL:Function_call_interrupts 1220 ± 3% +9.2% 1332 ± 3% interrupts.CPU148.CAL:Function_call_interrupts 1220 ± 3% +9.0% 1329 ± 3% interrupts.CPU149.CAL:Function_call_interrupts 1225 ± 4% +8.9% 1334 ± 4% interrupts.CPU15.CAL:Function_call_interrupts 1223 ± 4% +8.7% 1330 ± 4% interrupts.CPU150.CAL:Function_call_interrupts 1223 ± 4% +8.9% 1332 ± 4% interrupts.CPU151.CAL:Function_call_interrupts 84.50 ±148% -96.2% 3.25 ± 13% interrupts.CPU151.TLB:TLB_shootdowns 1222 ± 4% +8.9% 1331 ± 4% interrupts.CPU152.CAL:Function_call_interrupts 1078 ± 24% +23.5% 1332 ± 3% interrupts.CPU153.CAL:Function_call_interrupts 1223 ± 4% +8.7% 1330 ± 4% interrupts.CPU154.CAL:Function_call_interrupts 1224 ± 4% +8.8% 1332 ± 4% interrupts.CPU155.CAL:Function_call_interrupts 1223 ± 4% +8.7% 1329 ± 4% interrupts.CPU157.CAL:Function_call_interrupts 1223 ± 4% +8.8% 1331 ± 3% interrupts.CPU158.CAL:Function_call_interrupts 1223 ± 4% +9.0% 1333 ± 3% interrupts.CPU159.CAL:Function_call_interrupts 1225 ± 4% +9.0% 1335 ± 4% interrupts.CPU16.CAL:Function_call_interrupts 4722 ± 34% +40.2% 6622 ± 24% interrupts.CPU16.NMI:Non-maskable_interrupts 4722 ± 34% +40.2% 6622 ± 24% interrupts.CPU16.PMI:Performance_monitoring_interrupts 1223 ± 4% +8.7% 1330 ± 4% interrupts.CPU160.CAL:Function_call_interrupts 1223 ± 4% +8.8% 1331 ± 3% interrupts.CPU161.CAL:Function_call_interrupts 4640 ± 33% +22.5% 5683 ± 33% interrupts.CPU161.NMI:Non-maskable_interrupts 4640 ± 33% +22.5% 5683 ± 33% interrupts.CPU161.PMI:Performance_monitoring_interrupts 1223 ± 4% +8.9% 1331 ± 3% interrupts.CPU162.CAL:Function_call_interrupts 1223 ± 4% +9.0% 1333 ± 4% interrupts.CPU163.CAL:Function_call_interrupts 1223 ± 4% +8.9% 1332 ± 4% interrupts.CPU164.CAL:Function_call_interrupts 1223 ± 4% +8.7% 1330 ± 4% interrupts.CPU165.CAL:Function_call_interrupts 1222 ± 4% +8.9% 1332 ± 3% interrupts.CPU166.CAL:Function_call_interrupts 1224 ± 4% +8.8% 1332 ± 3% interrupts.CPU167.CAL:Function_call_interrupts 1223 ± 4% +9.1% 1333 ± 3% interrupts.CPU168.CAL:Function_call_interrupts 1223 ± 4% +8.9% 1332 ± 4% interrupts.CPU169.CAL:Function_call_interrupts 1224 ± 4% +8.9% 1333 ± 4% interrupts.CPU17.CAL:Function_call_interrupts 1223 ± 4% +8.9% 1332 ± 3% interrupts.CPU170.CAL:Function_call_interrupts 1224 ± 4% +8.9% 1332 ± 3% interrupts.CPU171.CAL:Function_call_interrupts 1223 ± 4% +8.9% 1332 ± 4% interrupts.CPU172.CAL:Function_call_interrupts 1223 ± 4% +8.9% 1332 ± 4% interrupts.CPU173.CAL:Function_call_interrupts 1223 ± 4% +9.0% 1332 ± 3% interrupts.CPU174.CAL:Function_call_interrupts 1224 ± 4% +8.9% 1332 ± 4% interrupts.CPU175.CAL:Function_call_interrupts 1223 ± 4% +8.9% 1332 ± 3% interrupts.CPU176.CAL:Function_call_interrupts 1223 ± 4% +8.9% 1332 ± 3% interrupts.CPU177.CAL:Function_call_interrupts 1223 ± 4% +8.9% 1332 ± 3% interrupts.CPU178.CAL:Function_call_interrupts 5616 ± 32% -32.9% 3766 interrupts.CPU178.NMI:Non-maskable_interrupts 5616 ± 32% -32.9% 3766 interrupts.CPU178.PMI:Performance_monitoring_interrupts 1223 ± 4% +8.9% 1332 ± 3% interrupts.CPU179.CAL:Function_call_interrupts 1225 ± 4% +8.9% 1333 ± 4% interrupts.CPU18.CAL:Function_call_interrupts 1223 ± 4% +9.0% 1332 ± 3% interrupts.CPU180.CAL:Function_call_interrupts 1224 ± 4% +8.7% 1331 ± 3% interrupts.CPU181.CAL:Function_call_interrupts 1223 ± 4% +8.9% 1332 ± 3% interrupts.CPU182.CAL:Function_call_interrupts 6558 ± 24% -27.9% 4727 ± 34% interrupts.CPU182.NMI:Non-maskable_interrupts 6558 ± 24% -27.9% 4727 ± 34% interrupts.CPU182.PMI:Performance_monitoring_interrupts 1224 ± 4% +9.0% 1334 ± 3% interrupts.CPU183.CAL:Function_call_interrupts 9.75 ± 27% +756.4% 83.50 ±139% interrupts.CPU183.RES:Rescheduling_interrupts 1223 ± 4% +8.9% 1332 ± 3% interrupts.CPU184.CAL:Function_call_interrupts 6549 ± 24% -42.5% 3765 interrupts.CPU184.NMI:Non-maskable_interrupts 6549 ± 24% -42.5% 3765 interrupts.CPU184.PMI:Performance_monitoring_interrupts 1224 ± 4% +8.9% 1333 ± 3% interrupts.CPU185.CAL:Function_call_interrupts 1223 ± 4% +8.6% 1328 ± 4% interrupts.CPU186.CAL:Function_call_interrupts 5664 ± 33% -33.5% 3767 interrupts.CPU186.NMI:Non-maskable_interrupts 5664 ± 33% -33.5% 3767 interrupts.CPU186.PMI:Performance_monitoring_interrupts 1224 ± 4% +8.8% 1332 ± 3% interrupts.CPU187.CAL:Function_call_interrupts 1224 ± 4% +8.9% 1332 ± 3% interrupts.CPU188.CAL:Function_call_interrupts 1225 ± 4% +8.7% 1331 ± 3% interrupts.CPU189.CAL:Function_call_interrupts 6544 ± 24% -42.2% 3783 interrupts.CPU189.NMI:Non-maskable_interrupts 6544 ± 24% -42.2% 3783 interrupts.CPU189.PMI:Performance_monitoring_interrupts 1224 ± 4% +9.0% 1334 ± 3% interrupts.CPU19.CAL:Function_call_interrupts 1223 ± 4% +8.9% 1332 ± 4% interrupts.CPU190.CAL:Function_call_interrupts 1224 ± 4% +8.8% 1332 ± 3% interrupts.CPU191.CAL:Function_call_interrupts 1223 ± 4% +8.5% 1327 ± 3% interrupts.CPU192.CAL:Function_call_interrupts 18.75 ± 5% +222.7% 60.50 ± 54% interrupts.CPU192.RES:Rescheduling_interrupts 1224 ± 4% +8.8% 1332 ± 4% interrupts.CPU193.CAL:Function_call_interrupts 3779 +75.1% 6618 ± 24% interrupts.CPU193.NMI:Non-maskable_interrupts 3779 +75.1% 6618 ± 24% interrupts.CPU193.PMI:Performance_monitoring_interrupts 1079 ± 24% +23.3% 1331 ± 3% interrupts.CPU194.CAL:Function_call_interrupts 1224 ± 4% +8.4% 1327 ± 3% interrupts.CPU195.CAL:Function_call_interrupts 1223 ± 4% +8.9% 1332 ± 4% interrupts.CPU196.CAL:Function_call_interrupts 1224 ± 4% +8.8% 1332 ± 4% interrupts.CPU197.CAL:Function_call_interrupts 14.25 ± 56% +731.6% 118.50 ±103% interrupts.CPU197.RES:Rescheduling_interrupts 1223 ± 4% +8.6% 1328 ± 4% interrupts.CPU198.CAL:Function_call_interrupts 1224 ± 4% +8.7% 1330 ± 4% interrupts.CPU199.CAL:Function_call_interrupts 1226 ± 3% +8.7% 1333 ± 4% interrupts.CPU2.CAL:Function_call_interrupts 1224 ± 4% +8.9% 1333 ± 4% interrupts.CPU20.CAL:Function_call_interrupts 1223 ± 4% +8.9% 1332 ± 3% interrupts.CPU200.CAL:Function_call_interrupts 1223 ± 4% +8.9% 1332 ± 3% interrupts.CPU201.CAL:Function_call_interrupts 1223 ± 4% +8.9% 1332 ± 3% interrupts.CPU202.CAL:Function_call_interrupts 1224 ± 4% +8.9% 1333 ± 4% interrupts.CPU203.CAL:Function_call_interrupts 1221 ± 3% +9.0% 1330 ± 4% interrupts.CPU204.CAL:Function_call_interrupts 1224 ± 4% +8.9% 1333 ± 4% interrupts.CPU205.CAL:Function_call_interrupts 1223 ± 4% +8.9% 1332 ± 3% interrupts.CPU206.CAL:Function_call_interrupts 1224 ± 4% +8.8% 1332 ± 3% interrupts.CPU207.CAL:Function_call_interrupts 1223 ± 4% +8.9% 1332 ± 4% interrupts.CPU208.CAL:Function_call_interrupts 1224 ± 4% +8.9% 1333 ± 4% interrupts.CPU209.CAL:Function_call_interrupts 1224 ± 4% +9.0% 1333 ± 4% interrupts.CPU21.CAL:Function_call_interrupts 297.25 ± 5% +36.4% 405.50 ± 20% interrupts.CPU21.RES:Rescheduling_interrupts 1224 ± 4% +9.0% 1334 ± 4% interrupts.CPU210.CAL:Function_call_interrupts 1224 ± 4% +9.0% 1333 ± 4% interrupts.CPU211.CAL:Function_call_interrupts 1223 ± 4% +9.0% 1333 ± 4% interrupts.CPU212.CAL:Function_call_interrupts 1224 ± 4% +8.9% 1333 ± 4% interrupts.CPU213.CAL:Function_call_interrupts 1223 ± 4% +9.0% 1333 ± 3% interrupts.CPU214.CAL:Function_call_interrupts 1224 ± 4% +9.0% 1334 ± 4% interrupts.CPU215.CAL:Function_call_interrupts 6447 ± 24% -28.0% 4640 ± 34% interrupts.CPU215.NMI:Non-maskable_interrupts 6447 ± 24% -28.0% 4640 ± 34% interrupts.CPU215.PMI:Performance_monitoring_interrupts 1223 ± 4% +9.0% 1334 ± 3% interrupts.CPU216.CAL:Function_call_interrupts 1223 ± 4% +9.0% 1333 ± 4% interrupts.CPU217.CAL:Function_call_interrupts 1223 ± 4% +9.1% 1334 ± 4% interrupts.CPU218.CAL:Function_call_interrupts 1223 ± 4% +9.0% 1333 ± 3% interrupts.CPU219.CAL:Function_call_interrupts 1223 ± 4% +9.0% 1333 ± 4% interrupts.CPU22.CAL:Function_call_interrupts 711.75 ± 23% -31.3% 489.00 ± 10% interrupts.CPU22.RES:Rescheduling_interrupts 1222 ± 4% +9.1% 1333 ± 3% interrupts.CPU220.CAL:Function_call_interrupts 1221 ± 3% +9.6% 1338 ± 3% interrupts.CPU221.CAL:Function_call_interrupts 1227 ± 4% +9.6% 1344 ± 4% interrupts.CPU222.CAL:Function_call_interrupts 1233 ± 3% +9.0% 1345 ± 3% interrupts.CPU223.CAL:Function_call_interrupts 1239 ± 4% +8.8% 1348 ± 3% interrupts.CPU224.CAL:Function_call_interrupts 1239 ± 4% +8.9% 1349 ± 3% interrupts.CPU225.CAL:Function_call_interrupts 1239 ± 4% +8.8% 1349 ± 3% interrupts.CPU226.CAL:Function_call_interrupts 1240 ± 4% +8.8% 1349 ± 3% interrupts.CPU227.CAL:Function_call_interrupts 1239 ± 4% +8.8% 1348 ± 3% interrupts.CPU228.CAL:Function_call_interrupts 1240 ± 4% +8.8% 1349 ± 3% interrupts.CPU229.CAL:Function_call_interrupts 1223 ± 4% +9.0% 1334 ± 4% interrupts.CPU23.CAL:Function_call_interrupts 1239 ± 4% +8.9% 1349 ± 3% interrupts.CPU230.CAL:Function_call_interrupts 1239 ± 4% +8.9% 1349 ± 3% interrupts.CPU231.CAL:Function_call_interrupts 1239 ± 4% +8.9% 1349 ± 3% interrupts.CPU232.CAL:Function_call_interrupts 1239 ± 4% +8.7% 1347 ± 3% interrupts.CPU233.CAL:Function_call_interrupts 1238 ± 4% +9.0% 1350 ± 3% interrupts.CPU234.CAL:Function_call_interrupts 1239 ± 4% +8.8% 1349 ± 3% interrupts.CPU235.CAL:Function_call_interrupts 1239 ± 4% +8.9% 1350 ± 3% interrupts.CPU236.CAL:Function_call_interrupts 4677 ± 32% +41.1% 6600 ± 24% interrupts.CPU236.NMI:Non-maskable_interrupts 4677 ± 32% +41.1% 6600 ± 24% interrupts.CPU236.PMI:Performance_monitoring_interrupts 1240 ± 4% +8.8% 1348 ± 3% interrupts.CPU237.CAL:Function_call_interrupts 1239 ± 4% +8.9% 1349 ± 3% interrupts.CPU238.CAL:Function_call_interrupts 1241 ± 4% +8.8% 1349 ± 3% interrupts.CPU239.CAL:Function_call_interrupts 1224 ± 4% +8.9% 1333 ± 4% interrupts.CPU24.CAL:Function_call_interrupts 1242 ± 4% +8.7% 1350 ± 3% interrupts.CPU240.CAL:Function_call_interrupts 1239 ± 4% +8.9% 1349 ± 4% interrupts.CPU241.CAL:Function_call_interrupts 1239 ± 4% +8.9% 1350 ± 4% interrupts.CPU242.CAL:Function_call_interrupts 1239 ± 4% +8.8% 1348 ± 3% interrupts.CPU243.CAL:Function_call_interrupts 1239 ± 4% +8.9% 1350 ± 3% interrupts.CPU244.CAL:Function_call_interrupts 1239 ± 4% +8.9% 1349 ± 3% interrupts.CPU245.CAL:Function_call_interrupts 1239 ± 4% +9.0% 1350 ± 3% interrupts.CPU246.CAL:Function_call_interrupts 1242 ± 4% +8.7% 1349 ± 3% interrupts.CPU247.CAL:Function_call_interrupts 1236 ± 3% +9.2% 1349 ± 3% interrupts.CPU248.CAL:Function_call_interrupts 1240 ± 4% +8.8% 1348 ± 3% interrupts.CPU249.CAL:Function_call_interrupts 1225 ± 4% +8.9% 1334 ± 3% interrupts.CPU25.CAL:Function_call_interrupts 1239 ± 4% +8.9% 1350 ± 3% interrupts.CPU250.CAL:Function_call_interrupts 1239 ± 4% +9.0% 1350 ± 3% interrupts.CPU251.CAL:Function_call_interrupts 1240 ± 4% +8.6% 1347 ± 3% interrupts.CPU252.CAL:Function_call_interrupts 1240 ± 4% +8.5% 1345 ± 3% interrupts.CPU253.CAL:Function_call_interrupts 6556 ± 24% -42.4% 3774 interrupts.CPU253.NMI:Non-maskable_interrupts 6556 ± 24% -42.4% 3774 interrupts.CPU253.PMI:Performance_monitoring_interrupts 1240 ± 4% +8.9% 1350 ± 3% interrupts.CPU254.CAL:Function_call_interrupts 1240 ± 4% +8.8% 1350 ± 3% interrupts.CPU255.CAL:Function_call_interrupts 1094 ± 18% +23.3% 1350 ± 3% interrupts.CPU256.CAL:Function_call_interrupts 1240 ± 4% +8.9% 1350 ± 3% interrupts.CPU257.CAL:Function_call_interrupts 1240 ± 4% +8.5% 1346 ± 3% interrupts.CPU258.CAL:Function_call_interrupts 1240 ± 4% +8.9% 1350 ± 3% interrupts.CPU259.CAL:Function_call_interrupts 1225 ± 4% +8.8% 1333 ± 4% interrupts.CPU26.CAL:Function_call_interrupts 1239 ± 4% +8.8% 1348 ± 3% interrupts.CPU260.CAL:Function_call_interrupts 1240 ± 4% +8.7% 1348 ± 3% interrupts.CPU261.CAL:Function_call_interrupts 1240 ± 4% +8.8% 1350 ± 3% interrupts.CPU262.CAL:Function_call_interrupts 1240 ± 4% +8.8% 1350 ± 3% interrupts.CPU263.CAL:Function_call_interrupts 1241 ± 4% +8.4% 1346 ± 3% interrupts.CPU264.CAL:Function_call_interrupts 1241 ± 4% +8.6% 1348 ± 3% interrupts.CPU265.CAL:Function_call_interrupts 1240 ± 4% +8.8% 1350 ± 3% interrupts.CPU266.CAL:Function_call_interrupts 1241 ± 4% +8.8% 1350 ± 3% interrupts.CPU267.CAL:Function_call_interrupts 1242 ± 4% +8.7% 1350 ± 3% interrupts.CPU268.CAL:Function_call_interrupts 1240 ± 4% +8.6% 1347 ± 3% interrupts.CPU269.CAL:Function_call_interrupts 1224 ± 3% +8.7% 1330 ± 3% interrupts.CPU27.CAL:Function_call_interrupts 1241 ± 4% +8.6% 1347 ± 4% interrupts.CPU270.CAL:Function_call_interrupts 1240 ± 4% +8.8% 1349 ± 3% interrupts.CPU272.CAL:Function_call_interrupts 4705 ± 34% +40.9% 6629 ± 24% interrupts.CPU272.NMI:Non-maskable_interrupts 4705 ± 34% +40.9% 6629 ± 24% interrupts.CPU272.PMI:Performance_monitoring_interrupts 1241 ± 4% +8.7% 1349 ± 3% interrupts.CPU273.CAL:Function_call_interrupts 1238 ± 4% +9.1% 1351 ± 3% interrupts.CPU274.CAL:Function_call_interrupts 1241 ± 4% +8.8% 1351 ± 3% interrupts.CPU275.CAL:Function_call_interrupts 1241 ± 4% +8.9% 1351 ± 3% interrupts.CPU276.CAL:Function_call_interrupts 1241 ± 4% +8.9% 1352 ± 3% interrupts.CPU277.CAL:Function_call_interrupts 1241 ± 4% +9.2% 1355 ± 4% interrupts.CPU278.CAL:Function_call_interrupts 1241 ± 4% +9.0% 1353 ± 3% interrupts.CPU279.CAL:Function_call_interrupts 1224 ± 4% +8.9% 1332 ± 4% interrupts.CPU28.CAL:Function_call_interrupts 1241 ± 4% +8.7% 1349 ± 3% interrupts.CPU280.CAL:Function_call_interrupts 1241 ± 4% +9.0% 1353 ± 3% interrupts.CPU281.CAL:Function_call_interrupts 1241 ± 4% +9.1% 1353 ± 3% interrupts.CPU282.CAL:Function_call_interrupts 1241 ± 4% +9.0% 1353 ± 3% interrupts.CPU283.CAL:Function_call_interrupts 1240 ± 4% +9.2% 1354 ± 3% interrupts.CPU284.CAL:Function_call_interrupts 1096 ± 25% +23.5% 1354 ± 3% interrupts.CPU285.CAL:Function_call_interrupts 1242 ± 4% +9.1% 1355 ± 3% interrupts.CPU286.CAL:Function_call_interrupts 1091 ± 25% +23.6% 1348 ± 3% interrupts.CPU287.CAL:Function_call_interrupts 1224 ± 4% +9.0% 1334 ± 4% interrupts.CPU29.CAL:Function_call_interrupts 1224 ± 4% +8.9% 1333 ± 4% interrupts.CPU3.CAL:Function_call_interrupts 1224 ± 4% +8.9% 1333 ± 4% interrupts.CPU30.CAL:Function_call_interrupts 3778 +50.7% 5694 ± 33% interrupts.CPU30.NMI:Non-maskable_interrupts 3778 +50.7% 5694 ± 33% interrupts.CPU30.PMI:Performance_monitoring_interrupts 1225 ± 4% +9.0% 1335 ± 3% interrupts.CPU31.CAL:Function_call_interrupts 1226 ± 3% +8.7% 1333 ± 4% interrupts.CPU32.CAL:Function_call_interrupts 1223 ± 4% +9.0% 1333 ± 4% interrupts.CPU33.CAL:Function_call_interrupts 1224 ± 4% +8.8% 1332 ± 4% interrupts.CPU34.CAL:Function_call_interrupts 451.25 ± 11% -47.3% 238.00 ± 16% interrupts.CPU34.RES:Rescheduling_interrupts 1224 ± 4% +8.8% 1332 ± 3% interrupts.CPU35.CAL:Function_call_interrupts 1223 ± 4% +8.7% 1330 ± 3% interrupts.CPU36.CAL:Function_call_interrupts 1224 ± 4% +8.8% 1332 ± 4% interrupts.CPU37.CAL:Function_call_interrupts 1223 ± 4% +8.9% 1332 ± 4% interrupts.CPU38.CAL:Function_call_interrupts 1224 ± 4% +8.8% 1332 ± 4% interrupts.CPU39.CAL:Function_call_interrupts 105.25 ± 18% +41.3% 148.75 ± 15% interrupts.CPU39.RES:Rescheduling_interrupts 1224 ± 4% +8.9% 1333 ± 4% interrupts.CPU4.CAL:Function_call_interrupts 440.00 ± 10% +71.3% 753.75 ± 14% interrupts.CPU4.RES:Rescheduling_interrupts 1226 ± 4% +8.8% 1334 ± 4% interrupts.CPU40.CAL:Function_call_interrupts 1225 ± 4% +8.9% 1334 ± 4% interrupts.CPU41.CAL:Function_call_interrupts 1223 ± 4% +8.6% 1329 ± 3% interrupts.CPU42.CAL:Function_call_interrupts 1224 ± 4% +8.9% 1333 ± 4% interrupts.CPU43.CAL:Function_call_interrupts 1221 ± 4% +9.2% 1333 ± 4% interrupts.CPU44.CAL:Function_call_interrupts 1222 ± 4% +9.0% 1332 ± 4% interrupts.CPU45.CAL:Function_call_interrupts 1223 ± 4% +8.9% 1332 ± 4% interrupts.CPU46.CAL:Function_call_interrupts 1224 ± 3% +8.9% 1333 ± 4% interrupts.CPU47.CAL:Function_call_interrupts 1224 ± 3% +8.7% 1330 ± 3% interrupts.CPU48.CAL:Function_call_interrupts 357.00 ± 38% -44.3% 198.75 ± 8% interrupts.CPU48.RES:Rescheduling_interrupts 1223 ± 4% +9.0% 1334 ± 4% interrupts.CPU49.CAL:Function_call_interrupts 1222 ± 3% +9.1% 1333 ± 4% interrupts.CPU5.CAL:Function_call_interrupts 1223 ± 4% +8.9% 1332 ± 3% interrupts.CPU50.CAL:Function_call_interrupts 1224 ± 4% +8.8% 1332 ± 3% interrupts.CPU51.CAL:Function_call_interrupts 1223 ± 4% +8.8% 1331 ± 3% interrupts.CPU52.CAL:Function_call_interrupts 1223 ± 4% +8.9% 1332 ± 3% interrupts.CPU53.CAL:Function_call_interrupts 1223 ± 4% +8.7% 1329 ± 4% interrupts.CPU54.CAL:Function_call_interrupts 3784 +74.7% 6611 ± 24% interrupts.CPU54.NMI:Non-maskable_interrupts 3784 +74.7% 6611 ± 24% interrupts.CPU54.PMI:Performance_monitoring_interrupts 1224 ± 4% +8.8% 1331 ± 4% interrupts.CPU55.CAL:Function_call_interrupts 1224 ± 4% +8.8% 1331 ± 3% interrupts.CPU56.CAL:Function_call_interrupts 1224 ± 4% +8.8% 1332 ± 4% interrupts.CPU57.CAL:Function_call_interrupts 1224 ± 4% +8.5% 1328 ± 3% interrupts.CPU58.CAL:Function_call_interrupts 1224 ± 4% +8.9% 1333 ± 3% interrupts.CPU59.CAL:Function_call_interrupts 1224 ± 4% +8.8% 1332 ± 4% interrupts.CPU6.CAL:Function_call_interrupts 3763 +51.2% 5690 ± 33% interrupts.CPU6.NMI:Non-maskable_interrupts 3763 +51.2% 5690 ± 33% interrupts.CPU6.PMI:Performance_monitoring_interrupts 454.25 ± 13% +45.7% 662.00 ± 18% interrupts.CPU6.RES:Rescheduling_interrupts 1225 ± 4% +8.8% 1332 ± 4% interrupts.CPU60.CAL:Function_call_interrupts 1223 ± 3% +9.0% 1332 ± 4% interrupts.CPU61.CAL:Function_call_interrupts 1225 ± 4% +8.8% 1332 ± 4% interrupts.CPU62.CAL:Function_call_interrupts 1224 ± 4% +8.9% 1332 ± 4% interrupts.CPU63.CAL:Function_call_interrupts 1223 ± 4% +9.0% 1333 ± 4% interrupts.CPU64.CAL:Function_call_interrupts 4665 ± 32% +42.5% 6646 ± 24% interrupts.CPU64.NMI:Non-maskable_interrupts 4665 ± 32% +42.5% 6646 ± 24% interrupts.CPU64.PMI:Performance_monitoring_interrupts 1223 ± 4% +8.9% 1332 ± 4% interrupts.CPU65.CAL:Function_call_interrupts 1224 ± 4% +9.0% 1334 ± 4% interrupts.CPU66.CAL:Function_call_interrupts 1224 ± 4% +9.0% 1334 ± 4% interrupts.CPU67.CAL:Function_call_interrupts 1222 ± 4% +8.9% 1332 ± 4% interrupts.CPU68.CAL:Function_call_interrupts 1081 ± 18% +23.2% 1333 ± 4% interrupts.CPU69.CAL:Function_call_interrupts 1224 ± 4% +8.9% 1333 ± 4% interrupts.CPU7.CAL:Function_call_interrupts 1223 ± 4% +9.0% 1333 ± 4% interrupts.CPU70.CAL:Function_call_interrupts 1226 ± 3% +8.7% 1332 ± 4% interrupts.CPU71.CAL:Function_call_interrupts 3709 +51.1% 5604 ± 33% interrupts.CPU71.NMI:Non-maskable_interrupts 3709 +51.1% 5604 ± 33% interrupts.CPU71.PMI:Performance_monitoring_interrupts 1220 ± 4% +8.9% 1329 ± 4% interrupts.CPU72.CAL:Function_call_interrupts 1220 ± 4% +8.9% 1329 ± 4% interrupts.CPU73.CAL:Function_call_interrupts 28.50 ± 28% +97.4% 56.25 ± 49% interrupts.CPU73.RES:Rescheduling_interrupts 1220 ± 4% +8.7% 1326 ± 3% interrupts.CPU74.CAL:Function_call_interrupts 1221 ± 4% +8.8% 1328 ± 3% interrupts.CPU75.CAL:Function_call_interrupts 1223 ± 3% +8.7% 1329 ± 4% interrupts.CPU76.CAL:Function_call_interrupts 1221 ± 4% +8.8% 1329 ± 4% interrupts.CPU77.CAL:Function_call_interrupts 1221 ± 4% +8.6% 1326 ± 4% interrupts.CPU78.CAL:Function_call_interrupts 1221 ± 4% +8.6% 1326 ± 4% interrupts.CPU79.CAL:Function_call_interrupts 1224 ± 4% +8.9% 1334 ± 4% interrupts.CPU8.CAL:Function_call_interrupts 1221 ± 4% +8.9% 1329 ± 4% interrupts.CPU80.CAL:Function_call_interrupts 1221 ± 4% +8.8% 1329 ± 4% interrupts.CPU81.CAL:Function_call_interrupts 5605 ± 32% -32.7% 3774 interrupts.CPU81.NMI:Non-maskable_interrupts 5605 ± 32% -32.7% 3774 interrupts.CPU81.PMI:Performance_monitoring_interrupts 1220 ± 4% +8.9% 1329 ± 4% interrupts.CPU82.CAL:Function_call_interrupts 1221 ± 4% +8.9% 1329 ± 4% interrupts.CPU83.CAL:Function_call_interrupts 1222 ± 3% +8.8% 1329 ± 4% interrupts.CPU84.CAL:Function_call_interrupts 1220 ± 4% +8.9% 1329 ± 4% interrupts.CPU85.CAL:Function_call_interrupts 1220 ± 4% +8.9% 1329 ± 4% interrupts.CPU86.CAL:Function_call_interrupts 1221 ± 4% +8.9% 1329 ± 4% interrupts.CPU87.CAL:Function_call_interrupts 1221 ± 4% +8.8% 1329 ± 4% interrupts.CPU88.CAL:Function_call_interrupts 1221 ± 4% +8.8% 1329 ± 4% interrupts.CPU89.CAL:Function_call_interrupts 1224 ± 4% +8.9% 1333 ± 4% interrupts.CPU9.CAL:Function_call_interrupts 1221 ± 4% +8.8% 1329 ± 4% interrupts.CPU90.CAL:Function_call_interrupts 1221 ± 4% +8.8% 1329 ± 4% interrupts.CPU91.CAL:Function_call_interrupts 1221 ± 4% +8.8% 1329 ± 4% interrupts.CPU92.CAL:Function_call_interrupts 1221 ± 4% +8.9% 1329 ± 4% interrupts.CPU93.CAL:Function_call_interrupts 1221 ± 4% +8.8% 1329 ± 4% interrupts.CPU94.CAL:Function_call_interrupts 1221 ± 4% +8.8% 1329 ± 4% interrupts.CPU95.CAL:Function_call_interrupts 44.50 ± 82% -68.0% 14.25 ± 43% interrupts.CPU95.RES:Rescheduling_interrupts 1221 ± 4% +8.6% 1325 ± 3% interrupts.CPU96.CAL:Function_call_interrupts 1221 ± 4% +8.9% 1329 ± 4% interrupts.CPU97.CAL:Function_call_interrupts 1223 ± 4% +8.5% 1327 ± 3% interrupts.CPU98.CAL:Function_call_interrupts 55.25 ± 17% +243.0% 189.50 ± 83% interrupts.CPU98.RES:Rescheduling_interrupts 1222 ± 4% +8.5% 1325 ± 3% interrupts.CPU99.CAL:Function_call_interrupts will-it-scale.per_process_ops 1850 +--------------------------------------------------------------------+ 1800 |-+ | | O O O O | 1750 |-+ O O O O O O O O O O O O | 1700 |-+ | 1650 |-+ O O O O O O O O | 1600 |-+ | | | 1550 |-+ | 1500 |-+ | 1450 |-+ .+ .+. | 1400 |-+.+.+.. .+.+. .+.+. .+.+..+.+.+ + .+. +.+.| |.+ +.+. .+..+.+.+ +..+.+ + + | 1350 |-+ +.+.+ | 1300 +--------------------------------------------------------------------+ will-it-scale.workload 520000 +------------------------------------------------------------------+ | O O O | 500000 |-O O O O O O O O O O O O | | O | 480000 |-+ O O O O | | O O O O | 460000 |-+ | | | 440000 |-+ | | | 420000 |-+ .+.. | | .+.+. .+.+. .+.+. .+. .+. .+ .+.+.+.+.| 400000 |.+ +. +.+.+.+ +..+.+ + + + + | | +..+.+. + | 380000 +------------------------------------------------------------------+ [*] bisect-good sample [O] bisect-bad sample Disclaimer: Results have been estimated based on internal Intel analysis and are provided for informational purposes only. Any difference in system hardware or software design or configuration may affect actual performance. Thanks, Rong Chen --oIMVlEQ///Q2JYC7 Content-Type: text/plain; charset=us-ascii Content-Disposition: attachment; filename="config-5.6.0-rc4-00302-gdb8e976e4a08f" # # Automatically generated file; DO NOT EDIT. # Linux/x86_64 5.6.0-rc4 Kernel Configuration # # # Compiler: gcc-7 (Debian 7.5.0-5) 7.5.0 # CONFIG_CC_IS_GCC=y CONFIG_GCC_VERSION=70500 CONFIG_CLANG_VERSION=0 CONFIG_CC_CAN_LINK=y CONFIG_CC_HAS_ASM_GOTO=y CONFIG_CC_HAS_ASM_INLINE=y CONFIG_CC_HAS_WARN_MAYBE_UNINITIALIZED=y CONFIG_IRQ_WORK=y CONFIG_BUILDTIME_TABLE_SORT=y CONFIG_THREAD_INFO_IN_TASK=y # # General setup # CONFIG_INIT_ENV_ARG_LIMIT=32 # CONFIG_COMPILE_TEST is not set CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION_AUTO=y CONFIG_BUILD_SALT="" CONFIG_HAVE_KERNEL_GZIP=y CONFIG_HAVE_KERNEL_BZIP2=y CONFIG_HAVE_KERNEL_LZMA=y CONFIG_HAVE_KERNEL_XZ=y CONFIG_HAVE_KERNEL_LZO=y CONFIG_HAVE_KERNEL_LZ4=y CONFIG_KERNEL_GZIP=y # CONFIG_KERNEL_BZIP2 is not set # CONFIG_KERNEL_LZMA is not set # CONFIG_KERNEL_XZ is not set # CONFIG_KERNEL_LZO is not set # CONFIG_KERNEL_LZ4 is not set CONFIG_DEFAULT_HOSTNAME="(none)" CONFIG_SWAP=y CONFIG_SYSVIPC=y CONFIG_SYSVIPC_SYSCTL=y CONFIG_POSIX_MQUEUE=y CONFIG_POSIX_MQUEUE_SYSCTL=y CONFIG_CROSS_MEMORY_ATTACH=y CONFIG_USELIB=y CONFIG_AUDIT=y CONFIG_HAVE_ARCH_AUDITSYSCALL=y CONFIG_AUDITSYSCALL=y # # IRQ subsystem # CONFIG_GENERIC_IRQ_PROBE=y CONFIG_GENERIC_IRQ_SHOW=y CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y CONFIG_GENERIC_PENDING_IRQ=y CONFIG_GENERIC_IRQ_MIGRATION=y CONFIG_IRQ_DOMAIN=y CONFIG_IRQ_SIM=y CONFIG_IRQ_DOMAIN_HIERARCHY=y CONFIG_GENERIC_MSI_IRQ=y CONFIG_GENERIC_MSI_IRQ_DOMAIN=y CONFIG_IRQ_MSI_IOMMU=y CONFIG_GENERIC_IRQ_MATRIX_ALLOCATOR=y CONFIG_GENERIC_IRQ_RESERVATION_MODE=y CONFIG_IRQ_FORCED_THREADING=y CONFIG_SPARSE_IRQ=y # CONFIG_GENERIC_IRQ_DEBUGFS is not set # end of IRQ subsystem CONFIG_CLOCKSOURCE_WATCHDOG=y CONFIG_ARCH_CLOCKSOURCE_INIT=y CONFIG_CLOCKSOURCE_VALIDATE_LAST_CYCLE=y CONFIG_GENERIC_TIME_VSYSCALL=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y CONFIG_GENERIC_CLOCKEVENTS_MIN_ADJUST=y CONFIG_GENERIC_CMOS_UPDATE=y # # Timers subsystem # CONFIG_TICK_ONESHOT=y CONFIG_NO_HZ_COMMON=y # CONFIG_HZ_PERIODIC is not set # CONFIG_NO_HZ_IDLE is not set CONFIG_NO_HZ_FULL=y CONFIG_CONTEXT_TRACKING=y # CONFIG_CONTEXT_TRACKING_FORCE is not set CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y # end of Timers subsystem # CONFIG_PREEMPT_NONE is not set CONFIG_PREEMPT_VOLUNTARY=y # CONFIG_PREEMPT is not set CONFIG_PREEMPT_COUNT=y # # CPU/Task time and stats accounting # CONFIG_VIRT_CPU_ACCOUNTING=y CONFIG_VIRT_CPU_ACCOUNTING_GEN=y # CONFIG_IRQ_TIME_ACCOUNTING is not set CONFIG_HAVE_SCHED_AVG_IRQ=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT_V3=y CONFIG_TASKSTATS=y CONFIG_TASK_DELAY_ACCT=y CONFIG_TASK_XACCT=y CONFIG_TASK_IO_ACCOUNTING=y # CONFIG_PSI is not set # end of CPU/Task time and stats accounting CONFIG_CPU_ISOLATION=y # # RCU Subsystem # CONFIG_TREE_RCU=y # CONFIG_RCU_EXPERT is not set CONFIG_SRCU=y CONFIG_TREE_SRCU=y CONFIG_TASKS_RCU=y CONFIG_RCU_STALL_COMMON=y CONFIG_RCU_NEED_SEGCBLIST=y CONFIG_RCU_NOCB_CPU=y # end of RCU Subsystem CONFIG_BUILD_BIN2C=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y # CONFIG_IKHEADERS is not set CONFIG_LOG_BUF_SHIFT=20 CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y # # Scheduler features # # end of Scheduler features CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y CONFIG_ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH=y CONFIG_CC_HAS_INT128=y CONFIG_ARCH_SUPPORTS_INT128=y CONFIG_NUMA_BALANCING=y CONFIG_NUMA_BALANCING_DEFAULT_ENABLED=y CONFIG_CGROUPS=y CONFIG_PAGE_COUNTER=y CONFIG_MEMCG=y CONFIG_MEMCG_SWAP=y CONFIG_MEMCG_SWAP_ENABLED=y CONFIG_MEMCG_KMEM=y CONFIG_BLK_CGROUP=y CONFIG_CGROUP_WRITEBACK=y CONFIG_CGROUP_SCHED=y CONFIG_FAIR_GROUP_SCHED=y CONFIG_CFS_BANDWIDTH=y CONFIG_RT_GROUP_SCHED=y CONFIG_CGROUP_PIDS=y CONFIG_CGROUP_RDMA=y CONFIG_CGROUP_FREEZER=y CONFIG_CGROUP_HUGETLB=y CONFIG_CPUSETS=y CONFIG_PROC_PID_CPUSET=y CONFIG_CGROUP_DEVICE=y CONFIG_CGROUP_CPUACCT=y CONFIG_CGROUP_PERF=y CONFIG_CGROUP_BPF=y # CONFIG_CGROUP_DEBUG is not set CONFIG_SOCK_CGROUP_DATA=y CONFIG_NAMESPACES=y CONFIG_UTS_NS=y CONFIG_TIME_NS=y CONFIG_IPC_NS=y CONFIG_USER_NS=y CONFIG_PID_NS=y CONFIG_NET_NS=y CONFIG_CHECKPOINT_RESTORE=y CONFIG_SCHED_AUTOGROUP=y # CONFIG_SYSFS_DEPRECATED is not set CONFIG_RELAY=y CONFIG_BLK_DEV_INITRD=y CONFIG_INITRAMFS_SOURCE="" CONFIG_RD_GZIP=y CONFIG_RD_BZIP2=y CONFIG_RD_LZMA=y CONFIG_RD_XZ=y CONFIG_RD_LZO=y CONFIG_RD_LZ4=y # CONFIG_BOOT_CONFIG is not set CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_SYSCTL=y CONFIG_HAVE_UID16=y CONFIG_SYSCTL_EXCEPTION_TRACE=y CONFIG_HAVE_PCSPKR_PLATFORM=y CONFIG_BPF=y CONFIG_EXPERT=y CONFIG_UID16=y CONFIG_MULTIUSER=y CONFIG_SGETMASK_SYSCALL=y CONFIG_SYSFS_SYSCALL=y CONFIG_FHANDLE=y CONFIG_POSIX_TIMERS=y CONFIG_PRINTK=y CONFIG_PRINTK_NMI=y CONFIG_BUG=y CONFIG_ELF_CORE=y CONFIG_PCSPKR_PLATFORM=y CONFIG_BASE_FULL=y CONFIG_FUTEX=y CONFIG_FUTEX_PI=y CONFIG_EPOLL=y CONFIG_SIGNALFD=y CONFIG_TIMERFD=y CONFIG_EVENTFD=y CONFIG_SHMEM=y CONFIG_AIO=y CONFIG_IO_URING=y CONFIG_ADVISE_SYSCALLS=y CONFIG_MEMBARRIER=y CONFIG_KALLSYMS=y CONFIG_KALLSYMS_ALL=y CONFIG_KALLSYMS_ABSOLUTE_PERCPU=y CONFIG_KALLSYMS_BASE_RELATIVE=y CONFIG_BPF_SYSCALL=y CONFIG_ARCH_WANT_DEFAULT_BPF_JIT=y CONFIG_BPF_JIT_ALWAYS_ON=y CONFIG_BPF_JIT_DEFAULT_ON=y CONFIG_USERFAULTFD=y CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y CONFIG_RSEQ=y # CONFIG_DEBUG_RSEQ is not set CONFIG_EMBEDDED=y CONFIG_HAVE_PERF_EVENTS=y # CONFIG_PC104 is not set # # Kernel Performance Events And Counters # CONFIG_PERF_EVENTS=y # CONFIG_DEBUG_PERF_USE_VMALLOC is not set # end of Kernel Performance Events And Counters CONFIG_VM_EVENT_COUNTERS=y CONFIG_SLUB_DEBUG=y # CONFIG_SLUB_MEMCG_SYSFS_ON is not set # CONFIG_COMPAT_BRK is not set # CONFIG_SLAB is not set CONFIG_SLUB=y # CONFIG_SLOB is not set CONFIG_SLAB_MERGE_DEFAULT=y # CONFIG_SLAB_FREELIST_RANDOM is not set # CONFIG_SLAB_FREELIST_HARDENED is not set # CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set CONFIG_SLUB_CPU_PARTIAL=y CONFIG_SYSTEM_DATA_VERIFICATION=y CONFIG_PROFILING=y CONFIG_TRACEPOINTS=y # end of General setup CONFIG_64BIT=y CONFIG_X86_64=y CONFIG_X86=y CONFIG_INSTRUCTION_DECODER=y CONFIG_OUTPUT_FORMAT="elf64-x86-64" CONFIG_ARCH_DEFCONFIG="arch/x86/configs/x86_64_defconfig" CONFIG_LOCKDEP_SUPPORT=y CONFIG_STACKTRACE_SUPPORT=y CONFIG_MMU=y CONFIG_ARCH_MMAP_RND_BITS_MIN=28 CONFIG_ARCH_MMAP_RND_BITS_MAX=32 CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=8 CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 CONFIG_GENERIC_ISA_DMA=y CONFIG_GENERIC_BUG=y CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y CONFIG_ARCH_MAY_HAVE_PC_FDC=y CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_ARCH_HAS_CPU_RELAX=y CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y CONFIG_ARCH_HAS_FILTER_PGPROT=y CONFIG_HAVE_SETUP_PER_CPU_AREA=y CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y CONFIG_ARCH_HIBERNATION_POSSIBLE=y CONFIG_ARCH_SUSPEND_POSSIBLE=y CONFIG_ARCH_WANT_GENERAL_HUGETLB=y CONFIG_ZONE_DMA32=y CONFIG_AUDIT_ARCH=y CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y CONFIG_HAVE_INTEL_TXT=y CONFIG_X86_64_SMP=y CONFIG_ARCH_SUPPORTS_UPROBES=y CONFIG_FIX_EARLYCON_MEM=y CONFIG_DYNAMIC_PHYSICAL_MASK=y CONFIG_PGTABLE_LEVELS=5 CONFIG_CC_HAS_SANE_STACKPROTECTOR=y # # Processor type and features # CONFIG_ZONE_DMA=y CONFIG_SMP=y CONFIG_X86_FEATURE_NAMES=y CONFIG_X86_X2APIC=y CONFIG_X86_MPPARSE=y # CONFIG_GOLDFISH is not set CONFIG_RETPOLINE=y CONFIG_X86_CPU_RESCTRL=y CONFIG_X86_EXTENDED_PLATFORM=y # CONFIG_X86_NUMACHIP is not set # CONFIG_X86_VSMP is not set CONFIG_X86_UV=y # CONFIG_X86_GOLDFISH is not set # CONFIG_X86_INTEL_MID is not set CONFIG_X86_INTEL_LPSS=y CONFIG_X86_AMD_PLATFORM_DEVICE=y CONFIG_IOSF_MBI=y # CONFIG_IOSF_MBI_DEBUG is not set CONFIG_X86_SUPPORTS_MEMORY_FAILURE=y # CONFIG_SCHED_OMIT_FRAME_POINTER is not set CONFIG_HYPERVISOR_GUEST=y CONFIG_PARAVIRT=y CONFIG_PARAVIRT_XXL=y # CONFIG_PARAVIRT_DEBUG is not set CONFIG_PARAVIRT_SPINLOCKS=y CONFIG_X86_HV_CALLBACK_VECTOR=y CONFIG_XEN=y CONFIG_XEN_PV=y CONFIG_XEN_PV_SMP=y # CONFIG_XEN_DOM0 is not set CONFIG_XEN_PVHVM=y CONFIG_XEN_PVHVM_SMP=y CONFIG_XEN_512GB=y CONFIG_XEN_SAVE_RESTORE=y # CONFIG_XEN_DEBUG_FS is not set # CONFIG_XEN_PVH is not set CONFIG_KVM_GUEST=y CONFIG_ARCH_CPUIDLE_HALTPOLL=y # CONFIG_PVH is not set # CONFIG_KVM_DEBUG_FS is not set CONFIG_PARAVIRT_TIME_ACCOUNTING=y CONFIG_PARAVIRT_CLOCK=y # CONFIG_JAILHOUSE_GUEST is not set # CONFIG_ACRN_GUEST is not set # CONFIG_MK8 is not set # CONFIG_MPSC is not set # CONFIG_MCORE2 is not set # CONFIG_MATOM is not set CONFIG_GENERIC_CPU=y CONFIG_X86_INTERNODE_CACHE_SHIFT=6 CONFIG_X86_L1_CACHE_SHIFT=6 CONFIG_X86_TSC=y CONFIG_X86_CMPXCHG64=y CONFIG_X86_CMOV=y CONFIG_X86_MINIMUM_CPU_FAMILY=64 CONFIG_X86_DEBUGCTLMSR=y CONFIG_IA32_FEAT_CTL=y CONFIG_X86_VMX_FEATURE_NAMES=y # CONFIG_PROCESSOR_SELECT is not set CONFIG_CPU_SUP_INTEL=y CONFIG_CPU_SUP_AMD=y CONFIG_CPU_SUP_HYGON=y CONFIG_CPU_SUP_CENTAUR=y CONFIG_CPU_SUP_ZHAOXIN=y CONFIG_HPET_TIMER=y CONFIG_HPET_EMULATE_RTC=y CONFIG_DMI=y CONFIG_GART_IOMMU=y CONFIG_MAXSMP=y CONFIG_NR_CPUS_RANGE_BEGIN=8192 CONFIG_NR_CPUS_RANGE_END=8192 CONFIG_NR_CPUS_DEFAULT=8192 CONFIG_NR_CPUS=8192 CONFIG_SCHED_SMT=y CONFIG_SCHED_MC=y CONFIG_SCHED_MC_PRIO=y CONFIG_X86_LOCAL_APIC=y CONFIG_X86_IO_APIC=y CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS=y CONFIG_X86_MCE=y CONFIG_X86_MCELOG_LEGACY=y CONFIG_X86_MCE_INTEL=y CONFIG_X86_MCE_AMD=y CONFIG_X86_MCE_THRESHOLD=y CONFIG_X86_MCE_INJECT=m CONFIG_X86_THERMAL_VECTOR=y # # Performance monitoring # CONFIG_PERF_EVENTS_INTEL_UNCORE=y CONFIG_PERF_EVENTS_INTEL_RAPL=y CONFIG_PERF_EVENTS_INTEL_CSTATE=y # CONFIG_PERF_EVENTS_AMD_POWER is not set # end of Performance monitoring CONFIG_X86_16BIT=y CONFIG_X86_ESPFIX64=y CONFIG_X86_VSYSCALL_EMULATION=y CONFIG_X86_IOPL_IOPERM=y CONFIG_I8K=m CONFIG_MICROCODE=y CONFIG_MICROCODE_INTEL=y CONFIG_MICROCODE_AMD=y CONFIG_MICROCODE_OLD_INTERFACE=y CONFIG_X86_MSR=y CONFIG_X86_CPUID=y CONFIG_X86_5LEVEL=y CONFIG_X86_DIRECT_GBPAGES=y # CONFIG_X86_CPA_STATISTICS is not set CONFIG_AMD_MEM_ENCRYPT=y # CONFIG_AMD_MEM_ENCRYPT_ACTIVE_BY_DEFAULT is not set CONFIG_NUMA=y CONFIG_AMD_NUMA=y CONFIG_X86_64_ACPI_NUMA=y CONFIG_NODES_SPAN_OTHER_NODES=y CONFIG_NUMA_EMU=y CONFIG_NODES_SHIFT=10 CONFIG_ARCH_SPARSEMEM_ENABLE=y CONFIG_ARCH_SPARSEMEM_DEFAULT=y CONFIG_ARCH_SELECT_MEMORY_MODEL=y CONFIG_ARCH_MEMORY_PROBE=y CONFIG_ARCH_PROC_KCORE_TEXT=y CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 CONFIG_X86_PMEM_LEGACY_DEVICE=y CONFIG_X86_PMEM_LEGACY=m CONFIG_X86_CHECK_BIOS_CORRUPTION=y # CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK is not set CONFIG_X86_RESERVE_LOW=64 CONFIG_MTRR=y CONFIG_MTRR_SANITIZER=y CONFIG_MTRR_SANITIZER_ENABLE_DEFAULT=1 CONFIG_MTRR_SANITIZER_SPARE_REG_NR_DEFAULT=1 CONFIG_X86_PAT=y CONFIG_ARCH_USES_PG_UNCACHED=y CONFIG_ARCH_RANDOM=y CONFIG_X86_SMAP=y CONFIG_X86_UMIP=y CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS=y CONFIG_X86_INTEL_TSX_MODE_OFF=y # CONFIG_X86_INTEL_TSX_MODE_ON is not set # CONFIG_X86_INTEL_TSX_MODE_AUTO is not set CONFIG_EFI=y CONFIG_EFI_STUB=y CONFIG_EFI_MIXED=y CONFIG_SECCOMP=y # CONFIG_HZ_100 is not set # CONFIG_HZ_250 is not set # CONFIG_HZ_300 is not set CONFIG_HZ_1000=y CONFIG_HZ=1000 CONFIG_SCHED_HRTICK=y CONFIG_KEXEC=y CONFIG_KEXEC_FILE=y CONFIG_ARCH_HAS_KEXEC_PURGATORY=y # CONFIG_KEXEC_SIG is not set CONFIG_CRASH_DUMP=y CONFIG_KEXEC_JUMP=y CONFIG_PHYSICAL_START=0x1000000 CONFIG_RELOCATABLE=y CONFIG_RANDOMIZE_BASE=y CONFIG_X86_NEED_RELOCS=y CONFIG_PHYSICAL_ALIGN=0x200000 CONFIG_DYNAMIC_MEMORY_LAYOUT=y CONFIG_RANDOMIZE_MEMORY=y CONFIG_RANDOMIZE_MEMORY_PHYSICAL_PADDING=0xa CONFIG_HOTPLUG_CPU=y CONFIG_BOOTPARAM_HOTPLUG_CPU0=y # CONFIG_DEBUG_HOTPLUG_CPU0 is not set # CONFIG_COMPAT_VDSO is not set CONFIG_LEGACY_VSYSCALL_EMULATE=y # CONFIG_LEGACY_VSYSCALL_XONLY is not set # CONFIG_LEGACY_VSYSCALL_NONE is not set # CONFIG_CMDLINE_BOOL is not set CONFIG_MODIFY_LDT_SYSCALL=y CONFIG_HAVE_LIVEPATCH=y CONFIG_LIVEPATCH=y # end of Processor type and features CONFIG_ARCH_HAS_ADD_PAGES=y CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y CONFIG_USE_PERCPU_NUMA_NODE_ID=y CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION=y CONFIG_ARCH_ENABLE_THP_MIGRATION=y # # Power management and ACPI options # CONFIG_ARCH_HIBERNATION_HEADER=y CONFIG_SUSPEND=y CONFIG_SUSPEND_FREEZER=y # CONFIG_SUSPEND_SKIP_SYNC is not set CONFIG_HIBERNATE_CALLBACKS=y CONFIG_HIBERNATION=y CONFIG_PM_STD_PARTITION="" CONFIG_PM_SLEEP=y CONFIG_PM_SLEEP_SMP=y # CONFIG_PM_AUTOSLEEP is not set # CONFIG_PM_WAKELOCKS is not set CONFIG_PM=y CONFIG_PM_DEBUG=y CONFIG_PM_ADVANCED_DEBUG=y # CONFIG_PM_TEST_SUSPEND is not set CONFIG_PM_SLEEP_DEBUG=y # CONFIG_DPM_WATCHDOG is not set CONFIG_PM_TRACE=y CONFIG_PM_TRACE_RTC=y CONFIG_PM_CLK=y # CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set # CONFIG_ENERGY_MODEL is not set CONFIG_ARCH_SUPPORTS_ACPI=y CONFIG_ACPI=y CONFIG_ACPI_LEGACY_TABLES_LOOKUP=y CONFIG_ARCH_MIGHT_HAVE_ACPI_PDC=y CONFIG_ACPI_SYSTEM_POWER_STATES_SUPPORT=y # CONFIG_ACPI_DEBUGGER is not set CONFIG_ACPI_SPCR_TABLE=y CONFIG_ACPI_LPIT=y CONFIG_ACPI_SLEEP=y # CONFIG_ACPI_PROCFS_POWER is not set CONFIG_ACPI_REV_OVERRIDE_POSSIBLE=y CONFIG_ACPI_EC_DEBUGFS=m CONFIG_ACPI_AC=y CONFIG_ACPI_BATTERY=y CONFIG_ACPI_BUTTON=y CONFIG_ACPI_VIDEO=m CONFIG_ACPI_FAN=y # CONFIG_ACPI_TAD is not set CONFIG_ACPI_DOCK=y CONFIG_ACPI_CPU_FREQ_PSS=y CONFIG_ACPI_PROCESSOR_CSTATE=y CONFIG_ACPI_PROCESSOR_IDLE=y CONFIG_ACPI_CPPC_LIB=y CONFIG_ACPI_PROCESSOR=y CONFIG_ACPI_IPMI=m CONFIG_ACPI_HOTPLUG_CPU=y CONFIG_ACPI_PROCESSOR_AGGREGATOR=m CONFIG_ACPI_THERMAL=y CONFIG_ARCH_HAS_ACPI_TABLE_UPGRADE=y CONFIG_ACPI_TABLE_UPGRADE=y # CONFIG_ACPI_DEBUG is not set CONFIG_ACPI_PCI_SLOT=y CONFIG_ACPI_CONTAINER=y CONFIG_ACPI_HOTPLUG_MEMORY=y CONFIG_ACPI_HOTPLUG_IOAPIC=y CONFIG_ACPI_SBS=m CONFIG_ACPI_HED=y CONFIG_ACPI_CUSTOM_METHOD=m CONFIG_ACPI_BGRT=y # CONFIG_ACPI_REDUCED_HARDWARE_ONLY is not set CONFIG_ACPI_NFIT=m # CONFIG_NFIT_SECURITY_DEBUG is not set CONFIG_ACPI_NUMA=y # CONFIG_ACPI_HMAT is not set CONFIG_HAVE_ACPI_APEI=y CONFIG_HAVE_ACPI_APEI_NMI=y CONFIG_ACPI_APEI=y CONFIG_ACPI_APEI_GHES=y CONFIG_ACPI_APEI_PCIEAER=y CONFIG_ACPI_APEI_MEMORY_FAILURE=y CONFIG_ACPI_APEI_EINJ=m CONFIG_ACPI_APEI_ERST_DEBUG=y # CONFIG_DPTF_POWER is not set CONFIG_ACPI_WATCHDOG=y CONFIG_ACPI_EXTLOG=m CONFIG_ACPI_ADXL=y # CONFIG_PMIC_OPREGION is not set # CONFIG_ACPI_CONFIGFS is not set CONFIG_X86_PM_TIMER=y CONFIG_SFI=y # # CPU Frequency scaling # CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_GOV_ATTR_SET=y CONFIG_CPU_FREQ_GOV_COMMON=y # CONFIG_CPU_FREQ_STAT is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y # CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set CONFIG_CPU_FREQ_GOV_PERFORMANCE=y CONFIG_CPU_FREQ_GOV_POWERSAVE=y CONFIG_CPU_FREQ_GOV_USERSPACE=y CONFIG_CPU_FREQ_GOV_ONDEMAND=y CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y # CONFIG_CPU_FREQ_GOV_SCHEDUTIL is not set # # CPU frequency scaling drivers # CONFIG_X86_INTEL_PSTATE=y CONFIG_X86_PCC_CPUFREQ=m CONFIG_X86_ACPI_CPUFREQ=m CONFIG_X86_ACPI_CPUFREQ_CPB=y CONFIG_X86_POWERNOW_K8=m CONFIG_X86_AMD_FREQ_SENSITIVITY=m # CONFIG_X86_SPEEDSTEP_CENTRINO is not set CONFIG_X86_P4_CLOCKMOD=m # # shared options # CONFIG_X86_SPEEDSTEP_LIB=m # end of CPU Frequency scaling # # CPU Idle # CONFIG_CPU_IDLE=y # CONFIG_CPU_IDLE_GOV_LADDER is not set CONFIG_CPU_IDLE_GOV_MENU=y # CONFIG_CPU_IDLE_GOV_TEO is not set # CONFIG_CPU_IDLE_GOV_HALTPOLL is not set CONFIG_HALTPOLL_CPUIDLE=y # end of CPU Idle CONFIG_INTEL_IDLE=y # end of Power management and ACPI options # # Bus options (PCI etc.) # CONFIG_PCI_DIRECT=y CONFIG_PCI_MMCONFIG=y CONFIG_PCI_XEN=y CONFIG_MMCONF_FAM10H=y # CONFIG_PCI_CNB20LE_QUIRK is not set # CONFIG_ISA_BUS is not set CONFIG_ISA_DMA_API=y CONFIG_AMD_NB=y # CONFIG_X86_SYSFB is not set # end of Bus options (PCI etc.) # # Binary Emulations # CONFIG_IA32_EMULATION=y # CONFIG_X86_X32 is not set CONFIG_COMPAT_32=y CONFIG_COMPAT=y CONFIG_COMPAT_FOR_U64_ALIGNMENT=y CONFIG_SYSVIPC_COMPAT=y # end of Binary Emulations # # Firmware Drivers # CONFIG_EDD=m # CONFIG_EDD_OFF is not set CONFIG_FIRMWARE_MEMMAP=y CONFIG_DMIID=y CONFIG_DMI_SYSFS=y CONFIG_DMI_SCAN_MACHINE_NON_EFI_FALLBACK=y CONFIG_ISCSI_IBFT_FIND=y CONFIG_ISCSI_IBFT=m CONFIG_FW_CFG_SYSFS=y # CONFIG_FW_CFG_SYSFS_CMDLINE is not set # CONFIG_GOOGLE_FIRMWARE is not set # # EFI (Extensible Firmware Interface) Support # CONFIG_EFI_VARS=y CONFIG_EFI_ESRT=y CONFIG_EFI_VARS_PSTORE=y CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE=y CONFIG_EFI_RUNTIME_MAP=y # CONFIG_EFI_FAKE_MEMMAP is not set CONFIG_EFI_RUNTIME_WRAPPERS=y # CONFIG_EFI_BOOTLOADER_CONTROL is not set # CONFIG_EFI_CAPSULE_LOADER is not set # CONFIG_EFI_TEST is not set CONFIG_APPLE_PROPERTIES=y # CONFIG_RESET_ATTACK_MITIGATION is not set # CONFIG_EFI_RCI2_TABLE is not set # CONFIG_EFI_DISABLE_PCI_DMA is not set # end of EFI (Extensible Firmware Interface) Support CONFIG_UEFI_CPER=y CONFIG_UEFI_CPER_X86=y CONFIG_EFI_DEV_PATH_PARSER=y CONFIG_EFI_EARLYCON=y # # Tegra firmware driver # # end of Tegra firmware driver # end of Firmware Drivers CONFIG_HAVE_KVM=y CONFIG_HAVE_KVM_IRQCHIP=y CONFIG_HAVE_KVM_IRQFD=y CONFIG_HAVE_KVM_IRQ_ROUTING=y CONFIG_HAVE_KVM_EVENTFD=y CONFIG_KVM_MMIO=y CONFIG_KVM_ASYNC_PF=y CONFIG_HAVE_KVM_MSI=y CONFIG_HAVE_KVM_CPU_RELAX_INTERCEPT=y CONFIG_KVM_VFIO=y CONFIG_KVM_GENERIC_DIRTYLOG_READ_PROTECT=y CONFIG_KVM_COMPAT=y CONFIG_HAVE_KVM_IRQ_BYPASS=y CONFIG_HAVE_KVM_NO_POLL=y CONFIG_VIRTUALIZATION=y CONFIG_KVM=m CONFIG_KVM_WERROR=y CONFIG_KVM_INTEL=m CONFIG_KVM_AMD=m CONFIG_KVM_AMD_SEV=y CONFIG_KVM_MMU_AUDIT=y CONFIG_VHOST_NET=m # CONFIG_VHOST_SCSI is not set CONFIG_VHOST_VSOCK=m CONFIG_VHOST=m # CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set # # General architecture-dependent options # CONFIG_CRASH_CORE=y CONFIG_KEXEC_CORE=y CONFIG_HOTPLUG_SMT=y CONFIG_OPROFILE=m CONFIG_OPROFILE_EVENT_MULTIPLEX=y CONFIG_HAVE_OPROFILE=y CONFIG_OPROFILE_NMI_TIMER=y CONFIG_KPROBES=y CONFIG_JUMP_LABEL=y # CONFIG_STATIC_KEYS_SELFTEST is not set CONFIG_OPTPROBES=y CONFIG_KPROBES_ON_FTRACE=y CONFIG_UPROBES=y CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y CONFIG_ARCH_USE_BUILTIN_BSWAP=y CONFIG_KRETPROBES=y CONFIG_USER_RETURN_NOTIFIER=y CONFIG_HAVE_IOREMAP_PROT=y CONFIG_HAVE_KPROBES=y CONFIG_HAVE_KRETPROBES=y CONFIG_HAVE_OPTPROBES=y CONFIG_HAVE_KPROBES_ON_FTRACE=y CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y CONFIG_HAVE_NMI=y CONFIG_HAVE_ARCH_TRACEHOOK=y CONFIG_HAVE_DMA_CONTIGUOUS=y CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_ARCH_HAS_FORTIFY_SOURCE=y CONFIG_ARCH_HAS_SET_MEMORY=y CONFIG_ARCH_HAS_SET_DIRECT_MAP=y CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y CONFIG_ARCH_WANTS_DYNAMIC_TASK_STRUCT=y CONFIG_HAVE_ASM_MODVERSIONS=y CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y CONFIG_HAVE_RSEQ=y CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y CONFIG_HAVE_CLK=y CONFIG_HAVE_HW_BREAKPOINT=y CONFIG_HAVE_MIXED_BREAKPOINTS_REGS=y CONFIG_HAVE_USER_RETURN_NOTIFIER=y CONFIG_HAVE_PERF_EVENTS_NMI=y CONFIG_HAVE_HARDLOCKUP_DETECTOR_PERF=y CONFIG_HAVE_PERF_REGS=y CONFIG_HAVE_PERF_USER_STACK_DUMP=y CONFIG_HAVE_ARCH_JUMP_LABEL=y CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y CONFIG_MMU_GATHER_TABLE_FREE=y CONFIG_MMU_GATHER_RCU_TABLE_FREE=y CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y CONFIG_HAVE_CMPXCHG_LOCAL=y CONFIG_HAVE_CMPXCHG_DOUBLE=y CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y CONFIG_ARCH_WANT_OLD_COMPAT_IPC=y CONFIG_HAVE_ARCH_SECCOMP_FILTER=y CONFIG_SECCOMP_FILTER=y CONFIG_HAVE_ARCH_STACKLEAK=y CONFIG_HAVE_STACKPROTECTOR=y CONFIG_CC_HAS_STACKPROTECTOR_NONE=y CONFIG_STACKPROTECTOR=y CONFIG_STACKPROTECTOR_STRONG=y CONFIG_HAVE_ARCH_WITHIN_STACK_FRAMES=y CONFIG_HAVE_CONTEXT_TRACKING=y CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y CONFIG_HAVE_MOVE_PMD=y CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD=y CONFIG_HAVE_ARCH_HUGE_VMAP=y CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y CONFIG_HAVE_ARCH_SOFT_DIRTY=y CONFIG_HAVE_MOD_ARCH_SPECIFIC=y CONFIG_MODULES_USE_ELF_RELA=y CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y CONFIG_ARCH_HAS_ELF_RANDOMIZE=y CONFIG_HAVE_ARCH_MMAP_RND_BITS=y CONFIG_HAVE_EXIT_THREAD=y CONFIG_ARCH_MMAP_RND_BITS=28 CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y CONFIG_ARCH_MMAP_RND_COMPAT_BITS=8 CONFIG_HAVE_ARCH_COMPAT_MMAP_BASES=y CONFIG_HAVE_COPY_THREAD_TLS=y CONFIG_HAVE_STACK_VALIDATION=y CONFIG_HAVE_RELIABLE_STACKTRACE=y CONFIG_OLD_SIGSUSPEND3=y CONFIG_COMPAT_OLD_SIGACTION=y CONFIG_COMPAT_32BIT_TIME=y CONFIG_HAVE_ARCH_VMAP_STACK=y CONFIG_VMAP_STACK=y CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y CONFIG_STRICT_KERNEL_RWX=y CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y CONFIG_STRICT_MODULE_RWX=y CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y CONFIG_ARCH_USE_MEMREMAP_PROT=y # CONFIG_LOCK_EVENT_COUNTS is not set CONFIG_ARCH_HAS_MEM_ENCRYPT=y # # GCOV-based kernel profiling # # CONFIG_GCOV_KERNEL is not set CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y # end of GCOV-based kernel profiling CONFIG_PLUGIN_HOSTCC="g++" CONFIG_HAVE_GCC_PLUGINS=y CONFIG_GCC_PLUGINS=y # CONFIG_GCC_PLUGIN_CYC_COMPLEXITY is not set # CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set # CONFIG_GCC_PLUGIN_RANDSTRUCT is not set # end of General architecture-dependent options CONFIG_RT_MUTEXES=y CONFIG_BASE_SMALL=0 CONFIG_MODULE_SIG_FORMAT=y CONFIG_MODULES=y CONFIG_MODULE_FORCE_LOAD=y CONFIG_MODULE_UNLOAD=y # CONFIG_MODULE_FORCE_UNLOAD is not set # CONFIG_MODVERSIONS is not set # CONFIG_MODULE_SRCVERSION_ALL is not set CONFIG_MODULE_SIG=y # CONFIG_MODULE_SIG_FORCE is not set CONFIG_MODULE_SIG_ALL=y # CONFIG_MODULE_SIG_SHA1 is not set # CONFIG_MODULE_SIG_SHA224 is not set CONFIG_MODULE_SIG_SHA256=y # CONFIG_MODULE_SIG_SHA384 is not set # CONFIG_MODULE_SIG_SHA512 is not set CONFIG_MODULE_SIG_HASH="sha256" # CONFIG_MODULE_COMPRESS is not set # CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set # CONFIG_UNUSED_SYMBOLS is not set # CONFIG_TRIM_UNUSED_KSYMS is not set CONFIG_MODULES_TREE_LOOKUP=y CONFIG_BLOCK=y CONFIG_BLK_SCSI_REQUEST=y CONFIG_BLK_CGROUP_RWSTAT=y CONFIG_BLK_DEV_BSG=y CONFIG_BLK_DEV_BSGLIB=y CONFIG_BLK_DEV_INTEGRITY=y CONFIG_BLK_DEV_INTEGRITY_T10=m CONFIG_BLK_DEV_ZONED=y CONFIG_BLK_DEV_THROTTLING=y # CONFIG_BLK_DEV_THROTTLING_LOW is not set # CONFIG_BLK_CMDLINE_PARSER is not set # CONFIG_BLK_WBT is not set # CONFIG_BLK_CGROUP_IOLATENCY is not set # CONFIG_BLK_CGROUP_IOCOST is not set CONFIG_BLK_DEBUG_FS=y CONFIG_BLK_DEBUG_FS_ZONED=y # CONFIG_BLK_SED_OPAL is not set # # Partition Types # CONFIG_PARTITION_ADVANCED=y # CONFIG_ACORN_PARTITION is not set # CONFIG_AIX_PARTITION is not set CONFIG_OSF_PARTITION=y CONFIG_AMIGA_PARTITION=y # CONFIG_ATARI_PARTITION is not set CONFIG_MAC_PARTITION=y CONFIG_MSDOS_PARTITION=y CONFIG_BSD_DISKLABEL=y CONFIG_MINIX_SUBPARTITION=y CONFIG_SOLARIS_X86_PARTITION=y CONFIG_UNIXWARE_DISKLABEL=y # CONFIG_LDM_PARTITION is not set CONFIG_SGI_PARTITION=y # CONFIG_ULTRIX_PARTITION is not set CONFIG_SUN_PARTITION=y CONFIG_KARMA_PARTITION=y CONFIG_EFI_PARTITION=y # CONFIG_SYSV68_PARTITION is not set # CONFIG_CMDLINE_PARTITION is not set # end of Partition Types CONFIG_BLOCK_COMPAT=y CONFIG_BLK_MQ_PCI=y CONFIG_BLK_MQ_VIRTIO=y CONFIG_BLK_PM=y # # IO Schedulers # CONFIG_MQ_IOSCHED_DEADLINE=y CONFIG_MQ_IOSCHED_KYBER=y # CONFIG_IOSCHED_BFQ is not set # end of IO Schedulers CONFIG_PREEMPT_NOTIFIERS=y CONFIG_PADATA=y CONFIG_ASN1=y CONFIG_INLINE_SPIN_UNLOCK_IRQ=y CONFIG_INLINE_READ_UNLOCK=y CONFIG_INLINE_READ_UNLOCK_IRQ=y CONFIG_INLINE_WRITE_UNLOCK=y CONFIG_INLINE_WRITE_UNLOCK_IRQ=y CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y CONFIG_MUTEX_SPIN_ON_OWNER=y CONFIG_RWSEM_SPIN_ON_OWNER=y CONFIG_LOCK_SPIN_ON_OWNER=y CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y CONFIG_QUEUED_SPINLOCKS=y CONFIG_ARCH_USE_QUEUED_RWLOCKS=y CONFIG_QUEUED_RWLOCKS=y CONFIG_ARCH_HAS_SYNC_CORE_BEFORE_USERMODE=y CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y CONFIG_FREEZER=y # # Executable file formats # CONFIG_BINFMT_ELF=y CONFIG_COMPAT_BINFMT_ELF=y CONFIG_ELFCORE=y CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y CONFIG_BINFMT_SCRIPT=y CONFIG_BINFMT_MISC=m CONFIG_COREDUMP=y # end of Executable file formats # # Memory Management options # CONFIG_SELECT_MEMORY_MODEL=y CONFIG_SPARSEMEM_MANUAL=y CONFIG_SPARSEMEM=y CONFIG_NEED_MULTIPLE_NODES=y CONFIG_HAVE_MEMORY_PRESENT=y CONFIG_SPARSEMEM_EXTREME=y CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y CONFIG_SPARSEMEM_VMEMMAP=y CONFIG_HAVE_MEMBLOCK_NODE_MAP=y CONFIG_HAVE_FAST_GUP=y CONFIG_MEMORY_ISOLATION=y CONFIG_HAVE_BOOTMEM_INFO_NODE=y CONFIG_MEMORY_HOTPLUG=y CONFIG_MEMORY_HOTPLUG_SPARSE=y # CONFIG_MEMORY_HOTPLUG_DEFAULT_ONLINE is not set CONFIG_MEMORY_HOTREMOVE=y CONFIG_SPLIT_PTLOCK_CPUS=4 CONFIG_MEMORY_BALLOON=y CONFIG_BALLOON_COMPACTION=y CONFIG_COMPACTION=y CONFIG_MIGRATION=y CONFIG_CONTIG_ALLOC=y CONFIG_PHYS_ADDR_T_64BIT=y CONFIG_BOUNCE=y CONFIG_VIRT_TO_BUS=y CONFIG_MMU_NOTIFIER=y CONFIG_KSM=y CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y CONFIG_MEMORY_FAILURE=y CONFIG_HWPOISON_INJECT=m CONFIG_TRANSPARENT_HUGEPAGE=y CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y # CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set CONFIG_ARCH_WANTS_THP_SWAP=y CONFIG_THP_SWAP=y CONFIG_TRANSPARENT_HUGE_PAGECACHE=y CONFIG_CLEANCACHE=y CONFIG_FRONTSWAP=y CONFIG_CMA=y # CONFIG_CMA_DEBUG is not set # CONFIG_CMA_DEBUGFS is not set CONFIG_CMA_AREAS=7 CONFIG_MEM_SOFT_DIRTY=y CONFIG_ZSWAP=y CONFIG_ZPOOL=y CONFIG_ZBUD=y # CONFIG_Z3FOLD is not set CONFIG_ZSMALLOC=y # CONFIG_PGTABLE_MAPPING is not set # CONFIG_ZSMALLOC_STAT is not set CONFIG_GENERIC_EARLY_IOREMAP=y CONFIG_DEFERRED_STRUCT_PAGE_INIT=y CONFIG_IDLE_PAGE_TRACKING=y CONFIG_ARCH_HAS_PTE_DEVMAP=y CONFIG_ZONE_DEVICE=y CONFIG_DEV_PAGEMAP_OPS=y # CONFIG_DEVICE_PRIVATE is not set CONFIG_FRAME_VECTOR=y CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y CONFIG_ARCH_HAS_PKEYS=y # CONFIG_PERCPU_STATS is not set # CONFIG_GUP_BENCHMARK is not set # CONFIG_READ_ONLY_THP_FOR_FS is not set CONFIG_ARCH_HAS_PTE_SPECIAL=y CONFIG_MAPPING_DIRTY_HELPERS=y # end of Memory Management options CONFIG_NET=y CONFIG_COMPAT_NETLINK_MESSAGES=y CONFIG_NET_INGRESS=y CONFIG_NET_EGRESS=y CONFIG_SKB_EXTENSIONS=y # # Networking options # CONFIG_PACKET=y CONFIG_PACKET_DIAG=m CONFIG_UNIX=y CONFIG_UNIX_SCM=y CONFIG_UNIX_DIAG=m # CONFIG_TLS is not set CONFIG_XFRM=y CONFIG_XFRM_ALGO=y CONFIG_XFRM_USER=y # CONFIG_XFRM_INTERFACE is not set CONFIG_XFRM_SUB_POLICY=y CONFIG_XFRM_MIGRATE=y CONFIG_XFRM_STATISTICS=y CONFIG_XFRM_IPCOMP=m CONFIG_NET_KEY=m CONFIG_NET_KEY_MIGRATE=y # CONFIG_XDP_SOCKETS is not set CONFIG_INET=y CONFIG_IP_MULTICAST=y CONFIG_IP_ADVANCED_ROUTER=y CONFIG_IP_FIB_TRIE_STATS=y CONFIG_IP_MULTIPLE_TABLES=y CONFIG_IP_ROUTE_MULTIPATH=y CONFIG_IP_ROUTE_VERBOSE=y CONFIG_IP_ROUTE_CLASSID=y CONFIG_IP_PNP=y CONFIG_IP_PNP_DHCP=y # CONFIG_IP_PNP_BOOTP is not set # CONFIG_IP_PNP_RARP is not set CONFIG_NET_IPIP=m CONFIG_NET_IPGRE_DEMUX=m CONFIG_NET_IP_TUNNEL=m CONFIG_NET_IPGRE=m CONFIG_NET_IPGRE_BROADCAST=y CONFIG_IP_MROUTE_COMMON=y CONFIG_IP_MROUTE=y CONFIG_IP_MROUTE_MULTIPLE_TABLES=y CONFIG_IP_PIMSM_V1=y CONFIG_IP_PIMSM_V2=y CONFIG_SYN_COOKIES=y CONFIG_NET_IPVTI=m CONFIG_NET_UDP_TUNNEL=m CONFIG_NET_FOU=m CONFIG_NET_FOU_IP_TUNNELS=y CONFIG_INET_AH=m CONFIG_INET_ESP=m # CONFIG_INET_ESP_OFFLOAD is not set # CONFIG_INET_ESPINTCP is not set CONFIG_INET_IPCOMP=m CONFIG_INET_XFRM_TUNNEL=m CONFIG_INET_TUNNEL=m CONFIG_INET_DIAG=m CONFIG_INET_TCP_DIAG=m CONFIG_INET_UDP_DIAG=m # CONFIG_INET_RAW_DIAG is not set # CONFIG_INET_DIAG_DESTROY is not set CONFIG_TCP_CONG_ADVANCED=y CONFIG_TCP_CONG_BIC=m CONFIG_TCP_CONG_CUBIC=y CONFIG_TCP_CONG_WESTWOOD=m CONFIG_TCP_CONG_HTCP=m CONFIG_TCP_CONG_HSTCP=m CONFIG_TCP_CONG_HYBLA=m CONFIG_TCP_CONG_VEGAS=m # CONFIG_TCP_CONG_NV is not set CONFIG_TCP_CONG_SCALABLE=m CONFIG_TCP_CONG_LP=m CONFIG_TCP_CONG_VENO=m CONFIG_TCP_CONG_YEAH=m CONFIG_TCP_CONG_ILLINOIS=m CONFIG_TCP_CONG_DCTCP=m # CONFIG_TCP_CONG_CDG is not set # CONFIG_TCP_CONG_BBR is not set CONFIG_DEFAULT_CUBIC=y # CONFIG_DEFAULT_RENO is not set CONFIG_DEFAULT_TCP_CONG="cubic" CONFIG_TCP_MD5SIG=y CONFIG_IPV6=y CONFIG_IPV6_ROUTER_PREF=y CONFIG_IPV6_ROUTE_INFO=y CONFIG_IPV6_OPTIMISTIC_DAD=y CONFIG_INET6_AH=m CONFIG_INET6_ESP=m # CONFIG_INET6_ESP_OFFLOAD is not set CONFIG_INET6_IPCOMP=m CONFIG_IPV6_MIP6=m # CONFIG_IPV6_ILA is not set CONFIG_INET6_XFRM_TUNNEL=m CONFIG_INET6_TUNNEL=m CONFIG_IPV6_VTI=m CONFIG_IPV6_SIT=m CONFIG_IPV6_SIT_6RD=y CONFIG_IPV6_NDISC_NODETYPE=y CONFIG_IPV6_TUNNEL=m CONFIG_IPV6_GRE=m CONFIG_IPV6_FOU=m CONFIG_IPV6_FOU_TUNNEL=m CONFIG_IPV6_MULTIPLE_TABLES=y # CONFIG_IPV6_SUBTREES is not set CONFIG_IPV6_MROUTE=y CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y CONFIG_IPV6_PIMSM_V2=y CONFIG_IPV6_SEG6_LWTUNNEL=y # CONFIG_IPV6_SEG6_HMAC is not set CONFIG_IPV6_SEG6_BPF=y CONFIG_NETLABEL=y CONFIG_MPTCP=y CONFIG_MPTCP_IPV6=y # CONFIG_MPTCP_HMAC_TEST is not set CONFIG_NETWORK_SECMARK=y CONFIG_NET_PTP_CLASSIFY=y CONFIG_NETWORK_PHY_TIMESTAMPING=y CONFIG_NETFILTER=y CONFIG_NETFILTER_ADVANCED=y CONFIG_BRIDGE_NETFILTER=m # # Core Netfilter Configuration # CONFIG_NETFILTER_INGRESS=y CONFIG_NETFILTER_NETLINK=m CONFIG_NETFILTER_FAMILY_BRIDGE=y CONFIG_NETFILTER_FAMILY_ARP=y CONFIG_NETFILTER_NETLINK_ACCT=m CONFIG_NETFILTER_NETLINK_QUEUE=m CONFIG_NETFILTER_NETLINK_LOG=m CONFIG_NETFILTER_NETLINK_OSF=m CONFIG_NF_CONNTRACK=m CONFIG_NF_LOG_COMMON=m # CONFIG_NF_LOG_NETDEV is not set CONFIG_NETFILTER_CONNCOUNT=m CONFIG_NF_CONNTRACK_MARK=y CONFIG_NF_CONNTRACK_SECMARK=y CONFIG_NF_CONNTRACK_ZONES=y CONFIG_NF_CONNTRACK_PROCFS=y CONFIG_NF_CONNTRACK_EVENTS=y CONFIG_NF_CONNTRACK_TIMEOUT=y CONFIG_NF_CONNTRACK_TIMESTAMP=y CONFIG_NF_CONNTRACK_LABELS=y CONFIG_NF_CT_PROTO_DCCP=y CONFIG_NF_CT_PROTO_GRE=y CONFIG_NF_CT_PROTO_SCTP=y CONFIG_NF_CT_PROTO_UDPLITE=y CONFIG_NF_CONNTRACK_AMANDA=m CONFIG_NF_CONNTRACK_FTP=m CONFIG_NF_CONNTRACK_H323=m CONFIG_NF_CONNTRACK_IRC=m CONFIG_NF_CONNTRACK_BROADCAST=m CONFIG_NF_CONNTRACK_NETBIOS_NS=m CONFIG_NF_CONNTRACK_SNMP=m CONFIG_NF_CONNTRACK_PPTP=m CONFIG_NF_CONNTRACK_SANE=m CONFIG_NF_CONNTRACK_SIP=m CONFIG_NF_CONNTRACK_TFTP=m CONFIG_NF_CT_NETLINK=m CONFIG_NF_CT_NETLINK_TIMEOUT=m # CONFIG_NETFILTER_NETLINK_GLUE_CT is not set CONFIG_NF_NAT=m CONFIG_NF_NAT_AMANDA=m CONFIG_NF_NAT_FTP=m CONFIG_NF_NAT_IRC=m CONFIG_NF_NAT_SIP=m CONFIG_NF_NAT_TFTP=m CONFIG_NF_NAT_REDIRECT=y CONFIG_NF_NAT_MASQUERADE=y CONFIG_NETFILTER_SYNPROXY=m CONFIG_NF_TABLES=m # CONFIG_NF_TABLES_SET is not set # CONFIG_NF_TABLES_INET is not set # CONFIG_NF_TABLES_NETDEV is not set # CONFIG_NFT_NUMGEN is not set CONFIG_NFT_CT=m CONFIG_NFT_COUNTER=m # CONFIG_NFT_CONNLIMIT is not set CONFIG_NFT_LOG=m CONFIG_NFT_LIMIT=m CONFIG_NFT_MASQ=m CONFIG_NFT_REDIR=m # CONFIG_NFT_TUNNEL is not set # CONFIG_NFT_OBJREF is not set CONFIG_NFT_QUEUE=m # CONFIG_NFT_QUOTA is not set CONFIG_NFT_REJECT=m CONFIG_NFT_COMPAT=m CONFIG_NFT_HASH=m # CONFIG_NFT_XFRM is not set # CONFIG_NFT_SOCKET is not set # CONFIG_NFT_OSF is not set # CONFIG_NFT_TPROXY is not set # CONFIG_NFT_SYNPROXY is not set # CONFIG_NF_FLOW_TABLE is not set CONFIG_NETFILTER_XTABLES=y # # Xtables combined modules # CONFIG_NETFILTER_XT_MARK=m CONFIG_NETFILTER_XT_CONNMARK=m CONFIG_NETFILTER_XT_SET=m # # Xtables targets # CONFIG_NETFILTER_XT_TARGET_AUDIT=m CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m CONFIG_NETFILTER_XT_TARGET_CONNMARK=m CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m CONFIG_NETFILTER_XT_TARGET_CT=m CONFIG_NETFILTER_XT_TARGET_DSCP=m CONFIG_NETFILTER_XT_TARGET_HL=m CONFIG_NETFILTER_XT_TARGET_HMARK=m CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m CONFIG_NETFILTER_XT_TARGET_LED=m CONFIG_NETFILTER_XT_TARGET_LOG=m CONFIG_NETFILTER_XT_TARGET_MARK=m CONFIG_NETFILTER_XT_NAT=m CONFIG_NETFILTER_XT_TARGET_NETMAP=m CONFIG_NETFILTER_XT_TARGET_NFLOG=m CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m CONFIG_NETFILTER_XT_TARGET_NOTRACK=m CONFIG_NETFILTER_XT_TARGET_RATEEST=m CONFIG_NETFILTER_XT_TARGET_REDIRECT=m CONFIG_NETFILTER_XT_TARGET_MASQUERADE=m CONFIG_NETFILTER_XT_TARGET_TEE=m CONFIG_NETFILTER_XT_TARGET_TPROXY=m CONFIG_NETFILTER_XT_TARGET_TRACE=m CONFIG_NETFILTER_XT_TARGET_SECMARK=m CONFIG_NETFILTER_XT_TARGET_TCPMSS=m CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m # # Xtables matches # CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m CONFIG_NETFILTER_XT_MATCH_BPF=m CONFIG_NETFILTER_XT_MATCH_CGROUP=m CONFIG_NETFILTER_XT_MATCH_CLUSTER=m CONFIG_NETFILTER_XT_MATCH_COMMENT=m CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m CONFIG_NETFILTER_XT_MATCH_CONNLABEL=m CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m CONFIG_NETFILTER_XT_MATCH_CONNMARK=m CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m CONFIG_NETFILTER_XT_MATCH_CPU=m CONFIG_NETFILTER_XT_MATCH_DCCP=m CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m CONFIG_NETFILTER_XT_MATCH_DSCP=m CONFIG_NETFILTER_XT_MATCH_ECN=m CONFIG_NETFILTER_XT_MATCH_ESP=m CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m CONFIG_NETFILTER_XT_MATCH_HELPER=m CONFIG_NETFILTER_XT_MATCH_HL=m # CONFIG_NETFILTER_XT_MATCH_IPCOMP is not set CONFIG_NETFILTER_XT_MATCH_IPRANGE=m CONFIG_NETFILTER_XT_MATCH_IPVS=m CONFIG_NETFILTER_XT_MATCH_L2TP=m CONFIG_NETFILTER_XT_MATCH_LENGTH=m CONFIG_NETFILTER_XT_MATCH_LIMIT=m CONFIG_NETFILTER_XT_MATCH_MAC=m CONFIG_NETFILTER_XT_MATCH_MARK=m CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m CONFIG_NETFILTER_XT_MATCH_NFACCT=m CONFIG_NETFILTER_XT_MATCH_OSF=m CONFIG_NETFILTER_XT_MATCH_OWNER=m CONFIG_NETFILTER_XT_MATCH_POLICY=m CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m CONFIG_NETFILTER_XT_MATCH_QUOTA=m CONFIG_NETFILTER_XT_MATCH_RATEEST=m CONFIG_NETFILTER_XT_MATCH_REALM=m CONFIG_NETFILTER_XT_MATCH_RECENT=m CONFIG_NETFILTER_XT_MATCH_SCTP=m CONFIG_NETFILTER_XT_MATCH_SOCKET=m CONFIG_NETFILTER_XT_MATCH_STATE=m CONFIG_NETFILTER_XT_MATCH_STATISTIC=m CONFIG_NETFILTER_XT_MATCH_STRING=m CONFIG_NETFILTER_XT_MATCH_TCPMSS=m CONFIG_NETFILTER_XT_MATCH_TIME=m CONFIG_NETFILTER_XT_MATCH_U32=m # end of Core Netfilter Configuration CONFIG_IP_SET=m CONFIG_IP_SET_MAX=256 CONFIG_IP_SET_BITMAP_IP=m CONFIG_IP_SET_BITMAP_IPMAC=m CONFIG_IP_SET_BITMAP_PORT=m CONFIG_IP_SET_HASH_IP=m CONFIG_IP_SET_HASH_IPMARK=m CONFIG_IP_SET_HASH_IPPORT=m CONFIG_IP_SET_HASH_IPPORTIP=m CONFIG_IP_SET_HASH_IPPORTNET=m CONFIG_IP_SET_HASH_IPMAC=m CONFIG_IP_SET_HASH_MAC=m CONFIG_IP_SET_HASH_NETPORTNET=m CONFIG_IP_SET_HASH_NET=m CONFIG_IP_SET_HASH_NETNET=m CONFIG_IP_SET_HASH_NETPORT=m CONFIG_IP_SET_HASH_NETIFACE=m CONFIG_IP_SET_LIST_SET=m CONFIG_IP_VS=m CONFIG_IP_VS_IPV6=y # CONFIG_IP_VS_DEBUG is not set CONFIG_IP_VS_TAB_BITS=12 # # IPVS transport protocol load balancing support # CONFIG_IP_VS_PROTO_TCP=y CONFIG_IP_VS_PROTO_UDP=y CONFIG_IP_VS_PROTO_AH_ESP=y CONFIG_IP_VS_PROTO_ESP=y CONFIG_IP_VS_PROTO_AH=y CONFIG_IP_VS_PROTO_SCTP=y # # IPVS scheduler # CONFIG_IP_VS_RR=m CONFIG_IP_VS_WRR=m CONFIG_IP_VS_LC=m CONFIG_IP_VS_WLC=m # CONFIG_IP_VS_FO is not set # CONFIG_IP_VS_OVF is not set CONFIG_IP_VS_LBLC=m CONFIG_IP_VS_LBLCR=m CONFIG_IP_VS_DH=m CONFIG_IP_VS_SH=m # CONFIG_IP_VS_MH is not set CONFIG_IP_VS_SED=m CONFIG_IP_VS_NQ=m # # IPVS SH scheduler # CONFIG_IP_VS_SH_TAB_BITS=8 # # IPVS MH scheduler # CONFIG_IP_VS_MH_TAB_INDEX=12 # # IPVS application helper # CONFIG_IP_VS_FTP=m CONFIG_IP_VS_NFCT=y CONFIG_IP_VS_PE_SIP=m # # IP: Netfilter Configuration # CONFIG_NF_DEFRAG_IPV4=m CONFIG_NF_SOCKET_IPV4=m CONFIG_NF_TPROXY_IPV4=m # CONFIG_NF_TABLES_IPV4 is not set # CONFIG_NF_TABLES_ARP is not set CONFIG_NF_DUP_IPV4=m # CONFIG_NF_LOG_ARP is not set CONFIG_NF_LOG_IPV4=m CONFIG_NF_REJECT_IPV4=m CONFIG_NF_NAT_SNMP_BASIC=m CONFIG_NF_NAT_PPTP=m CONFIG_NF_NAT_H323=m CONFIG_IP_NF_IPTABLES=m CONFIG_IP_NF_MATCH_AH=m CONFIG_IP_NF_MATCH_ECN=m CONFIG_IP_NF_MATCH_RPFILTER=m CONFIG_IP_NF_MATCH_TTL=m CONFIG_IP_NF_FILTER=m CONFIG_IP_NF_TARGET_REJECT=m CONFIG_IP_NF_TARGET_SYNPROXY=m CONFIG_IP_NF_NAT=m CONFIG_IP_NF_TARGET_MASQUERADE=m CONFIG_IP_NF_TARGET_NETMAP=m CONFIG_IP_NF_TARGET_REDIRECT=m CONFIG_IP_NF_MANGLE=m CONFIG_IP_NF_TARGET_CLUSTERIP=m CONFIG_IP_NF_TARGET_ECN=m CONFIG_IP_NF_TARGET_TTL=m CONFIG_IP_NF_RAW=m CONFIG_IP_NF_SECURITY=m CONFIG_IP_NF_ARPTABLES=m CONFIG_IP_NF_ARPFILTER=m CONFIG_IP_NF_ARP_MANGLE=m # end of IP: Netfilter Configuration # # IPv6: Netfilter Configuration # CONFIG_NF_SOCKET_IPV6=m CONFIG_NF_TPROXY_IPV6=m # CONFIG_NF_TABLES_IPV6 is not set CONFIG_NF_DUP_IPV6=m CONFIG_NF_REJECT_IPV6=m CONFIG_NF_LOG_IPV6=m CONFIG_IP6_NF_IPTABLES=m CONFIG_IP6_NF_MATCH_AH=m CONFIG_IP6_NF_MATCH_EUI64=m CONFIG_IP6_NF_MATCH_FRAG=m CONFIG_IP6_NF_MATCH_OPTS=m CONFIG_IP6_NF_MATCH_HL=m CONFIG_IP6_NF_MATCH_IPV6HEADER=m CONFIG_IP6_NF_MATCH_MH=m CONFIG_IP6_NF_MATCH_RPFILTER=m CONFIG_IP6_NF_MATCH_RT=m # CONFIG_IP6_NF_MATCH_SRH is not set CONFIG_IP6_NF_TARGET_HL=m CONFIG_IP6_NF_FILTER=m CONFIG_IP6_NF_TARGET_REJECT=m CONFIG_IP6_NF_TARGET_SYNPROXY=m CONFIG_IP6_NF_MANGLE=m CONFIG_IP6_NF_RAW=m CONFIG_IP6_NF_SECURITY=m CONFIG_IP6_NF_NAT=m CONFIG_IP6_NF_TARGET_MASQUERADE=m CONFIG_IP6_NF_TARGET_NPT=m # end of IPv6: Netfilter Configuration CONFIG_NF_DEFRAG_IPV6=m # CONFIG_NF_TABLES_BRIDGE is not set # CONFIG_NF_CONNTRACK_BRIDGE is not set CONFIG_BRIDGE_NF_EBTABLES=m CONFIG_BRIDGE_EBT_BROUTE=m CONFIG_BRIDGE_EBT_T_FILTER=m CONFIG_BRIDGE_EBT_T_NAT=m CONFIG_BRIDGE_EBT_802_3=m CONFIG_BRIDGE_EBT_AMONG=m CONFIG_BRIDGE_EBT_ARP=m CONFIG_BRIDGE_EBT_IP=m CONFIG_BRIDGE_EBT_IP6=m CONFIG_BRIDGE_EBT_LIMIT=m CONFIG_BRIDGE_EBT_MARK=m CONFIG_BRIDGE_EBT_PKTTYPE=m CONFIG_BRIDGE_EBT_STP=m CONFIG_BRIDGE_EBT_VLAN=m CONFIG_BRIDGE_EBT_ARPREPLY=m CONFIG_BRIDGE_EBT_DNAT=m CONFIG_BRIDGE_EBT_MARK_T=m CONFIG_BRIDGE_EBT_REDIRECT=m CONFIG_BRIDGE_EBT_SNAT=m CONFIG_BRIDGE_EBT_LOG=m CONFIG_BRIDGE_EBT_NFLOG=m # CONFIG_BPFILTER is not set CONFIG_IP_DCCP=m CONFIG_INET_DCCP_DIAG=m # # DCCP CCIDs Configuration # # CONFIG_IP_DCCP_CCID2_DEBUG is not set CONFIG_IP_DCCP_CCID3=y # CONFIG_IP_DCCP_CCID3_DEBUG is not set CONFIG_IP_DCCP_TFRC_LIB=y # end of DCCP CCIDs Configuration # # DCCP Kernel Hacking # # CONFIG_IP_DCCP_DEBUG is not set # end of DCCP Kernel Hacking CONFIG_IP_SCTP=m # CONFIG_SCTP_DBG_OBJCNT is not set # CONFIG_SCTP_DEFAULT_COOKIE_HMAC_MD5 is not set CONFIG_SCTP_DEFAULT_COOKIE_HMAC_SHA1=y # CONFIG_SCTP_DEFAULT_COOKIE_HMAC_NONE is not set CONFIG_SCTP_COOKIE_HMAC_MD5=y CONFIG_SCTP_COOKIE_HMAC_SHA1=y CONFIG_INET_SCTP_DIAG=m # CONFIG_RDS is not set # CONFIG_TIPC is not set CONFIG_ATM=m CONFIG_ATM_CLIP=m # CONFIG_ATM_CLIP_NO_ICMP is not set CONFIG_ATM_LANE=m # CONFIG_ATM_MPOA is not set CONFIG_ATM_BR2684=m # CONFIG_ATM_BR2684_IPFILTER is not set CONFIG_L2TP=m CONFIG_L2TP_DEBUGFS=m CONFIG_L2TP_V3=y CONFIG_L2TP_IP=m CONFIG_L2TP_ETH=m CONFIG_STP=m CONFIG_GARP=m CONFIG_MRP=m CONFIG_BRIDGE=m CONFIG_BRIDGE_IGMP_SNOOPING=y CONFIG_BRIDGE_VLAN_FILTERING=y CONFIG_HAVE_NET_DSA=y # CONFIG_NET_DSA is not set CONFIG_VLAN_8021Q=m CONFIG_VLAN_8021Q_GVRP=y CONFIG_VLAN_8021Q_MVRP=y # CONFIG_DECNET is not set CONFIG_LLC=m # CONFIG_LLC2 is not set # CONFIG_ATALK is not set # CONFIG_X25 is not set # CONFIG_LAPB is not set # CONFIG_PHONET is not set CONFIG_6LOWPAN=m # CONFIG_6LOWPAN_DEBUGFS is not set CONFIG_6LOWPAN_NHC=m CONFIG_6LOWPAN_NHC_DEST=m CONFIG_6LOWPAN_NHC_FRAGMENT=m CONFIG_6LOWPAN_NHC_HOP=m CONFIG_6LOWPAN_NHC_IPV6=m CONFIG_6LOWPAN_NHC_MOBILITY=m CONFIG_6LOWPAN_NHC_ROUTING=m CONFIG_6LOWPAN_NHC_UDP=m # CONFIG_6LOWPAN_GHC_EXT_HDR_HOP is not set # CONFIG_6LOWPAN_GHC_UDP is not set # CONFIG_6LOWPAN_GHC_ICMPV6 is not set # CONFIG_6LOWPAN_GHC_EXT_HDR_DEST is not set # CONFIG_6LOWPAN_GHC_EXT_HDR_FRAG is not set # CONFIG_6LOWPAN_GHC_EXT_HDR_ROUTE is not set CONFIG_IEEE802154=m # CONFIG_IEEE802154_NL802154_EXPERIMENTAL is not set CONFIG_IEEE802154_SOCKET=m CONFIG_IEEE802154_6LOWPAN=m CONFIG_MAC802154=m CONFIG_NET_SCHED=y # # Queueing/Scheduling # CONFIG_NET_SCH_CBQ=m CONFIG_NET_SCH_HTB=m CONFIG_NET_SCH_HFSC=m CONFIG_NET_SCH_ATM=m CONFIG_NET_SCH_PRIO=m CONFIG_NET_SCH_MULTIQ=m CONFIG_NET_SCH_RED=m CONFIG_NET_SCH_SFB=m CONFIG_NET_SCH_SFQ=m CONFIG_NET_SCH_TEQL=m CONFIG_NET_SCH_TBF=m # CONFIG_NET_SCH_CBS is not set # CONFIG_NET_SCH_ETF is not set # CONFIG_NET_SCH_TAPRIO is not set CONFIG_NET_SCH_GRED=m CONFIG_NET_SCH_DSMARK=m CONFIG_NET_SCH_NETEM=m CONFIG_NET_SCH_DRR=m CONFIG_NET_SCH_MQPRIO=m # CONFIG_NET_SCH_SKBPRIO is not set CONFIG_NET_SCH_CHOKE=m CONFIG_NET_SCH_QFQ=m CONFIG_NET_SCH_CODEL=m CONFIG_NET_SCH_FQ_CODEL=m # CONFIG_NET_SCH_CAKE is not set CONFIG_NET_SCH_FQ=m # CONFIG_NET_SCH_HHF is not set # CONFIG_NET_SCH_PIE is not set CONFIG_NET_SCH_INGRESS=m CONFIG_NET_SCH_PLUG=m # CONFIG_NET_SCH_ETS is not set # CONFIG_NET_SCH_DEFAULT is not set # # Classification # CONFIG_NET_CLS=y CONFIG_NET_CLS_BASIC=m CONFIG_NET_CLS_TCINDEX=m CONFIG_NET_CLS_ROUTE4=m CONFIG_NET_CLS_FW=m CONFIG_NET_CLS_U32=m CONFIG_CLS_U32_PERF=y CONFIG_CLS_U32_MARK=y CONFIG_NET_CLS_RSVP=m CONFIG_NET_CLS_RSVP6=m CONFIG_NET_CLS_FLOW=m CONFIG_NET_CLS_CGROUP=y CONFIG_NET_CLS_BPF=m CONFIG_NET_CLS_FLOWER=m CONFIG_NET_CLS_MATCHALL=m CONFIG_NET_EMATCH=y CONFIG_NET_EMATCH_STACK=32 CONFIG_NET_EMATCH_CMP=m CONFIG_NET_EMATCH_NBYTE=m CONFIG_NET_EMATCH_U32=m CONFIG_NET_EMATCH_META=m CONFIG_NET_EMATCH_TEXT=m # CONFIG_NET_EMATCH_CANID is not set CONFIG_NET_EMATCH_IPSET=m # CONFIG_NET_EMATCH_IPT is not set CONFIG_NET_CLS_ACT=y CONFIG_NET_ACT_POLICE=m CONFIG_NET_ACT_GACT=m CONFIG_GACT_PROB=y CONFIG_NET_ACT_MIRRED=m CONFIG_NET_ACT_SAMPLE=m CONFIG_NET_ACT_IPT=m CONFIG_NET_ACT_NAT=m CONFIG_NET_ACT_PEDIT=m CONFIG_NET_ACT_SIMP=m CONFIG_NET_ACT_SKBEDIT=m CONFIG_NET_ACT_CSUM=m # CONFIG_NET_ACT_MPLS is not set CONFIG_NET_ACT_VLAN=m # CONFIG_NET_ACT_BPF is not set CONFIG_NET_ACT_CONNMARK=m # CONFIG_NET_ACT_CTINFO is not set CONFIG_NET_ACT_SKBMOD=m # CONFIG_NET_ACT_IFE is not set CONFIG_NET_ACT_TUNNEL_KEY=m # CONFIG_NET_ACT_CT is not set # CONFIG_NET_TC_SKB_EXT is not set CONFIG_NET_SCH_FIFO=y CONFIG_DCB=y CONFIG_DNS_RESOLVER=m # CONFIG_BATMAN_ADV is not set CONFIG_OPENVSWITCH=m CONFIG_OPENVSWITCH_GRE=m CONFIG_OPENVSWITCH_VXLAN=m CONFIG_OPENVSWITCH_GENEVE=m CONFIG_VSOCKETS=m CONFIG_VSOCKETS_DIAG=m CONFIG_VSOCKETS_LOOPBACK=m CONFIG_VMWARE_VMCI_VSOCKETS=m CONFIG_VIRTIO_VSOCKETS=m CONFIG_VIRTIO_VSOCKETS_COMMON=m CONFIG_HYPERV_VSOCKETS=m CONFIG_NETLINK_DIAG=m CONFIG_MPLS=y CONFIG_NET_MPLS_GSO=y CONFIG_MPLS_ROUTING=m CONFIG_MPLS_IPTUNNEL=m CONFIG_NET_NSH=m # CONFIG_HSR is not set CONFIG_NET_SWITCHDEV=y CONFIG_NET_L3_MASTER_DEV=y # CONFIG_NET_NCSI is not set CONFIG_RPS=y CONFIG_RFS_ACCEL=y CONFIG_XPS=y # CONFIG_CGROUP_NET_PRIO is not set CONFIG_CGROUP_NET_CLASSID=y CONFIG_NET_RX_BUSY_POLL=y CONFIG_BQL=y CONFIG_BPF_JIT=y CONFIG_BPF_STREAM_PARSER=y CONFIG_NET_FLOW_LIMIT=y # # Network testing # CONFIG_NET_PKTGEN=m CONFIG_NET_DROP_MONITOR=y # end of Network testing # end of Networking options # CONFIG_HAMRADIO is not set CONFIG_CAN=m CONFIG_CAN_RAW=m CONFIG_CAN_BCM=m CONFIG_CAN_GW=m # CONFIG_CAN_J1939 is not set # # CAN Device Drivers # CONFIG_CAN_VCAN=m # CONFIG_CAN_VXCAN is not set CONFIG_CAN_SLCAN=m CONFIG_CAN_DEV=m CONFIG_CAN_CALC_BITTIMING=y # CONFIG_CAN_KVASER_PCIEFD is not set CONFIG_CAN_C_CAN=m CONFIG_CAN_C_CAN_PLATFORM=m CONFIG_CAN_C_CAN_PCI=m CONFIG_CAN_CC770=m # CONFIG_CAN_CC770_ISA is not set CONFIG_CAN_CC770_PLATFORM=m # CONFIG_CAN_IFI_CANFD is not set # CONFIG_CAN_M_CAN is not set # CONFIG_CAN_PEAK_PCIEFD is not set CONFIG_CAN_SJA1000=m CONFIG_CAN_EMS_PCI=m # CONFIG_CAN_F81601 is not set CONFIG_CAN_KVASER_PCI=m CONFIG_CAN_PEAK_PCI=m CONFIG_CAN_PEAK_PCIEC=y CONFIG_CAN_PLX_PCI=m # CONFIG_CAN_SJA1000_ISA is not set CONFIG_CAN_SJA1000_PLATFORM=m CONFIG_CAN_SOFTING=m # # CAN SPI interfaces # # CONFIG_CAN_HI311X is not set # CONFIG_CAN_MCP251X is not set # end of CAN SPI interfaces # # CAN USB interfaces # CONFIG_CAN_8DEV_USB=m CONFIG_CAN_EMS_USB=m CONFIG_CAN_ESD_USB2=m # CONFIG_CAN_GS_USB is not set CONFIG_CAN_KVASER_USB=m # CONFIG_CAN_MCBA_USB is not set CONFIG_CAN_PEAK_USB=m # CONFIG_CAN_UCAN is not set # end of CAN USB interfaces # CONFIG_CAN_DEBUG_DEVICES is not set # end of CAN Device Drivers CONFIG_BT=m CONFIG_BT_BREDR=y CONFIG_BT_RFCOMM=m CONFIG_BT_RFCOMM_TTY=y CONFIG_BT_BNEP=m CONFIG_BT_BNEP_MC_FILTER=y CONFIG_BT_BNEP_PROTO_FILTER=y CONFIG_BT_CMTP=m CONFIG_BT_HIDP=m CONFIG_BT_HS=y CONFIG_BT_LE=y # CONFIG_BT_6LOWPAN is not set # CONFIG_BT_LEDS is not set # CONFIG_BT_SELFTEST is not set CONFIG_BT_DEBUGFS=y # # Bluetooth device drivers # CONFIG_BT_INTEL=m CONFIG_BT_BCM=m CONFIG_BT_RTL=m CONFIG_BT_HCIBTUSB=m # CONFIG_BT_HCIBTUSB_AUTOSUSPEND is not set CONFIG_BT_HCIBTUSB_BCM=y # CONFIG_BT_HCIBTUSB_MTK is not set CONFIG_BT_HCIBTUSB_RTL=y CONFIG_BT_HCIBTSDIO=m CONFIG_BT_HCIUART=m CONFIG_BT_HCIUART_H4=y CONFIG_BT_HCIUART_BCSP=y CONFIG_BT_HCIUART_ATH3K=y # CONFIG_BT_HCIUART_INTEL is not set # CONFIG_BT_HCIUART_AG6XX is not set CONFIG_BT_HCIBCM203X=m CONFIG_BT_HCIBPA10X=m CONFIG_BT_HCIBFUSB=m CONFIG_BT_HCIVHCI=m CONFIG_BT_MRVL=m CONFIG_BT_MRVL_SDIO=m CONFIG_BT_ATH3K=m # CONFIG_BT_MTKSDIO is not set # end of Bluetooth device drivers # CONFIG_AF_RXRPC is not set # CONFIG_AF_KCM is not set CONFIG_STREAM_PARSER=y CONFIG_FIB_RULES=y CONFIG_WIRELESS=y CONFIG_WIRELESS_EXT=y CONFIG_WEXT_CORE=y CONFIG_WEXT_PROC=y CONFIG_WEXT_PRIV=y CONFIG_CFG80211=m # CONFIG_NL80211_TESTMODE is not set # CONFIG_CFG80211_DEVELOPER_WARNINGS is not set # CONFIG_CFG80211_CERTIFICATION_ONUS is not set CONFIG_CFG80211_REQUIRE_SIGNED_REGDB=y CONFIG_CFG80211_USE_KERNEL_REGDB_KEYS=y CONFIG_CFG80211_DEFAULT_PS=y # CONFIG_CFG80211_DEBUGFS is not set CONFIG_CFG80211_CRDA_SUPPORT=y CONFIG_CFG80211_WEXT=y CONFIG_LIB80211=m # CONFIG_LIB80211_DEBUG is not set CONFIG_MAC80211=m CONFIG_MAC80211_HAS_RC=y CONFIG_MAC80211_RC_MINSTREL=y CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" CONFIG_MAC80211_MESH=y CONFIG_MAC80211_LEDS=y CONFIG_MAC80211_DEBUGFS=y # CONFIG_MAC80211_MESSAGE_TRACING is not set # CONFIG_MAC80211_DEBUG_MENU is not set CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 # CONFIG_WIMAX is not set CONFIG_RFKILL=m CONFIG_RFKILL_LEDS=y CONFIG_RFKILL_INPUT=y # CONFIG_RFKILL_GPIO is not set CONFIG_NET_9P=y CONFIG_NET_9P_VIRTIO=y # CONFIG_NET_9P_XEN is not set # CONFIG_NET_9P_DEBUG is not set # CONFIG_CAIF is not set CONFIG_CEPH_LIB=m # CONFIG_CEPH_LIB_PRETTYDEBUG is not set CONFIG_CEPH_LIB_USE_DNS_RESOLVER=y # CONFIG_NFC is not set CONFIG_PSAMPLE=m # CONFIG_NET_IFE is not set CONFIG_LWTUNNEL=y CONFIG_LWTUNNEL_BPF=y CONFIG_DST_CACHE=y CONFIG_GRO_CELLS=y CONFIG_NET_SOCK_MSG=y CONFIG_NET_DEVLINK=y CONFIG_PAGE_POOL=y CONFIG_FAILOVER=m CONFIG_ETHTOOL_NETLINK=y CONFIG_HAVE_EBPF_JIT=y # # Device Drivers # CONFIG_HAVE_EISA=y # CONFIG_EISA is not set CONFIG_HAVE_PCI=y CONFIG_PCI=y CONFIG_PCI_DOMAINS=y CONFIG_PCIEPORTBUS=y CONFIG_HOTPLUG_PCI_PCIE=y CONFIG_PCIEAER=y CONFIG_PCIEAER_INJECT=m CONFIG_PCIE_ECRC=y CONFIG_PCIEASPM=y CONFIG_PCIEASPM_DEFAULT=y # CONFIG_PCIEASPM_POWERSAVE is not set # CONFIG_PCIEASPM_POWER_SUPERSAVE is not set # CONFIG_PCIEASPM_PERFORMANCE is not set CONFIG_PCIE_PME=y # CONFIG_PCIE_DPC is not set # CONFIG_PCIE_PTM is not set # CONFIG_PCIE_BW is not set CONFIG_PCI_MSI=y CONFIG_PCI_MSI_IRQ_DOMAIN=y CONFIG_PCI_QUIRKS=y # CONFIG_PCI_DEBUG is not set # CONFIG_PCI_REALLOC_ENABLE_AUTO is not set CONFIG_PCI_STUB=y # CONFIG_PCI_PF_STUB is not set # CONFIG_XEN_PCIDEV_FRONTEND is not set CONFIG_PCI_ATS=y CONFIG_PCI_LOCKLESS_CONFIG=y CONFIG_PCI_IOV=y CONFIG_PCI_PRI=y CONFIG_PCI_PASID=y # CONFIG_PCI_P2PDMA is not set CONFIG_PCI_LABEL=y CONFIG_PCI_HYPERV=m CONFIG_HOTPLUG_PCI=y CONFIG_HOTPLUG_PCI_ACPI=y CONFIG_HOTPLUG_PCI_ACPI_IBM=m # CONFIG_HOTPLUG_PCI_CPCI is not set CONFIG_HOTPLUG_PCI_SHPC=y # # PCI controller drivers # CONFIG_VMD=y CONFIG_PCI_HYPERV_INTERFACE=m # # DesignWare PCI Core Support # # CONFIG_PCIE_DW_PLAT_HOST is not set # CONFIG_PCI_MESON is not set # end of DesignWare PCI Core Support # # Cadence PCIe controllers support # # end of Cadence PCIe controllers support # end of PCI controller drivers # # PCI Endpoint # # CONFIG_PCI_ENDPOINT is not set # end of PCI Endpoint # # PCI switch controller drivers # # CONFIG_PCI_SW_SWITCHTEC is not set # end of PCI switch controller drivers CONFIG_PCCARD=y # CONFIG_PCMCIA is not set CONFIG_CARDBUS=y # # PC-card bridges # CONFIG_YENTA=m CONFIG_YENTA_O2=y CONFIG_YENTA_RICOH=y CONFIG_YENTA_TI=y CONFIG_YENTA_ENE_TUNE=y CONFIG_YENTA_TOSHIBA=y # CONFIG_RAPIDIO is not set # # Generic Driver Options # CONFIG_UEVENT_HELPER=y CONFIG_UEVENT_HELPER_PATH="" CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y # # Firmware loader # CONFIG_FW_LOADER=y CONFIG_FW_LOADER_PAGED_BUF=y CONFIG_EXTRA_FIRMWARE="" CONFIG_FW_LOADER_USER_HELPER=y # CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set # CONFIG_FW_LOADER_COMPRESS is not set CONFIG_FW_CACHE=y # end of Firmware loader CONFIG_WANT_DEV_COREDUMP=y CONFIG_ALLOW_DEV_COREDUMP=y CONFIG_DEV_COREDUMP=y # CONFIG_DEBUG_DRIVER is not set # CONFIG_DEBUG_DEVRES is not set # CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set # CONFIG_TEST_ASYNC_DRIVER_PROBE is not set CONFIG_SYS_HYPERVISOR=y CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_CPU_VULNERABILITIES=y CONFIG_REGMAP=y CONFIG_REGMAP_I2C=m CONFIG_REGMAP_SPI=m CONFIG_REGMAP_IRQ=y CONFIG_DMA_SHARED_BUFFER=y # CONFIG_DMA_FENCE_TRACE is not set # end of Generic Driver Options # # Bus devices # # end of Bus devices CONFIG_CONNECTOR=y CONFIG_PROC_EVENTS=y # CONFIG_GNSS is not set CONFIG_MTD=m # CONFIG_MTD_TESTS is not set # # Partition parsers # # CONFIG_MTD_AR7_PARTS is not set # CONFIG_MTD_CMDLINE_PARTS is not set # CONFIG_MTD_REDBOOT_PARTS is not set # end of Partition parsers # # User Modules And Translation Layers # CONFIG_MTD_BLKDEVS=m CONFIG_MTD_BLOCK=m # CONFIG_MTD_BLOCK_RO is not set # CONFIG_FTL is not set # CONFIG_NFTL is not set # CONFIG_INFTL is not set # CONFIG_RFD_FTL is not set # CONFIG_SSFDC is not set # CONFIG_SM_FTL is not set # CONFIG_MTD_OOPS is not set # CONFIG_MTD_SWAP is not set # CONFIG_MTD_PARTITIONED_MASTER is not set # # RAM/ROM/Flash chip drivers # # CONFIG_MTD_CFI is not set # CONFIG_MTD_JEDECPROBE is not set CONFIG_MTD_MAP_BANK_WIDTH_1=y CONFIG_MTD_MAP_BANK_WIDTH_2=y CONFIG_MTD_MAP_BANK_WIDTH_4=y CONFIG_MTD_CFI_I1=y CONFIG_MTD_CFI_I2=y # CONFIG_MTD_RAM is not set # CONFIG_MTD_ROM is not set # CONFIG_MTD_ABSENT is not set # end of RAM/ROM/Flash chip drivers # # Mapping drivers for chip access # # CONFIG_MTD_COMPLEX_MAPPINGS is not set # CONFIG_MTD_INTEL_VR_NOR is not set # CONFIG_MTD_PLATRAM is not set # end of Mapping drivers for chip access # # Self-contained MTD device drivers # # CONFIG_MTD_PMC551 is not set # CONFIG_MTD_DATAFLASH is not set # CONFIG_MTD_MCHP23K256 is not set # CONFIG_MTD_SST25L is not set # CONFIG_MTD_SLRAM is not set # CONFIG_MTD_PHRAM is not set # CONFIG_MTD_MTDRAM is not set # CONFIG_MTD_BLOCK2MTD is not set # # Disk-On-Chip Device Drivers # # CONFIG_MTD_DOCG3 is not set # end of Self-contained MTD device drivers # CONFIG_MTD_ONENAND is not set # CONFIG_MTD_RAW_NAND is not set # CONFIG_MTD_SPI_NAND is not set # # LPDDR & LPDDR2 PCM memory drivers # # CONFIG_MTD_LPDDR is not set # end of LPDDR & LPDDR2 PCM memory drivers # CONFIG_MTD_SPI_NOR is not set CONFIG_MTD_UBI=m CONFIG_MTD_UBI_WL_THRESHOLD=4096 CONFIG_MTD_UBI_BEB_LIMIT=20 # CONFIG_MTD_UBI_FASTMAP is not set # CONFIG_MTD_UBI_GLUEBI is not set # CONFIG_MTD_UBI_BLOCK is not set # CONFIG_MTD_HYPERBUS is not set # CONFIG_OF is not set CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y CONFIG_PARPORT=m CONFIG_PARPORT_PC=m CONFIG_PARPORT_SERIAL=m # CONFIG_PARPORT_PC_FIFO is not set # CONFIG_PARPORT_PC_SUPERIO is not set # CONFIG_PARPORT_AX88796 is not set CONFIG_PARPORT_1284=y CONFIG_PARPORT_NOT_PC=y CONFIG_PNP=y # CONFIG_PNP_DEBUG_MESSAGES is not set # # Protocols # CONFIG_PNPACPI=y CONFIG_BLK_DEV=y CONFIG_BLK_DEV_NULL_BLK=m CONFIG_BLK_DEV_NULL_BLK_FAULT_INJECTION=y CONFIG_BLK_DEV_FD=m CONFIG_CDROM=m # CONFIG_PARIDE is not set CONFIG_BLK_DEV_PCIESSD_MTIP32XX=m # CONFIG_ZRAM is not set # CONFIG_BLK_DEV_UMEM is not set CONFIG_BLK_DEV_LOOP=m CONFIG_BLK_DEV_LOOP_MIN_COUNT=0 # CONFIG_BLK_DEV_CRYPTOLOOP is not set # CONFIG_BLK_DEV_DRBD is not set CONFIG_BLK_DEV_NBD=m # CONFIG_BLK_DEV_SKD is not set CONFIG_BLK_DEV_SX8=m CONFIG_BLK_DEV_RAM=m CONFIG_BLK_DEV_RAM_COUNT=16 CONFIG_BLK_DEV_RAM_SIZE=16384 CONFIG_CDROM_PKTCDVD=m CONFIG_CDROM_PKTCDVD_BUFFERS=8 # CONFIG_CDROM_PKTCDVD_WCACHE is not set CONFIG_ATA_OVER_ETH=m CONFIG_XEN_BLKDEV_FRONTEND=m CONFIG_VIRTIO_BLK=y CONFIG_BLK_DEV_RBD=m # CONFIG_BLK_DEV_RSXX is not set # # NVME Support # CONFIG_NVME_CORE=m CONFIG_BLK_DEV_NVME=m CONFIG_NVME_MULTIPATH=y # CONFIG_NVME_HWMON is not set CONFIG_NVME_FABRICS=m CONFIG_NVME_FC=m # CONFIG_NVME_TCP is not set CONFIG_NVME_TARGET=m CONFIG_NVME_TARGET_LOOP=m CONFIG_NVME_TARGET_FC=m CONFIG_NVME_TARGET_FCLOOP=m # CONFIG_NVME_TARGET_TCP is not set # end of NVME Support # # Misc devices # CONFIG_SENSORS_LIS3LV02D=m # CONFIG_AD525X_DPOT is not set # CONFIG_DUMMY_IRQ is not set # CONFIG_IBM_ASM is not set # CONFIG_PHANTOM is not set CONFIG_TIFM_CORE=m CONFIG_TIFM_7XX1=m # CONFIG_ICS932S401 is not set CONFIG_ENCLOSURE_SERVICES=m CONFIG_SGI_XP=m CONFIG_HP_ILO=m CONFIG_SGI_GRU=m # CONFIG_SGI_GRU_DEBUG is not set CONFIG_APDS9802ALS=m CONFIG_ISL29003=m CONFIG_ISL29020=m CONFIG_SENSORS_TSL2550=m CONFIG_SENSORS_BH1770=m CONFIG_SENSORS_APDS990X=m # CONFIG_HMC6352 is not set # CONFIG_DS1682 is not set CONFIG_VMWARE_BALLOON=m # CONFIG_LATTICE_ECP3_CONFIG is not set # CONFIG_SRAM is not set # CONFIG_PCI_ENDPOINT_TEST is not set # CONFIG_XILINX_SDFEC is not set CONFIG_PVPANIC=y # CONFIG_C2PORT is not set # # EEPROM support # CONFIG_EEPROM_AT24=m # CONFIG_EEPROM_AT25 is not set CONFIG_EEPROM_LEGACY=m CONFIG_EEPROM_MAX6875=m CONFIG_EEPROM_93CX6=m # CONFIG_EEPROM_93XX46 is not set # CONFIG_EEPROM_IDT_89HPESX is not set # CONFIG_EEPROM_EE1004 is not set # end of EEPROM support CONFIG_CB710_CORE=m # CONFIG_CB710_DEBUG is not set CONFIG_CB710_DEBUG_ASSUMPTIONS=y # # Texas Instruments shared transport line discipline # # CONFIG_TI_ST is not set # end of Texas Instruments shared transport line discipline CONFIG_SENSORS_LIS3_I2C=m CONFIG_ALTERA_STAPL=m CONFIG_INTEL_MEI=m CONFIG_INTEL_MEI_ME=m # CONFIG_INTEL_MEI_TXE is not set # CONFIG_INTEL_MEI_HDCP is not set CONFIG_VMWARE_VMCI=m # # Intel MIC & related support # # CONFIG_INTEL_MIC_BUS is not set # CONFIG_SCIF_BUS is not set # CONFIG_VOP_BUS is not set # end of Intel MIC & related support # CONFIG_GENWQE is not set # CONFIG_ECHO is not set # CONFIG_MISC_ALCOR_PCI is not set # CONFIG_MISC_RTSX_PCI is not set # CONFIG_MISC_RTSX_USB is not set # CONFIG_HABANA_AI is not set # end of Misc devices CONFIG_HAVE_IDE=y # CONFIG_IDE is not set # # SCSI device support # CONFIG_SCSI_MOD=y CONFIG_RAID_ATTRS=m CONFIG_SCSI=y CONFIG_SCSI_DMA=y CONFIG_SCSI_NETLINK=y CONFIG_SCSI_PROC_FS=y # # SCSI support type (disk, tape, CD-ROM) # CONFIG_BLK_DEV_SD=m CONFIG_CHR_DEV_ST=m CONFIG_BLK_DEV_SR=m CONFIG_BLK_DEV_SR_VENDOR=y CONFIG_CHR_DEV_SG=m CONFIG_CHR_DEV_SCH=m CONFIG_SCSI_ENCLOSURE=m CONFIG_SCSI_CONSTANTS=y CONFIG_SCSI_LOGGING=y CONFIG_SCSI_SCAN_ASYNC=y # # SCSI Transports # CONFIG_SCSI_SPI_ATTRS=m CONFIG_SCSI_FC_ATTRS=m CONFIG_SCSI_ISCSI_ATTRS=m CONFIG_SCSI_SAS_ATTRS=m CONFIG_SCSI_SAS_LIBSAS=m CONFIG_SCSI_SAS_ATA=y CONFIG_SCSI_SAS_HOST_SMP=y CONFIG_SCSI_SRP_ATTRS=m # end of SCSI Transports CONFIG_SCSI_LOWLEVEL=y CONFIG_ISCSI_TCP=m CONFIG_ISCSI_BOOT_SYSFS=m CONFIG_SCSI_CXGB3_ISCSI=m CONFIG_SCSI_CXGB4_ISCSI=m CONFIG_SCSI_BNX2_ISCSI=m CONFIG_SCSI_BNX2X_FCOE=m CONFIG_BE2ISCSI=m # CONFIG_BLK_DEV_3W_XXXX_RAID is not set CONFIG_SCSI_HPSA=m CONFIG_SCSI_3W_9XXX=m CONFIG_SCSI_3W_SAS=m # CONFIG_SCSI_ACARD is not set CONFIG_SCSI_AACRAID=m # CONFIG_SCSI_AIC7XXX is not set CONFIG_SCSI_AIC79XX=m CONFIG_AIC79XX_CMDS_PER_DEVICE=4 CONFIG_AIC79XX_RESET_DELAY_MS=15000 # CONFIG_AIC79XX_DEBUG_ENABLE is not set CONFIG_AIC79XX_DEBUG_MASK=0 # CONFIG_AIC79XX_REG_PRETTY_PRINT is not set # CONFIG_SCSI_AIC94XX is not set CONFIG_SCSI_MVSAS=m # CONFIG_SCSI_MVSAS_DEBUG is not set CONFIG_SCSI_MVSAS_TASKLET=y CONFIG_SCSI_MVUMI=m # CONFIG_SCSI_DPT_I2O is not set # CONFIG_SCSI_ADVANSYS is not set CONFIG_SCSI_ARCMSR=m # CONFIG_SCSI_ESAS2R is not set # CONFIG_MEGARAID_NEWGEN is not set # CONFIG_MEGARAID_LEGACY is not set CONFIG_MEGARAID_SAS=m CONFIG_SCSI_MPT3SAS=m CONFIG_SCSI_MPT2SAS_MAX_SGE=128 CONFIG_SCSI_MPT3SAS_MAX_SGE=128 CONFIG_SCSI_MPT2SAS=m # CONFIG_SCSI_SMARTPQI is not set CONFIG_SCSI_UFSHCD=m CONFIG_SCSI_UFSHCD_PCI=m # CONFIG_SCSI_UFS_DWC_TC_PCI is not set # CONFIG_SCSI_UFSHCD_PLATFORM is not set # CONFIG_SCSI_UFS_BSG is not set CONFIG_SCSI_HPTIOP=m # CONFIG_SCSI_BUSLOGIC is not set # CONFIG_SCSI_MYRB is not set # CONFIG_SCSI_MYRS is not set CONFIG_VMWARE_PVSCSI=m # CONFIG_XEN_SCSI_FRONTEND is not set CONFIG_HYPERV_STORAGE=m CONFIG_LIBFC=m CONFIG_LIBFCOE=m CONFIG_FCOE=m CONFIG_FCOE_FNIC=m # CONFIG_SCSI_SNIC is not set # CONFIG_SCSI_DMX3191D is not set # CONFIG_SCSI_FDOMAIN_PCI is not set # CONFIG_SCSI_GDTH is not set CONFIG_SCSI_ISCI=m # CONFIG_SCSI_IPS is not set CONFIG_SCSI_INITIO=m # CONFIG_SCSI_INIA100 is not set # CONFIG_SCSI_PPA is not set # CONFIG_SCSI_IMM is not set CONFIG_SCSI_STEX=m # CONFIG_SCSI_SYM53C8XX_2 is not set # CONFIG_SCSI_IPR is not set # CONFIG_SCSI_QLOGIC_1280 is not set CONFIG_SCSI_QLA_FC=m CONFIG_TCM_QLA2XXX=m # CONFIG_TCM_QLA2XXX_DEBUG is not set CONFIG_SCSI_QLA_ISCSI=m # CONFIG_QEDI is not set # CONFIG_QEDF is not set # CONFIG_SCSI_LPFC is not set # CONFIG_SCSI_DC395x is not set # CONFIG_SCSI_AM53C974 is not set # CONFIG_SCSI_WD719X is not set CONFIG_SCSI_DEBUG=m CONFIG_SCSI_PMCRAID=m CONFIG_SCSI_PM8001=m # CONFIG_SCSI_BFA_FC is not set CONFIG_SCSI_VIRTIO=m # CONFIG_SCSI_CHELSIO_FCOE is not set CONFIG_SCSI_DH=y CONFIG_SCSI_DH_RDAC=y CONFIG_SCSI_DH_HP_SW=y CONFIG_SCSI_DH_EMC=y CONFIG_SCSI_DH_ALUA=y # end of SCSI device support CONFIG_ATA=m CONFIG_ATA_VERBOSE_ERROR=y CONFIG_ATA_ACPI=y # CONFIG_SATA_ZPODD is not set CONFIG_SATA_PMP=y # # Controllers with non-SFF native interface # CONFIG_SATA_AHCI=m CONFIG_SATA_MOBILE_LPM_POLICY=0 CONFIG_SATA_AHCI_PLATFORM=m # CONFIG_SATA_INIC162X is not set CONFIG_SATA_ACARD_AHCI=m CONFIG_SATA_SIL24=m CONFIG_ATA_SFF=y # # SFF controllers with custom DMA interface # CONFIG_PDC_ADMA=m CONFIG_SATA_QSTOR=m CONFIG_SATA_SX4=m CONFIG_ATA_BMDMA=y # # SATA SFF controllers with BMDMA # CONFIG_ATA_PIIX=m # CONFIG_SATA_DWC is not set CONFIG_SATA_MV=m CONFIG_SATA_NV=m CONFIG_SATA_PROMISE=m CONFIG_SATA_SIL=m CONFIG_SATA_SIS=m CONFIG_SATA_SVW=m CONFIG_SATA_ULI=m CONFIG_SATA_VIA=m CONFIG_SATA_VITESSE=m # # PATA SFF controllers with BMDMA # CONFIG_PATA_ALI=m CONFIG_PATA_AMD=m CONFIG_PATA_ARTOP=m CONFIG_PATA_ATIIXP=m CONFIG_PATA_ATP867X=m CONFIG_PATA_CMD64X=m # CONFIG_PATA_CYPRESS is not set # CONFIG_PATA_EFAR is not set CONFIG_PATA_HPT366=m CONFIG_PATA_HPT37X=m CONFIG_PATA_HPT3X2N=m CONFIG_PATA_HPT3X3=m # CONFIG_PATA_HPT3X3_DMA is not set CONFIG_PATA_IT8213=m CONFIG_PATA_IT821X=m CONFIG_PATA_JMICRON=m CONFIG_PATA_MARVELL=m CONFIG_PATA_NETCELL=m CONFIG_PATA_NINJA32=m # CONFIG_PATA_NS87415 is not set CONFIG_PATA_OLDPIIX=m # CONFIG_PATA_OPTIDMA is not set CONFIG_PATA_PDC2027X=m CONFIG_PATA_PDC_OLD=m # CONFIG_PATA_RADISYS is not set CONFIG_PATA_RDC=m CONFIG_PATA_SCH=m CONFIG_PATA_SERVERWORKS=m CONFIG_PATA_SIL680=m CONFIG_PATA_SIS=m CONFIG_PATA_TOSHIBA=m # CONFIG_PATA_TRIFLEX is not set CONFIG_PATA_VIA=m # CONFIG_PATA_WINBOND is not set # # PIO-only SFF controllers # # CONFIG_PATA_CMD640_PCI is not set # CONFIG_PATA_MPIIX is not set # CONFIG_PATA_NS87410 is not set # CONFIG_PATA_OPTI is not set # CONFIG_PATA_PLATFORM is not set # CONFIG_PATA_RZ1000 is not set # # Generic fallback / legacy drivers # CONFIG_PATA_ACPI=m CONFIG_ATA_GENERIC=m # CONFIG_PATA_LEGACY is not set CONFIG_MD=y CONFIG_BLK_DEV_MD=y CONFIG_MD_AUTODETECT=y CONFIG_MD_LINEAR=m CONFIG_MD_RAID0=m CONFIG_MD_RAID1=m CONFIG_MD_RAID10=m CONFIG_MD_RAID456=m CONFIG_MD_MULTIPATH=m CONFIG_MD_FAULTY=m # CONFIG_MD_CLUSTER is not set # CONFIG_BCACHE is not set CONFIG_BLK_DEV_DM_BUILTIN=y CONFIG_BLK_DEV_DM=m CONFIG_DM_DEBUG=y CONFIG_DM_BUFIO=m # CONFIG_DM_DEBUG_BLOCK_MANAGER_LOCKING is not set CONFIG_DM_BIO_PRISON=m CONFIG_DM_PERSISTENT_DATA=m # CONFIG_DM_UNSTRIPED is not set CONFIG_DM_CRYPT=m CONFIG_DM_SNAPSHOT=m CONFIG_DM_THIN_PROVISIONING=m CONFIG_DM_CACHE=m CONFIG_DM_CACHE_SMQ=m # CONFIG_DM_WRITECACHE is not set CONFIG_DM_ERA=m # CONFIG_DM_CLONE is not set CONFIG_DM_MIRROR=m CONFIG_DM_LOG_USERSPACE=m CONFIG_DM_RAID=m CONFIG_DM_ZERO=m CONFIG_DM_MULTIPATH=m CONFIG_DM_MULTIPATH_QL=m CONFIG_DM_MULTIPATH_ST=m CONFIG_DM_DELAY=m # CONFIG_DM_DUST is not set CONFIG_DM_UEVENT=y CONFIG_DM_FLAKEY=m CONFIG_DM_VERITY=m # CONFIG_DM_VERITY_VERIFY_ROOTHASH_SIG is not set # CONFIG_DM_VERITY_FEC is not set CONFIG_DM_SWITCH=m CONFIG_DM_LOG_WRITES=m # CONFIG_DM_INTEGRITY is not set # CONFIG_DM_ZONED is not set CONFIG_TARGET_CORE=m CONFIG_TCM_IBLOCK=m CONFIG_TCM_FILEIO=m CONFIG_TCM_PSCSI=m CONFIG_TCM_USER2=m CONFIG_LOOPBACK_TARGET=m CONFIG_TCM_FC=m CONFIG_ISCSI_TARGET=m CONFIG_ISCSI_TARGET_CXGB4=m # CONFIG_SBP_TARGET is not set CONFIG_FUSION=y CONFIG_FUSION_SPI=m # CONFIG_FUSION_FC is not set CONFIG_FUSION_SAS=m CONFIG_FUSION_MAX_SGE=128 CONFIG_FUSION_CTL=m CONFIG_FUSION_LOGGING=y # # IEEE 1394 (FireWire) support # CONFIG_FIREWIRE=m CONFIG_FIREWIRE_OHCI=m CONFIG_FIREWIRE_SBP2=m CONFIG_FIREWIRE_NET=m # CONFIG_FIREWIRE_NOSY is not set # end of IEEE 1394 (FireWire) support CONFIG_MACINTOSH_DRIVERS=y CONFIG_MAC_EMUMOUSEBTN=y CONFIG_NETDEVICES=y CONFIG_MII=y CONFIG_NET_CORE=y CONFIG_BONDING=m CONFIG_DUMMY=m # CONFIG_WIREGUARD is not set # CONFIG_EQUALIZER is not set CONFIG_NET_FC=y CONFIG_IFB=m CONFIG_NET_TEAM=m CONFIG_NET_TEAM_MODE_BROADCAST=m CONFIG_NET_TEAM_MODE_ROUNDROBIN=m CONFIG_NET_TEAM_MODE_RANDOM=m CONFIG_NET_TEAM_MODE_ACTIVEBACKUP=m CONFIG_NET_TEAM_MODE_LOADBALANCE=m CONFIG_MACVLAN=m CONFIG_MACVTAP=m # CONFIG_IPVLAN is not set CONFIG_VXLAN=m CONFIG_GENEVE=m # CONFIG_GTP is not set CONFIG_MACSEC=y CONFIG_NETCONSOLE=m CONFIG_NETCONSOLE_DYNAMIC=y CONFIG_NETPOLL=y CONFIG_NET_POLL_CONTROLLER=y CONFIG_NTB_NETDEV=m CONFIG_TUN=m CONFIG_TAP=m # CONFIG_TUN_VNET_CROSS_LE is not set CONFIG_VETH=m CONFIG_VIRTIO_NET=m CONFIG_NLMON=m CONFIG_NET_VRF=y CONFIG_VSOCKMON=m # CONFIG_ARCNET is not set # CONFIG_ATM_DRIVERS is not set # # Distributed Switch Architecture drivers # # end of Distributed Switch Architecture drivers CONFIG_ETHERNET=y CONFIG_MDIO=y # CONFIG_NET_VENDOR_3COM is not set # CONFIG_NET_VENDOR_ADAPTEC is not set CONFIG_NET_VENDOR_AGERE=y # CONFIG_ET131X is not set CONFIG_NET_VENDOR_ALACRITECH=y # CONFIG_SLICOSS is not set # CONFIG_NET_VENDOR_ALTEON is not set # CONFIG_ALTERA_TSE is not set CONFIG_NET_VENDOR_AMAZON=y CONFIG_ENA_ETHERNET=m CONFIG_NET_VENDOR_AMD=y CONFIG_AMD8111_ETH=m CONFIG_PCNET32=m CONFIG_AMD_XGBE=m # CONFIG_AMD_XGBE_DCB is not set CONFIG_AMD_XGBE_HAVE_ECC=y CONFIG_NET_VENDOR_AQUANTIA=y CONFIG_AQTION=m CONFIG_NET_VENDOR_ARC=y CONFIG_NET_VENDOR_ATHEROS=y CONFIG_ATL2=m CONFIG_ATL1=m CONFIG_ATL1E=m CONFIG_ATL1C=m CONFIG_ALX=m CONFIG_NET_VENDOR_AURORA=y # CONFIG_AURORA_NB8800 is not set CONFIG_NET_VENDOR_BROADCOM=y CONFIG_B44=m CONFIG_B44_PCI_AUTOSELECT=y CONFIG_B44_PCICORE_AUTOSELECT=y CONFIG_B44_PCI=y # CONFIG_BCMGENET is not set CONFIG_BNX2=m CONFIG_CNIC=m CONFIG_TIGON3=y CONFIG_TIGON3_HWMON=y CONFIG_BNX2X=m CONFIG_BNX2X_SRIOV=y # CONFIG_SYSTEMPORT is not set CONFIG_BNXT=m CONFIG_BNXT_SRIOV=y CONFIG_BNXT_FLOWER_OFFLOAD=y CONFIG_BNXT_DCB=y CONFIG_BNXT_HWMON=y CONFIG_NET_VENDOR_BROCADE=y CONFIG_BNA=m CONFIG_NET_VENDOR_CADENCE=y CONFIG_MACB=m CONFIG_MACB_USE_HWSTAMP=y # CONFIG_MACB_PCI is not set CONFIG_NET_VENDOR_CAVIUM=y # CONFIG_THUNDER_NIC_PF is not set # CONFIG_THUNDER_NIC_VF is not set # CONFIG_THUNDER_NIC_BGX is not set # CONFIG_THUNDER_NIC_RGX is not set CONFIG_CAVIUM_PTP=y CONFIG_LIQUIDIO=m CONFIG_LIQUIDIO_VF=m CONFIG_NET_VENDOR_CHELSIO=y # CONFIG_CHELSIO_T1 is not set CONFIG_CHELSIO_T3=m CONFIG_CHELSIO_T4=m # CONFIG_CHELSIO_T4_DCB is not set CONFIG_CHELSIO_T4VF=m CONFIG_CHELSIO_LIB=m CONFIG_NET_VENDOR_CISCO=y CONFIG_ENIC=m CONFIG_NET_VENDOR_CORTINA=y # CONFIG_CX_ECAT is not set CONFIG_DNET=m CONFIG_NET_VENDOR_DEC=y CONFIG_NET_TULIP=y CONFIG_DE2104X=m CONFIG_DE2104X_DSL=0 CONFIG_TULIP=y # CONFIG_TULIP_MWI is not set CONFIG_TULIP_MMIO=y # CONFIG_TULIP_NAPI is not set CONFIG_DE4X5=m CONFIG_WINBOND_840=m CONFIG_DM9102=m CONFIG_ULI526X=m CONFIG_PCMCIA_XIRCOM=m # CONFIG_NET_VENDOR_DLINK is not set CONFIG_NET_VENDOR_EMULEX=y CONFIG_BE2NET=m CONFIG_BE2NET_HWMON=y CONFIG_BE2NET_BE2=y CONFIG_BE2NET_BE3=y CONFIG_BE2NET_LANCER=y CONFIG_BE2NET_SKYHAWK=y CONFIG_NET_VENDOR_EZCHIP=y CONFIG_NET_VENDOR_GOOGLE=y # CONFIG_GVE is not set CONFIG_NET_VENDOR_HUAWEI=y # CONFIG_HINIC is not set # CONFIG_NET_VENDOR_I825XX is not set CONFIG_NET_VENDOR_INTEL=y # CONFIG_E100 is not set CONFIG_E1000=y CONFIG_E1000E=y CONFIG_E1000E_HWTS=y CONFIG_IGB=y CONFIG_IGB_HWMON=y CONFIG_IGBVF=m # CONFIG_IXGB is not set CONFIG_IXGBE=y CONFIG_IXGBE_HWMON=y CONFIG_IXGBE_DCB=y CONFIG_IXGBEVF=m CONFIG_I40E=y CONFIG_I40E_DCB=y CONFIG_IAVF=m CONFIG_I40EVF=m # CONFIG_ICE is not set CONFIG_FM10K=m # CONFIG_IGC is not set CONFIG_JME=m CONFIG_NET_VENDOR_MARVELL=y CONFIG_MVMDIO=m CONFIG_SKGE=y # CONFIG_SKGE_DEBUG is not set CONFIG_SKGE_GENESIS=y CONFIG_SKY2=m # CONFIG_SKY2_DEBUG is not set CONFIG_NET_VENDOR_MELLANOX=y CONFIG_MLX4_EN=m CONFIG_MLX4_EN_DCB=y CONFIG_MLX4_CORE=m CONFIG_MLX4_DEBUG=y CONFIG_MLX4_CORE_GEN2=y # CONFIG_MLX5_CORE is not set # CONFIG_MLXSW_CORE is not set # CONFIG_MLXFW is not set # CONFIG_NET_VENDOR_MICREL is not set # CONFIG_NET_VENDOR_MICROCHIP is not set CONFIG_NET_VENDOR_MICROSEMI=y # CONFIG_MSCC_OCELOT_SWITCH is not set CONFIG_NET_VENDOR_MYRI=y CONFIG_MYRI10GE=m CONFIG_MYRI10GE_DCA=y # CONFIG_FEALNX is not set # CONFIG_NET_VENDOR_NATSEMI is not set CONFIG_NET_VENDOR_NETERION=y # CONFIG_S2IO is not set # CONFIG_VXGE is not set CONFIG_NET_VENDOR_NETRONOME=y CONFIG_NFP=m CONFIG_NFP_APP_FLOWER=y CONFIG_NFP_APP_ABM_NIC=y # CONFIG_NFP_DEBUG is not set CONFIG_NET_VENDOR_NI=y # CONFIG_NI_XGE_MANAGEMENT_ENET is not set # CONFIG_NET_VENDOR_NVIDIA is not set CONFIG_NET_VENDOR_OKI=y CONFIG_ETHOC=m CONFIG_NET_VENDOR_PACKET_ENGINES=y # CONFIG_HAMACHI is not set CONFIG_YELLOWFIN=m CONFIG_NET_VENDOR_PENSANDO=y # CONFIG_IONIC is not set CONFIG_NET_VENDOR_QLOGIC=y CONFIG_QLA3XXX=m CONFIG_QLCNIC=m CONFIG_QLCNIC_SRIOV=y CONFIG_QLCNIC_DCB=y CONFIG_QLCNIC_HWMON=y CONFIG_NETXEN_NIC=m CONFIG_QED=m CONFIG_QED_SRIOV=y CONFIG_QEDE=m CONFIG_NET_VENDOR_QUALCOMM=y # CONFIG_QCOM_EMAC is not set # CONFIG_RMNET is not set # CONFIG_NET_VENDOR_RDC is not set CONFIG_NET_VENDOR_REALTEK=y # CONFIG_ATP is not set CONFIG_8139CP=y CONFIG_8139TOO=y # CONFIG_8139TOO_PIO is not set # CONFIG_8139TOO_TUNE_TWISTER is not set CONFIG_8139TOO_8129=y # CONFIG_8139_OLD_RX_RESET is not set CONFIG_R8169=y CONFIG_NET_VENDOR_RENESAS=y CONFIG_NET_VENDOR_ROCKER=y CONFIG_ROCKER=m CONFIG_NET_VENDOR_SAMSUNG=y # CONFIG_SXGBE_ETH is not set # CONFIG_NET_VENDOR_SEEQ is not set CONFIG_NET_VENDOR_SOLARFLARE=y CONFIG_SFC=m CONFIG_SFC_MTD=y CONFIG_SFC_MCDI_MON=y CONFIG_SFC_SRIOV=y CONFIG_SFC_MCDI_LOGGING=y CONFIG_SFC_FALCON=m CONFIG_SFC_FALCON_MTD=y # CONFIG_NET_VENDOR_SILAN is not set # CONFIG_NET_VENDOR_SIS is not set CONFIG_NET_VENDOR_SMSC=y CONFIG_EPIC100=m # CONFIG_SMSC911X is not set CONFIG_SMSC9420=m CONFIG_NET_VENDOR_SOCIONEXT=y # CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_NET_VENDOR_SUN is not set CONFIG_NET_VENDOR_SYNOPSYS=y # CONFIG_DWC_XLGMAC is not set # CONFIG_NET_VENDOR_TEHUTI is not set CONFIG_NET_VENDOR_TI=y # CONFIG_TI_CPSW_PHY_SEL is not set CONFIG_TLAN=m # CONFIG_NET_VENDOR_VIA is not set # CONFIG_NET_VENDOR_WIZNET is not set CONFIG_NET_VENDOR_XILINX=y # CONFIG_XILINX_AXI_EMAC is not set # CONFIG_XILINX_LL_TEMAC is not set # CONFIG_FDDI is not set # CONFIG_HIPPI is not set # CONFIG_NET_SB1000 is not set CONFIG_MDIO_DEVICE=y CONFIG_MDIO_BUS=y # CONFIG_MDIO_BCM_UNIMAC is not set CONFIG_MDIO_BITBANG=m # CONFIG_MDIO_GPIO is not set # CONFIG_MDIO_MSCC_MIIM is not set # CONFIG_MDIO_THUNDER is not set CONFIG_PHYLINK=m CONFIG_PHYLIB=y CONFIG_SWPHY=y # CONFIG_LED_TRIGGER_PHY is not set # # MII PHY device drivers # # CONFIG_SFP is not set # CONFIG_ADIN_PHY is not set CONFIG_AMD_PHY=m # CONFIG_AQUANTIA_PHY is not set # CONFIG_AX88796B_PHY is not set # CONFIG_BCM7XXX_PHY is not set CONFIG_BCM87XX_PHY=m CONFIG_BCM_NET_PHYLIB=m CONFIG_BROADCOM_PHY=m # CONFIG_BCM84881_PHY is not set CONFIG_CICADA_PHY=m # CONFIG_CORTINA_PHY is not set CONFIG_DAVICOM_PHY=m # CONFIG_DP83822_PHY is not set # CONFIG_DP83TC811_PHY is not set # CONFIG_DP83848_PHY is not set # CONFIG_DP83867_PHY is not set # CONFIG_DP83869_PHY is not set CONFIG_FIXED_PHY=y CONFIG_ICPLUS_PHY=m # CONFIG_INTEL_XWAY_PHY is not set CONFIG_LSI_ET1011C_PHY=m CONFIG_LXT_PHY=m CONFIG_MARVELL_PHY=m # CONFIG_MARVELL_10G_PHY is not set CONFIG_MICREL_PHY=m # CONFIG_MICROCHIP_PHY is not set # CONFIG_MICROCHIP_T1_PHY is not set # CONFIG_MICROSEMI_PHY is not set CONFIG_NATIONAL_PHY=m # CONFIG_NXP_TJA11XX_PHY is not set CONFIG_QSEMI_PHY=m CONFIG_REALTEK_PHY=y # CONFIG_RENESAS_PHY is not set # CONFIG_ROCKCHIP_PHY is not set CONFIG_SMSC_PHY=m CONFIG_STE10XP=m # CONFIG_TERANETICS_PHY is not set CONFIG_VITESSE_PHY=m # CONFIG_XILINX_GMII2RGMII is not set # CONFIG_MICREL_KS8995MA is not set # CONFIG_PLIP is not set CONFIG_PPP=m CONFIG_PPP_BSDCOMP=m CONFIG_PPP_DEFLATE=m CONFIG_PPP_FILTER=y CONFIG_PPP_MPPE=m CONFIG_PPP_MULTILINK=y CONFIG_PPPOATM=m CONFIG_PPPOE=m CONFIG_PPTP=m CONFIG_PPPOL2TP=m CONFIG_PPP_ASYNC=m CONFIG_PPP_SYNC_TTY=m CONFIG_SLIP=m CONFIG_SLHC=m CONFIG_SLIP_COMPRESSED=y CONFIG_SLIP_SMART=y # CONFIG_SLIP_MODE_SLIP6 is not set CONFIG_USB_NET_DRIVERS=y CONFIG_USB_CATC=y CONFIG_USB_KAWETH=y CONFIG_USB_PEGASUS=y CONFIG_USB_RTL8150=y CONFIG_USB_RTL8152=m # CONFIG_USB_LAN78XX is not set CONFIG_USB_USBNET=y CONFIG_USB_NET_AX8817X=y CONFIG_USB_NET_AX88179_178A=m CONFIG_USB_NET_CDCETHER=y CONFIG_USB_NET_CDC_EEM=y CONFIG_USB_NET_CDC_NCM=m CONFIG_USB_NET_HUAWEI_CDC_NCM=m CONFIG_USB_NET_CDC_MBIM=m CONFIG_USB_NET_DM9601=y # CONFIG_USB_NET_SR9700 is not set # CONFIG_USB_NET_SR9800 is not set CONFIG_USB_NET_SMSC75XX=y CONFIG_USB_NET_SMSC95XX=y CONFIG_USB_NET_GL620A=y CONFIG_USB_NET_NET1080=y CONFIG_USB_NET_PLUSB=y CONFIG_USB_NET_MCS7830=y CONFIG_USB_NET_RNDIS_HOST=y CONFIG_USB_NET_CDC_SUBSET_ENABLE=y CONFIG_USB_NET_CDC_SUBSET=y CONFIG_USB_ALI_M5632=y CONFIG_USB_AN2720=y CONFIG_USB_BELKIN=y CONFIG_USB_ARMLINUX=y CONFIG_USB_EPSON2888=y CONFIG_USB_KC2190=y CONFIG_USB_NET_ZAURUS=y CONFIG_USB_NET_CX82310_ETH=m CONFIG_USB_NET_KALMIA=m CONFIG_USB_NET_QMI_WWAN=m CONFIG_USB_HSO=m CONFIG_USB_NET_INT51X1=y CONFIG_USB_IPHETH=y CONFIG_USB_SIERRA_NET=y CONFIG_USB_VL600=m # CONFIG_USB_NET_CH9200 is not set # CONFIG_USB_NET_AQC111 is not set CONFIG_WLAN=y # CONFIG_WIRELESS_WDS is not set CONFIG_WLAN_VENDOR_ADMTEK=y # CONFIG_ADM8211 is not set CONFIG_ATH_COMMON=m CONFIG_WLAN_VENDOR_ATH=y # CONFIG_ATH_DEBUG is not set # CONFIG_ATH5K is not set # CONFIG_ATH5K_PCI is not set CONFIG_ATH9K_HW=m CONFIG_ATH9K_COMMON=m CONFIG_ATH9K_BTCOEX_SUPPORT=y # CONFIG_ATH9K is not set CONFIG_ATH9K_HTC=m # CONFIG_ATH9K_HTC_DEBUGFS is not set # CONFIG_CARL9170 is not set # CONFIG_ATH6KL is not set # CONFIG_AR5523 is not set # CONFIG_WIL6210 is not set # CONFIG_ATH10K is not set # CONFIG_WCN36XX is not set CONFIG_WLAN_VENDOR_ATMEL=y # CONFIG_ATMEL is not set # CONFIG_AT76C50X_USB is not set CONFIG_WLAN_VENDOR_BROADCOM=y # CONFIG_B43 is not set # CONFIG_B43LEGACY is not set # CONFIG_BRCMSMAC is not set # CONFIG_BRCMFMAC is not set CONFIG_WLAN_VENDOR_CISCO=y # CONFIG_AIRO is not set CONFIG_WLAN_VENDOR_INTEL=y # CONFIG_IPW2100 is not set # CONFIG_IPW2200 is not set CONFIG_IWLEGACY=m CONFIG_IWL4965=m CONFIG_IWL3945=m # # iwl3945 / iwl4965 Debugging Options # CONFIG_IWLEGACY_DEBUG=y CONFIG_IWLEGACY_DEBUGFS=y # end of iwl3945 / iwl4965 Debugging Options CONFIG_IWLWIFI=m CONFIG_IWLWIFI_LEDS=y CONFIG_IWLDVM=m CONFIG_IWLMVM=m CONFIG_IWLWIFI_OPMODE_MODULAR=y # CONFIG_IWLWIFI_BCAST_FILTERING is not set # # Debugging Options # # CONFIG_IWLWIFI_DEBUG is not set CONFIG_IWLWIFI_DEBUGFS=y # CONFIG_IWLWIFI_DEVICE_TRACING is not set # end of Debugging Options CONFIG_WLAN_VENDOR_INTERSIL=y # CONFIG_HOSTAP is not set # CONFIG_HERMES is not set # CONFIG_P54_COMMON is not set # CONFIG_PRISM54 is not set CONFIG_WLAN_VENDOR_MARVELL=y # CONFIG_LIBERTAS is not set # CONFIG_LIBERTAS_THINFIRM is not set # CONFIG_MWIFIEX is not set # CONFIG_MWL8K is not set CONFIG_WLAN_VENDOR_MEDIATEK=y # CONFIG_MT7601U is not set # CONFIG_MT76x0U is not set # CONFIG_MT76x0E is not set # CONFIG_MT76x2E is not set # CONFIG_MT76x2U is not set # CONFIG_MT7603E is not set # CONFIG_MT7615E is not set CONFIG_WLAN_VENDOR_RALINK=y # CONFIG_RT2X00 is not set CONFIG_WLAN_VENDOR_REALTEK=y # CONFIG_RTL8180 is not set # CONFIG_RTL8187 is not set # CONFIG_RTL_CARDS is not set # CONFIG_RTL8XXXU is not set # CONFIG_RTW88 is not set CONFIG_WLAN_VENDOR_RSI=y # CONFIG_RSI_91X is not set CONFIG_WLAN_VENDOR_ST=y # CONFIG_CW1200 is not set CONFIG_WLAN_VENDOR_TI=y # CONFIG_WL1251 is not set # CONFIG_WL12XX is not set # CONFIG_WL18XX is not set # CONFIG_WLCORE is not set CONFIG_WLAN_VENDOR_ZYDAS=y # CONFIG_USB_ZD1201 is not set # CONFIG_ZD1211RW is not set CONFIG_WLAN_VENDOR_QUANTENNA=y # CONFIG_QTNFMAC_PCIE is not set CONFIG_MAC80211_HWSIM=m # CONFIG_USB_NET_RNDIS_WLAN is not set # CONFIG_VIRT_WIFI is not set # # Enable WiMAX (Networking options) to see the WiMAX drivers # CONFIG_WAN=y # CONFIG_LANMEDIA is not set CONFIG_HDLC=m CONFIG_HDLC_RAW=m # CONFIG_HDLC_RAW_ETH is not set CONFIG_HDLC_CISCO=m CONFIG_HDLC_FR=m CONFIG_HDLC_PPP=m # # X.25/LAPB support is disabled # # CONFIG_PCI200SYN is not set # CONFIG_WANXL is not set # CONFIG_PC300TOO is not set # CONFIG_FARSYNC is not set CONFIG_DLCI=m CONFIG_DLCI_MAX=8 # CONFIG_SBNI is not set CONFIG_IEEE802154_DRIVERS=m CONFIG_IEEE802154_FAKELB=m # CONFIG_IEEE802154_AT86RF230 is not set # CONFIG_IEEE802154_MRF24J40 is not set # CONFIG_IEEE802154_CC2520 is not set # CONFIG_IEEE802154_ATUSB is not set # CONFIG_IEEE802154_ADF7242 is not set # CONFIG_IEEE802154_CA8210 is not set # CONFIG_IEEE802154_MCR20A is not set # CONFIG_IEEE802154_HWSIM is not set CONFIG_XEN_NETDEV_FRONTEND=m CONFIG_VMXNET3=m CONFIG_FUJITSU_ES=m CONFIG_HYPERV_NET=m CONFIG_NETDEVSIM=m CONFIG_NET_FAILOVER=m CONFIG_ISDN=y CONFIG_ISDN_CAPI=y CONFIG_CAPI_TRACE=y CONFIG_ISDN_CAPI_MIDDLEWARE=y CONFIG_MISDN=m CONFIG_MISDN_DSP=m CONFIG_MISDN_L1OIP=m # # mISDN hardware drivers # CONFIG_MISDN_HFCPCI=m CONFIG_MISDN_HFCMULTI=m CONFIG_MISDN_HFCUSB=m CONFIG_MISDN_AVMFRITZ=m CONFIG_MISDN_SPEEDFAX=m CONFIG_MISDN_INFINEON=m CONFIG_MISDN_W6692=m CONFIG_MISDN_NETJET=m CONFIG_MISDN_HDLC=m CONFIG_MISDN_IPAC=m CONFIG_MISDN_ISAR=m CONFIG_NVM=y # CONFIG_NVM_PBLK is not set # # Input device support # CONFIG_INPUT=y CONFIG_INPUT_LEDS=y CONFIG_INPUT_FF_MEMLESS=y CONFIG_INPUT_POLLDEV=m CONFIG_INPUT_SPARSEKMAP=m # CONFIG_INPUT_MATRIXKMAP is not set # # Userland interfaces # CONFIG_INPUT_MOUSEDEV=y # CONFIG_INPUT_MOUSEDEV_PSAUX is not set CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 CONFIG_INPUT_JOYDEV=m CONFIG_INPUT_EVDEV=y # CONFIG_INPUT_EVBUG is not set # # Input Device Drivers # CONFIG_INPUT_KEYBOARD=y # CONFIG_KEYBOARD_ADC is not set # CONFIG_KEYBOARD_ADP5588 is not set # CONFIG_KEYBOARD_ADP5589 is not set # CONFIG_KEYBOARD_APPLESPI is not set CONFIG_KEYBOARD_ATKBD=y # CONFIG_KEYBOARD_QT1050 is not set # CONFIG_KEYBOARD_QT1070 is not set # CONFIG_KEYBOARD_QT2160 is not set # CONFIG_KEYBOARD_DLINK_DIR685 is not set # CONFIG_KEYBOARD_LKKBD is not set # CONFIG_KEYBOARD_GPIO is not set # CONFIG_KEYBOARD_GPIO_POLLED is not set # CONFIG_KEYBOARD_TCA6416 is not set # CONFIG_KEYBOARD_TCA8418 is not set # CONFIG_KEYBOARD_MATRIX is not set # CONFIG_KEYBOARD_LM8323 is not set # CONFIG_KEYBOARD_LM8333 is not set # CONFIG_KEYBOARD_MAX7359 is not set # CONFIG_KEYBOARD_MCS is not set # CONFIG_KEYBOARD_MPR121 is not set # CONFIG_KEYBOARD_NEWTON is not set # CONFIG_KEYBOARD_OPENCORES is not set # CONFIG_KEYBOARD_SAMSUNG is not set # CONFIG_KEYBOARD_STOWAWAY is not set # CONFIG_KEYBOARD_SUNKBD is not set # CONFIG_KEYBOARD_TM2_TOUCHKEY is not set # CONFIG_KEYBOARD_XTKBD is not set CONFIG_INPUT_MOUSE=y CONFIG_MOUSE_PS2=y CONFIG_MOUSE_PS2_ALPS=y CONFIG_MOUSE_PS2_BYD=y CONFIG_MOUSE_PS2_LOGIPS2PP=y CONFIG_MOUSE_PS2_SYNAPTICS=y CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS=y CONFIG_MOUSE_PS2_CYPRESS=y CONFIG_MOUSE_PS2_LIFEBOOK=y CONFIG_MOUSE_PS2_TRACKPOINT=y CONFIG_MOUSE_PS2_ELANTECH=y CONFIG_MOUSE_PS2_ELANTECH_SMBUS=y CONFIG_MOUSE_PS2_SENTELIC=y # CONFIG_MOUSE_PS2_TOUCHKIT is not set CONFIG_MOUSE_PS2_FOCALTECH=y CONFIG_MOUSE_PS2_VMMOUSE=y CONFIG_MOUSE_PS2_SMBUS=y CONFIG_MOUSE_SERIAL=m CONFIG_MOUSE_APPLETOUCH=m CONFIG_MOUSE_BCM5974=m CONFIG_MOUSE_CYAPA=m # CONFIG_MOUSE_ELAN_I2C is not set CONFIG_MOUSE_VSXXXAA=m # CONFIG_MOUSE_GPIO is not set CONFIG_MOUSE_SYNAPTICS_I2C=m CONFIG_MOUSE_SYNAPTICS_USB=m # CONFIG_INPUT_JOYSTICK is not set CONFIG_INPUT_TABLET=y CONFIG_TABLET_USB_ACECAD=m CONFIG_TABLET_USB_AIPTEK=m CONFIG_TABLET_USB_GTCO=m # CONFIG_TABLET_USB_HANWANG is not set CONFIG_TABLET_USB_KBTAB=m # CONFIG_TABLET_USB_PEGASUS is not set # CONFIG_TABLET_SERIAL_WACOM4 is not set CONFIG_INPUT_TOUCHSCREEN=y CONFIG_TOUCHSCREEN_PROPERTIES=y # CONFIG_TOUCHSCREEN_ADS7846 is not set # CONFIG_TOUCHSCREEN_AD7877 is not set # CONFIG_TOUCHSCREEN_AD7879 is not set # CONFIG_TOUCHSCREEN_ADC is not set # CONFIG_TOUCHSCREEN_ATMEL_MXT is not set # CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set # CONFIG_TOUCHSCREEN_BU21013 is not set # CONFIG_TOUCHSCREEN_BU21029 is not set # CONFIG_TOUCHSCREEN_CHIPONE_ICN8505 is not set # CONFIG_TOUCHSCREEN_CY8CTMG110 is not set # CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set # CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set # CONFIG_TOUCHSCREEN_DYNAPRO is not set # CONFIG_TOUCHSCREEN_HAMPSHIRE is not set # CONFIG_TOUCHSCREEN_EETI is not set # CONFIG_TOUCHSCREEN_EGALAX_SERIAL is not set # CONFIG_TOUCHSCREEN_EXC3000 is not set # CONFIG_TOUCHSCREEN_FUJITSU is not set # CONFIG_TOUCHSCREEN_GOODIX is not set # CONFIG_TOUCHSCREEN_HIDEEP is not set # CONFIG_TOUCHSCREEN_ILI210X is not set # CONFIG_TOUCHSCREEN_S6SY761 is not set # CONFIG_TOUCHSCREEN_GUNZE is not set # CONFIG_TOUCHSCREEN_EKTF2127 is not set # CONFIG_TOUCHSCREEN_ELAN is not set CONFIG_TOUCHSCREEN_ELO=m CONFIG_TOUCHSCREEN_WACOM_W8001=m CONFIG_TOUCHSCREEN_WACOM_I2C=m # CONFIG_TOUCHSCREEN_MAX11801 is not set # CONFIG_TOUCHSCREEN_MCS5000 is not set # CONFIG_TOUCHSCREEN_MMS114 is not set # CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set # CONFIG_TOUCHSCREEN_MTOUCH is not set # CONFIG_TOUCHSCREEN_INEXIO is not set # CONFIG_TOUCHSCREEN_MK712 is not set # CONFIG_TOUCHSCREEN_PENMOUNT is not set # CONFIG_TOUCHSCREEN_EDT_FT5X06 is not set # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set # CONFIG_TOUCHSCREEN_TOUCHWIN is not set # CONFIG_TOUCHSCREEN_PIXCIR is not set # CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set # CONFIG_TOUCHSCREEN_WM97XX is not set # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set # CONFIG_TOUCHSCREEN_TSC_SERIO is not set # CONFIG_TOUCHSCREEN_TSC2004 is not set # CONFIG_TOUCHSCREEN_TSC2005 is not set # CONFIG_TOUCHSCREEN_TSC2007 is not set # CONFIG_TOUCHSCREEN_RM_TS is not set # CONFIG_TOUCHSCREEN_SILEAD is not set # CONFIG_TOUCHSCREEN_SIS_I2C is not set # CONFIG_TOUCHSCREEN_ST1232 is not set # CONFIG_TOUCHSCREEN_STMFTS is not set # CONFIG_TOUCHSCREEN_SUR40 is not set # CONFIG_TOUCHSCREEN_SURFACE3_SPI is not set # CONFIG_TOUCHSCREEN_SX8654 is not set # CONFIG_TOUCHSCREEN_TPS6507X is not set # CONFIG_TOUCHSCREEN_ZET6223 is not set # CONFIG_TOUCHSCREEN_ZFORCE is not set # CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set # CONFIG_TOUCHSCREEN_IQS5XX is not set CONFIG_INPUT_MISC=y # CONFIG_INPUT_AD714X is not set # CONFIG_INPUT_BMA150 is not set # CONFIG_INPUT_E3X0_BUTTON is not set # CONFIG_INPUT_MSM_VIBRATOR is not set CONFIG_INPUT_PCSPKR=m # CONFIG_INPUT_MMA8450 is not set CONFIG_INPUT_APANEL=m CONFIG_INPUT_GP2A=m # CONFIG_INPUT_GPIO_BEEPER is not set # CONFIG_INPUT_GPIO_DECODER is not set # CONFIG_INPUT_GPIO_VIBRA is not set CONFIG_INPUT_ATLAS_BTNS=m CONFIG_INPUT_ATI_REMOTE2=m CONFIG_INPUT_KEYSPAN_REMOTE=m # CONFIG_INPUT_KXTJ9 is not set CONFIG_INPUT_POWERMATE=m CONFIG_INPUT_YEALINK=m CONFIG_INPUT_CM109=m CONFIG_INPUT_UINPUT=m # CONFIG_INPUT_PCF8574 is not set # CONFIG_INPUT_PWM_BEEPER is not set # CONFIG_INPUT_PWM_VIBRA is not set CONFIG_INPUT_GPIO_ROTARY_ENCODER=m # CONFIG_INPUT_ADXL34X is not set # CONFIG_INPUT_IMS_PCU is not set # CONFIG_INPUT_CMA3000 is not set CONFIG_INPUT_XEN_KBDDEV_FRONTEND=m # CONFIG_INPUT_IDEAPAD_SLIDEBAR is not set # CONFIG_INPUT_DRV260X_HAPTICS is not set # CONFIG_INPUT_DRV2665_HAPTICS is not set # CONFIG_INPUT_DRV2667_HAPTICS is not set CONFIG_RMI4_CORE=m # CONFIG_RMI4_I2C is not set # CONFIG_RMI4_SPI is not set CONFIG_RMI4_SMB=m CONFIG_RMI4_F03=y CONFIG_RMI4_F03_SERIO=m CONFIG_RMI4_2D_SENSOR=y CONFIG_RMI4_F11=y CONFIG_RMI4_F12=y CONFIG_RMI4_F30=y # CONFIG_RMI4_F34 is not set # CONFIG_RMI4_F54 is not set # CONFIG_RMI4_F55 is not set # # Hardware I/O ports # CONFIG_SERIO=y CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y CONFIG_SERIO_I8042=y CONFIG_SERIO_SERPORT=y # CONFIG_SERIO_CT82C710 is not set # CONFIG_SERIO_PARKBD is not set # CONFIG_SERIO_PCIPS2 is not set CONFIG_SERIO_LIBPS2=y CONFIG_SERIO_RAW=m CONFIG_SERIO_ALTERA_PS2=m # CONFIG_SERIO_PS2MULT is not set CONFIG_SERIO_ARC_PS2=m CONFIG_HYPERV_KEYBOARD=m # CONFIG_SERIO_GPIO_PS2 is not set # CONFIG_USERIO is not set # CONFIG_GAMEPORT is not set # end of Hardware I/O ports # end of Input device support # # Character devices # CONFIG_TTY=y CONFIG_VT=y CONFIG_CONSOLE_TRANSLATIONS=y CONFIG_VT_CONSOLE=y CONFIG_VT_CONSOLE_SLEEP=y CONFIG_HW_CONSOLE=y CONFIG_VT_HW_CONSOLE_BINDING=y CONFIG_UNIX98_PTYS=y # CONFIG_LEGACY_PTYS is not set CONFIG_SERIAL_NONSTANDARD=y # CONFIG_ROCKETPORT is not set CONFIG_CYCLADES=m # CONFIG_CYZ_INTR is not set # CONFIG_MOXA_INTELLIO is not set # CONFIG_MOXA_SMARTIO is not set CONFIG_SYNCLINK=m CONFIG_SYNCLINKMP=m CONFIG_SYNCLINK_GT=m CONFIG_NOZOMI=m # CONFIG_ISI is not set CONFIG_N_HDLC=m CONFIG_N_GSM=m # CONFIG_TRACE_SINK is not set # CONFIG_NULL_TTY is not set CONFIG_LDISC_AUTOLOAD=y CONFIG_DEVMEM=y # CONFIG_DEVKMEM is not set # # Serial drivers # CONFIG_SERIAL_EARLYCON=y CONFIG_SERIAL_8250=y # CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set CONFIG_SERIAL_8250_PNP=y # CONFIG_SERIAL_8250_16550A_VARIANTS is not set # CONFIG_SERIAL_8250_FINTEK is not set CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_DMA=y CONFIG_SERIAL_8250_PCI=y CONFIG_SERIAL_8250_EXAR=y CONFIG_SERIAL_8250_NR_UARTS=32 CONFIG_SERIAL_8250_RUNTIME_UARTS=4 CONFIG_SERIAL_8250_EXTENDED=y CONFIG_SERIAL_8250_MANY_PORTS=y CONFIG_SERIAL_8250_SHARE_IRQ=y # CONFIG_SERIAL_8250_DETECT_IRQ is not set CONFIG_SERIAL_8250_RSA=y CONFIG_SERIAL_8250_DWLIB=y CONFIG_SERIAL_8250_DW=y # CONFIG_SERIAL_8250_RT288X is not set CONFIG_SERIAL_8250_LPSS=y CONFIG_SERIAL_8250_MID=y # # Non-8250 serial port support # # CONFIG_SERIAL_MAX3100 is not set # CONFIG_SERIAL_MAX310X is not set # CONFIG_SERIAL_UARTLITE is not set CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE_CONSOLE=y CONFIG_SERIAL_JSM=m # CONFIG_SERIAL_SCCNXP is not set # CONFIG_SERIAL_SC16IS7XX is not set # CONFIG_SERIAL_ALTERA_JTAGUART is not set # CONFIG_SERIAL_ALTERA_UART is not set # CONFIG_SERIAL_IFX6X60 is not set CONFIG_SERIAL_ARC=m CONFIG_SERIAL_ARC_NR_PORTS=1 # CONFIG_SERIAL_RP2 is not set # CONFIG_SERIAL_FSL_LPUART is not set # CONFIG_SERIAL_FSL_LINFLEXUART is not set # end of Serial drivers CONFIG_SERIAL_MCTRL_GPIO=y # CONFIG_SERIAL_DEV_BUS is not set # CONFIG_TTY_PRINTK is not set CONFIG_PRINTER=m # CONFIG_LP_CONSOLE is not set CONFIG_PPDEV=m CONFIG_HVC_DRIVER=y CONFIG_HVC_IRQ=y CONFIG_HVC_XEN=y CONFIG_HVC_XEN_FRONTEND=y CONFIG_VIRTIO_CONSOLE=y CONFIG_IPMI_HANDLER=m CONFIG_IPMI_DMI_DECODE=y CONFIG_IPMI_PLAT_DATA=y # CONFIG_IPMI_PANIC_EVENT is not set CONFIG_IPMI_DEVICE_INTERFACE=m CONFIG_IPMI_SI=m CONFIG_IPMI_SSIF=m CONFIG_IPMI_WATCHDOG=m CONFIG_IPMI_POWEROFF=m CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_TIMERIOMEM=m CONFIG_HW_RANDOM_INTEL=m CONFIG_HW_RANDOM_AMD=m CONFIG_HW_RANDOM_VIA=m CONFIG_HW_RANDOM_VIRTIO=y CONFIG_NVRAM=y # CONFIG_APPLICOM is not set # CONFIG_MWAVE is not set CONFIG_RAW_DRIVER=y CONFIG_MAX_RAW_DEVS=8192 CONFIG_HPET=y CONFIG_HPET_MMAP=y # CONFIG_HPET_MMAP_DEFAULT is not set CONFIG_HANGCHECK_TIMER=m CONFIG_UV_MMTIMER=m CONFIG_TCG_TPM=y CONFIG_HW_RANDOM_TPM=y CONFIG_TCG_TIS_CORE=y CONFIG_TCG_TIS=y # CONFIG_TCG_TIS_SPI is not set CONFIG_TCG_TIS_I2C_ATMEL=m CONFIG_TCG_TIS_I2C_INFINEON=m CONFIG_TCG_TIS_I2C_NUVOTON=m CONFIG_TCG_NSC=m CONFIG_TCG_ATMEL=m CONFIG_TCG_INFINEON=m # CONFIG_TCG_XEN is not set CONFIG_TCG_CRB=y # CONFIG_TCG_VTPM_PROXY is not set CONFIG_TCG_TIS_ST33ZP24=m CONFIG_TCG_TIS_ST33ZP24_I2C=m # CONFIG_TCG_TIS_ST33ZP24_SPI is not set CONFIG_TELCLOCK=m CONFIG_DEVPORT=y # CONFIG_XILLYBUS is not set # end of Character devices # CONFIG_RANDOM_TRUST_CPU is not set # CONFIG_RANDOM_TRUST_BOOTLOADER is not set # # I2C support # CONFIG_I2C=y CONFIG_ACPI_I2C_OPREGION=y CONFIG_I2C_BOARDINFO=y CONFIG_I2C_COMPAT=y CONFIG_I2C_CHARDEV=m CONFIG_I2C_MUX=m # # Multiplexer I2C Chip support # # CONFIG_I2C_MUX_GPIO is not set # CONFIG_I2C_MUX_LTC4306 is not set # CONFIG_I2C_MUX_PCA9541 is not set # CONFIG_I2C_MUX_PCA954x is not set # CONFIG_I2C_MUX_REG is not set # CONFIG_I2C_MUX_MLXCPLD is not set # end of Multiplexer I2C Chip support CONFIG_I2C_HELPER_AUTO=y CONFIG_I2C_SMBUS=m CONFIG_I2C_ALGOBIT=y CONFIG_I2C_ALGOPCA=m # # I2C Hardware Bus support # # # PC SMBus host controller drivers # # CONFIG_I2C_ALI1535 is not set # CONFIG_I2C_ALI1563 is not set # CONFIG_I2C_ALI15X3 is not set CONFIG_I2C_AMD756=m CONFIG_I2C_AMD756_S4882=m CONFIG_I2C_AMD8111=m # CONFIG_I2C_AMD_MP2 is not set CONFIG_I2C_I801=m CONFIG_I2C_ISCH=m CONFIG_I2C_ISMT=m CONFIG_I2C_PIIX4=m CONFIG_I2C_NFORCE2=m CONFIG_I2C_NFORCE2_S4985=m # CONFIG_I2C_NVIDIA_GPU is not set # CONFIG_I2C_SIS5595 is not set # CONFIG_I2C_SIS630 is not set CONFIG_I2C_SIS96X=m CONFIG_I2C_VIA=m CONFIG_I2C_VIAPRO=m # # ACPI drivers # CONFIG_I2C_SCMI=m # # I2C system bus drivers (mostly embedded / system-on-chip) # # CONFIG_I2C_CBUS_GPIO is not set CONFIG_I2C_DESIGNWARE_CORE=m CONFIG_I2C_DESIGNWARE_PLATFORM=m # CONFIG_I2C_DESIGNWARE_SLAVE is not set # CONFIG_I2C_DESIGNWARE_PCI is not set # CONFIG_I2C_DESIGNWARE_BAYTRAIL is not set # CONFIG_I2C_EMEV2 is not set # CONFIG_I2C_GPIO is not set # CONFIG_I2C_OCORES is not set CONFIG_I2C_PCA_PLATFORM=m CONFIG_I2C_SIMTEC=m # CONFIG_I2C_XILINX is not set # # External I2C/SMBus adapter drivers # CONFIG_I2C_DIOLAN_U2C=m CONFIG_I2C_PARPORT=m # CONFIG_I2C_ROBOTFUZZ_OSIF is not set # CONFIG_I2C_TAOS_EVM is not set CONFIG_I2C_TINY_USB=m CONFIG_I2C_VIPERBOARD=m # # Other I2C/SMBus bus drivers # # CONFIG_I2C_MLXCPLD is not set # end of I2C Hardware Bus support CONFIG_I2C_STUB=m # CONFIG_I2C_SLAVE is not set # CONFIG_I2C_DEBUG_CORE is not set # CONFIG_I2C_DEBUG_ALGO is not set # CONFIG_I2C_DEBUG_BUS is not set # end of I2C support # CONFIG_I3C is not set CONFIG_SPI=y # CONFIG_SPI_DEBUG is not set CONFIG_SPI_MASTER=y # CONFIG_SPI_MEM is not set # # SPI Master Controller Drivers # # CONFIG_SPI_ALTERA is not set # CONFIG_SPI_AXI_SPI_ENGINE is not set # CONFIG_SPI_BITBANG is not set # CONFIG_SPI_BUTTERFLY is not set # CONFIG_SPI_CADENCE is not set # CONFIG_SPI_DESIGNWARE is not set # CONFIG_SPI_NXP_FLEXSPI is not set # CONFIG_SPI_GPIO is not set # CONFIG_SPI_LM70_LLP is not set # CONFIG_SPI_OC_TINY is not set CONFIG_SPI_PXA2XX=m CONFIG_SPI_PXA2XX_PCI=m # CONFIG_SPI_ROCKCHIP is not set # CONFIG_SPI_SC18IS602 is not set # CONFIG_SPI_SIFIVE is not set # CONFIG_SPI_MXIC is not set # CONFIG_SPI_XCOMM is not set # CONFIG_SPI_XILINX is not set # CONFIG_SPI_ZYNQMP_GQSPI is not set # # SPI Protocol Masters # # CONFIG_SPI_SPIDEV is not set # CONFIG_SPI_LOOPBACK_TEST is not set # CONFIG_SPI_TLE62X0 is not set # CONFIG_SPI_SLAVE is not set # CONFIG_SPMI is not set # CONFIG_HSI is not set CONFIG_PPS=y # CONFIG_PPS_DEBUG is not set # # PPS clients support # # CONFIG_PPS_CLIENT_KTIMER is not set CONFIG_PPS_CLIENT_LDISC=m CONFIG_PPS_CLIENT_PARPORT=m CONFIG_PPS_CLIENT_GPIO=m # # PPS generators support # # # PTP clock support # CONFIG_PTP_1588_CLOCK=y CONFIG_DP83640_PHY=m # CONFIG_PTP_1588_CLOCK_INES is not set CONFIG_PTP_1588_CLOCK_KVM=m # CONFIG_PTP_1588_CLOCK_IDTCM is not set # end of PTP clock support CONFIG_PINCTRL=y CONFIG_PINMUX=y CONFIG_PINCONF=y CONFIG_GENERIC_PINCONF=y # CONFIG_DEBUG_PINCTRL is not set CONFIG_PINCTRL_AMD=m # CONFIG_PINCTRL_MCP23S08 is not set # CONFIG_PINCTRL_SX150X is not set CONFIG_PINCTRL_BAYTRAIL=y # CONFIG_PINCTRL_CHERRYVIEW is not set # CONFIG_PINCTRL_LYNXPOINT is not set CONFIG_PINCTRL_INTEL=m # CONFIG_PINCTRL_BROXTON is not set CONFIG_PINCTRL_CANNONLAKE=m # CONFIG_PINCTRL_CEDARFORK is not set CONFIG_PINCTRL_DENVERTON=m CONFIG_PINCTRL_GEMINILAKE=m # CONFIG_PINCTRL_ICELAKE is not set CONFIG_PINCTRL_LEWISBURG=m CONFIG_PINCTRL_SUNRISEPOINT=m # CONFIG_PINCTRL_TIGERLAKE is not set CONFIG_GPIOLIB=y CONFIG_GPIOLIB_FASTPATH_LIMIT=512 CONFIG_GPIO_ACPI=y CONFIG_GPIOLIB_IRQCHIP=y # CONFIG_DEBUG_GPIO is not set CONFIG_GPIO_SYSFS=y CONFIG_GPIO_GENERIC=m # # Memory mapped GPIO drivers # CONFIG_GPIO_AMDPT=m # CONFIG_GPIO_DWAPB is not set # CONFIG_GPIO_EXAR is not set # CONFIG_GPIO_GENERIC_PLATFORM is not set CONFIG_GPIO_ICH=m # CONFIG_GPIO_MB86S7X is not set # CONFIG_GPIO_VX855 is not set # CONFIG_GPIO_XILINX is not set # CONFIG_GPIO_AMD_FCH is not set # end of Memory mapped GPIO drivers # # Port-mapped I/O GPIO drivers # # CONFIG_GPIO_F7188X is not set # CONFIG_GPIO_IT87 is not set # CONFIG_GPIO_SCH is not set # CONFIG_GPIO_SCH311X is not set # CONFIG_GPIO_WINBOND is not set # CONFIG_GPIO_WS16C48 is not set # end of Port-mapped I/O GPIO drivers # # I2C GPIO expanders # # CONFIG_GPIO_ADP5588 is not set # CONFIG_GPIO_MAX7300 is not set # CONFIG_GPIO_MAX732X is not set # CONFIG_GPIO_PCA953X is not set # CONFIG_GPIO_PCF857X is not set # CONFIG_GPIO_TPIC2810 is not set # end of I2C GPIO expanders # # MFD GPIO expanders # # end of MFD GPIO expanders # # PCI GPIO expanders # # CONFIG_GPIO_AMD8111 is not set # CONFIG_GPIO_ML_IOH is not set # CONFIG_GPIO_PCI_IDIO_16 is not set # CONFIG_GPIO_PCIE_IDIO_24 is not set # CONFIG_GPIO_RDC321X is not set # end of PCI GPIO expanders # # SPI GPIO expanders # # CONFIG_GPIO_MAX3191X is not set # CONFIG_GPIO_MAX7301 is not set # CONFIG_GPIO_MC33880 is not set # CONFIG_GPIO_PISOSR is not set # CONFIG_GPIO_XRA1403 is not set # end of SPI GPIO expanders # # USB GPIO expanders # CONFIG_GPIO_VIPERBOARD=m # end of USB GPIO expanders CONFIG_GPIO_MOCKUP=y # CONFIG_W1 is not set # CONFIG_POWER_AVS is not set CONFIG_POWER_RESET=y # CONFIG_POWER_RESET_RESTART is not set CONFIG_POWER_SUPPLY=y # CONFIG_POWER_SUPPLY_DEBUG is not set CONFIG_POWER_SUPPLY_HWMON=y # CONFIG_PDA_POWER is not set # CONFIG_GENERIC_ADC_BATTERY is not set # CONFIG_TEST_POWER is not set # CONFIG_CHARGER_ADP5061 is not set # CONFIG_BATTERY_DS2780 is not set # CONFIG_BATTERY_DS2781 is not set # CONFIG_BATTERY_DS2782 is not set # CONFIG_BATTERY_SBS is not set # CONFIG_CHARGER_SBS is not set # CONFIG_MANAGER_SBS is not set # CONFIG_BATTERY_BQ27XXX is not set # CONFIG_BATTERY_MAX17040 is not set # CONFIG_BATTERY_MAX17042 is not set # CONFIG_CHARGER_MAX8903 is not set # CONFIG_CHARGER_LP8727 is not set # CONFIG_CHARGER_GPIO is not set # CONFIG_CHARGER_LT3651 is not set # CONFIG_CHARGER_BQ2415X is not set # CONFIG_CHARGER_BQ24257 is not set # CONFIG_CHARGER_BQ24735 is not set # CONFIG_CHARGER_BQ25890 is not set CONFIG_CHARGER_SMB347=m # CONFIG_BATTERY_GAUGE_LTC2941 is not set # CONFIG_CHARGER_RT9455 is not set CONFIG_HWMON=y CONFIG_HWMON_VID=m # CONFIG_HWMON_DEBUG_CHIP is not set # # Native drivers # CONFIG_SENSORS_ABITUGURU=m CONFIG_SENSORS_ABITUGURU3=m # CONFIG_SENSORS_AD7314 is not set CONFIG_SENSORS_AD7414=m CONFIG_SENSORS_AD7418=m CONFIG_SENSORS_ADM1021=m CONFIG_SENSORS_ADM1025=m CONFIG_SENSORS_ADM1026=m CONFIG_SENSORS_ADM1029=m CONFIG_SENSORS_ADM1031=m # CONFIG_SENSORS_ADM1177 is not set CONFIG_SENSORS_ADM9240=m CONFIG_SENSORS_ADT7X10=m # CONFIG_SENSORS_ADT7310 is not set CONFIG_SENSORS_ADT7410=m CONFIG_SENSORS_ADT7411=m CONFIG_SENSORS_ADT7462=m CONFIG_SENSORS_ADT7470=m CONFIG_SENSORS_ADT7475=m # CONFIG_SENSORS_AS370 is not set CONFIG_SENSORS_ASC7621=m CONFIG_SENSORS_K8TEMP=m CONFIG_SENSORS_K10TEMP=m CONFIG_SENSORS_FAM15H_POWER=m CONFIG_SENSORS_APPLESMC=m CONFIG_SENSORS_ASB100=m # CONFIG_SENSORS_ASPEED is not set CONFIG_SENSORS_ATXP1=m # CONFIG_SENSORS_DRIVETEMP is not set CONFIG_SENSORS_DS620=m CONFIG_SENSORS_DS1621=m CONFIG_SENSORS_DELL_SMM=m CONFIG_SENSORS_I5K_AMB=m CONFIG_SENSORS_F71805F=m CONFIG_SENSORS_F71882FG=m CONFIG_SENSORS_F75375S=m CONFIG_SENSORS_FSCHMD=m # CONFIG_SENSORS_FTSTEUTATES is not set CONFIG_SENSORS_GL518SM=m CONFIG_SENSORS_GL520SM=m CONFIG_SENSORS_G760A=m # CONFIG_SENSORS_G762 is not set # CONFIG_SENSORS_HIH6130 is not set CONFIG_SENSORS_IBMAEM=m CONFIG_SENSORS_IBMPEX=m # CONFIG_SENSORS_IIO_HWMON is not set # CONFIG_SENSORS_I5500 is not set CONFIG_SENSORS_CORETEMP=m CONFIG_SENSORS_IT87=m CONFIG_SENSORS_JC42=m # CONFIG_SENSORS_POWR1220 is not set CONFIG_SENSORS_LINEAGE=m # CONFIG_SENSORS_LTC2945 is not set # CONFIG_SENSORS_LTC2947_I2C is not set # CONFIG_SENSORS_LTC2947_SPI is not set # CONFIG_SENSORS_LTC2990 is not set CONFIG_SENSORS_LTC4151=m CONFIG_SENSORS_LTC4215=m # CONFIG_SENSORS_LTC4222 is not set CONFIG_SENSORS_LTC4245=m # CONFIG_SENSORS_LTC4260 is not set CONFIG_SENSORS_LTC4261=m # CONFIG_SENSORS_MAX1111 is not set CONFIG_SENSORS_MAX16065=m CONFIG_SENSORS_MAX1619=m CONFIG_SENSORS_MAX1668=m CONFIG_SENSORS_MAX197=m # CONFIG_SENSORS_MAX31722 is not set # CONFIG_SENSORS_MAX31730 is not set # CONFIG_SENSORS_MAX6621 is not set CONFIG_SENSORS_MAX6639=m CONFIG_SENSORS_MAX6642=m CONFIG_SENSORS_MAX6650=m CONFIG_SENSORS_MAX6697=m # CONFIG_SENSORS_MAX31790 is not set CONFIG_SENSORS_MCP3021=m # CONFIG_SENSORS_TC654 is not set # CONFIG_SENSORS_ADCXX is not set CONFIG_SENSORS_LM63=m # CONFIG_SENSORS_LM70 is not set CONFIG_SENSORS_LM73=m CONFIG_SENSORS_LM75=m CONFIG_SENSORS_LM77=m CONFIG_SENSORS_LM78=m CONFIG_SENSORS_LM80=m CONFIG_SENSORS_LM83=m CONFIG_SENSORS_LM85=m CONFIG_SENSORS_LM87=m CONFIG_SENSORS_LM90=m CONFIG_SENSORS_LM92=m CONFIG_SENSORS_LM93=m CONFIG_SENSORS_LM95234=m CONFIG_SENSORS_LM95241=m CONFIG_SENSORS_LM95245=m CONFIG_SENSORS_PC87360=m CONFIG_SENSORS_PC87427=m CONFIG_SENSORS_NTC_THERMISTOR=m # CONFIG_SENSORS_NCT6683 is not set CONFIG_SENSORS_NCT6775=m # CONFIG_SENSORS_NCT7802 is not set # CONFIG_SENSORS_NCT7904 is not set # CONFIG_SENSORS_NPCM7XX is not set CONFIG_SENSORS_PCF8591=m CONFIG_PMBUS=m CONFIG_SENSORS_PMBUS=m CONFIG_SENSORS_ADM1275=m # CONFIG_SENSORS_BEL_PFE is not set # CONFIG_SENSORS_IBM_CFFPS is not set # CONFIG_SENSORS_INSPUR_IPSPS is not set # CONFIG_SENSORS_IR35221 is not set # CONFIG_SENSORS_IR38064 is not set # CONFIG_SENSORS_IRPS5401 is not set # CONFIG_SENSORS_ISL68137 is not set CONFIG_SENSORS_LM25066=m CONFIG_SENSORS_LTC2978=m # CONFIG_SENSORS_LTC3815 is not set CONFIG_SENSORS_MAX16064=m # CONFIG_SENSORS_MAX20730 is not set # CONFIG_SENSORS_MAX20751 is not set # CONFIG_SENSORS_MAX31785 is not set CONFIG_SENSORS_MAX34440=m CONFIG_SENSORS_MAX8688=m # CONFIG_SENSORS_PXE1610 is not set # CONFIG_SENSORS_TPS40422 is not set # CONFIG_SENSORS_TPS53679 is not set CONFIG_SENSORS_UCD9000=m CONFIG_SENSORS_UCD9200=m # CONFIG_SENSORS_XDPE122 is not set CONFIG_SENSORS_ZL6100=m CONFIG_SENSORS_SHT15=m CONFIG_SENSORS_SHT21=m # CONFIG_SENSORS_SHT3x is not set # CONFIG_SENSORS_SHTC1 is not set CONFIG_SENSORS_SIS5595=m CONFIG_SENSORS_DME1737=m CONFIG_SENSORS_EMC1403=m # CONFIG_SENSORS_EMC2103 is not set CONFIG_SENSORS_EMC6W201=m CONFIG_SENSORS_SMSC47M1=m CONFIG_SENSORS_SMSC47M192=m CONFIG_SENSORS_SMSC47B397=m CONFIG_SENSORS_SCH56XX_COMMON=m CONFIG_SENSORS_SCH5627=m CONFIG_SENSORS_SCH5636=m # CONFIG_SENSORS_STTS751 is not set # CONFIG_SENSORS_SMM665 is not set # CONFIG_SENSORS_ADC128D818 is not set CONFIG_SENSORS_ADS7828=m # CONFIG_SENSORS_ADS7871 is not set CONFIG_SENSORS_AMC6821=m CONFIG_SENSORS_INA209=m CONFIG_SENSORS_INA2XX=m # CONFIG_SENSORS_INA3221 is not set # CONFIG_SENSORS_TC74 is not set CONFIG_SENSORS_THMC50=m CONFIG_SENSORS_TMP102=m # CONFIG_SENSORS_TMP103 is not set # CONFIG_SENSORS_TMP108 is not set CONFIG_SENSORS_TMP401=m CONFIG_SENSORS_TMP421=m # CONFIG_SENSORS_TMP513 is not set CONFIG_SENSORS_VIA_CPUTEMP=m CONFIG_SENSORS_VIA686A=m CONFIG_SENSORS_VT1211=m CONFIG_SENSORS_VT8231=m # CONFIG_SENSORS_W83773G is not set CONFIG_SENSORS_W83781D=m CONFIG_SENSORS_W83791D=m CONFIG_SENSORS_W83792D=m CONFIG_SENSORS_W83793=m CONFIG_SENSORS_W83795=m # CONFIG_SENSORS_W83795_FANCTRL is not set CONFIG_SENSORS_W83L785TS=m CONFIG_SENSORS_W83L786NG=m CONFIG_SENSORS_W83627HF=m CONFIG_SENSORS_W83627EHF=m # CONFIG_SENSORS_XGENE is not set # # ACPI drivers # CONFIG_SENSORS_ACPI_POWER=m CONFIG_SENSORS_ATK0110=m CONFIG_THERMAL=y # CONFIG_THERMAL_STATISTICS is not set CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 CONFIG_THERMAL_HWMON=y CONFIG_THERMAL_WRITABLE_TRIPS=y CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y # CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set # CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set CONFIG_THERMAL_GOV_FAIR_SHARE=y CONFIG_THERMAL_GOV_STEP_WISE=y CONFIG_THERMAL_GOV_BANG_BANG=y CONFIG_THERMAL_GOV_USER_SPACE=y # CONFIG_CLOCK_THERMAL is not set # CONFIG_DEVFREQ_THERMAL is not set # CONFIG_THERMAL_EMULATION is not set # # Intel thermal drivers # CONFIG_INTEL_POWERCLAMP=m CONFIG_X86_PKG_TEMP_THERMAL=m CONFIG_INTEL_SOC_DTS_IOSF_CORE=m # CONFIG_INTEL_SOC_DTS_THERMAL is not set # # ACPI INT340X thermal drivers # CONFIG_INT340X_THERMAL=m CONFIG_ACPI_THERMAL_REL=m # CONFIG_INT3406_THERMAL is not set CONFIG_PROC_THERMAL_MMIO_RAPL=y # end of ACPI INT340X thermal drivers # CONFIG_INTEL_PCH_THERMAL is not set # end of Intel thermal drivers # CONFIG_GENERIC_ADC_THERMAL is not set CONFIG_WATCHDOG=y CONFIG_WATCHDOG_CORE=y # CONFIG_WATCHDOG_NOWAYOUT is not set CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y CONFIG_WATCHDOG_OPEN_TIMEOUT=0 CONFIG_WATCHDOG_SYSFS=y # # Watchdog Pretimeout Governors # # CONFIG_WATCHDOG_PRETIMEOUT_GOV is not set # # Watchdog Device Drivers # CONFIG_SOFT_WATCHDOG=m CONFIG_WDAT_WDT=m # CONFIG_XILINX_WATCHDOG is not set # CONFIG_ZIIRAVE_WATCHDOG is not set # CONFIG_CADENCE_WATCHDOG is not set # CONFIG_DW_WATCHDOG is not set # CONFIG_MAX63XX_WATCHDOG is not set # CONFIG_ACQUIRE_WDT is not set # CONFIG_ADVANTECH_WDT is not set CONFIG_ALIM1535_WDT=m CONFIG_ALIM7101_WDT=m # CONFIG_EBC_C384_WDT is not set CONFIG_F71808E_WDT=m CONFIG_SP5100_TCO=m CONFIG_SBC_FITPC2_WATCHDOG=m # CONFIG_EUROTECH_WDT is not set CONFIG_IB700_WDT=m CONFIG_IBMASR=m # CONFIG_WAFER_WDT is not set CONFIG_I6300ESB_WDT=y CONFIG_IE6XX_WDT=m CONFIG_ITCO_WDT=y CONFIG_ITCO_VENDOR_SUPPORT=y CONFIG_IT8712F_WDT=m CONFIG_IT87_WDT=m CONFIG_HP_WATCHDOG=m CONFIG_HPWDT_NMI_DECODING=y # CONFIG_SC1200_WDT is not set # CONFIG_PC87413_WDT is not set CONFIG_NV_TCO=m # CONFIG_60XX_WDT is not set # CONFIG_CPU5_WDT is not set CONFIG_SMSC_SCH311X_WDT=m # CONFIG_SMSC37B787_WDT is not set # CONFIG_TQMX86_WDT is not set CONFIG_VIA_WDT=m CONFIG_W83627HF_WDT=m CONFIG_W83877F_WDT=m CONFIG_W83977F_WDT=m CONFIG_MACHZ_WDT=m # CONFIG_SBC_EPX_C3_WATCHDOG is not set CONFIG_INTEL_MEI_WDT=m # CONFIG_NI903X_WDT is not set # CONFIG_NIC7018_WDT is not set # CONFIG_MEN_A21_WDT is not set CONFIG_XEN_WDT=m # # PCI-based Watchdog Cards # CONFIG_PCIPCWATCHDOG=m CONFIG_WDTPCI=m # # USB-based Watchdog Cards # CONFIG_USBPCWATCHDOG=m CONFIG_SSB_POSSIBLE=y CONFIG_SSB=m CONFIG_SSB_SPROM=y CONFIG_SSB_PCIHOST_POSSIBLE=y CONFIG_SSB_PCIHOST=y CONFIG_SSB_SDIOHOST_POSSIBLE=y CONFIG_SSB_SDIOHOST=y CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y CONFIG_SSB_DRIVER_PCICORE=y CONFIG_SSB_DRIVER_GPIO=y CONFIG_BCMA_POSSIBLE=y CONFIG_BCMA=m CONFIG_BCMA_HOST_PCI_POSSIBLE=y CONFIG_BCMA_HOST_PCI=y # CONFIG_BCMA_HOST_SOC is not set CONFIG_BCMA_DRIVER_PCI=y CONFIG_BCMA_DRIVER_GMAC_CMN=y CONFIG_BCMA_DRIVER_GPIO=y # CONFIG_BCMA_DEBUG is not set # # Multifunction device drivers # CONFIG_MFD_CORE=y # CONFIG_MFD_AS3711 is not set # CONFIG_PMIC_ADP5520 is not set # CONFIG_MFD_AAT2870_CORE is not set # CONFIG_MFD_BCM590XX is not set # CONFIG_MFD_BD9571MWV is not set # CONFIG_MFD_AXP20X_I2C is not set # CONFIG_MFD_MADERA is not set # CONFIG_PMIC_DA903X is not set # CONFIG_MFD_DA9052_SPI is not set # CONFIG_MFD_DA9052_I2C is not set # CONFIG_MFD_DA9055 is not set # CONFIG_MFD_DA9062 is not set # CONFIG_MFD_DA9063 is not set # CONFIG_MFD_DA9150 is not set # CONFIG_MFD_DLN2 is not set # CONFIG_MFD_MC13XXX_SPI is not set # CONFIG_MFD_MC13XXX_I2C is not set # CONFIG_HTC_PASIC3 is not set # CONFIG_HTC_I2CPLD is not set # CONFIG_MFD_INTEL_QUARK_I2C_GPIO is not set CONFIG_LPC_ICH=m CONFIG_LPC_SCH=m # CONFIG_INTEL_SOC_PMIC_CHTDC_TI is not set CONFIG_MFD_INTEL_LPSS=y CONFIG_MFD_INTEL_LPSS_ACPI=y CONFIG_MFD_INTEL_LPSS_PCI=y # CONFIG_MFD_JANZ_CMODIO is not set # CONFIG_MFD_KEMPLD is not set # CONFIG_MFD_88PM800 is not set # CONFIG_MFD_88PM805 is not set # CONFIG_MFD_88PM860X is not set # CONFIG_MFD_MAX14577 is not set # CONFIG_MFD_MAX77693 is not set # CONFIG_MFD_MAX77843 is not set # CONFIG_MFD_MAX8907 is not set # CONFIG_MFD_MAX8925 is not set # CONFIG_MFD_MAX8997 is not set # CONFIG_MFD_MAX8998 is not set # CONFIG_MFD_MT6397 is not set # CONFIG_MFD_MENF21BMC is not set # CONFIG_EZX_PCAP is not set CONFIG_MFD_VIPERBOARD=m # CONFIG_MFD_RETU is not set # CONFIG_MFD_PCF50633 is not set # CONFIG_UCB1400_CORE is not set # CONFIG_MFD_RDC321X is not set # CONFIG_MFD_RT5033 is not set # CONFIG_MFD_RC5T583 is not set # CONFIG_MFD_SEC_CORE is not set # CONFIG_MFD_SI476X_CORE is not set CONFIG_MFD_SM501=m CONFIG_MFD_SM501_GPIO=y # CONFIG_MFD_SKY81452 is not set # CONFIG_MFD_SMSC is not set # CONFIG_ABX500_CORE is not set # CONFIG_MFD_SYSCON is not set # CONFIG_MFD_TI_AM335X_TSCADC is not set # CONFIG_MFD_LP3943 is not set # CONFIG_MFD_LP8788 is not set # CONFIG_MFD_TI_LMU is not set # CONFIG_MFD_PALMAS is not set # CONFIG_TPS6105X is not set # CONFIG_TPS65010 is not set # CONFIG_TPS6507X is not set # CONFIG_MFD_TPS65086 is not set # CONFIG_MFD_TPS65090 is not set # CONFIG_MFD_TI_LP873X is not set # CONFIG_MFD_TPS6586X is not set # CONFIG_MFD_TPS65910 is not set # CONFIG_MFD_TPS65912_I2C is not set # CONFIG_MFD_TPS65912_SPI is not set # CONFIG_MFD_TPS80031 is not set # CONFIG_TWL4030_CORE is not set # CONFIG_TWL6040_CORE is not set # CONFIG_MFD_WL1273_CORE is not set # CONFIG_MFD_LM3533 is not set # CONFIG_MFD_TQMX86 is not set CONFIG_MFD_VX855=m # CONFIG_MFD_ARIZONA_I2C is not set # CONFIG_MFD_ARIZONA_SPI is not set # CONFIG_MFD_WM8400 is not set # CONFIG_MFD_WM831X_I2C is not set # CONFIG_MFD_WM831X_SPI is not set # CONFIG_MFD_WM8350_I2C is not set # CONFIG_MFD_WM8994 is not set # end of Multifunction device drivers # CONFIG_REGULATOR is not set CONFIG_RC_CORE=m CONFIG_RC_MAP=m CONFIG_LIRC=y CONFIG_RC_DECODERS=y CONFIG_IR_NEC_DECODER=m CONFIG_IR_RC5_DECODER=m CONFIG_IR_RC6_DECODER=m CONFIG_IR_JVC_DECODER=m CONFIG_IR_SONY_DECODER=m CONFIG_IR_SANYO_DECODER=m CONFIG_IR_SHARP_DECODER=m CONFIG_IR_MCE_KBD_DECODER=m # CONFIG_IR_XMP_DECODER is not set CONFIG_IR_IMON_DECODER=m # CONFIG_IR_RCMM_DECODER is not set CONFIG_RC_DEVICES=y CONFIG_RC_ATI_REMOTE=m CONFIG_IR_ENE=m CONFIG_IR_IMON=m # CONFIG_IR_IMON_RAW is not set CONFIG_IR_MCEUSB=m CONFIG_IR_ITE_CIR=m CONFIG_IR_FINTEK=m CONFIG_IR_NUVOTON=m CONFIG_IR_REDRAT3=m CONFIG_IR_STREAMZAP=m CONFIG_IR_WINBOND_CIR=m # CONFIG_IR_IGORPLUGUSB is not set CONFIG_IR_IGUANA=m CONFIG_IR_TTUSBIR=m CONFIG_RC_LOOPBACK=m # CONFIG_IR_SERIAL is not set # CONFIG_IR_SIR is not set # CONFIG_RC_XBOX_DVD is not set CONFIG_MEDIA_SUPPORT=m # # Multimedia core support # CONFIG_MEDIA_CAMERA_SUPPORT=y CONFIG_MEDIA_ANALOG_TV_SUPPORT=y CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y CONFIG_MEDIA_RADIO_SUPPORT=y # CONFIG_MEDIA_SDR_SUPPORT is not set # CONFIG_MEDIA_CEC_SUPPORT is not set CONFIG_MEDIA_CONTROLLER=y CONFIG_MEDIA_CONTROLLER_DVB=y CONFIG_VIDEO_DEV=m # CONFIG_VIDEO_V4L2_SUBDEV_API is not set CONFIG_VIDEO_V4L2=m CONFIG_VIDEO_V4L2_I2C=y # CONFIG_VIDEO_ADV_DEBUG is not set # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set CONFIG_VIDEO_TUNER=m CONFIG_VIDEOBUF_GEN=m CONFIG_VIDEOBUF_DMA_SG=m CONFIG_VIDEOBUF_VMALLOC=m CONFIG_DVB_CORE=m # CONFIG_DVB_MMAP is not set CONFIG_DVB_NET=y CONFIG_TTPCI_EEPROM=m CONFIG_DVB_MAX_ADAPTERS=8 CONFIG_DVB_DYNAMIC_MINORS=y # CONFIG_DVB_DEMUX_SECTION_LOSS_LOG is not set # CONFIG_DVB_ULE_DEBUG is not set # # Media drivers # CONFIG_MEDIA_USB_SUPPORT=y # # Webcam devices # CONFIG_USB_VIDEO_CLASS=m CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y CONFIG_USB_GSPCA=m CONFIG_USB_M5602=m CONFIG_USB_STV06XX=m CONFIG_USB_GL860=m CONFIG_USB_GSPCA_BENQ=m CONFIG_USB_GSPCA_CONEX=m CONFIG_USB_GSPCA_CPIA1=m # CONFIG_USB_GSPCA_DTCS033 is not set CONFIG_USB_GSPCA_ETOMS=m CONFIG_USB_GSPCA_FINEPIX=m CONFIG_USB_GSPCA_JEILINJ=m CONFIG_USB_GSPCA_JL2005BCD=m # CONFIG_USB_GSPCA_KINECT is not set CONFIG_USB_GSPCA_KONICA=m CONFIG_USB_GSPCA_MARS=m CONFIG_USB_GSPCA_MR97310A=m CONFIG_USB_GSPCA_NW80X=m CONFIG_USB_GSPCA_OV519=m CONFIG_USB_GSPCA_OV534=m CONFIG_USB_GSPCA_OV534_9=m CONFIG_USB_GSPCA_PAC207=m CONFIG_USB_GSPCA_PAC7302=m CONFIG_USB_GSPCA_PAC7311=m CONFIG_USB_GSPCA_SE401=m CONFIG_USB_GSPCA_SN9C2028=m CONFIG_USB_GSPCA_SN9C20X=m CONFIG_USB_GSPCA_SONIXB=m CONFIG_USB_GSPCA_SONIXJ=m CONFIG_USB_GSPCA_SPCA500=m CONFIG_USB_GSPCA_SPCA501=m CONFIG_USB_GSPCA_SPCA505=m CONFIG_USB_GSPCA_SPCA506=m CONFIG_USB_GSPCA_SPCA508=m CONFIG_USB_GSPCA_SPCA561=m CONFIG_USB_GSPCA_SPCA1528=m CONFIG_USB_GSPCA_SQ905=m CONFIG_USB_GSPCA_SQ905C=m CONFIG_USB_GSPCA_SQ930X=m CONFIG_USB_GSPCA_STK014=m # CONFIG_USB_GSPCA_STK1135 is not set CONFIG_USB_GSPCA_STV0680=m CONFIG_USB_GSPCA_SUNPLUS=m CONFIG_USB_GSPCA_T613=m CONFIG_USB_GSPCA_TOPRO=m # CONFIG_USB_GSPCA_TOUPTEK is not set CONFIG_USB_GSPCA_TV8532=m CONFIG_USB_GSPCA_VC032X=m CONFIG_USB_GSPCA_VICAM=m CONFIG_USB_GSPCA_XIRLINK_CIT=m CONFIG_USB_GSPCA_ZC3XX=m CONFIG_USB_PWC=m # CONFIG_USB_PWC_DEBUG is not set CONFIG_USB_PWC_INPUT_EVDEV=y # CONFIG_VIDEO_CPIA2 is not set CONFIG_USB_ZR364XX=m CONFIG_USB_STKWEBCAM=m CONFIG_USB_S2255=m # CONFIG_VIDEO_USBTV is not set # # Analog TV USB devices # CONFIG_VIDEO_PVRUSB2=m CONFIG_VIDEO_PVRUSB2_SYSFS=y CONFIG_VIDEO_PVRUSB2_DVB=y # CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set CONFIG_VIDEO_HDPVR=m CONFIG_VIDEO_USBVISION=m # CONFIG_VIDEO_STK1160_COMMON is not set # CONFIG_VIDEO_GO7007 is not set # # Analog/digital TV USB devices # CONFIG_VIDEO_AU0828=m CONFIG_VIDEO_AU0828_V4L2=y # CONFIG_VIDEO_AU0828_RC is not set CONFIG_VIDEO_CX231XX=m CONFIG_VIDEO_CX231XX_RC=y CONFIG_VIDEO_CX231XX_ALSA=m CONFIG_VIDEO_CX231XX_DVB=m CONFIG_VIDEO_TM6000=m CONFIG_VIDEO_TM6000_ALSA=m CONFIG_VIDEO_TM6000_DVB=m # # Digital TV USB devices # CONFIG_DVB_USB=m # CONFIG_DVB_USB_DEBUG is not set CONFIG_DVB_USB_DIB3000MC=m CONFIG_DVB_USB_A800=m CONFIG_DVB_USB_DIBUSB_MB=m # CONFIG_DVB_USB_DIBUSB_MB_FAULTY is not set CONFIG_DVB_USB_DIBUSB_MC=m CONFIG_DVB_USB_DIB0700=m CONFIG_DVB_USB_UMT_010=m CONFIG_DVB_USB_CXUSB=m # CONFIG_DVB_USB_CXUSB_ANALOG is not set CONFIG_DVB_USB_M920X=m CONFIG_DVB_USB_DIGITV=m CONFIG_DVB_USB_VP7045=m CONFIG_DVB_USB_VP702X=m CONFIG_DVB_USB_GP8PSK=m CONFIG_DVB_USB_NOVA_T_USB2=m CONFIG_DVB_USB_TTUSB2=m CONFIG_DVB_USB_DTT200U=m CONFIG_DVB_USB_OPERA1=m CONFIG_DVB_USB_AF9005=m CONFIG_DVB_USB_AF9005_REMOTE=m CONFIG_DVB_USB_PCTV452E=m CONFIG_DVB_USB_DW2102=m CONFIG_DVB_USB_CINERGY_T2=m CONFIG_DVB_USB_DTV5100=m CONFIG_DVB_USB_AZ6027=m CONFIG_DVB_USB_TECHNISAT_USB2=m CONFIG_DVB_USB_V2=m CONFIG_DVB_USB_AF9015=m CONFIG_DVB_USB_AF9035=m CONFIG_DVB_USB_ANYSEE=m CONFIG_DVB_USB_AU6610=m CONFIG_DVB_USB_AZ6007=m CONFIG_DVB_USB_CE6230=m CONFIG_DVB_USB_EC168=m CONFIG_DVB_USB_GL861=m CONFIG_DVB_USB_LME2510=m CONFIG_DVB_USB_MXL111SF=m CONFIG_DVB_USB_RTL28XXU=m # CONFIG_DVB_USB_DVBSKY is not set # CONFIG_DVB_USB_ZD1301 is not set CONFIG_DVB_TTUSB_BUDGET=m CONFIG_DVB_TTUSB_DEC=m CONFIG_SMS_USB_DRV=m CONFIG_DVB_B2C2_FLEXCOP_USB=m # CONFIG_DVB_B2C2_FLEXCOP_USB_DEBUG is not set # CONFIG_DVB_AS102 is not set # # Webcam, TV (analog/digital) USB devices # CONFIG_VIDEO_EM28XX=m # CONFIG_VIDEO_EM28XX_V4L2 is not set CONFIG_VIDEO_EM28XX_ALSA=m CONFIG_VIDEO_EM28XX_DVB=m CONFIG_VIDEO_EM28XX_RC=m CONFIG_MEDIA_PCI_SUPPORT=y # # Media capture support # # CONFIG_VIDEO_MEYE is not set # CONFIG_VIDEO_SOLO6X10 is not set # CONFIG_VIDEO_TW5864 is not set # CONFIG_VIDEO_TW68 is not set # CONFIG_VIDEO_TW686X is not set # # Media capture/analog TV support # CONFIG_VIDEO_IVTV=m # CONFIG_VIDEO_IVTV_DEPRECATED_IOCTLS is not set # CONFIG_VIDEO_IVTV_ALSA is not set CONFIG_VIDEO_FB_IVTV=m # CONFIG_VIDEO_FB_IVTV_FORCE_PAT is not set # CONFIG_VIDEO_HEXIUM_GEMINI is not set # CONFIG_VIDEO_HEXIUM_ORION is not set # CONFIG_VIDEO_MXB is not set # CONFIG_VIDEO_DT3155 is not set # # Media capture/analog/hybrid TV support # CONFIG_VIDEO_CX18=m CONFIG_VIDEO_CX18_ALSA=m CONFIG_VIDEO_CX23885=m CONFIG_MEDIA_ALTERA_CI=m # CONFIG_VIDEO_CX25821 is not set CONFIG_VIDEO_CX88=m CONFIG_VIDEO_CX88_ALSA=m CONFIG_VIDEO_CX88_BLACKBIRD=m CONFIG_VIDEO_CX88_DVB=m CONFIG_VIDEO_CX88_ENABLE_VP3054=y CONFIG_VIDEO_CX88_VP3054=m CONFIG_VIDEO_CX88_MPEG=m CONFIG_VIDEO_BT848=m CONFIG_DVB_BT8XX=m CONFIG_VIDEO_SAA7134=m CONFIG_VIDEO_SAA7134_ALSA=m CONFIG_VIDEO_SAA7134_RC=y CONFIG_VIDEO_SAA7134_DVB=m CONFIG_VIDEO_SAA7164=m # # Media digital TV PCI Adapters # CONFIG_DVB_AV7110_IR=y CONFIG_DVB_AV7110=m CONFIG_DVB_AV7110_OSD=y CONFIG_DVB_BUDGET_CORE=m CONFIG_DVB_BUDGET=m CONFIG_DVB_BUDGET_CI=m CONFIG_DVB_BUDGET_AV=m CONFIG_DVB_BUDGET_PATCH=m CONFIG_DVB_B2C2_FLEXCOP_PCI=m # CONFIG_DVB_B2C2_FLEXCOP_PCI_DEBUG is not set CONFIG_DVB_PLUTO2=m CONFIG_DVB_DM1105=m CONFIG_DVB_PT1=m # CONFIG_DVB_PT3 is not set CONFIG_MANTIS_CORE=m CONFIG_DVB_MANTIS=m CONFIG_DVB_HOPPER=m CONFIG_DVB_NGENE=m CONFIG_DVB_DDBRIDGE=m # CONFIG_DVB_DDBRIDGE_MSIENABLE is not set # CONFIG_DVB_SMIPCIE is not set # CONFIG_DVB_NETUP_UNIDVB is not set # CONFIG_V4L_PLATFORM_DRIVERS is not set # CONFIG_V4L_MEM2MEM_DRIVERS is not set # CONFIG_V4L_TEST_DRIVERS is not set # CONFIG_DVB_PLATFORM_DRIVERS is not set # # Supported MMC/SDIO adapters # CONFIG_SMS_SDIO_DRV=m CONFIG_RADIO_ADAPTERS=y CONFIG_RADIO_TEA575X=m # CONFIG_RADIO_SI470X is not set # CONFIG_RADIO_SI4713 is not set # CONFIG_USB_MR800 is not set # CONFIG_USB_DSBR is not set # CONFIG_RADIO_MAXIRADIO is not set # CONFIG_RADIO_SHARK is not set # CONFIG_RADIO_SHARK2 is not set # CONFIG_USB_KEENE is not set # CONFIG_USB_RAREMONO is not set # CONFIG_USB_MA901 is not set # CONFIG_RADIO_TEA5764 is not set # CONFIG_RADIO_SAA7706H is not set # CONFIG_RADIO_TEF6862 is not set # CONFIG_RADIO_WL1273 is not set # # Texas Instruments WL128x FM driver (ST based) # # end of Texas Instruments WL128x FM driver (ST based) # # Supported FireWire (IEEE 1394) Adapters # CONFIG_DVB_FIREDTV=m CONFIG_DVB_FIREDTV_INPUT=y CONFIG_MEDIA_COMMON_OPTIONS=y # # common driver options # CONFIG_VIDEO_CX2341X=m CONFIG_VIDEO_TVEEPROM=m CONFIG_CYPRESS_FIRMWARE=m CONFIG_VIDEOBUF2_CORE=m CONFIG_VIDEOBUF2_V4L2=m CONFIG_VIDEOBUF2_MEMOPS=m CONFIG_VIDEOBUF2_VMALLOC=m CONFIG_VIDEOBUF2_DMA_SG=m CONFIG_VIDEOBUF2_DVB=m CONFIG_DVB_B2C2_FLEXCOP=m CONFIG_VIDEO_SAA7146=m CONFIG_VIDEO_SAA7146_VV=m CONFIG_SMS_SIANO_MDTV=m CONFIG_SMS_SIANO_RC=y # CONFIG_SMS_SIANO_DEBUGFS is not set # # Media ancillary drivers (tuners, sensors, i2c, spi, frontends) # CONFIG_MEDIA_SUBDRV_AUTOSELECT=y CONFIG_MEDIA_ATTACH=y CONFIG_VIDEO_IR_I2C=m # # I2C Encoders, decoders, sensors and other helper chips # # # Audio decoders, processors and mixers # CONFIG_VIDEO_TVAUDIO=m CONFIG_VIDEO_TDA7432=m # CONFIG_VIDEO_TDA9840 is not set # CONFIG_VIDEO_TEA6415C is not set # CONFIG_VIDEO_TEA6420 is not set CONFIG_VIDEO_MSP3400=m CONFIG_VIDEO_CS3308=m CONFIG_VIDEO_CS5345=m CONFIG_VIDEO_CS53L32A=m # CONFIG_VIDEO_TLV320AIC23B is not set # CONFIG_VIDEO_UDA1342 is not set CONFIG_VIDEO_WM8775=m CONFIG_VIDEO_WM8739=m CONFIG_VIDEO_VP27SMPX=m # CONFIG_VIDEO_SONY_BTF_MPX is not set # # RDS decoders # CONFIG_VIDEO_SAA6588=m # # Video decoders # # CONFIG_VIDEO_ADV7183 is not set # CONFIG_VIDEO_BT819 is not set # CONFIG_VIDEO_BT856 is not set # CONFIG_VIDEO_BT866 is not set # CONFIG_VIDEO_KS0127 is not set # CONFIG_VIDEO_ML86V7667 is not set # CONFIG_VIDEO_SAA7110 is not set CONFIG_VIDEO_SAA711X=m # CONFIG_VIDEO_TVP514X is not set # CONFIG_VIDEO_TVP5150 is not set # CONFIG_VIDEO_TVP7002 is not set # CONFIG_VIDEO_TW2804 is not set # CONFIG_VIDEO_TW9903 is not set # CONFIG_VIDEO_TW9906 is not set # CONFIG_VIDEO_TW9910 is not set # CONFIG_VIDEO_VPX3220 is not set # # Video and audio decoders # CONFIG_VIDEO_SAA717X=m CONFIG_VIDEO_CX25840=m # # Video encoders # CONFIG_VIDEO_SAA7127=m # CONFIG_VIDEO_SAA7185 is not set # CONFIG_VIDEO_ADV7170 is not set # CONFIG_VIDEO_ADV7175 is not set # CONFIG_VIDEO_ADV7343 is not set # CONFIG_VIDEO_ADV7393 is not set # CONFIG_VIDEO_AK881X is not set # CONFIG_VIDEO_THS8200 is not set # # Camera sensor devices # # CONFIG_VIDEO_OV2640 is not set # CONFIG_VIDEO_OV2659 is not set # CONFIG_VIDEO_OV2680 is not set # CONFIG_VIDEO_OV2685 is not set # CONFIG_VIDEO_OV6650 is not set # CONFIG_VIDEO_OV5695 is not set # CONFIG_VIDEO_OV772X is not set # CONFIG_VIDEO_OV7640 is not set # CONFIG_VIDEO_OV7670 is not set # CONFIG_VIDEO_OV7740 is not set # CONFIG_VIDEO_OV9640 is not set # CONFIG_VIDEO_VS6624 is not set # CONFIG_VIDEO_MT9M111 is not set # CONFIG_VIDEO_MT9T112 is not set # CONFIG_VIDEO_MT9V011 is not set # CONFIG_VIDEO_MT9V111 is not set # CONFIG_VIDEO_SR030PC30 is not set # CONFIG_VIDEO_RJ54N1 is not set # # Lens drivers # # CONFIG_VIDEO_AD5820 is not set # # Flash devices # # CONFIG_VIDEO_ADP1653 is not set # CONFIG_VIDEO_LM3560 is not set # CONFIG_VIDEO_LM3646 is not set # # Video improvement chips # CONFIG_VIDEO_UPD64031A=m CONFIG_VIDEO_UPD64083=m # # Audio/Video compression chips # CONFIG_VIDEO_SAA6752HS=m # # SDR tuner chips # # # Miscellaneous helper chips # # CONFIG_VIDEO_THS7303 is not set CONFIG_VIDEO_M52790=m # CONFIG_VIDEO_I2C is not set # end of I2C Encoders, decoders, sensors and other helper chips # # SPI helper chips # # end of SPI helper chips # # Media SPI Adapters # # CONFIG_CXD2880_SPI_DRV is not set # end of Media SPI Adapters CONFIG_MEDIA_TUNER=m # # Customize TV tuners # CONFIG_MEDIA_TUNER_SIMPLE=m CONFIG_MEDIA_TUNER_TDA18250=m CONFIG_MEDIA_TUNER_TDA8290=m CONFIG_MEDIA_TUNER_TDA827X=m CONFIG_MEDIA_TUNER_TDA18271=m CONFIG_MEDIA_TUNER_TDA9887=m CONFIG_MEDIA_TUNER_TEA5761=m CONFIG_MEDIA_TUNER_TEA5767=m # CONFIG_MEDIA_TUNER_MSI001 is not set CONFIG_MEDIA_TUNER_MT20XX=m CONFIG_MEDIA_TUNER_MT2060=m CONFIG_MEDIA_TUNER_MT2063=m CONFIG_MEDIA_TUNER_MT2266=m CONFIG_MEDIA_TUNER_MT2131=m CONFIG_MEDIA_TUNER_QT1010=m CONFIG_MEDIA_TUNER_XC2028=m CONFIG_MEDIA_TUNER_XC5000=m CONFIG_MEDIA_TUNER_XC4000=m CONFIG_MEDIA_TUNER_MXL5005S=m CONFIG_MEDIA_TUNER_MXL5007T=m CONFIG_MEDIA_TUNER_MC44S803=m CONFIG_MEDIA_TUNER_MAX2165=m CONFIG_MEDIA_TUNER_TDA18218=m CONFIG_MEDIA_TUNER_FC0011=m CONFIG_MEDIA_TUNER_FC0012=m CONFIG_MEDIA_TUNER_FC0013=m CONFIG_MEDIA_TUNER_TDA18212=m CONFIG_MEDIA_TUNER_E4000=m CONFIG_MEDIA_TUNER_FC2580=m CONFIG_MEDIA_TUNER_M88RS6000T=m CONFIG_MEDIA_TUNER_TUA9001=m CONFIG_MEDIA_TUNER_SI2157=m CONFIG_MEDIA_TUNER_IT913X=m CONFIG_MEDIA_TUNER_R820T=m # CONFIG_MEDIA_TUNER_MXL301RF is not set CONFIG_MEDIA_TUNER_QM1D1C0042=m CONFIG_MEDIA_TUNER_QM1D1B0004=m # end of Customize TV tuners # # Customise DVB Frontends # # # Multistandard (satellite) frontends # CONFIG_DVB_STB0899=m CONFIG_DVB_STB6100=m CONFIG_DVB_STV090x=m CONFIG_DVB_STV0910=m CONFIG_DVB_STV6110x=m CONFIG_DVB_STV6111=m CONFIG_DVB_MXL5XX=m CONFIG_DVB_M88DS3103=m # # Multistandard (cable + terrestrial) frontends # CONFIG_DVB_DRXK=m CONFIG_DVB_TDA18271C2DD=m CONFIG_DVB_SI2165=m CONFIG_DVB_MN88472=m CONFIG_DVB_MN88473=m # # DVB-S (satellite) frontends # CONFIG_DVB_CX24110=m CONFIG_DVB_CX24123=m CONFIG_DVB_MT312=m CONFIG_DVB_ZL10036=m CONFIG_DVB_ZL10039=m CONFIG_DVB_S5H1420=m CONFIG_DVB_STV0288=m CONFIG_DVB_STB6000=m CONFIG_DVB_STV0299=m CONFIG_DVB_STV6110=m CONFIG_DVB_STV0900=m CONFIG_DVB_TDA8083=m CONFIG_DVB_TDA10086=m CONFIG_DVB_TDA8261=m CONFIG_DVB_VES1X93=m CONFIG_DVB_TUNER_ITD1000=m CONFIG_DVB_TUNER_CX24113=m CONFIG_DVB_TDA826X=m CONFIG_DVB_TUA6100=m CONFIG_DVB_CX24116=m CONFIG_DVB_CX24117=m CONFIG_DVB_CX24120=m CONFIG_DVB_SI21XX=m CONFIG_DVB_TS2020=m CONFIG_DVB_DS3000=m CONFIG_DVB_MB86A16=m CONFIG_DVB_TDA10071=m # # DVB-T (terrestrial) frontends # CONFIG_DVB_SP8870=m CONFIG_DVB_SP887X=m CONFIG_DVB_CX22700=m CONFIG_DVB_CX22702=m # CONFIG_DVB_S5H1432 is not set CONFIG_DVB_DRXD=m CONFIG_DVB_L64781=m CONFIG_DVB_TDA1004X=m CONFIG_DVB_NXT6000=m CONFIG_DVB_MT352=m CONFIG_DVB_ZL10353=m CONFIG_DVB_DIB3000MB=m CONFIG_DVB_DIB3000MC=m CONFIG_DVB_DIB7000M=m CONFIG_DVB_DIB7000P=m # CONFIG_DVB_DIB9000 is not set CONFIG_DVB_TDA10048=m CONFIG_DVB_AF9013=m CONFIG_DVB_EC100=m CONFIG_DVB_STV0367=m CONFIG_DVB_CXD2820R=m CONFIG_DVB_CXD2841ER=m CONFIG_DVB_RTL2830=m CONFIG_DVB_RTL2832=m CONFIG_DVB_SI2168=m # CONFIG_DVB_ZD1301_DEMOD is not set CONFIG_DVB_GP8PSK_FE=m # CONFIG_DVB_CXD2880 is not set # # DVB-C (cable) frontends # CONFIG_DVB_VES1820=m CONFIG_DVB_TDA10021=m CONFIG_DVB_TDA10023=m CONFIG_DVB_STV0297=m # # ATSC (North American/Korean Terrestrial/Cable DTV) frontends # CONFIG_DVB_NXT200X=m CONFIG_DVB_OR51211=m CONFIG_DVB_OR51132=m CONFIG_DVB_BCM3510=m CONFIG_DVB_LGDT330X=m CONFIG_DVB_LGDT3305=m CONFIG_DVB_LGDT3306A=m CONFIG_DVB_LG2160=m CONFIG_DVB_S5H1409=m CONFIG_DVB_AU8522=m CONFIG_DVB_AU8522_DTV=m CONFIG_DVB_AU8522_V4L=m CONFIG_DVB_S5H1411=m # # ISDB-T (terrestrial) frontends # CONFIG_DVB_S921=m CONFIG_DVB_DIB8000=m CONFIG_DVB_MB86A20S=m # # ISDB-S (satellite) & ISDB-T (terrestrial) frontends # CONFIG_DVB_TC90522=m # CONFIG_DVB_MN88443X is not set # # Digital terrestrial only tuners/PLL # CONFIG_DVB_PLL=m CONFIG_DVB_TUNER_DIB0070=m CONFIG_DVB_TUNER_DIB0090=m # # SEC control devices for DVB-S # CONFIG_DVB_DRX39XYJ=m CONFIG_DVB_LNBH25=m # CONFIG_DVB_LNBH29 is not set CONFIG_DVB_LNBP21=m CONFIG_DVB_LNBP22=m CONFIG_DVB_ISL6405=m CONFIG_DVB_ISL6421=m CONFIG_DVB_ISL6423=m CONFIG_DVB_A8293=m # CONFIG_DVB_LGS8GL5 is not set CONFIG_DVB_LGS8GXX=m CONFIG_DVB_ATBM8830=m CONFIG_DVB_TDA665x=m CONFIG_DVB_IX2505V=m CONFIG_DVB_M88RS2000=m CONFIG_DVB_AF9033=m # CONFIG_DVB_HORUS3A is not set # CONFIG_DVB_ASCOT2E is not set # CONFIG_DVB_HELENE is not set # # Common Interface (EN50221) controller drivers # CONFIG_DVB_CXD2099=m # CONFIG_DVB_SP2 is not set # # Tools to develop new frontends # CONFIG_DVB_DUMMY_FE=m # end of Customise DVB Frontends # # Graphics support # CONFIG_AGP=y CONFIG_AGP_AMD64=y CONFIG_AGP_INTEL=y CONFIG_AGP_SIS=y CONFIG_AGP_VIA=y CONFIG_INTEL_GTT=y CONFIG_VGA_ARB=y CONFIG_VGA_ARB_MAX_GPUS=64 CONFIG_VGA_SWITCHEROO=y CONFIG_DRM=m CONFIG_DRM_MIPI_DSI=y CONFIG_DRM_DP_AUX_CHARDEV=y CONFIG_DRM_EXPORT_FOR_TESTS=y CONFIG_DRM_DEBUG_SELFTEST=m CONFIG_DRM_KMS_HELPER=m CONFIG_DRM_KMS_FB_HELPER=y # CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS is not set CONFIG_DRM_FBDEV_EMULATION=y CONFIG_DRM_FBDEV_OVERALLOC=100 # CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set CONFIG_DRM_LOAD_EDID_FIRMWARE=y # CONFIG_DRM_DP_CEC is not set CONFIG_DRM_TTM=m CONFIG_DRM_TTM_DMA_PAGE_POOL=y CONFIG_DRM_VRAM_HELPER=m CONFIG_DRM_TTM_HELPER=m CONFIG_DRM_GEM_SHMEM_HELPER=y # # I2C encoder or helper chips # CONFIG_DRM_I2C_CH7006=m CONFIG_DRM_I2C_SIL164=m # CONFIG_DRM_I2C_NXP_TDA998X is not set # CONFIG_DRM_I2C_NXP_TDA9950 is not set # end of I2C encoder or helper chips # # ARM devices # # end of ARM devices # CONFIG_DRM_RADEON is not set # CONFIG_DRM_AMDGPU is not set # # ACP (Audio CoProcessor) Configuration # # end of ACP (Audio CoProcessor) Configuration # CONFIG_DRM_NOUVEAU is not set CONFIG_DRM_I915=m # CONFIG_DRM_I915_ALPHA_SUPPORT is not set CONFIG_DRM_I915_FORCE_PROBE="" CONFIG_DRM_I915_CAPTURE_ERROR=y CONFIG_DRM_I915_COMPRESS_ERROR=y CONFIG_DRM_I915_USERPTR=y CONFIG_DRM_I915_GVT=y CONFIG_DRM_I915_GVT_KVMGT=m # # drm/i915 Debugging # # CONFIG_DRM_I915_WERROR is not set # CONFIG_DRM_I915_DEBUG is not set # CONFIG_DRM_I915_DEBUG_MMIO is not set # CONFIG_DRM_I915_SW_FENCE_DEBUG_OBJECTS is not set # CONFIG_DRM_I915_SW_FENCE_CHECK_DAG is not set # CONFIG_DRM_I915_DEBUG_GUC is not set # CONFIG_DRM_I915_SELFTEST is not set # CONFIG_DRM_I915_LOW_LEVEL_TRACEPOINTS is not set # CONFIG_DRM_I915_DEBUG_VBLANK_EVADE is not set # CONFIG_DRM_I915_DEBUG_RUNTIME_PM is not set # end of drm/i915 Debugging # # drm/i915 Profile Guided Optimisation # CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND=250 CONFIG_DRM_I915_HEARTBEAT_INTERVAL=2500 CONFIG_DRM_I915_PREEMPT_TIMEOUT=640 CONFIG_DRM_I915_SPIN_REQUEST=5 CONFIG_DRM_I915_STOP_TIMEOUT=100 CONFIG_DRM_I915_TIMESLICE_DURATION=1 # end of drm/i915 Profile Guided Optimisation CONFIG_DRM_VGEM=m # CONFIG_DRM_VKMS is not set CONFIG_DRM_VMWGFX=m CONFIG_DRM_VMWGFX_FBCON=y CONFIG_DRM_GMA500=m CONFIG_DRM_GMA600=y CONFIG_DRM_GMA3600=y CONFIG_DRM_UDL=m CONFIG_DRM_AST=m CONFIG_DRM_MGAG200=m CONFIG_DRM_CIRRUS_QEMU=m CONFIG_DRM_QXL=m CONFIG_DRM_BOCHS=m CONFIG_DRM_VIRTIO_GPU=m CONFIG_DRM_PANEL=y # # Display Panels # # CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set # end of Display Panels CONFIG_DRM_BRIDGE=y CONFIG_DRM_PANEL_BRIDGE=y # # Display Interface Bridges # # CONFIG_DRM_ANALOGIX_ANX78XX is not set # end of Display Interface Bridges # CONFIG_DRM_ETNAVIV is not set # CONFIG_DRM_GM12U320 is not set # CONFIG_TINYDRM_HX8357D is not set # CONFIG_TINYDRM_ILI9225 is not set # CONFIG_TINYDRM_ILI9341 is not set # CONFIG_TINYDRM_MI0283QT is not set # CONFIG_TINYDRM_REPAPER is not set # CONFIG_TINYDRM_ST7586 is not set # CONFIG_TINYDRM_ST7735R is not set # CONFIG_DRM_XEN is not set # CONFIG_DRM_VBOXVIDEO is not set # CONFIG_DRM_LEGACY is not set CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y CONFIG_DRM_LIB_RANDOM=y # # Frame buffer Devices # CONFIG_FB_CMDLINE=y CONFIG_FB_NOTIFY=y CONFIG_FB=y # CONFIG_FIRMWARE_EDID is not set CONFIG_FB_BOOT_VESA_SUPPORT=y CONFIG_FB_CFB_FILLRECT=y CONFIG_FB_CFB_COPYAREA=y CONFIG_FB_CFB_IMAGEBLIT=y CONFIG_FB_SYS_FILLRECT=m CONFIG_FB_SYS_COPYAREA=m CONFIG_FB_SYS_IMAGEBLIT=m # CONFIG_FB_FOREIGN_ENDIAN is not set CONFIG_FB_SYS_FOPS=m CONFIG_FB_DEFERRED_IO=y # CONFIG_FB_MODE_HELPERS is not set CONFIG_FB_TILEBLITTING=y # # Frame buffer hardware drivers # # CONFIG_FB_CIRRUS is not set # CONFIG_FB_PM2 is not set # CONFIG_FB_CYBER2000 is not set # CONFIG_FB_ARC is not set # CONFIG_FB_ASILIANT is not set # CONFIG_FB_IMSTT is not set # CONFIG_FB_VGA16 is not set # CONFIG_FB_UVESA is not set CONFIG_FB_VESA=y CONFIG_FB_EFI=y # CONFIG_FB_N411 is not set # CONFIG_FB_HGA is not set # CONFIG_FB_OPENCORES is not set # CONFIG_FB_S1D13XXX is not set # CONFIG_FB_NVIDIA is not set # CONFIG_FB_RIVA is not set # CONFIG_FB_I740 is not set # CONFIG_FB_LE80578 is not set # CONFIG_FB_INTEL is not set # CONFIG_FB_MATROX is not set # CONFIG_FB_RADEON is not set # CONFIG_FB_ATY128 is not set # CONFIG_FB_ATY is not set # CONFIG_FB_S3 is not set # CONFIG_FB_SAVAGE is not set # CONFIG_FB_SIS is not set # CONFIG_FB_VIA is not set # CONFIG_FB_NEOMAGIC is not set # CONFIG_FB_KYRO is not set # CONFIG_FB_3DFX is not set # CONFIG_FB_VOODOO1 is not set # CONFIG_FB_VT8623 is not set # CONFIG_FB_TRIDENT is not set # CONFIG_FB_ARK is not set # CONFIG_FB_PM3 is not set # CONFIG_FB_CARMINE is not set # CONFIG_FB_SM501 is not set # CONFIG_FB_SMSCUFX is not set # CONFIG_FB_UDL is not set # CONFIG_FB_IBM_GXT4500 is not set # CONFIG_FB_VIRTUAL is not set # CONFIG_XEN_FBDEV_FRONTEND is not set # CONFIG_FB_METRONOME is not set # CONFIG_FB_MB862XX is not set CONFIG_FB_HYPERV=m # CONFIG_FB_SIMPLE is not set # CONFIG_FB_SM712 is not set # end of Frame buffer Devices # # Backlight & LCD device support # CONFIG_LCD_CLASS_DEVICE=m # CONFIG_LCD_L4F00242T03 is not set # CONFIG_LCD_LMS283GF05 is not set # CONFIG_LCD_LTV350QV is not set # CONFIG_LCD_ILI922X is not set # CONFIG_LCD_ILI9320 is not set # CONFIG_LCD_TDO24M is not set # CONFIG_LCD_VGG2432A4 is not set CONFIG_LCD_PLATFORM=m # CONFIG_LCD_AMS369FG06 is not set # CONFIG_LCD_LMS501KF03 is not set # CONFIG_LCD_HX8357 is not set # CONFIG_LCD_OTM3225A is not set CONFIG_BACKLIGHT_CLASS_DEVICE=y # CONFIG_BACKLIGHT_GENERIC is not set # CONFIG_BACKLIGHT_PWM is not set CONFIG_BACKLIGHT_APPLE=m # CONFIG_BACKLIGHT_QCOM_WLED is not set # CONFIG_BACKLIGHT_SAHARA is not set # CONFIG_BACKLIGHT_ADP8860 is not set # CONFIG_BACKLIGHT_ADP8870 is not set # CONFIG_BACKLIGHT_LM3630A is not set # CONFIG_BACKLIGHT_LM3639 is not set CONFIG_BACKLIGHT_LP855X=m # CONFIG_BACKLIGHT_GPIO is not set # CONFIG_BACKLIGHT_LV5207LP is not set # CONFIG_BACKLIGHT_BD6107 is not set # CONFIG_BACKLIGHT_ARCXCNN is not set # end of Backlight & LCD device support CONFIG_HDMI=y # # Console display driver support # CONFIG_VGA_CONSOLE=y CONFIG_VGACON_SOFT_SCROLLBACK=y CONFIG_VGACON_SOFT_SCROLLBACK_SIZE=64 # CONFIG_VGACON_SOFT_SCROLLBACK_PERSISTENT_ENABLE_BY_DEFAULT is not set CONFIG_DUMMY_CONSOLE=y CONFIG_DUMMY_CONSOLE_COLUMNS=80 CONFIG_DUMMY_CONSOLE_ROWS=25 CONFIG_FRAMEBUFFER_CONSOLE=y CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y # CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set # end of Console display driver support CONFIG_LOGO=y # CONFIG_LOGO_LINUX_MONO is not set # CONFIG_LOGO_LINUX_VGA16 is not set CONFIG_LOGO_LINUX_CLUT224=y # end of Graphics support CONFIG_SOUND=m CONFIG_SOUND_OSS_CORE=y CONFIG_SOUND_OSS_CORE_PRECLAIM=y CONFIG_SND=m CONFIG_SND_TIMER=m CONFIG_SND_PCM=m CONFIG_SND_PCM_ELD=y CONFIG_SND_HWDEP=m CONFIG_SND_SEQ_DEVICE=m CONFIG_SND_RAWMIDI=m CONFIG_SND_COMPRESS_OFFLOAD=m CONFIG_SND_JACK=y CONFIG_SND_JACK_INPUT_DEV=y CONFIG_SND_OSSEMUL=y # CONFIG_SND_MIXER_OSS is not set # CONFIG_SND_PCM_OSS is not set CONFIG_SND_PCM_TIMER=y CONFIG_SND_HRTIMER=m CONFIG_SND_DYNAMIC_MINORS=y CONFIG_SND_MAX_CARDS=32 # CONFIG_SND_SUPPORT_OLD_API is not set CONFIG_SND_PROC_FS=y CONFIG_SND_VERBOSE_PROCFS=y # CONFIG_SND_VERBOSE_PRINTK is not set # CONFIG_SND_DEBUG is not set CONFIG_SND_VMASTER=y CONFIG_SND_DMA_SGBUF=y CONFIG_SND_SEQUENCER=m CONFIG_SND_SEQ_DUMMY=m CONFIG_SND_SEQUENCER_OSS=m CONFIG_SND_SEQ_HRTIMER_DEFAULT=y CONFIG_SND_SEQ_MIDI_EVENT=m CONFIG_SND_SEQ_MIDI=m CONFIG_SND_SEQ_MIDI_EMUL=m CONFIG_SND_SEQ_VIRMIDI=m CONFIG_SND_MPU401_UART=m CONFIG_SND_OPL3_LIB=m CONFIG_SND_OPL3_LIB_SEQ=m CONFIG_SND_VX_LIB=m CONFIG_SND_AC97_CODEC=m CONFIG_SND_DRIVERS=y CONFIG_SND_PCSP=m CONFIG_SND_DUMMY=m CONFIG_SND_ALOOP=m CONFIG_SND_VIRMIDI=m CONFIG_SND_MTPAV=m # CONFIG_SND_MTS64 is not set # CONFIG_SND_SERIAL_U16550 is not set CONFIG_SND_MPU401=m # CONFIG_SND_PORTMAN2X4 is not set CONFIG_SND_AC97_POWER_SAVE=y CONFIG_SND_AC97_POWER_SAVE_DEFAULT=5 CONFIG_SND_PCI=y CONFIG_SND_AD1889=m # CONFIG_SND_ALS300 is not set # CONFIG_SND_ALS4000 is not set CONFIG_SND_ALI5451=m CONFIG_SND_ASIHPI=m CONFIG_SND_ATIIXP=m CONFIG_SND_ATIIXP_MODEM=m CONFIG_SND_AU8810=m CONFIG_SND_AU8820=m CONFIG_SND_AU8830=m # CONFIG_SND_AW2 is not set # CONFIG_SND_AZT3328 is not set CONFIG_SND_BT87X=m # CONFIG_SND_BT87X_OVERCLOCK is not set CONFIG_SND_CA0106=m CONFIG_SND_CMIPCI=m CONFIG_SND_OXYGEN_LIB=m CONFIG_SND_OXYGEN=m # CONFIG_SND_CS4281 is not set CONFIG_SND_CS46XX=m CONFIG_SND_CS46XX_NEW_DSP=y CONFIG_SND_CTXFI=m CONFIG_SND_DARLA20=m CONFIG_SND_GINA20=m CONFIG_SND_LAYLA20=m CONFIG_SND_DARLA24=m CONFIG_SND_GINA24=m CONFIG_SND_LAYLA24=m CONFIG_SND_MONA=m CONFIG_SND_MIA=m CONFIG_SND_ECHO3G=m CONFIG_SND_INDIGO=m CONFIG_SND_INDIGOIO=m CONFIG_SND_INDIGODJ=m CONFIG_SND_INDIGOIOX=m CONFIG_SND_INDIGODJX=m CONFIG_SND_EMU10K1=m CONFIG_SND_EMU10K1_SEQ=m CONFIG_SND_EMU10K1X=m CONFIG_SND_ENS1370=m CONFIG_SND_ENS1371=m # CONFIG_SND_ES1938 is not set CONFIG_SND_ES1968=m CONFIG_SND_ES1968_INPUT=y CONFIG_SND_ES1968_RADIO=y # CONFIG_SND_FM801 is not set CONFIG_SND_HDSP=m CONFIG_SND_HDSPM=m CONFIG_SND_ICE1712=m CONFIG_SND_ICE1724=m CONFIG_SND_INTEL8X0=m CONFIG_SND_INTEL8X0M=m CONFIG_SND_KORG1212=m CONFIG_SND_LOLA=m CONFIG_SND_LX6464ES=m CONFIG_SND_MAESTRO3=m CONFIG_SND_MAESTRO3_INPUT=y CONFIG_SND_MIXART=m # CONFIG_SND_NM256 is not set CONFIG_SND_PCXHR=m # CONFIG_SND_RIPTIDE is not set CONFIG_SND_RME32=m CONFIG_SND_RME96=m CONFIG_SND_RME9652=m # CONFIG_SND_SONICVIBES is not set CONFIG_SND_TRIDENT=m CONFIG_SND_VIA82XX=m CONFIG_SND_VIA82XX_MODEM=m CONFIG_SND_VIRTUOSO=m CONFIG_SND_VX222=m # CONFIG_SND_YMFPCI is not set # # HD-Audio # CONFIG_SND_HDA=m CONFIG_SND_HDA_INTEL=m CONFIG_SND_HDA_HWDEP=y CONFIG_SND_HDA_RECONFIG=y CONFIG_SND_HDA_INPUT_BEEP=y CONFIG_SND_HDA_INPUT_BEEP_MODE=0 CONFIG_SND_HDA_PATCH_LOADER=y CONFIG_SND_HDA_CODEC_REALTEK=m CONFIG_SND_HDA_CODEC_ANALOG=m CONFIG_SND_HDA_CODEC_SIGMATEL=m CONFIG_SND_HDA_CODEC_VIA=m CONFIG_SND_HDA_CODEC_HDMI=m CONFIG_SND_HDA_CODEC_CIRRUS=m CONFIG_SND_HDA_CODEC_CONEXANT=m CONFIG_SND_HDA_CODEC_CA0110=m CONFIG_SND_HDA_CODEC_CA0132=m CONFIG_SND_HDA_CODEC_CA0132_DSP=y CONFIG_SND_HDA_CODEC_CMEDIA=m CONFIG_SND_HDA_CODEC_SI3054=m CONFIG_SND_HDA_GENERIC=m CONFIG_SND_HDA_POWER_SAVE_DEFAULT=0 # end of HD-Audio CONFIG_SND_HDA_CORE=m CONFIG_SND_HDA_DSP_LOADER=y CONFIG_SND_HDA_COMPONENT=y CONFIG_SND_HDA_I915=y CONFIG_SND_HDA_EXT_CORE=m CONFIG_SND_HDA_PREALLOC_SIZE=0 CONFIG_SND_INTEL_NHLT=y CONFIG_SND_INTEL_DSP_CONFIG=m # CONFIG_SND_SPI is not set CONFIG_SND_USB=y CONFIG_SND_USB_AUDIO=m CONFIG_SND_USB_AUDIO_USE_MEDIA_CONTROLLER=y CONFIG_SND_USB_UA101=m CONFIG_SND_USB_USX2Y=m CONFIG_SND_USB_CAIAQ=m CONFIG_SND_USB_CAIAQ_INPUT=y CONFIG_SND_USB_US122L=m CONFIG_SND_USB_6FIRE=m CONFIG_SND_USB_HIFACE=m CONFIG_SND_BCD2000=m CONFIG_SND_USB_LINE6=m CONFIG_SND_USB_POD=m CONFIG_SND_USB_PODHD=m CONFIG_SND_USB_TONEPORT=m CONFIG_SND_USB_VARIAX=m CONFIG_SND_FIREWIRE=y CONFIG_SND_FIREWIRE_LIB=m # CONFIG_SND_DICE is not set # CONFIG_SND_OXFW is not set CONFIG_SND_ISIGHT=m # CONFIG_SND_FIREWORKS is not set # CONFIG_SND_BEBOB is not set # CONFIG_SND_FIREWIRE_DIGI00X is not set # CONFIG_SND_FIREWIRE_TASCAM is not set # CONFIG_SND_FIREWIRE_MOTU is not set # CONFIG_SND_FIREFACE is not set CONFIG_SND_SOC=m CONFIG_SND_SOC_COMPRESS=y CONFIG_SND_SOC_TOPOLOGY=y CONFIG_SND_SOC_ACPI=m # CONFIG_SND_SOC_AMD_ACP is not set # CONFIG_SND_SOC_AMD_ACP3x is not set # CONFIG_SND_ATMEL_SOC is not set # CONFIG_SND_DESIGNWARE_I2S is not set # # SoC Audio for Freescale CPUs # # # Common SoC Audio options for Freescale CPUs: # # CONFIG_SND_SOC_FSL_ASRC is not set # CONFIG_SND_SOC_FSL_SAI is not set # CONFIG_SND_SOC_FSL_AUDMIX is not set # CONFIG_SND_SOC_FSL_SSI is not set # CONFIG_SND_SOC_FSL_SPDIF is not set # CONFIG_SND_SOC_FSL_ESAI is not set # CONFIG_SND_SOC_FSL_MICFIL is not set # CONFIG_SND_SOC_IMX_AUDMUX is not set # end of SoC Audio for Freescale CPUs # CONFIG_SND_I2S_HI6210_I2S is not set # CONFIG_SND_SOC_IMG is not set CONFIG_SND_SOC_INTEL_SST_TOPLEVEL=y CONFIG_SND_SST_IPC=m CONFIG_SND_SST_IPC_ACPI=m CONFIG_SND_SOC_INTEL_SST_ACPI=m CONFIG_SND_SOC_INTEL_SST=m CONFIG_SND_SOC_INTEL_SST_FIRMWARE=m CONFIG_SND_SOC_INTEL_HASWELL=m CONFIG_SND_SST_ATOM_HIFI2_PLATFORM=m # CONFIG_SND_SST_ATOM_HIFI2_PLATFORM_PCI is not set CONFIG_SND_SST_ATOM_HIFI2_PLATFORM_ACPI=m CONFIG_SND_SOC_INTEL_SKYLAKE=m CONFIG_SND_SOC_INTEL_SKL=m CONFIG_SND_SOC_INTEL_APL=m CONFIG_SND_SOC_INTEL_KBL=m CONFIG_SND_SOC_INTEL_GLK=m CONFIG_SND_SOC_INTEL_CNL=m CONFIG_SND_SOC_INTEL_CFL=m # CONFIG_SND_SOC_INTEL_CML_H is not set # CONFIG_SND_SOC_INTEL_CML_LP is not set CONFIG_SND_SOC_INTEL_SKYLAKE_FAMILY=m CONFIG_SND_SOC_INTEL_SKYLAKE_SSP_CLK=m # CONFIG_SND_SOC_INTEL_SKYLAKE_HDAUDIO_CODEC is not set CONFIG_SND_SOC_INTEL_SKYLAKE_COMMON=m CONFIG_SND_SOC_ACPI_INTEL_MATCH=m CONFIG_SND_SOC_INTEL_MACH=y # CONFIG_SND_SOC_INTEL_USER_FRIENDLY_LONG_NAMES is not set CONFIG_SND_SOC_INTEL_HASWELL_MACH=m # CONFIG_SND_SOC_INTEL_BDW_RT5650_MACH is not set CONFIG_SND_SOC_INTEL_BDW_RT5677_MACH=m CONFIG_SND_SOC_INTEL_BROADWELL_MACH=m CONFIG_SND_SOC_INTEL_BYTCR_RT5640_MACH=m CONFIG_SND_SOC_INTEL_BYTCR_RT5651_MACH=m CONFIG_SND_SOC_INTEL_CHT_BSW_RT5672_MACH=m CONFIG_SND_SOC_INTEL_CHT_BSW_RT5645_MACH=m CONFIG_SND_SOC_INTEL_CHT_BSW_MAX98090_TI_MACH=m # CONFIG_SND_SOC_INTEL_CHT_BSW_NAU8824_MACH is not set # CONFIG_SND_SOC_INTEL_BYT_CHT_CX2072X_MACH is not set CONFIG_SND_SOC_INTEL_BYT_CHT_DA7213_MACH=m CONFIG_SND_SOC_INTEL_BYT_CHT_ES8316_MACH=m CONFIG_SND_SOC_INTEL_BYT_CHT_NOCODEC_MACH=m CONFIG_SND_SOC_INTEL_SKL_RT286_MACH=m CONFIG_SND_SOC_INTEL_SKL_NAU88L25_SSM4567_MACH=m CONFIG_SND_SOC_INTEL_SKL_NAU88L25_MAX98357A_MACH=m CONFIG_SND_SOC_INTEL_DA7219_MAX98357A_GENERIC=m CONFIG_SND_SOC_INTEL_BXT_DA7219_MAX98357A_COMMON=m CONFIG_SND_SOC_INTEL_BXT_DA7219_MAX98357A_MACH=m CONFIG_SND_SOC_INTEL_BXT_RT298_MACH=m CONFIG_SND_SOC_INTEL_KBL_RT5663_MAX98927_MACH=m CONFIG_SND_SOC_INTEL_KBL_RT5663_RT5514_MAX98927_MACH=m # CONFIG_SND_SOC_INTEL_KBL_DA7219_MAX98357A_MACH is not set # CONFIG_SND_SOC_INTEL_KBL_DA7219_MAX98927_MACH is not set # CONFIG_SND_SOC_INTEL_KBL_RT5660_MACH is not set # CONFIG_SND_SOC_MTK_BTCVSD is not set # CONFIG_SND_SOC_SOF_TOPLEVEL is not set # # STMicroelectronics STM32 SOC audio support # # end of STMicroelectronics STM32 SOC audio support # CONFIG_SND_SOC_XILINX_I2S is not set # CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER is not set # CONFIG_SND_SOC_XILINX_SPDIF is not set # CONFIG_SND_SOC_XTFPGA_I2S is not set # CONFIG_ZX_TDM is not set CONFIG_SND_SOC_I2C_AND_SPI=m # # CODEC drivers # # CONFIG_SND_SOC_AC97_CODEC is not set # CONFIG_SND_SOC_ADAU1701 is not set # CONFIG_SND_SOC_ADAU1761_I2C is not set # CONFIG_SND_SOC_ADAU1761_SPI is not set # CONFIG_SND_SOC_ADAU7002 is not set # CONFIG_SND_SOC_ADAU7118_HW is not set # CONFIG_SND_SOC_ADAU7118_I2C is not set # CONFIG_SND_SOC_AK4104 is not set # CONFIG_SND_SOC_AK4118 is not set # CONFIG_SND_SOC_AK4458 is not set # CONFIG_SND_SOC_AK4554 is not set # CONFIG_SND_SOC_AK4613 is not set # CONFIG_SND_SOC_AK4642 is not set # CONFIG_SND_SOC_AK5386 is not set # CONFIG_SND_SOC_AK5558 is not set # CONFIG_SND_SOC_ALC5623 is not set # CONFIG_SND_SOC_BD28623 is not set # CONFIG_SND_SOC_BT_SCO is not set # CONFIG_SND_SOC_CS35L32 is not set # CONFIG_SND_SOC_CS35L33 is not set # CONFIG_SND_SOC_CS35L34 is not set # CONFIG_SND_SOC_CS35L35 is not set # CONFIG_SND_SOC_CS35L36 is not set # CONFIG_SND_SOC_CS42L42 is not set # CONFIG_SND_SOC_CS42L51_I2C is not set # CONFIG_SND_SOC_CS42L52 is not set # CONFIG_SND_SOC_CS42L56 is not set # CONFIG_SND_SOC_CS42L73 is not set # CONFIG_SND_SOC_CS4265 is not set # CONFIG_SND_SOC_CS4270 is not set # CONFIG_SND_SOC_CS4271_I2C is not set # CONFIG_SND_SOC_CS4271_SPI is not set # CONFIG_SND_SOC_CS42XX8_I2C is not set # CONFIG_SND_SOC_CS43130 is not set # CONFIG_SND_SOC_CS4341 is not set # CONFIG_SND_SOC_CS4349 is not set # CONFIG_SND_SOC_CS53L30 is not set # CONFIG_SND_SOC_CX2072X is not set CONFIG_SND_SOC_DA7213=m CONFIG_SND_SOC_DA7219=m CONFIG_SND_SOC_DMIC=m # CONFIG_SND_SOC_ES7134 is not set # CONFIG_SND_SOC_ES7241 is not set CONFIG_SND_SOC_ES8316=m # CONFIG_SND_SOC_ES8328_I2C is not set # CONFIG_SND_SOC_ES8328_SPI is not set # CONFIG_SND_SOC_GTM601 is not set CONFIG_SND_SOC_HDAC_HDMI=m # CONFIG_SND_SOC_INNO_RK3036 is not set # CONFIG_SND_SOC_MAX98088 is not set CONFIG_SND_SOC_MAX98090=m CONFIG_SND_SOC_MAX98357A=m # CONFIG_SND_SOC_MAX98504 is not set # CONFIG_SND_SOC_MAX9867 is not set CONFIG_SND_SOC_MAX98927=m # CONFIG_SND_SOC_MAX98373 is not set # CONFIG_SND_SOC_MAX9860 is not set # CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set # CONFIG_SND_SOC_PCM1681 is not set # CONFIG_SND_SOC_PCM1789_I2C is not set # CONFIG_SND_SOC_PCM179X_I2C is not set # CONFIG_SND_SOC_PCM179X_SPI is not set # CONFIG_SND_SOC_PCM186X_I2C is not set # CONFIG_SND_SOC_PCM186X_SPI is not set # CONFIG_SND_SOC_PCM3060_I2C is not set # CONFIG_SND_SOC_PCM3060_SPI is not set # CONFIG_SND_SOC_PCM3168A_I2C is not set # CONFIG_SND_SOC_PCM3168A_SPI is not set # CONFIG_SND_SOC_PCM512x_I2C is not set # CONFIG_SND_SOC_PCM512x_SPI is not set # CONFIG_SND_SOC_RK3328 is not set CONFIG_SND_SOC_RL6231=m CONFIG_SND_SOC_RL6347A=m CONFIG_SND_SOC_RT286=m CONFIG_SND_SOC_RT298=m CONFIG_SND_SOC_RT5514=m CONFIG_SND_SOC_RT5514_SPI=m # CONFIG_SND_SOC_RT5616 is not set # CONFIG_SND_SOC_RT5631 is not set CONFIG_SND_SOC_RT5640=m CONFIG_SND_SOC_RT5645=m CONFIG_SND_SOC_RT5651=m CONFIG_SND_SOC_RT5663=m CONFIG_SND_SOC_RT5670=m CONFIG_SND_SOC_RT5677=m CONFIG_SND_SOC_RT5677_SPI=m # CONFIG_SND_SOC_SGTL5000 is not set # CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set # CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set # CONFIG_SND_SOC_SPDIF is not set # CONFIG_SND_SOC_SSM2305 is not set # CONFIG_SND_SOC_SSM2602_SPI is not set # CONFIG_SND_SOC_SSM2602_I2C is not set CONFIG_SND_SOC_SSM4567=m # CONFIG_SND_SOC_STA32X is not set # CONFIG_SND_SOC_STA350 is not set # CONFIG_SND_SOC_STI_SAS is not set # CONFIG_SND_SOC_TAS2552 is not set # CONFIG_SND_SOC_TAS2562 is not set # CONFIG_SND_SOC_TAS2770 is not set # CONFIG_SND_SOC_TAS5086 is not set # CONFIG_SND_SOC_TAS571X is not set # CONFIG_SND_SOC_TAS5720 is not set # CONFIG_SND_SOC_TAS6424 is not set # CONFIG_SND_SOC_TDA7419 is not set # CONFIG_SND_SOC_TFA9879 is not set # CONFIG_SND_SOC_TLV320AIC23_I2C is not set # CONFIG_SND_SOC_TLV320AIC23_SPI is not set # CONFIG_SND_SOC_TLV320AIC31XX is not set # CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set # CONFIG_SND_SOC_TLV320AIC32X4_SPI is not set # CONFIG_SND_SOC_TLV320AIC3X is not set CONFIG_SND_SOC_TS3A227E=m # CONFIG_SND_SOC_TSCS42XX is not set # CONFIG_SND_SOC_TSCS454 is not set # CONFIG_SND_SOC_UDA1334 is not set # CONFIG_SND_SOC_WM8510 is not set # CONFIG_SND_SOC_WM8523 is not set # CONFIG_SND_SOC_WM8524 is not set # CONFIG_SND_SOC_WM8580 is not set # CONFIG_SND_SOC_WM8711 is not set # CONFIG_SND_SOC_WM8728 is not set # CONFIG_SND_SOC_WM8731 is not set # CONFIG_SND_SOC_WM8737 is not set # CONFIG_SND_SOC_WM8741 is not set # CONFIG_SND_SOC_WM8750 is not set # CONFIG_SND_SOC_WM8753 is not set # CONFIG_SND_SOC_WM8770 is not set # CONFIG_SND_SOC_WM8776 is not set # CONFIG_SND_SOC_WM8782 is not set # CONFIG_SND_SOC_WM8804_I2C is not set # CONFIG_SND_SOC_WM8804_SPI is not set # CONFIG_SND_SOC_WM8903 is not set # CONFIG_SND_SOC_WM8904 is not set # CONFIG_SND_SOC_WM8960 is not set # CONFIG_SND_SOC_WM8962 is not set # CONFIG_SND_SOC_WM8974 is not set # CONFIG_SND_SOC_WM8978 is not set # CONFIG_SND_SOC_WM8985 is not set # CONFIG_SND_SOC_ZX_AUD96P22 is not set # CONFIG_SND_SOC_MAX9759 is not set # CONFIG_SND_SOC_MT6351 is not set # CONFIG_SND_SOC_MT6358 is not set # CONFIG_SND_SOC_MT6660 is not set # CONFIG_SND_SOC_NAU8540 is not set # CONFIG_SND_SOC_NAU8810 is not set # CONFIG_SND_SOC_NAU8822 is not set CONFIG_SND_SOC_NAU8824=m CONFIG_SND_SOC_NAU8825=m # CONFIG_SND_SOC_TPA6130A2 is not set # end of CODEC drivers # CONFIG_SND_SIMPLE_CARD is not set CONFIG_SND_X86=y CONFIG_HDMI_LPE_AUDIO=m CONFIG_SND_SYNTH_EMUX=m # CONFIG_SND_XEN_FRONTEND is not set CONFIG_AC97_BUS=m # # HID support # CONFIG_HID=y CONFIG_HID_BATTERY_STRENGTH=y CONFIG_HIDRAW=y CONFIG_UHID=m CONFIG_HID_GENERIC=y # # Special HID drivers # CONFIG_HID_A4TECH=y # CONFIG_HID_ACCUTOUCH is not set CONFIG_HID_ACRUX=m # CONFIG_HID_ACRUX_FF is not set CONFIG_HID_APPLE=y CONFIG_HID_APPLEIR=m # CONFIG_HID_ASUS is not set CONFIG_HID_AUREAL=m CONFIG_HID_BELKIN=y # CONFIG_HID_BETOP_FF is not set # CONFIG_HID_BIGBEN_FF is not set CONFIG_HID_CHERRY=y CONFIG_HID_CHICONY=y # CONFIG_HID_CORSAIR is not set # CONFIG_HID_COUGAR is not set # CONFIG_HID_MACALLY is not set CONFIG_HID_PRODIKEYS=m # CONFIG_HID_CMEDIA is not set # CONFIG_HID_CP2112 is not set # CONFIG_HID_CREATIVE_SB0540 is not set CONFIG_HID_CYPRESS=y CONFIG_HID_DRAGONRISE=m # CONFIG_DRAGONRISE_FF is not set # CONFIG_HID_EMS_FF is not set # CONFIG_HID_ELAN is not set CONFIG_HID_ELECOM=m # CONFIG_HID_ELO is not set CONFIG_HID_EZKEY=y # CONFIG_HID_GEMBIRD is not set # CONFIG_HID_GFRM is not set CONFIG_HID_HOLTEK=m # CONFIG_HOLTEK_FF is not set # CONFIG_HID_GT683R is not set CONFIG_HID_KEYTOUCH=m CONFIG_HID_KYE=m CONFIG_HID_UCLOGIC=m CONFIG_HID_WALTOP=m # CONFIG_HID_VIEWSONIC is not set CONFIG_HID_GYRATION=m CONFIG_HID_ICADE=m CONFIG_HID_ITE=y # CONFIG_HID_JABRA is not set CONFIG_HID_TWINHAN=m CONFIG_HID_KENSINGTON=y CONFIG_HID_LCPOWER=m CONFIG_HID_LED=m # CONFIG_HID_LENOVO is not set CONFIG_HID_LOGITECH=y CONFIG_HID_LOGITECH_DJ=m CONFIG_HID_LOGITECH_HIDPP=m # CONFIG_LOGITECH_FF is not set # CONFIG_LOGIRUMBLEPAD2_FF is not set # CONFIG_LOGIG940_FF is not set # CONFIG_LOGIWHEELS_FF is not set CONFIG_HID_MAGICMOUSE=y # CONFIG_HID_MALTRON is not set # CONFIG_HID_MAYFLASH is not set CONFIG_HID_REDRAGON=y CONFIG_HID_MICROSOFT=y CONFIG_HID_MONTEREY=y CONFIG_HID_MULTITOUCH=m # CONFIG_HID_NTI is not set CONFIG_HID_NTRIG=y CONFIG_HID_ORTEK=m CONFIG_HID_PANTHERLORD=m # CONFIG_PANTHERLORD_FF is not set # CONFIG_HID_PENMOUNT is not set CONFIG_HID_PETALYNX=m CONFIG_HID_PICOLCD=m CONFIG_HID_PICOLCD_FB=y CONFIG_HID_PICOLCD_BACKLIGHT=y CONFIG_HID_PICOLCD_LCD=y CONFIG_HID_PICOLCD_LEDS=y CONFIG_HID_PICOLCD_CIR=y CONFIG_HID_PLANTRONICS=y CONFIG_HID_PRIMAX=m # CONFIG_HID_RETRODE is not set CONFIG_HID_ROCCAT=m CONFIG_HID_SAITEK=m CONFIG_HID_SAMSUNG=m CONFIG_HID_SONY=m # CONFIG_SONY_FF is not set CONFIG_HID_SPEEDLINK=m # CONFIG_HID_STEAM is not set CONFIG_HID_STEELSERIES=m CONFIG_HID_SUNPLUS=m CONFIG_HID_RMI=m CONFIG_HID_GREENASIA=m # CONFIG_GREENASIA_FF is not set CONFIG_HID_HYPERV_MOUSE=m CONFIG_HID_SMARTJOYPLUS=m # CONFIG_SMARTJOYPLUS_FF is not set CONFIG_HID_TIVO=m CONFIG_HID_TOPSEED=m CONFIG_HID_THINGM=m CONFIG_HID_THRUSTMASTER=m # CONFIG_THRUSTMASTER_FF is not set # CONFIG_HID_UDRAW_PS3 is not set # CONFIG_HID_U2FZERO is not set CONFIG_HID_WACOM=m CONFIG_HID_WIIMOTE=m # CONFIG_HID_XINMO is not set CONFIG_HID_ZEROPLUS=m # CONFIG_ZEROPLUS_FF is not set CONFIG_HID_ZYDACRON=m CONFIG_HID_SENSOR_HUB=m CONFIG_HID_SENSOR_CUSTOM_SENSOR=m CONFIG_HID_ALPS=m # end of Special HID drivers # # USB HID support # CONFIG_USB_HID=y CONFIG_HID_PID=y CONFIG_USB_HIDDEV=y # end of USB HID support # # I2C HID support # CONFIG_I2C_HID=m # end of I2C HID support # # Intel ISH HID support # CONFIG_INTEL_ISH_HID=y # CONFIG_INTEL_ISH_FIRMWARE_DOWNLOADER is not set # end of Intel ISH HID support # end of HID support CONFIG_USB_OHCI_LITTLE_ENDIAN=y CONFIG_USB_SUPPORT=y CONFIG_USB_COMMON=y # CONFIG_USB_LED_TRIG is not set # CONFIG_USB_ULPI_BUS is not set # CONFIG_USB_CONN_GPIO is not set CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB=y CONFIG_USB_PCI=y CONFIG_USB_ANNOUNCE_NEW_DEVICES=y # # Miscellaneous USB options # CONFIG_USB_DEFAULT_PERSIST=y # CONFIG_USB_DYNAMIC_MINORS is not set # CONFIG_USB_OTG is not set # CONFIG_USB_OTG_WHITELIST is not set # CONFIG_USB_OTG_BLACKLIST_HUB is not set CONFIG_USB_LEDS_TRIGGER_USBPORT=m CONFIG_USB_AUTOSUSPEND_DELAY=2 CONFIG_USB_MON=y # # USB Host Controller Drivers # # CONFIG_USB_C67X00_HCD is not set CONFIG_USB_XHCI_HCD=y # CONFIG_USB_XHCI_DBGCAP is not set CONFIG_USB_XHCI_PCI=y # CONFIG_USB_XHCI_PLATFORM is not set CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_ROOT_HUB_TT=y CONFIG_USB_EHCI_TT_NEWSCHED=y CONFIG_USB_EHCI_PCI=y # CONFIG_USB_EHCI_FSL is not set # CONFIG_USB_EHCI_HCD_PLATFORM is not set # CONFIG_USB_OXU210HP_HCD is not set # CONFIG_USB_ISP116X_HCD is not set # CONFIG_USB_FOTG210_HCD is not set # CONFIG_USB_MAX3421_HCD is not set CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_HCD_PCI=y # CONFIG_USB_OHCI_HCD_PLATFORM is not set CONFIG_USB_UHCI_HCD=y # CONFIG_USB_U132_HCD is not set # CONFIG_USB_SL811_HCD is not set # CONFIG_USB_R8A66597_HCD is not set # CONFIG_USB_HCD_BCMA is not set # CONFIG_USB_HCD_SSB is not set # CONFIG_USB_HCD_TEST_MODE is not set # # USB Device Class drivers # CONFIG_USB_ACM=m CONFIG_USB_PRINTER=m CONFIG_USB_WDM=m CONFIG_USB_TMC=m # # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may # # # also be needed; see USB_STORAGE Help for more info # CONFIG_USB_STORAGE=m # CONFIG_USB_STORAGE_DEBUG is not set CONFIG_USB_STORAGE_REALTEK=m CONFIG_REALTEK_AUTOPM=y CONFIG_USB_STORAGE_DATAFAB=m CONFIG_USB_STORAGE_FREECOM=m CONFIG_USB_STORAGE_ISD200=m CONFIG_USB_STORAGE_USBAT=m CONFIG_USB_STORAGE_SDDR09=m CONFIG_USB_STORAGE_SDDR55=m CONFIG_USB_STORAGE_JUMPSHOT=m CONFIG_USB_STORAGE_ALAUDA=m CONFIG_USB_STORAGE_ONETOUCH=m CONFIG_USB_STORAGE_KARMA=m CONFIG_USB_STORAGE_CYPRESS_ATACB=m CONFIG_USB_STORAGE_ENE_UB6250=m CONFIG_USB_UAS=m # # USB Imaging devices # CONFIG_USB_MDC800=m CONFIG_USB_MICROTEK=m CONFIG_USBIP_CORE=m # CONFIG_USBIP_VHCI_HCD is not set # CONFIG_USBIP_HOST is not set # CONFIG_USBIP_DEBUG is not set # CONFIG_USB_CDNS3 is not set # CONFIG_USB_MUSB_HDRC is not set # CONFIG_USB_DWC3 is not set # CONFIG_USB_DWC2 is not set # CONFIG_USB_CHIPIDEA is not set # CONFIG_USB_ISP1760 is not set # # USB port drivers # CONFIG_USB_USS720=m CONFIG_USB_SERIAL=y CONFIG_USB_SERIAL_CONSOLE=y CONFIG_USB_SERIAL_GENERIC=y # CONFIG_USB_SERIAL_SIMPLE is not set CONFIG_USB_SERIAL_AIRCABLE=m CONFIG_USB_SERIAL_ARK3116=m CONFIG_USB_SERIAL_BELKIN=m CONFIG_USB_SERIAL_CH341=m CONFIG_USB_SERIAL_WHITEHEAT=m CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m CONFIG_USB_SERIAL_CP210X=m CONFIG_USB_SERIAL_CYPRESS_M8=m CONFIG_USB_SERIAL_EMPEG=m CONFIG_USB_SERIAL_FTDI_SIO=m CONFIG_USB_SERIAL_VISOR=m CONFIG_USB_SERIAL_IPAQ=m CONFIG_USB_SERIAL_IR=m CONFIG_USB_SERIAL_EDGEPORT=m CONFIG_USB_SERIAL_EDGEPORT_TI=m # CONFIG_USB_SERIAL_F81232 is not set # CONFIG_USB_SERIAL_F8153X is not set CONFIG_USB_SERIAL_GARMIN=m CONFIG_USB_SERIAL_IPW=m CONFIG_USB_SERIAL_IUU=m CONFIG_USB_SERIAL_KEYSPAN_PDA=m CONFIG_USB_SERIAL_KEYSPAN=m CONFIG_USB_SERIAL_KLSI=m CONFIG_USB_SERIAL_KOBIL_SCT=m CONFIG_USB_SERIAL_MCT_U232=m # CONFIG_USB_SERIAL_METRO is not set CONFIG_USB_SERIAL_MOS7720=m CONFIG_USB_SERIAL_MOS7715_PARPORT=y CONFIG_USB_SERIAL_MOS7840=m # CONFIG_USB_SERIAL_MXUPORT is not set CONFIG_USB_SERIAL_NAVMAN=m CONFIG_USB_SERIAL_PL2303=m CONFIG_USB_SERIAL_OTI6858=m CONFIG_USB_SERIAL_QCAUX=m CONFIG_USB_SERIAL_QUALCOMM=m CONFIG_USB_SERIAL_SPCP8X5=m CONFIG_USB_SERIAL_SAFE=m CONFIG_USB_SERIAL_SAFE_PADDED=y CONFIG_USB_SERIAL_SIERRAWIRELESS=m CONFIG_USB_SERIAL_SYMBOL=m # CONFIG_USB_SERIAL_TI is not set CONFIG_USB_SERIAL_CYBERJACK=m CONFIG_USB_SERIAL_XIRCOM=m CONFIG_USB_SERIAL_WWAN=m CONFIG_USB_SERIAL_OPTION=m CONFIG_USB_SERIAL_OMNINET=m CONFIG_USB_SERIAL_OPTICON=m CONFIG_USB_SERIAL_XSENS_MT=m # CONFIG_USB_SERIAL_WISHBONE is not set CONFIG_USB_SERIAL_SSU100=m CONFIG_USB_SERIAL_QT2=m # CONFIG_USB_SERIAL_UPD78F0730 is not set CONFIG_USB_SERIAL_DEBUG=m # # USB Miscellaneous drivers # CONFIG_USB_EMI62=m CONFIG_USB_EMI26=m CONFIG_USB_ADUTUX=m CONFIG_USB_SEVSEG=m CONFIG_USB_LEGOTOWER=m CONFIG_USB_LCD=m # CONFIG_USB_CYPRESS_CY7C63 is not set # CONFIG_USB_CYTHERM is not set CONFIG_USB_IDMOUSE=m CONFIG_USB_FTDI_ELAN=m CONFIG_USB_APPLEDISPLAY=m CONFIG_USB_SISUSBVGA=m CONFIG_USB_SISUSBVGA_CON=y CONFIG_USB_LD=m # CONFIG_USB_TRANCEVIBRATOR is not set CONFIG_USB_IOWARRIOR=m # CONFIG_USB_TEST is not set # CONFIG_USB_EHSET_TEST_FIXTURE is not set CONFIG_USB_ISIGHTFW=m # CONFIG_USB_YUREX is not set CONFIG_USB_EZUSB_FX2=m # CONFIG_USB_HUB_USB251XB is not set CONFIG_USB_HSIC_USB3503=m # CONFIG_USB_HSIC_USB4604 is not set # CONFIG_USB_LINK_LAYER_TEST is not set # CONFIG_USB_CHAOSKEY is not set CONFIG_USB_ATM=m CONFIG_USB_SPEEDTOUCH=m CONFIG_USB_CXACRU=m CONFIG_USB_UEAGLEATM=m CONFIG_USB_XUSBATM=m # # USB Physical Layer drivers # # CONFIG_NOP_USB_XCEIV is not set # CONFIG_USB_GPIO_VBUS is not set # CONFIG_USB_ISP1301 is not set # end of USB Physical Layer drivers # CONFIG_USB_GADGET is not set CONFIG_TYPEC=y # CONFIG_TYPEC_TCPM is not set CONFIG_TYPEC_UCSI=y # CONFIG_UCSI_CCG is not set CONFIG_UCSI_ACPI=y # CONFIG_TYPEC_TPS6598X is not set # # USB Type-C Multiplexer/DeMultiplexer Switch support # # CONFIG_TYPEC_MUX_PI3USB30532 is not set # end of USB Type-C Multiplexer/DeMultiplexer Switch support # # USB Type-C Alternate Mode drivers # # CONFIG_TYPEC_DP_ALTMODE is not set # end of USB Type-C Alternate Mode drivers # CONFIG_USB_ROLE_SWITCH is not set CONFIG_MMC=m CONFIG_MMC_BLOCK=m CONFIG_MMC_BLOCK_MINORS=8 CONFIG_SDIO_UART=m # CONFIG_MMC_TEST is not set # # MMC/SD/SDIO Host Controller Drivers # # CONFIG_MMC_DEBUG is not set CONFIG_MMC_SDHCI=m CONFIG_MMC_SDHCI_IO_ACCESSORS=y CONFIG_MMC_SDHCI_PCI=m CONFIG_MMC_RICOH_MMC=y CONFIG_MMC_SDHCI_ACPI=m CONFIG_MMC_SDHCI_PLTFM=m # CONFIG_MMC_SDHCI_F_SDH30 is not set # CONFIG_MMC_WBSD is not set CONFIG_MMC_TIFM_SD=m # CONFIG_MMC_SPI is not set CONFIG_MMC_CB710=m CONFIG_MMC_VIA_SDMMC=m CONFIG_MMC_VUB300=m CONFIG_MMC_USHC=m # CONFIG_MMC_USDHI6ROL0 is not set CONFIG_MMC_CQHCI=m # CONFIG_MMC_TOSHIBA_PCI is not set # CONFIG_MMC_MTK is not set # CONFIG_MMC_SDHCI_XENON is not set CONFIG_MEMSTICK=m # CONFIG_MEMSTICK_DEBUG is not set # # MemoryStick drivers # # CONFIG_MEMSTICK_UNSAFE_RESUME is not set CONFIG_MSPRO_BLOCK=m # CONFIG_MS_BLOCK is not set # # MemoryStick Host Controller Drivers # CONFIG_MEMSTICK_TIFM_MS=m CONFIG_MEMSTICK_JMICRON_38X=m CONFIG_MEMSTICK_R592=m CONFIG_NEW_LEDS=y CONFIG_LEDS_CLASS=y # CONFIG_LEDS_CLASS_FLASH is not set # CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set # # LED drivers # # CONFIG_LEDS_APU is not set CONFIG_LEDS_LM3530=m # CONFIG_LEDS_LM3532 is not set # CONFIG_LEDS_LM3642 is not set # CONFIG_LEDS_PCA9532 is not set # CONFIG_LEDS_GPIO is not set CONFIG_LEDS_LP3944=m # CONFIG_LEDS_LP3952 is not set CONFIG_LEDS_LP55XX_COMMON=m CONFIG_LEDS_LP5521=m CONFIG_LEDS_LP5523=m CONFIG_LEDS_LP5562=m # CONFIG_LEDS_LP8501 is not set CONFIG_LEDS_CLEVO_MAIL=m # CONFIG_LEDS_PCA955X is not set # CONFIG_LEDS_PCA963X is not set # CONFIG_LEDS_DAC124S085 is not set # CONFIG_LEDS_PWM is not set # CONFIG_LEDS_BD2802 is not set CONFIG_LEDS_INTEL_SS4200=m # CONFIG_LEDS_TCA6507 is not set # CONFIG_LEDS_TLC591XX is not set # CONFIG_LEDS_LM355x is not set # # LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM) # CONFIG_LEDS_BLINKM=m # CONFIG_LEDS_MLXCPLD is not set # CONFIG_LEDS_MLXREG is not set # CONFIG_LEDS_USER is not set # CONFIG_LEDS_NIC78BX is not set # CONFIG_LEDS_TI_LMU_COMMON is not set # # LED Triggers # CONFIG_LEDS_TRIGGERS=y CONFIG_LEDS_TRIGGER_TIMER=m CONFIG_LEDS_TRIGGER_ONESHOT=m # CONFIG_LEDS_TRIGGER_DISK is not set # CONFIG_LEDS_TRIGGER_MTD is not set CONFIG_LEDS_TRIGGER_HEARTBEAT=m CONFIG_LEDS_TRIGGER_BACKLIGHT=m # CONFIG_LEDS_TRIGGER_CPU is not set # CONFIG_LEDS_TRIGGER_ACTIVITY is not set CONFIG_LEDS_TRIGGER_GPIO=m CONFIG_LEDS_TRIGGER_DEFAULT_ON=m # # iptables trigger is under Netfilter config (LED target) # CONFIG_LEDS_TRIGGER_TRANSIENT=m CONFIG_LEDS_TRIGGER_CAMERA=m # CONFIG_LEDS_TRIGGER_PANIC is not set # CONFIG_LEDS_TRIGGER_NETDEV is not set # CONFIG_LEDS_TRIGGER_PATTERN is not set CONFIG_LEDS_TRIGGER_AUDIO=m # CONFIG_ACCESSIBILITY is not set # CONFIG_INFINIBAND is not set CONFIG_EDAC_ATOMIC_SCRUB=y CONFIG_EDAC_SUPPORT=y CONFIG_EDAC=y CONFIG_EDAC_LEGACY_SYSFS=y # CONFIG_EDAC_DEBUG is not set CONFIG_EDAC_DECODE_MCE=m CONFIG_EDAC_GHES=y CONFIG_EDAC_AMD64=m # CONFIG_EDAC_AMD64_ERROR_INJECTION is not set CONFIG_EDAC_E752X=m CONFIG_EDAC_I82975X=m CONFIG_EDAC_I3000=m CONFIG_EDAC_I3200=m CONFIG_EDAC_IE31200=m CONFIG_EDAC_X38=m CONFIG_EDAC_I5400=m CONFIG_EDAC_I7CORE=m CONFIG_EDAC_I5000=m CONFIG_EDAC_I5100=m CONFIG_EDAC_I7300=m CONFIG_EDAC_SBRIDGE=m CONFIG_EDAC_SKX=m # CONFIG_EDAC_I10NM is not set CONFIG_EDAC_PND2=m CONFIG_RTC_LIB=y CONFIG_RTC_MC146818_LIB=y CONFIG_RTC_CLASS=y CONFIG_RTC_HCTOSYS=y CONFIG_RTC_HCTOSYS_DEVICE="rtc0" # CONFIG_RTC_SYSTOHC is not set # CONFIG_RTC_DEBUG is not set CONFIG_RTC_NVMEM=y # # RTC interfaces # CONFIG_RTC_INTF_SYSFS=y CONFIG_RTC_INTF_PROC=y CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set # CONFIG_RTC_DRV_TEST is not set # # I2C RTC drivers # # CONFIG_RTC_DRV_ABB5ZES3 is not set # CONFIG_RTC_DRV_ABEOZ9 is not set # CONFIG_RTC_DRV_ABX80X is not set CONFIG_RTC_DRV_DS1307=m # CONFIG_RTC_DRV_DS1307_CENTURY is not set CONFIG_RTC_DRV_DS1374=m # CONFIG_RTC_DRV_DS1374_WDT is not set CONFIG_RTC_DRV_DS1672=m CONFIG_RTC_DRV_MAX6900=m CONFIG_RTC_DRV_RS5C372=m CONFIG_RTC_DRV_ISL1208=m CONFIG_RTC_DRV_ISL12022=m CONFIG_RTC_DRV_X1205=m CONFIG_RTC_DRV_PCF8523=m # CONFIG_RTC_DRV_PCF85063 is not set # CONFIG_RTC_DRV_PCF85363 is not set CONFIG_RTC_DRV_PCF8563=m CONFIG_RTC_DRV_PCF8583=m CONFIG_RTC_DRV_M41T80=m CONFIG_RTC_DRV_M41T80_WDT=y CONFIG_RTC_DRV_BQ32K=m # CONFIG_RTC_DRV_S35390A is not set CONFIG_RTC_DRV_FM3130=m # CONFIG_RTC_DRV_RX8010 is not set CONFIG_RTC_DRV_RX8581=m CONFIG_RTC_DRV_RX8025=m CONFIG_RTC_DRV_EM3027=m # CONFIG_RTC_DRV_RV3028 is not set # CONFIG_RTC_DRV_RV8803 is not set # CONFIG_RTC_DRV_SD3078 is not set # # SPI RTC drivers # # CONFIG_RTC_DRV_M41T93 is not set # CONFIG_RTC_DRV_M41T94 is not set # CONFIG_RTC_DRV_DS1302 is not set # CONFIG_RTC_DRV_DS1305 is not set # CONFIG_RTC_DRV_DS1343 is not set # CONFIG_RTC_DRV_DS1347 is not set # CONFIG_RTC_DRV_DS1390 is not set # CONFIG_RTC_DRV_MAX6916 is not set # CONFIG_RTC_DRV_R9701 is not set CONFIG_RTC_DRV_RX4581=m # CONFIG_RTC_DRV_RX6110 is not set # CONFIG_RTC_DRV_RS5C348 is not set # CONFIG_RTC_DRV_MAX6902 is not set # CONFIG_RTC_DRV_PCF2123 is not set # CONFIG_RTC_DRV_MCP795 is not set CONFIG_RTC_I2C_AND_SPI=y # # SPI and I2C RTC drivers # CONFIG_RTC_DRV_DS3232=m CONFIG_RTC_DRV_DS3232_HWMON=y # CONFIG_RTC_DRV_PCF2127 is not set CONFIG_RTC_DRV_RV3029C2=m CONFIG_RTC_DRV_RV3029_HWMON=y # # Platform RTC drivers # CONFIG_RTC_DRV_CMOS=y CONFIG_RTC_DRV_DS1286=m CONFIG_RTC_DRV_DS1511=m CONFIG_RTC_DRV_DS1553=m # CONFIG_RTC_DRV_DS1685_FAMILY is not set CONFIG_RTC_DRV_DS1742=m CONFIG_RTC_DRV_DS2404=m CONFIG_RTC_DRV_STK17TA8=m # CONFIG_RTC_DRV_M48T86 is not set CONFIG_RTC_DRV_M48T35=m CONFIG_RTC_DRV_M48T59=m CONFIG_RTC_DRV_MSM6242=m CONFIG_RTC_DRV_BQ4802=m CONFIG_RTC_DRV_RP5C01=m CONFIG_RTC_DRV_V3020=m # # on-CPU RTC drivers # # CONFIG_RTC_DRV_FTRTC010 is not set # # HID Sensor RTC drivers # # CONFIG_RTC_DRV_HID_SENSOR_TIME is not set CONFIG_DMADEVICES=y # CONFIG_DMADEVICES_DEBUG is not set # # DMA Devices # CONFIG_DMA_ENGINE=y CONFIG_DMA_VIRTUAL_CHANNELS=y CONFIG_DMA_ACPI=y # CONFIG_ALTERA_MSGDMA is not set # CONFIG_INTEL_IDMA64 is not set # CONFIG_INTEL_IDXD is not set CONFIG_INTEL_IOATDMA=m # CONFIG_PLX_DMA is not set # CONFIG_QCOM_HIDMA_MGMT is not set # CONFIG_QCOM_HIDMA is not set CONFIG_DW_DMAC_CORE=y CONFIG_DW_DMAC=m CONFIG_DW_DMAC_PCI=y # CONFIG_DW_EDMA is not set # CONFIG_DW_EDMA_PCIE is not set CONFIG_HSU_DMA=y # CONFIG_SF_PDMA is not set # # DMA Clients # CONFIG_ASYNC_TX_DMA=y # CONFIG_DMATEST is not set CONFIG_DMA_ENGINE_RAID=y # # DMABUF options # CONFIG_SYNC_FILE=y CONFIG_SW_SYNC=y # CONFIG_UDMABUF is not set # CONFIG_DMABUF_SELFTESTS is not set # CONFIG_DMABUF_HEAPS is not set # end of DMABUF options CONFIG_DCA=m CONFIG_AUXDISPLAY=y # CONFIG_HD44780 is not set CONFIG_KS0108=m CONFIG_KS0108_PORT=0x378 CONFIG_KS0108_DELAY=2 CONFIG_CFAG12864B=m CONFIG_CFAG12864B_RATE=20 # CONFIG_IMG_ASCII_LCD is not set # CONFIG_PARPORT_PANEL is not set # CONFIG_CHARLCD_BL_OFF is not set # CONFIG_CHARLCD_BL_ON is not set CONFIG_CHARLCD_BL_FLASH=y # CONFIG_PANEL is not set CONFIG_UIO=m CONFIG_UIO_CIF=m CONFIG_UIO_PDRV_GENIRQ=m # CONFIG_UIO_DMEM_GENIRQ is not set CONFIG_UIO_AEC=m CONFIG_UIO_SERCOS3=m CONFIG_UIO_PCI_GENERIC=m # CONFIG_UIO_NETX is not set # CONFIG_UIO_PRUSS is not set # CONFIG_UIO_MF624 is not set CONFIG_UIO_HV_GENERIC=m CONFIG_VFIO_IOMMU_TYPE1=m CONFIG_VFIO_VIRQFD=m CONFIG_VFIO=m CONFIG_VFIO_NOIOMMU=y CONFIG_VFIO_PCI=m # CONFIG_VFIO_PCI_VGA is not set CONFIG_VFIO_PCI_MMAP=y CONFIG_VFIO_PCI_INTX=y # CONFIG_VFIO_PCI_IGD is not set CONFIG_VFIO_MDEV=m CONFIG_VFIO_MDEV_DEVICE=m CONFIG_IRQ_BYPASS_MANAGER=m # CONFIG_VIRT_DRIVERS is not set CONFIG_VIRTIO=y CONFIG_VIRTIO_MENU=y CONFIG_VIRTIO_PCI=y CONFIG_VIRTIO_PCI_LEGACY=y # CONFIG_VIRTIO_PMEM is not set CONFIG_VIRTIO_BALLOON=y CONFIG_VIRTIO_INPUT=m # CONFIG_VIRTIO_MMIO is not set # # Microsoft Hyper-V guest support # CONFIG_HYPERV=m CONFIG_HYPERV_TIMER=y CONFIG_HYPERV_UTILS=m CONFIG_HYPERV_BALLOON=m # end of Microsoft Hyper-V guest support # # Xen driver support # CONFIG_XEN_BALLOON=y # CONFIG_XEN_BALLOON_MEMORY_HOTPLUG is not set CONFIG_XEN_SCRUB_PAGES_DEFAULT=y CONFIG_XEN_DEV_EVTCHN=m # CONFIG_XEN_BACKEND is not set CONFIG_XENFS=m CONFIG_XEN_COMPAT_XENFS=y CONFIG_XEN_SYS_HYPERVISOR=y CONFIG_XEN_XENBUS_FRONTEND=y # CONFIG_XEN_GNTDEV is not set # CONFIG_XEN_GRANT_DEV_ALLOC is not set # CONFIG_XEN_GRANT_DMA_ALLOC is not set CONFIG_SWIOTLB_XEN=y # CONFIG_XEN_PVCALLS_FRONTEND is not set CONFIG_XEN_PRIVCMD=m CONFIG_XEN_HAVE_PVMMU=y CONFIG_XEN_EFI=y CONFIG_XEN_AUTO_XLATE=y CONFIG_XEN_ACPI=y CONFIG_XEN_HAVE_VPMU=y # end of Xen driver support # CONFIG_GREYBUS is not set CONFIG_STAGING=y # CONFIG_PRISM2_USB is not set # CONFIG_COMEDI is not set # CONFIG_RTL8192U is not set CONFIG_RTLLIB=m CONFIG_RTLLIB_CRYPTO_CCMP=m CONFIG_RTLLIB_CRYPTO_TKIP=m CONFIG_RTLLIB_CRYPTO_WEP=m CONFIG_RTL8192E=m # CONFIG_RTL8723BS is not set CONFIG_R8712U=m # CONFIG_R8188EU is not set # CONFIG_RTS5208 is not set # CONFIG_VT6655 is not set # CONFIG_VT6656 is not set # # IIO staging drivers # # # Accelerometers # # CONFIG_ADIS16203 is not set # CONFIG_ADIS16240 is not set # end of Accelerometers # # Analog to digital converters # # CONFIG_AD7816 is not set # CONFIG_AD7192 is not set # CONFIG_AD7280 is not set # end of Analog to digital converters # # Analog digital bi-direction converters # # CONFIG_ADT7316 is not set # end of Analog digital bi-direction converters # # Capacitance to digital converters # # CONFIG_AD7150 is not set # CONFIG_AD7746 is not set # end of Capacitance to digital converters # # Direct Digital Synthesis # # CONFIG_AD9832 is not set # CONFIG_AD9834 is not set # end of Direct Digital Synthesis # # Network Analyzer, Impedance Converters # # CONFIG_AD5933 is not set # end of Network Analyzer, Impedance Converters # # Active energy metering IC # # CONFIG_ADE7854 is not set # end of Active energy metering IC # # Resolver to digital converters # # CONFIG_AD2S1210 is not set # end of Resolver to digital converters # end of IIO staging drivers # CONFIG_FB_SM750 is not set # # Speakup console speech # # CONFIG_SPEAKUP is not set # end of Speakup console speech # CONFIG_STAGING_MEDIA is not set # # Android # # CONFIG_ASHMEM is not set CONFIG_ION=y CONFIG_ION_SYSTEM_HEAP=y # CONFIG_ION_CMA_HEAP is not set # end of Android # CONFIG_LTE_GDM724X is not set CONFIG_FIREWIRE_SERIAL=m CONFIG_FWTTY_MAX_TOTAL_PORTS=64 CONFIG_FWTTY_MAX_CARD_PORTS=32 # CONFIG_GS_FPGABOOT is not set # CONFIG_UNISYSSPAR is not set # CONFIG_FB_TFT is not set # CONFIG_WILC1000_SDIO is not set # CONFIG_WILC1000_SPI is not set # CONFIG_MOST is not set # CONFIG_KS7010 is not set # CONFIG_PI433 is not set # # Gasket devices # # CONFIG_STAGING_GASKET_FRAMEWORK is not set # end of Gasket devices # CONFIG_FIELDBUS_DEV is not set # CONFIG_KPC2000 is not set CONFIG_USB_WUSB=m CONFIG_USB_WUSB_CBAF=m # CONFIG_USB_WUSB_CBAF_DEBUG is not set # CONFIG_USB_WHCI_HCD is not set CONFIG_USB_HWA_HCD=m CONFIG_UWB=m CONFIG_UWB_HWA=m CONFIG_UWB_WHCI=m CONFIG_UWB_I1480U=m # CONFIG_STAGING_EXFAT_FS is not set CONFIG_QLGE=m # CONFIG_NET_VENDOR_HP is not set # CONFIG_WFX is not set CONFIG_X86_PLATFORM_DEVICES=y CONFIG_ACER_WMI=m # CONFIG_ACER_WIRELESS is not set CONFIG_ACERHDF=m # CONFIG_ALIENWARE_WMI is not set CONFIG_ASUS_LAPTOP=m CONFIG_DCDBAS=m CONFIG_DELL_SMBIOS=m CONFIG_DELL_SMBIOS_WMI=y CONFIG_DELL_SMBIOS_SMM=y CONFIG_DELL_LAPTOP=m CONFIG_DELL_WMI=m CONFIG_DELL_WMI_DESCRIPTOR=m CONFIG_DELL_WMI_AIO=m # CONFIG_DELL_WMI_LED is not set CONFIG_DELL_SMO8800=m CONFIG_DELL_RBTN=m CONFIG_DELL_RBU=m CONFIG_FUJITSU_LAPTOP=m CONFIG_FUJITSU_TABLET=m CONFIG_AMILO_RFKILL=m # CONFIG_GPD_POCKET_FAN is not set CONFIG_HP_ACCEL=m CONFIG_HP_WIRELESS=m CONFIG_HP_WMI=m # CONFIG_LG_LAPTOP is not set CONFIG_MSI_LAPTOP=m CONFIG_PANASONIC_LAPTOP=m CONFIG_COMPAL_LAPTOP=m CONFIG_SONY_LAPTOP=m CONFIG_SONYPI_COMPAT=y CONFIG_IDEAPAD_LAPTOP=m # CONFIG_SURFACE3_WMI is not set CONFIG_THINKPAD_ACPI=m CONFIG_THINKPAD_ACPI_ALSA_SUPPORT=y # CONFIG_THINKPAD_ACPI_DEBUGFACILITIES is not set # CONFIG_THINKPAD_ACPI_DEBUG is not set # CONFIG_THINKPAD_ACPI_UNSAFE_LEDS is not set CONFIG_THINKPAD_ACPI_VIDEO=y CONFIG_THINKPAD_ACPI_HOTKEY_POLL=y CONFIG_SENSORS_HDAPS=m # CONFIG_INTEL_MENLOW is not set CONFIG_EEEPC_LAPTOP=m CONFIG_ASUS_WMI=m CONFIG_ASUS_NB_WMI=m CONFIG_EEEPC_WMI=m # CONFIG_ASUS_WIRELESS is not set CONFIG_ACPI_WMI=m CONFIG_WMI_BMOF=m CONFIG_INTEL_WMI_THUNDERBOLT=m # CONFIG_XIAOMI_WMI is not set CONFIG_MSI_WMI=m # CONFIG_PEAQ_WMI is not set CONFIG_TOPSTAR_LAPTOP=m CONFIG_ACPI_TOSHIBA=m CONFIG_TOSHIBA_BT_RFKILL=m # CONFIG_TOSHIBA_HAPS is not set # CONFIG_TOSHIBA_WMI is not set CONFIG_ACPI_CMPC=m # CONFIG_INTEL_INT0002_VGPIO is not set CONFIG_INTEL_HID_EVENT=m CONFIG_INTEL_VBTN=m CONFIG_INTEL_IPS=m CONFIG_INTEL_PMC_CORE=m # CONFIG_IBM_RTL is not set CONFIG_SAMSUNG_LAPTOP=m CONFIG_MXM_WMI=m CONFIG_INTEL_OAKTRAIL=m CONFIG_SAMSUNG_Q10=m CONFIG_APPLE_GMUX=m # CONFIG_INTEL_RST is not set # CONFIG_INTEL_SMARTCONNECT is not set # CONFIG_INTEL_PMC_IPC is not set # CONFIG_SURFACE_PRO3_BUTTON is not set # CONFIG_INTEL_PUNIT_IPC is not set # CONFIG_MLX_PLATFORM is not set # CONFIG_INTEL_TURBO_MAX_3 is not set # CONFIG_I2C_MULTI_INSTANTIATE is not set # CONFIG_INTEL_ATOMISP2_PM is not set # CONFIG_HUAWEI_WMI is not set # CONFIG_PCENGINES_APU2 is not set # CONFIG_INTEL_UNCORE_FREQ_CONTROL is not set # # Intel Speed Select Technology interface support # # CONFIG_INTEL_SPEED_SELECT_INTERFACE is not set # end of Intel Speed Select Technology interface support # CONFIG_SYSTEM76_ACPI is not set CONFIG_PMC_ATOM=y # CONFIG_MFD_CROS_EC is not set # CONFIG_CHROME_PLATFORMS is not set # CONFIG_MELLANOX_PLATFORM is not set CONFIG_CLKDEV_LOOKUP=y CONFIG_HAVE_CLK_PREPARE=y CONFIG_COMMON_CLK=y # # Common Clock Framework # # CONFIG_COMMON_CLK_MAX9485 is not set # CONFIG_COMMON_CLK_SI5341 is not set # CONFIG_COMMON_CLK_SI5351 is not set # CONFIG_COMMON_CLK_SI544 is not set # CONFIG_COMMON_CLK_CDCE706 is not set # CONFIG_COMMON_CLK_CS2000_CP is not set # CONFIG_COMMON_CLK_PWM is not set # end of Common Clock Framework # CONFIG_HWSPINLOCK is not set # # Clock Source drivers # CONFIG_CLKEVT_I8253=y CONFIG_I8253_LOCK=y CONFIG_CLKBLD_I8253=y # end of Clock Source drivers CONFIG_MAILBOX=y CONFIG_PCC=y # CONFIG_ALTERA_MBOX is not set CONFIG_IOMMU_IOVA=y CONFIG_IOMMU_API=y CONFIG_IOMMU_SUPPORT=y # # Generic IOMMU Pagetable Support # # end of Generic IOMMU Pagetable Support # CONFIG_IOMMU_DEBUGFS is not set # CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set CONFIG_IOMMU_DMA=y CONFIG_AMD_IOMMU=y CONFIG_AMD_IOMMU_V2=m CONFIG_DMAR_TABLE=y CONFIG_INTEL_IOMMU=y # CONFIG_INTEL_IOMMU_SVM is not set # CONFIG_INTEL_IOMMU_DEFAULT_ON is not set CONFIG_INTEL_IOMMU_FLOPPY_WA=y # CONFIG_INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON is not set CONFIG_IRQ_REMAP=y CONFIG_HYPERV_IOMMU=y # # Remoteproc drivers # # CONFIG_REMOTEPROC is not set # end of Remoteproc drivers # # Rpmsg drivers # # CONFIG_RPMSG_QCOM_GLINK_RPM is not set # CONFIG_RPMSG_VIRTIO is not set # end of Rpmsg drivers # CONFIG_SOUNDWIRE is not set # # SOC (System On Chip) specific Drivers # # # Amlogic SoC drivers # # end of Amlogic SoC drivers # # Aspeed SoC drivers # # end of Aspeed SoC drivers # # Broadcom SoC drivers # # end of Broadcom SoC drivers # # NXP/Freescale QorIQ SoC drivers # # end of NXP/Freescale QorIQ SoC drivers # # i.MX SoC drivers # # end of i.MX SoC drivers # # Qualcomm SoC drivers # # end of Qualcomm SoC drivers # CONFIG_SOC_TI is not set # # Xilinx SoC drivers # # CONFIG_XILINX_VCU is not set # end of Xilinx SoC drivers # end of SOC (System On Chip) specific Drivers CONFIG_PM_DEVFREQ=y # # DEVFREQ Governors # CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=m # CONFIG_DEVFREQ_GOV_PERFORMANCE is not set # CONFIG_DEVFREQ_GOV_POWERSAVE is not set # CONFIG_DEVFREQ_GOV_USERSPACE is not set # CONFIG_DEVFREQ_GOV_PASSIVE is not set # # DEVFREQ Drivers # # CONFIG_PM_DEVFREQ_EVENT is not set # CONFIG_EXTCON is not set # CONFIG_MEMORY is not set CONFIG_IIO=y CONFIG_IIO_BUFFER=y CONFIG_IIO_BUFFER_CB=y # CONFIG_IIO_BUFFER_HW_CONSUMER is not set CONFIG_IIO_KFIFO_BUF=y CONFIG_IIO_TRIGGERED_BUFFER=m # CONFIG_IIO_CONFIGFS is not set CONFIG_IIO_TRIGGER=y CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_IIO_SW_DEVICE is not set # CONFIG_IIO_SW_TRIGGER is not set # # Accelerometers # # CONFIG_ADIS16201 is not set # CONFIG_ADIS16209 is not set # CONFIG_ADXL345_I2C is not set # CONFIG_ADXL345_SPI is not set # CONFIG_ADXL372_SPI is not set # CONFIG_ADXL372_I2C is not set # CONFIG_BMA180 is not set # CONFIG_BMA220 is not set # CONFIG_BMA400 is not set # CONFIG_BMC150_ACCEL is not set # CONFIG_DA280 is not set # CONFIG_DA311 is not set # CONFIG_DMARD09 is not set # CONFIG_DMARD10 is not set CONFIG_HID_SENSOR_ACCEL_3D=m # CONFIG_IIO_ST_ACCEL_3AXIS is not set # CONFIG_KXSD9 is not set # CONFIG_KXCJK1013 is not set # CONFIG_MC3230 is not set # CONFIG_MMA7455_I2C is not set # CONFIG_MMA7455_SPI is not set # CONFIG_MMA7660 is not set # CONFIG_MMA8452 is not set # CONFIG_MMA9551 is not set # CONFIG_MMA9553 is not set # CONFIG_MXC4005 is not set # CONFIG_MXC6255 is not set # CONFIG_SCA3000 is not set # CONFIG_STK8312 is not set # CONFIG_STK8BA50 is not set # end of Accelerometers # # Analog to digital converters # # CONFIG_AD7091R5 is not set # CONFIG_AD7124 is not set # CONFIG_AD7266 is not set # CONFIG_AD7291 is not set # CONFIG_AD7292 is not set # CONFIG_AD7298 is not set # CONFIG_AD7476 is not set # CONFIG_AD7606_IFACE_PARALLEL is not set # CONFIG_AD7606_IFACE_SPI is not set # CONFIG_AD7766 is not set # CONFIG_AD7768_1 is not set # CONFIG_AD7780 is not set # CONFIG_AD7791 is not set # CONFIG_AD7793 is not set # CONFIG_AD7887 is not set # CONFIG_AD7923 is not set # CONFIG_AD7949 is not set # CONFIG_AD799X is not set # CONFIG_HI8435 is not set # CONFIG_HX711 is not set # CONFIG_INA2XX_ADC is not set # CONFIG_LTC2471 is not set # CONFIG_LTC2485 is not set # CONFIG_LTC2496 is not set # CONFIG_LTC2497 is not set # CONFIG_MAX1027 is not set # CONFIG_MAX11100 is not set # CONFIG_MAX1118 is not set # CONFIG_MAX1363 is not set # CONFIG_MAX9611 is not set # CONFIG_MCP320X is not set # CONFIG_MCP3422 is not set # CONFIG_MCP3911 is not set # CONFIG_NAU7802 is not set # CONFIG_TI_ADC081C is not set # CONFIG_TI_ADC0832 is not set # CONFIG_TI_ADC084S021 is not set # CONFIG_TI_ADC12138 is not set # CONFIG_TI_ADC108S102 is not set # CONFIG_TI_ADC128S052 is not set # CONFIG_TI_ADC161S626 is not set # CONFIG_TI_ADS1015 is not set # CONFIG_TI_ADS7950 is not set # CONFIG_TI_TLC4541 is not set # CONFIG_VIPERBOARD_ADC is not set # CONFIG_XILINX_XADC is not set # end of Analog to digital converters # # Analog Front Ends # # end of Analog Front Ends # # Amplifiers # # CONFIG_AD8366 is not set # end of Amplifiers # # Chemical Sensors # # CONFIG_ATLAS_PH_SENSOR is not set # CONFIG_BME680 is not set # CONFIG_CCS811 is not set # CONFIG_IAQCORE is not set # CONFIG_SENSIRION_SGP30 is not set # CONFIG_SPS30 is not set # CONFIG_VZ89X is not set # end of Chemical Sensors # # Hid Sensor IIO Common # CONFIG_HID_SENSOR_IIO_COMMON=m CONFIG_HID_SENSOR_IIO_TRIGGER=m # end of Hid Sensor IIO Common # # SSP Sensor Common # # CONFIG_IIO_SSP_SENSORHUB is not set # end of SSP Sensor Common # # Digital to analog converters # # CONFIG_AD5064 is not set # CONFIG_AD5360 is not set # CONFIG_AD5380 is not set # CONFIG_AD5421 is not set # CONFIG_AD5446 is not set # CONFIG_AD5449 is not set # CONFIG_AD5592R is not set # CONFIG_AD5593R is not set # CONFIG_AD5504 is not set # CONFIG_AD5624R_SPI is not set # CONFIG_LTC1660 is not set # CONFIG_LTC2632 is not set # CONFIG_AD5686_SPI is not set # CONFIG_AD5696_I2C is not set # CONFIG_AD5755 is not set # CONFIG_AD5758 is not set # CONFIG_AD5761 is not set # CONFIG_AD5764 is not set # CONFIG_AD5791 is not set # CONFIG_AD7303 is not set # CONFIG_AD8801 is not set # CONFIG_DS4424 is not set # CONFIG_M62332 is not set # CONFIG_MAX517 is not set # CONFIG_MCP4725 is not set # CONFIG_MCP4922 is not set # CONFIG_TI_DAC082S085 is not set # CONFIG_TI_DAC5571 is not set # CONFIG_TI_DAC7311 is not set # CONFIG_TI_DAC7612 is not set # end of Digital to analog converters # # IIO dummy driver # # end of IIO dummy driver # # Frequency Synthesizers DDS/PLL # # # Clock Generator/Distribution # # CONFIG_AD9523 is not set # end of Clock Generator/Distribution # # Phase-Locked Loop (PLL) frequency synthesizers # # CONFIG_ADF4350 is not set # CONFIG_ADF4371 is not set # end of Phase-Locked Loop (PLL) frequency synthesizers # end of Frequency Synthesizers DDS/PLL # # Digital gyroscope sensors # # CONFIG_ADIS16080 is not set # CONFIG_ADIS16130 is not set # CONFIG_ADIS16136 is not set # CONFIG_ADIS16260 is not set # CONFIG_ADXRS450 is not set # CONFIG_BMG160 is not set # CONFIG_FXAS21002C is not set CONFIG_HID_SENSOR_GYRO_3D=m # CONFIG_MPU3050_I2C is not set # CONFIG_IIO_ST_GYRO_3AXIS is not set # CONFIG_ITG3200 is not set # end of Digital gyroscope sensors # # Health Sensors # # # Heart Rate Monitors # # CONFIG_AFE4403 is not set # CONFIG_AFE4404 is not set # CONFIG_MAX30100 is not set # CONFIG_MAX30102 is not set # end of Heart Rate Monitors # end of Health Sensors # # Humidity sensors # # CONFIG_AM2315 is not set # CONFIG_DHT11 is not set # CONFIG_HDC100X is not set # CONFIG_HID_SENSOR_HUMIDITY is not set # CONFIG_HTS221 is not set # CONFIG_HTU21 is not set # CONFIG_SI7005 is not set # CONFIG_SI7020 is not set # end of Humidity sensors # # Inertial measurement units # # CONFIG_ADIS16400 is not set # CONFIG_ADIS16460 is not set # CONFIG_ADIS16480 is not set # CONFIG_BMI160_I2C is not set # CONFIG_BMI160_SPI is not set # CONFIG_FXOS8700_I2C is not set # CONFIG_FXOS8700_SPI is not set # CONFIG_KMX61 is not set # CONFIG_INV_MPU6050_I2C is not set # CONFIG_INV_MPU6050_SPI is not set # CONFIG_IIO_ST_LSM6DSX is not set # end of Inertial measurement units # # Light sensors # # CONFIG_ACPI_ALS is not set # CONFIG_ADJD_S311 is not set # CONFIG_ADUX1020 is not set # CONFIG_AL3320A is not set # CONFIG_APDS9300 is not set # CONFIG_APDS9960 is not set # CONFIG_BH1750 is not set # CONFIG_BH1780 is not set # CONFIG_CM32181 is not set # CONFIG_CM3232 is not set # CONFIG_CM3323 is not set # CONFIG_CM36651 is not set # CONFIG_GP2AP020A00F is not set # CONFIG_SENSORS_ISL29018 is not set # CONFIG_SENSORS_ISL29028 is not set # CONFIG_ISL29125 is not set CONFIG_HID_SENSOR_ALS=m CONFIG_HID_SENSOR_PROX=m # CONFIG_JSA1212 is not set # CONFIG_RPR0521 is not set # CONFIG_LTR501 is not set # CONFIG_LV0104CS is not set # CONFIG_MAX44000 is not set # CONFIG_MAX44009 is not set # CONFIG_NOA1305 is not set # CONFIG_OPT3001 is not set # CONFIG_PA12203001 is not set # CONFIG_SI1133 is not set # CONFIG_SI1145 is not set # CONFIG_STK3310 is not set # CONFIG_ST_UVIS25 is not set # CONFIG_TCS3414 is not set # CONFIG_TCS3472 is not set # CONFIG_SENSORS_TSL2563 is not set # CONFIG_TSL2583 is not set # CONFIG_TSL2772 is not set # CONFIG_TSL4531 is not set # CONFIG_US5182D is not set # CONFIG_VCNL4000 is not set # CONFIG_VCNL4035 is not set # CONFIG_VEML6030 is not set # CONFIG_VEML6070 is not set # CONFIG_VL6180 is not set # CONFIG_ZOPT2201 is not set # end of Light sensors # # Magnetometer sensors # # CONFIG_AK8975 is not set # CONFIG_AK09911 is not set # CONFIG_BMC150_MAGN_I2C is not set # CONFIG_BMC150_MAGN_SPI is not set # CONFIG_MAG3110 is not set CONFIG_HID_SENSOR_MAGNETOMETER_3D=m # CONFIG_MMC35240 is not set # CONFIG_IIO_ST_MAGN_3AXIS is not set # CONFIG_SENSORS_HMC5843_I2C is not set # CONFIG_SENSORS_HMC5843_SPI is not set # CONFIG_SENSORS_RM3100_I2C is not set # CONFIG_SENSORS_RM3100_SPI is not set # end of Magnetometer sensors # # Multiplexers # # end of Multiplexers # # Inclinometer sensors # CONFIG_HID_SENSOR_INCLINOMETER_3D=m CONFIG_HID_SENSOR_DEVICE_ROTATION=m # end of Inclinometer sensors # # Triggers - standalone # # CONFIG_IIO_INTERRUPT_TRIGGER is not set # CONFIG_IIO_SYSFS_TRIGGER is not set # end of Triggers - standalone # # Digital potentiometers # # CONFIG_AD5272 is not set # CONFIG_DS1803 is not set # CONFIG_MAX5432 is not set # CONFIG_MAX5481 is not set # CONFIG_MAX5487 is not set # CONFIG_MCP4018 is not set # CONFIG_MCP4131 is not set # CONFIG_MCP4531 is not set # CONFIG_MCP41010 is not set # CONFIG_TPL0102 is not set # end of Digital potentiometers # # Digital potentiostats # # CONFIG_LMP91000 is not set # end of Digital potentiostats # # Pressure sensors # # CONFIG_ABP060MG is not set # CONFIG_BMP280 is not set # CONFIG_DLHL60D is not set # CONFIG_DPS310 is not set CONFIG_HID_SENSOR_PRESS=m # CONFIG_HP03 is not set # CONFIG_MPL115_I2C is not set # CONFIG_MPL115_SPI is not set # CONFIG_MPL3115 is not set # CONFIG_MS5611 is not set # CONFIG_MS5637 is not set # CONFIG_IIO_ST_PRESS is not set # CONFIG_T5403 is not set # CONFIG_HP206C is not set # CONFIG_ZPA2326 is not set # end of Pressure sensors # # Lightning sensors # # CONFIG_AS3935 is not set # end of Lightning sensors # # Proximity and distance sensors # # CONFIG_ISL29501 is not set # CONFIG_LIDAR_LITE_V2 is not set # CONFIG_MB1232 is not set # CONFIG_PING is not set # CONFIG_RFD77402 is not set # CONFIG_SRF04 is not set # CONFIG_SX9500 is not set # CONFIG_SRF08 is not set # CONFIG_VL53L0X_I2C is not set # end of Proximity and distance sensors # # Resolver to digital converters # # CONFIG_AD2S90 is not set # CONFIG_AD2S1200 is not set # end of Resolver to digital converters # # Temperature sensors # # CONFIG_LTC2983 is not set # CONFIG_MAXIM_THERMOCOUPLE is not set # CONFIG_HID_SENSOR_TEMP is not set # CONFIG_MLX90614 is not set # CONFIG_MLX90632 is not set # CONFIG_TMP006 is not set # CONFIG_TMP007 is not set # CONFIG_TSYS01 is not set # CONFIG_TSYS02D is not set # CONFIG_MAX31856 is not set # end of Temperature sensors CONFIG_NTB=m # CONFIG_NTB_MSI is not set CONFIG_NTB_AMD=m # CONFIG_NTB_IDT is not set # CONFIG_NTB_INTEL is not set # CONFIG_NTB_SWITCHTEC is not set # CONFIG_NTB_PINGPONG is not set # CONFIG_NTB_TOOL is not set CONFIG_NTB_PERF=m CONFIG_NTB_TRANSPORT=m # CONFIG_VME_BUS is not set CONFIG_PWM=y CONFIG_PWM_SYSFS=y # CONFIG_PWM_LPSS_PCI is not set # CONFIG_PWM_LPSS_PLATFORM is not set # CONFIG_PWM_PCA9685 is not set # # IRQ chip support # # end of IRQ chip support # CONFIG_IPACK_BUS is not set # CONFIG_RESET_CONTROLLER is not set # # PHY Subsystem # CONFIG_GENERIC_PHY=y # CONFIG_BCM_KONA_USB2_PHY is not set # CONFIG_PHY_PXA_28NM_HSIC is not set # CONFIG_PHY_PXA_28NM_USB2 is not set # CONFIG_PHY_CPCAP_USB is not set # CONFIG_PHY_INTEL_EMMC is not set # end of PHY Subsystem CONFIG_POWERCAP=y CONFIG_INTEL_RAPL_CORE=m CONFIG_INTEL_RAPL=m # CONFIG_IDLE_INJECT is not set # CONFIG_MCB is not set # # Performance monitor support # # end of Performance monitor support CONFIG_RAS=y # CONFIG_RAS_CEC is not set # CONFIG_USB4 is not set # # Android # CONFIG_ANDROID=y # CONFIG_ANDROID_BINDER_IPC is not set # end of Android CONFIG_LIBNVDIMM=m CONFIG_BLK_DEV_PMEM=m CONFIG_ND_BLK=m CONFIG_ND_CLAIM=y CONFIG_ND_BTT=m CONFIG_BTT=y CONFIG_ND_PFN=m CONFIG_NVDIMM_PFN=y CONFIG_NVDIMM_DAX=y CONFIG_NVDIMM_KEYS=y CONFIG_DAX_DRIVER=y CONFIG_DAX=y CONFIG_DEV_DAX=m CONFIG_DEV_DAX_PMEM=m CONFIG_DEV_DAX_KMEM=m CONFIG_DEV_DAX_PMEM_COMPAT=m CONFIG_NVMEM=y CONFIG_NVMEM_SYSFS=y # # HW tracing support # # CONFIG_STM is not set # CONFIG_INTEL_TH is not set # end of HW tracing support # CONFIG_FPGA is not set # CONFIG_TEE is not set CONFIG_PM_OPP=y # CONFIG_UNISYS_VISORBUS is not set # CONFIG_SIOX is not set # CONFIG_SLIMBUS is not set # CONFIG_INTERCONNECT is not set # CONFIG_COUNTER is not set # end of Device Drivers # # File systems # CONFIG_DCACHE_WORD_ACCESS=y # CONFIG_VALIDATE_FS_PARSER is not set CONFIG_FS_IOMAP=y # CONFIG_EXT2_FS is not set # CONFIG_EXT3_FS is not set CONFIG_EXT4_FS=m CONFIG_EXT4_USE_FOR_EXT2=y CONFIG_EXT4_FS_POSIX_ACL=y CONFIG_EXT4_FS_SECURITY=y # CONFIG_EXT4_DEBUG is not set CONFIG_JBD2=m # CONFIG_JBD2_DEBUG is not set CONFIG_FS_MBCACHE=m # CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set CONFIG_XFS_FS=m CONFIG_XFS_QUOTA=y CONFIG_XFS_POSIX_ACL=y CONFIG_XFS_RT=y CONFIG_XFS_ONLINE_SCRUB=y CONFIG_XFS_ONLINE_REPAIR=y CONFIG_XFS_DEBUG=y CONFIG_XFS_ASSERT_FATAL=y CONFIG_GFS2_FS=m CONFIG_GFS2_FS_LOCKING_DLM=y CONFIG_OCFS2_FS=m CONFIG_OCFS2_FS_O2CB=m CONFIG_OCFS2_FS_USERSPACE_CLUSTER=m CONFIG_OCFS2_FS_STATS=y CONFIG_OCFS2_DEBUG_MASKLOG=y # CONFIG_OCFS2_DEBUG_FS is not set CONFIG_BTRFS_FS=m CONFIG_BTRFS_FS_POSIX_ACL=y # CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set # CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set # CONFIG_BTRFS_DEBUG is not set # CONFIG_BTRFS_ASSERT is not set # CONFIG_BTRFS_FS_REF_VERIFY is not set # CONFIG_NILFS2_FS is not set CONFIG_F2FS_FS=m CONFIG_F2FS_STAT_FS=y CONFIG_F2FS_FS_XATTR=y CONFIG_F2FS_FS_POSIX_ACL=y # CONFIG_F2FS_FS_SECURITY is not set # CONFIG_F2FS_CHECK_FS is not set # CONFIG_F2FS_IO_TRACE is not set # CONFIG_F2FS_FAULT_INJECTION is not set # CONFIG_F2FS_FS_COMPRESSION is not set # CONFIG_ZONEFS_FS is not set CONFIG_FS_DAX=y CONFIG_FS_DAX_PMD=y CONFIG_FS_POSIX_ACL=y CONFIG_EXPORTFS=y CONFIG_EXPORTFS_BLOCK_OPS=y CONFIG_FILE_LOCKING=y CONFIG_MANDATORY_FILE_LOCKING=y CONFIG_FS_ENCRYPTION=y CONFIG_FS_ENCRYPTION_ALGS=m # CONFIG_FS_VERITY is not set CONFIG_FSNOTIFY=y CONFIG_DNOTIFY=y CONFIG_INOTIFY_USER=y CONFIG_FANOTIFY=y CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y CONFIG_QUOTA=y CONFIG_QUOTA_NETLINK_INTERFACE=y CONFIG_PRINT_QUOTA_WARNING=y # CONFIG_QUOTA_DEBUG is not set CONFIG_QUOTA_TREE=y # CONFIG_QFMT_V1 is not set CONFIG_QFMT_V2=y CONFIG_QUOTACTL=y CONFIG_QUOTACTL_COMPAT=y CONFIG_AUTOFS4_FS=y CONFIG_AUTOFS_FS=y CONFIG_FUSE_FS=m CONFIG_CUSE=m # CONFIG_VIRTIO_FS is not set CONFIG_OVERLAY_FS=m # CONFIG_OVERLAY_FS_REDIRECT_DIR is not set # CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW is not set # CONFIG_OVERLAY_FS_INDEX is not set # CONFIG_OVERLAY_FS_XINO_AUTO is not set # CONFIG_OVERLAY_FS_METACOPY is not set # # Caches # CONFIG_FSCACHE=m CONFIG_FSCACHE_STATS=y # CONFIG_FSCACHE_HISTOGRAM is not set # CONFIG_FSCACHE_DEBUG is not set # CONFIG_FSCACHE_OBJECT_LIST is not set CONFIG_CACHEFILES=m # CONFIG_CACHEFILES_DEBUG is not set # CONFIG_CACHEFILES_HISTOGRAM is not set # end of Caches # # CD-ROM/DVD Filesystems # CONFIG_ISO9660_FS=m CONFIG_JOLIET=y CONFIG_ZISOFS=y CONFIG_UDF_FS=m # end of CD-ROM/DVD Filesystems # # DOS/FAT/NT Filesystems # CONFIG_FAT_FS=m CONFIG_MSDOS_FS=m CONFIG_VFAT_FS=m CONFIG_FAT_DEFAULT_CODEPAGE=437 CONFIG_FAT_DEFAULT_IOCHARSET="ascii" # CONFIG_FAT_DEFAULT_UTF8 is not set # CONFIG_NTFS_FS is not set # end of DOS/FAT/NT Filesystems # # Pseudo filesystems # CONFIG_PROC_FS=y CONFIG_PROC_KCORE=y CONFIG_PROC_VMCORE=y # CONFIG_PROC_VMCORE_DEVICE_DUMP is not set CONFIG_PROC_SYSCTL=y CONFIG_PROC_PAGE_MONITOR=y CONFIG_PROC_CHILDREN=y CONFIG_PROC_PID_ARCH_STATUS=y CONFIG_PROC_CPU_RESCTRL=y CONFIG_KERNFS=y CONFIG_SYSFS=y CONFIG_TMPFS=y CONFIG_TMPFS_POSIX_ACL=y CONFIG_TMPFS_XATTR=y CONFIG_HUGETLBFS=y CONFIG_HUGETLB_PAGE=y CONFIG_MEMFD_CREATE=y CONFIG_ARCH_HAS_GIGANTIC_PAGE=y CONFIG_CONFIGFS_FS=y CONFIG_EFIVAR_FS=y # end of Pseudo filesystems CONFIG_MISC_FILESYSTEMS=y # CONFIG_ORANGEFS_FS is not set # CONFIG_ADFS_FS is not set # CONFIG_AFFS_FS is not set # CONFIG_ECRYPT_FS is not set # CONFIG_HFS_FS is not set # CONFIG_HFSPLUS_FS is not set # CONFIG_BEFS_FS is not set # CONFIG_BFS_FS is not set # CONFIG_EFS_FS is not set # CONFIG_JFFS2_FS is not set # CONFIG_UBIFS_FS is not set CONFIG_CRAMFS=m CONFIG_CRAMFS_BLOCKDEV=y # CONFIG_CRAMFS_MTD is not set CONFIG_SQUASHFS=m CONFIG_SQUASHFS_FILE_CACHE=y # CONFIG_SQUASHFS_FILE_DIRECT is not set CONFIG_SQUASHFS_DECOMP_SINGLE=y # CONFIG_SQUASHFS_DECOMP_MULTI is not set # CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set CONFIG_SQUASHFS_XATTR=y CONFIG_SQUASHFS_ZLIB=y # CONFIG_SQUASHFS_LZ4 is not set CONFIG_SQUASHFS_LZO=y CONFIG_SQUASHFS_XZ=y # CONFIG_SQUASHFS_ZSTD is not set # CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set # CONFIG_SQUASHFS_EMBEDDED is not set CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 # CONFIG_VXFS_FS is not set CONFIG_MINIX_FS=m # CONFIG_OMFS_FS is not set # CONFIG_HPFS_FS is not set # CONFIG_QNX4FS_FS is not set # CONFIG_QNX6FS_FS is not set # CONFIG_ROMFS_FS is not set CONFIG_PSTORE=y CONFIG_PSTORE_DEFLATE_COMPRESS=y # CONFIG_PSTORE_LZO_COMPRESS is not set # CONFIG_PSTORE_LZ4_COMPRESS is not set # CONFIG_PSTORE_LZ4HC_COMPRESS is not set # CONFIG_PSTORE_842_COMPRESS is not set # CONFIG_PSTORE_ZSTD_COMPRESS is not set CONFIG_PSTORE_COMPRESS=y CONFIG_PSTORE_DEFLATE_COMPRESS_DEFAULT=y CONFIG_PSTORE_COMPRESS_DEFAULT="deflate" CONFIG_PSTORE_CONSOLE=y CONFIG_PSTORE_PMSG=y # CONFIG_PSTORE_FTRACE is not set CONFIG_PSTORE_RAM=m # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set # CONFIG_EROFS_FS is not set CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=y # CONFIG_NFS_V2 is not set CONFIG_NFS_V3=y CONFIG_NFS_V3_ACL=y CONFIG_NFS_V4=m # CONFIG_NFS_SWAP is not set CONFIG_NFS_V4_1=y CONFIG_NFS_V4_2=y CONFIG_PNFS_FILE_LAYOUT=m CONFIG_PNFS_BLOCK=m CONFIG_PNFS_FLEXFILE_LAYOUT=m CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" # CONFIG_NFS_V4_1_MIGRATION is not set CONFIG_NFS_V4_SECURITY_LABEL=y CONFIG_ROOT_NFS=y # CONFIG_NFS_USE_LEGACY_DNS is not set CONFIG_NFS_USE_KERNEL_DNS=y CONFIG_NFS_DEBUG=y CONFIG_NFS_DISABLE_UDP_SUPPORT=y CONFIG_NFSD=m CONFIG_NFSD_V2_ACL=y CONFIG_NFSD_V3=y CONFIG_NFSD_V3_ACL=y CONFIG_NFSD_V4=y CONFIG_NFSD_PNFS=y # CONFIG_NFSD_BLOCKLAYOUT is not set CONFIG_NFSD_SCSILAYOUT=y # CONFIG_NFSD_FLEXFILELAYOUT is not set # CONFIG_NFSD_V4_2_INTER_SSC is not set CONFIG_NFSD_V4_SECURITY_LABEL=y CONFIG_GRACE_PERIOD=y CONFIG_LOCKD=y CONFIG_LOCKD_V4=y CONFIG_NFS_ACL_SUPPORT=y CONFIG_NFS_COMMON=y CONFIG_SUNRPC=y CONFIG_SUNRPC_GSS=m CONFIG_SUNRPC_BACKCHANNEL=y CONFIG_RPCSEC_GSS_KRB5=m # CONFIG_SUNRPC_DISABLE_INSECURE_ENCTYPES is not set CONFIG_SUNRPC_DEBUG=y CONFIG_CEPH_FS=m # CONFIG_CEPH_FSCACHE is not set CONFIG_CEPH_FS_POSIX_ACL=y # CONFIG_CEPH_FS_SECURITY_LABEL is not set CONFIG_CIFS=m # CONFIG_CIFS_STATS2 is not set CONFIG_CIFS_ALLOW_INSECURE_LEGACY=y CONFIG_CIFS_WEAK_PW_HASH=y CONFIG_CIFS_UPCALL=y CONFIG_CIFS_XATTR=y CONFIG_CIFS_POSIX=y CONFIG_CIFS_DEBUG=y # CONFIG_CIFS_DEBUG2 is not set # CONFIG_CIFS_DEBUG_DUMP_KEYS is not set CONFIG_CIFS_DFS_UPCALL=y # CONFIG_CIFS_FSCACHE is not set # CONFIG_CODA_FS is not set # CONFIG_AFS_FS is not set CONFIG_9P_FS=y CONFIG_9P_FS_POSIX_ACL=y # CONFIG_9P_FS_SECURITY is not set CONFIG_NLS=y CONFIG_NLS_DEFAULT="utf8" CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_CODEPAGE_737=m CONFIG_NLS_CODEPAGE_775=m CONFIG_NLS_CODEPAGE_850=m CONFIG_NLS_CODEPAGE_852=m CONFIG_NLS_CODEPAGE_855=m CONFIG_NLS_CODEPAGE_857=m CONFIG_NLS_CODEPAGE_860=m CONFIG_NLS_CODEPAGE_861=m CONFIG_NLS_CODEPAGE_862=m CONFIG_NLS_CODEPAGE_863=m CONFIG_NLS_CODEPAGE_864=m CONFIG_NLS_CODEPAGE_865=m CONFIG_NLS_CODEPAGE_866=m CONFIG_NLS_CODEPAGE_869=m CONFIG_NLS_CODEPAGE_936=m CONFIG_NLS_CODEPAGE_950=m CONFIG_NLS_CODEPAGE_932=m CONFIG_NLS_CODEPAGE_949=m CONFIG_NLS_CODEPAGE_874=m CONFIG_NLS_ISO8859_8=m CONFIG_NLS_CODEPAGE_1250=m CONFIG_NLS_CODEPAGE_1251=m CONFIG_NLS_ASCII=y CONFIG_NLS_ISO8859_1=m CONFIG_NLS_ISO8859_2=m CONFIG_NLS_ISO8859_3=m CONFIG_NLS_ISO8859_4=m CONFIG_NLS_ISO8859_5=m CONFIG_NLS_ISO8859_6=m CONFIG_NLS_ISO8859_7=m CONFIG_NLS_ISO8859_9=m CONFIG_NLS_ISO8859_13=m CONFIG_NLS_ISO8859_14=m CONFIG_NLS_ISO8859_15=m CONFIG_NLS_KOI8_R=m CONFIG_NLS_KOI8_U=m CONFIG_NLS_MAC_ROMAN=m CONFIG_NLS_MAC_CELTIC=m CONFIG_NLS_MAC_CENTEURO=m CONFIG_NLS_MAC_CROATIAN=m CONFIG_NLS_MAC_CYRILLIC=m CONFIG_NLS_MAC_GAELIC=m CONFIG_NLS_MAC_GREEK=m CONFIG_NLS_MAC_ICELAND=m CONFIG_NLS_MAC_INUIT=m CONFIG_NLS_MAC_ROMANIAN=m CONFIG_NLS_MAC_TURKISH=m CONFIG_NLS_UTF8=m CONFIG_DLM=m CONFIG_DLM_DEBUG=y # CONFIG_UNICODE is not set CONFIG_IO_WQ=y # end of File systems # # Security options # CONFIG_KEYS=y # CONFIG_KEYS_REQUEST_CACHE is not set CONFIG_PERSISTENT_KEYRINGS=y CONFIG_BIG_KEYS=y CONFIG_TRUSTED_KEYS=y CONFIG_ENCRYPTED_KEYS=y # CONFIG_KEY_DH_OPERATIONS is not set # CONFIG_SECURITY_DMESG_RESTRICT is not set CONFIG_SECURITY=y CONFIG_SECURITYFS=y CONFIG_SECURITY_NETWORK=y CONFIG_PAGE_TABLE_ISOLATION=y CONFIG_SECURITY_NETWORK_XFRM=y CONFIG_SECURITY_PATH=y CONFIG_INTEL_TXT=y CONFIG_LSM_MMAP_MIN_ADDR=65535 CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y CONFIG_HARDENED_USERCOPY=y CONFIG_HARDENED_USERCOPY_FALLBACK=y # CONFIG_HARDENED_USERCOPY_PAGESPAN is not set # CONFIG_FORTIFY_SOURCE is not set # CONFIG_STATIC_USERMODEHELPER is not set CONFIG_SECURITY_SELINUX=y CONFIG_SECURITY_SELINUX_BOOTPARAM=y # CONFIG_SECURITY_SELINUX_DISABLE is not set CONFIG_SECURITY_SELINUX_DEVELOP=y CONFIG_SECURITY_SELINUX_AVC_STATS=y CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1 CONFIG_SECURITY_SELINUX_SIDTAB_HASH_BITS=9 CONFIG_SECURITY_SELINUX_SID2STR_CACHE_SIZE=256 # CONFIG_SECURITY_SMACK is not set # CONFIG_SECURITY_TOMOYO is not set CONFIG_SECURITY_APPARMOR=y CONFIG_SECURITY_APPARMOR_HASH=y CONFIG_SECURITY_APPARMOR_HASH_DEFAULT=y # CONFIG_SECURITY_APPARMOR_DEBUG is not set # CONFIG_SECURITY_LOADPIN is not set CONFIG_SECURITY_YAMA=y # CONFIG_SECURITY_SAFESETID is not set # CONFIG_SECURITY_LOCKDOWN_LSM is not set CONFIG_INTEGRITY=y CONFIG_INTEGRITY_SIGNATURE=y CONFIG_INTEGRITY_ASYMMETRIC_KEYS=y CONFIG_INTEGRITY_TRUSTED_KEYRING=y # CONFIG_INTEGRITY_PLATFORM_KEYRING is not set CONFIG_INTEGRITY_AUDIT=y CONFIG_IMA=y CONFIG_IMA_MEASURE_PCR_IDX=10 CONFIG_IMA_LSM_RULES=y # CONFIG_IMA_TEMPLATE is not set CONFIG_IMA_NG_TEMPLATE=y # CONFIG_IMA_SIG_TEMPLATE is not set CONFIG_IMA_DEFAULT_TEMPLATE="ima-ng" CONFIG_IMA_DEFAULT_HASH_SHA1=y # CONFIG_IMA_DEFAULT_HASH_SHA256 is not set CONFIG_IMA_DEFAULT_HASH="sha1" # CONFIG_IMA_WRITE_POLICY is not set # CONFIG_IMA_READ_POLICY is not set CONFIG_IMA_APPRAISE=y # CONFIG_IMA_ARCH_POLICY is not set # CONFIG_IMA_APPRAISE_BUILD_POLICY is not set CONFIG_IMA_APPRAISE_BOOTPARAM=y # CONFIG_IMA_APPRAISE_MODSIG is not set CONFIG_IMA_TRUSTED_KEYRING=y # CONFIG_IMA_BLACKLIST_KEYRING is not set # CONFIG_IMA_LOAD_X509 is not set CONFIG_IMA_MEASURE_ASYMMETRIC_KEYS=y CONFIG_IMA_QUEUE_EARLY_BOOT_KEYS=y CONFIG_EVM=y CONFIG_EVM_ATTR_FSUUID=y # CONFIG_EVM_ADD_XATTRS is not set # CONFIG_EVM_LOAD_X509 is not set CONFIG_DEFAULT_SECURITY_SELINUX=y # CONFIG_DEFAULT_SECURITY_APPARMOR is not set # CONFIG_DEFAULT_SECURITY_DAC is not set CONFIG_LSM="lockdown,yama,loadpin,safesetid,integrity,selinux,smack,tomoyo,apparmor" # # Kernel hardening options # # # Memory initialization # CONFIG_INIT_STACK_NONE=y # CONFIG_GCC_PLUGIN_STRUCTLEAK_USER is not set # CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF is not set # CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF_ALL is not set # CONFIG_GCC_PLUGIN_STACKLEAK is not set # CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set # CONFIG_INIT_ON_FREE_DEFAULT_ON is not set # end of Memory initialization # end of Kernel hardening options # end of Security options CONFIG_XOR_BLOCKS=m CONFIG_ASYNC_CORE=m CONFIG_ASYNC_MEMCPY=m CONFIG_ASYNC_XOR=m CONFIG_ASYNC_PQ=m CONFIG_ASYNC_RAID6_RECOV=m CONFIG_CRYPTO=y # # Crypto core or helper # CONFIG_CRYPTO_ALGAPI=y CONFIG_CRYPTO_ALGAPI2=y CONFIG_CRYPTO_AEAD=y CONFIG_CRYPTO_AEAD2=y CONFIG_CRYPTO_SKCIPHER=y CONFIG_CRYPTO_SKCIPHER2=y CONFIG_CRYPTO_HASH=y CONFIG_CRYPTO_HASH2=y CONFIG_CRYPTO_RNG=y CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_RNG_DEFAULT=y CONFIG_CRYPTO_AKCIPHER2=y CONFIG_CRYPTO_AKCIPHER=y CONFIG_CRYPTO_KPP2=y CONFIG_CRYPTO_KPP=m CONFIG_CRYPTO_ACOMP2=y CONFIG_CRYPTO_MANAGER=y CONFIG_CRYPTO_MANAGER2=y CONFIG_CRYPTO_USER=m CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y CONFIG_CRYPTO_GF128MUL=y CONFIG_CRYPTO_NULL=y CONFIG_CRYPTO_NULL2=y CONFIG_CRYPTO_PCRYPT=m CONFIG_CRYPTO_CRYPTD=m CONFIG_CRYPTO_AUTHENC=m CONFIG_CRYPTO_TEST=m CONFIG_CRYPTO_SIMD=m CONFIG_CRYPTO_GLUE_HELPER_X86=m CONFIG_CRYPTO_ENGINE=m # # Public-key cryptography # CONFIG_CRYPTO_RSA=y CONFIG_CRYPTO_DH=m CONFIG_CRYPTO_ECC=m CONFIG_CRYPTO_ECDH=m # CONFIG_CRYPTO_ECRDSA is not set # CONFIG_CRYPTO_CURVE25519 is not set # CONFIG_CRYPTO_CURVE25519_X86 is not set # # Authenticated Encryption with Associated Data # CONFIG_CRYPTO_CCM=m CONFIG_CRYPTO_GCM=y # CONFIG_CRYPTO_CHACHA20POLY1305 is not set # CONFIG_CRYPTO_AEGIS128 is not set # CONFIG_CRYPTO_AEGIS128_AESNI_SSE2 is not set CONFIG_CRYPTO_SEQIV=y CONFIG_CRYPTO_ECHAINIV=m # # Block modes # CONFIG_CRYPTO_CBC=y # CONFIG_CRYPTO_CFB is not set CONFIG_CRYPTO_CTR=y CONFIG_CRYPTO_CTS=m CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_LRW=m # CONFIG_CRYPTO_OFB is not set CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_XTS=m # CONFIG_CRYPTO_KEYWRAP is not set # CONFIG_CRYPTO_NHPOLY1305_SSE2 is not set # CONFIG_CRYPTO_NHPOLY1305_AVX2 is not set # CONFIG_CRYPTO_ADIANTUM is not set CONFIG_CRYPTO_ESSIV=m # # Hash modes # CONFIG_CRYPTO_CMAC=m CONFIG_CRYPTO_HMAC=y CONFIG_CRYPTO_XCBC=m CONFIG_CRYPTO_VMAC=m # # Digest # CONFIG_CRYPTO_CRC32C=y CONFIG_CRYPTO_CRC32C_INTEL=m CONFIG_CRYPTO_CRC32=m CONFIG_CRYPTO_CRC32_PCLMUL=m CONFIG_CRYPTO_XXHASH=m CONFIG_CRYPTO_BLAKE2B=m # CONFIG_CRYPTO_BLAKE2S is not set # CONFIG_CRYPTO_BLAKE2S_X86 is not set CONFIG_CRYPTO_CRCT10DIF=y CONFIG_CRYPTO_CRCT10DIF_PCLMUL=m CONFIG_CRYPTO_GHASH=y # CONFIG_CRYPTO_POLY1305 is not set # CONFIG_CRYPTO_POLY1305_X86_64 is not set CONFIG_CRYPTO_MD4=m CONFIG_CRYPTO_MD5=y CONFIG_CRYPTO_MICHAEL_MIC=m CONFIG_CRYPTO_RMD128=m CONFIG_CRYPTO_RMD160=m CONFIG_CRYPTO_RMD256=m CONFIG_CRYPTO_RMD320=m CONFIG_CRYPTO_SHA1=y CONFIG_CRYPTO_SHA1_SSSE3=y CONFIG_CRYPTO_SHA256_SSSE3=y CONFIG_CRYPTO_SHA512_SSSE3=m CONFIG_CRYPTO_SHA256=y CONFIG_CRYPTO_SHA512=m # CONFIG_CRYPTO_SHA3 is not set # CONFIG_CRYPTO_SM3 is not set # CONFIG_CRYPTO_STREEBOG is not set CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_GHASH_CLMUL_NI_INTEL=m # # Ciphers # CONFIG_CRYPTO_AES=y # CONFIG_CRYPTO_AES_TI is not set CONFIG_CRYPTO_AES_NI_INTEL=m CONFIG_CRYPTO_ANUBIS=m CONFIG_CRYPTO_ARC4=m CONFIG_CRYPTO_BLOWFISH=m CONFIG_CRYPTO_BLOWFISH_COMMON=m CONFIG_CRYPTO_BLOWFISH_X86_64=m CONFIG_CRYPTO_CAMELLIA=m CONFIG_CRYPTO_CAMELLIA_X86_64=m CONFIG_CRYPTO_CAMELLIA_AESNI_AVX_X86_64=m CONFIG_CRYPTO_CAMELLIA_AESNI_AVX2_X86_64=m CONFIG_CRYPTO_CAST_COMMON=m CONFIG_CRYPTO_CAST5=m CONFIG_CRYPTO_CAST5_AVX_X86_64=m CONFIG_CRYPTO_CAST6=m CONFIG_CRYPTO_CAST6_AVX_X86_64=m CONFIG_CRYPTO_DES=m # CONFIG_CRYPTO_DES3_EDE_X86_64 is not set CONFIG_CRYPTO_FCRYPT=m CONFIG_CRYPTO_KHAZAD=m CONFIG_CRYPTO_SALSA20=m # CONFIG_CRYPTO_CHACHA20 is not set # CONFIG_CRYPTO_CHACHA20_X86_64 is not set CONFIG_CRYPTO_SEED=m CONFIG_CRYPTO_SERPENT=m CONFIG_CRYPTO_SERPENT_SSE2_X86_64=m CONFIG_CRYPTO_SERPENT_AVX_X86_64=m CONFIG_CRYPTO_SERPENT_AVX2_X86_64=m # CONFIG_CRYPTO_SM4 is not set CONFIG_CRYPTO_TEA=m CONFIG_CRYPTO_TWOFISH=m CONFIG_CRYPTO_TWOFISH_COMMON=m CONFIG_CRYPTO_TWOFISH_X86_64=m CONFIG_CRYPTO_TWOFISH_X86_64_3WAY=m CONFIG_CRYPTO_TWOFISH_AVX_X86_64=m # # Compression # CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_LZO=y # CONFIG_CRYPTO_842 is not set # CONFIG_CRYPTO_LZ4 is not set # CONFIG_CRYPTO_LZ4HC is not set # CONFIG_CRYPTO_ZSTD is not set # # Random Number Generation # CONFIG_CRYPTO_ANSI_CPRNG=m CONFIG_CRYPTO_DRBG_MENU=y CONFIG_CRYPTO_DRBG_HMAC=y CONFIG_CRYPTO_DRBG_HASH=y CONFIG_CRYPTO_DRBG_CTR=y CONFIG_CRYPTO_DRBG=y CONFIG_CRYPTO_JITTERENTROPY=y CONFIG_CRYPTO_USER_API=y CONFIG_CRYPTO_USER_API_HASH=y CONFIG_CRYPTO_USER_API_SKCIPHER=y CONFIG_CRYPTO_USER_API_RNG=m # CONFIG_CRYPTO_USER_API_AEAD is not set # CONFIG_CRYPTO_STATS is not set CONFIG_CRYPTO_HASH_INFO=y # # Crypto library routines # CONFIG_CRYPTO_LIB_AES=y CONFIG_CRYPTO_LIB_ARC4=m # CONFIG_CRYPTO_LIB_BLAKE2S is not set # CONFIG_CRYPTO_LIB_CHACHA is not set # CONFIG_CRYPTO_LIB_CURVE25519 is not set CONFIG_CRYPTO_LIB_DES=m CONFIG_CRYPTO_LIB_POLY1305_RSIZE=11 # CONFIG_CRYPTO_LIB_POLY1305 is not set # CONFIG_CRYPTO_LIB_CHACHA20POLY1305 is not set CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_HW=y CONFIG_CRYPTO_DEV_PADLOCK=m CONFIG_CRYPTO_DEV_PADLOCK_AES=m CONFIG_CRYPTO_DEV_PADLOCK_SHA=m # CONFIG_CRYPTO_DEV_ATMEL_ECC is not set # CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set CONFIG_CRYPTO_DEV_CCP=y CONFIG_CRYPTO_DEV_CCP_DD=m CONFIG_CRYPTO_DEV_SP_CCP=y CONFIG_CRYPTO_DEV_CCP_CRYPTO=m CONFIG_CRYPTO_DEV_SP_PSP=y # CONFIG_CRYPTO_DEV_CCP_DEBUGFS is not set CONFIG_CRYPTO_DEV_QAT=m CONFIG_CRYPTO_DEV_QAT_DH895xCC=m CONFIG_CRYPTO_DEV_QAT_C3XXX=m CONFIG_CRYPTO_DEV_QAT_C62X=m CONFIG_CRYPTO_DEV_QAT_DH895xCCVF=m CONFIG_CRYPTO_DEV_QAT_C3XXXVF=m CONFIG_CRYPTO_DEV_QAT_C62XVF=m # CONFIG_CRYPTO_DEV_NITROX_CNN55XX is not set CONFIG_CRYPTO_DEV_CHELSIO=m CONFIG_CRYPTO_DEV_VIRTIO=m # CONFIG_CRYPTO_DEV_SAFEXCEL is not set # CONFIG_CRYPTO_DEV_AMLOGIC_GXL is not set CONFIG_ASYMMETRIC_KEY_TYPE=y CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y # CONFIG_ASYMMETRIC_TPM_KEY_SUBTYPE is not set CONFIG_X509_CERTIFICATE_PARSER=y # CONFIG_PKCS8_PRIVATE_KEY_PARSER is not set CONFIG_PKCS7_MESSAGE_PARSER=y # CONFIG_PKCS7_TEST_KEY is not set CONFIG_SIGNED_PE_FILE_VERIFICATION=y # # Certificates for signature checking # CONFIG_MODULE_SIG_KEY="certs/signing_key.pem" CONFIG_SYSTEM_TRUSTED_KEYRING=y CONFIG_SYSTEM_TRUSTED_KEYS="" # CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set # CONFIG_SECONDARY_TRUSTED_KEYRING is not set CONFIG_SYSTEM_BLACKLIST_KEYRING=y CONFIG_SYSTEM_BLACKLIST_HASH_LIST="" # end of Certificates for signature checking CONFIG_BINARY_PRINTF=y # # Library routines # CONFIG_RAID6_PQ=m CONFIG_RAID6_PQ_BENCHMARK=y # CONFIG_PACKING is not set CONFIG_BITREVERSE=y CONFIG_GENERIC_STRNCPY_FROM_USER=y CONFIG_GENERIC_STRNLEN_USER=y CONFIG_GENERIC_NET_UTILS=y CONFIG_GENERIC_FIND_FIRST_BIT=y CONFIG_CORDIC=m CONFIG_PRIME_NUMBERS=m CONFIG_RATIONAL=y CONFIG_GENERIC_PCI_IOMAP=y CONFIG_GENERIC_IOMAP=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y CONFIG_ARCH_HAS_FAST_MULTIPLIER=y CONFIG_CRC_CCITT=y CONFIG_CRC16=y CONFIG_CRC_T10DIF=y CONFIG_CRC_ITU_T=m CONFIG_CRC32=y # CONFIG_CRC32_SELFTEST is not set CONFIG_CRC32_SLICEBY8=y # CONFIG_CRC32_SLICEBY4 is not set # CONFIG_CRC32_SARWATE is not set # CONFIG_CRC32_BIT is not set # CONFIG_CRC64 is not set # CONFIG_CRC4 is not set # CONFIG_CRC7 is not set CONFIG_LIBCRC32C=m CONFIG_CRC8=m CONFIG_XXHASH=y # CONFIG_RANDOM32_SELFTEST is not set CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=y CONFIG_LZO_COMPRESS=y CONFIG_LZO_DECOMPRESS=y CONFIG_LZ4_DECOMPRESS=y CONFIG_ZSTD_COMPRESS=m CONFIG_ZSTD_DECOMPRESS=m CONFIG_XZ_DEC=y CONFIG_XZ_DEC_X86=y CONFIG_XZ_DEC_POWERPC=y CONFIG_XZ_DEC_IA64=y CONFIG_XZ_DEC_ARM=y CONFIG_XZ_DEC_ARMTHUMB=y CONFIG_XZ_DEC_SPARC=y CONFIG_XZ_DEC_BCJ=y # CONFIG_XZ_DEC_TEST is not set CONFIG_DECOMPRESS_GZIP=y CONFIG_DECOMPRESS_BZIP2=y CONFIG_DECOMPRESS_LZMA=y CONFIG_DECOMPRESS_XZ=y CONFIG_DECOMPRESS_LZO=y CONFIG_DECOMPRESS_LZ4=y CONFIG_GENERIC_ALLOCATOR=y CONFIG_REED_SOLOMON=m CONFIG_REED_SOLOMON_ENC8=y CONFIG_REED_SOLOMON_DEC8=y CONFIG_TEXTSEARCH=y CONFIG_TEXTSEARCH_KMP=m CONFIG_TEXTSEARCH_BM=m CONFIG_TEXTSEARCH_FSM=m CONFIG_BTREE=y CONFIG_INTERVAL_TREE=y CONFIG_XARRAY_MULTI=y CONFIG_ASSOCIATIVE_ARRAY=y CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT_MAP=y CONFIG_HAS_DMA=y CONFIG_NEED_SG_DMA_LENGTH=y CONFIG_NEED_DMA_MAP_STATE=y CONFIG_ARCH_DMA_ADDR_T_64BIT=y CONFIG_ARCH_HAS_FORCE_DMA_UNENCRYPTED=y CONFIG_SWIOTLB=y CONFIG_DMA_CMA=y # # Default contiguous memory area size: # CONFIG_CMA_SIZE_MBYTES=200 CONFIG_CMA_SIZE_SEL_MBYTES=y # CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set # CONFIG_CMA_SIZE_SEL_MIN is not set # CONFIG_CMA_SIZE_SEL_MAX is not set CONFIG_CMA_ALIGNMENT=8 # CONFIG_DMA_API_DEBUG is not set CONFIG_SGL_ALLOC=y CONFIG_IOMMU_HELPER=y CONFIG_CHECK_SIGNATURE=y CONFIG_CPUMASK_OFFSTACK=y CONFIG_CPU_RMAP=y CONFIG_DQL=y CONFIG_GLOB=y # CONFIG_GLOB_SELFTEST is not set CONFIG_NLATTR=y CONFIG_CLZ_TAB=y CONFIG_IRQ_POLL=y CONFIG_MPILIB=y CONFIG_SIGNATURE=y CONFIG_DIMLIB=y CONFIG_OID_REGISTRY=y CONFIG_UCS2_STRING=y CONFIG_HAVE_GENERIC_VDSO=y CONFIG_GENERIC_GETTIMEOFDAY=y CONFIG_GENERIC_VDSO_TIME_NS=y CONFIG_FONT_SUPPORT=y # CONFIG_FONTS is not set CONFIG_FONT_8x8=y CONFIG_FONT_8x16=y CONFIG_SG_POOL=y CONFIG_ARCH_HAS_PMEM_API=y CONFIG_MEMREGION=y CONFIG_ARCH_HAS_UACCESS_FLUSHCACHE=y CONFIG_ARCH_HAS_UACCESS_MCSAFE=y CONFIG_ARCH_STACKWALK=y CONFIG_SBITMAP=y # CONFIG_STRING_SELFTEST is not set # end of Library routines # # Kernel hacking # # # printk and dmesg options # CONFIG_PRINTK_TIME=y # CONFIG_PRINTK_CALLER is not set CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 CONFIG_CONSOLE_LOGLEVEL_QUIET=4 CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 CONFIG_BOOT_PRINTK_DELAY=y CONFIG_DYNAMIC_DEBUG=y CONFIG_SYMBOLIC_ERRNAME=y CONFIG_DEBUG_BUGVERBOSE=y # end of printk and dmesg options # # Compile-time checks and compiler options # CONFIG_DEBUG_INFO=y CONFIG_DEBUG_INFO_REDUCED=y # CONFIG_DEBUG_INFO_SPLIT is not set # CONFIG_DEBUG_INFO_DWARF4 is not set # CONFIG_DEBUG_INFO_BTF is not set # CONFIG_GDB_SCRIPTS is not set CONFIG_ENABLE_MUST_CHECK=y CONFIG_FRAME_WARN=2048 CONFIG_STRIP_ASM_SYMS=y # CONFIG_READABLE_ASM is not set # CONFIG_HEADERS_INSTALL is not set CONFIG_OPTIMIZE_INLINING=y CONFIG_DEBUG_SECTION_MISMATCH=y CONFIG_SECTION_MISMATCH_WARN_ONLY=y CONFIG_STACK_VALIDATION=y # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set # end of Compile-time checks and compiler options # # Generic Kernel Debugging Instruments # CONFIG_MAGIC_SYSRQ=y CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1 CONFIG_MAGIC_SYSRQ_SERIAL=y CONFIG_DEBUG_FS=y CONFIG_HAVE_ARCH_KGDB=y # CONFIG_KGDB is not set CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y # CONFIG_UBSAN is not set CONFIG_UBSAN_ALIGNMENT=y # end of Generic Kernel Debugging Instruments CONFIG_DEBUG_KERNEL=y CONFIG_DEBUG_MISC=y # # Memory Debugging # # CONFIG_PAGE_EXTENSION is not set # CONFIG_DEBUG_PAGEALLOC is not set # CONFIG_PAGE_OWNER is not set # CONFIG_PAGE_POISONING is not set # CONFIG_DEBUG_PAGE_REF is not set CONFIG_DEBUG_RODATA_TEST=y CONFIG_GENERIC_PTDUMP=y # CONFIG_PTDUMP_DEBUGFS is not set # CONFIG_DEBUG_OBJECTS is not set # CONFIG_SLUB_DEBUG_ON is not set # CONFIG_SLUB_STATS is not set CONFIG_HAVE_DEBUG_KMEMLEAK=y # CONFIG_DEBUG_KMEMLEAK is not set # CONFIG_DEBUG_STACK_USAGE is not set # CONFIG_SCHED_STACK_END_CHECK is not set # CONFIG_DEBUG_VM is not set CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y # CONFIG_DEBUG_VIRTUAL is not set CONFIG_DEBUG_MEMORY_INIT=y CONFIG_MEMORY_NOTIFIER_ERROR_INJECT=m # CONFIG_DEBUG_PER_CPU_MAPS is not set CONFIG_HAVE_ARCH_KASAN=y CONFIG_HAVE_ARCH_KASAN_VMALLOC=y CONFIG_CC_HAS_KASAN_GENERIC=y # CONFIG_KASAN is not set CONFIG_KASAN_STACK=1 # end of Memory Debugging CONFIG_DEBUG_SHIRQ=y # # Debug Oops, Lockups and Hangs # CONFIG_PANIC_ON_OOPS=y CONFIG_PANIC_ON_OOPS_VALUE=1 CONFIG_PANIC_TIMEOUT=0 CONFIG_LOCKUP_DETECTOR=y CONFIG_SOFTLOCKUP_DETECTOR=y # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 CONFIG_HARDLOCKUP_DETECTOR_PERF=y CONFIG_HARDLOCKUP_CHECK_TIMESTAMP=y CONFIG_HARDLOCKUP_DETECTOR=y CONFIG_BOOTPARAM_HARDLOCKUP_PANIC=y CONFIG_BOOTPARAM_HARDLOCKUP_PANIC_VALUE=1 # CONFIG_DETECT_HUNG_TASK is not set # CONFIG_WQ_WATCHDOG is not set # end of Debug Oops, Lockups and Hangs # # Scheduler Debugging # CONFIG_SCHED_DEBUG=y CONFIG_SCHED_INFO=y CONFIG_SCHEDSTATS=y # end of Scheduler Debugging # CONFIG_DEBUG_TIMEKEEPING is not set # # Lock Debugging (spinlocks, mutexes, etc...) # CONFIG_LOCK_DEBUGGING_SUPPORT=y # CONFIG_PROVE_LOCKING is not set # CONFIG_LOCK_STAT is not set # CONFIG_DEBUG_RT_MUTEXES is not set # CONFIG_DEBUG_SPINLOCK is not set # CONFIG_DEBUG_MUTEXES is not set # CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set # CONFIG_DEBUG_RWSEMS is not set # CONFIG_DEBUG_LOCK_ALLOC is not set CONFIG_DEBUG_ATOMIC_SLEEP=y # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set CONFIG_LOCK_TORTURE_TEST=m CONFIG_WW_MUTEX_SELFTEST=m # end of Lock Debugging (spinlocks, mutexes, etc...) CONFIG_STACKTRACE=y # CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set # CONFIG_DEBUG_KOBJECT is not set # # Debug kernel data structures # CONFIG_DEBUG_LIST=y # CONFIG_DEBUG_PLIST is not set # CONFIG_DEBUG_SG is not set # CONFIG_DEBUG_NOTIFIERS is not set # CONFIG_BUG_ON_DATA_CORRUPTION is not set # end of Debug kernel data structures # CONFIG_DEBUG_CREDENTIALS is not set # # RCU Debugging # CONFIG_TORTURE_TEST=m CONFIG_RCU_PERF_TEST=m CONFIG_RCU_TORTURE_TEST=m CONFIG_RCU_CPU_STALL_TIMEOUT=60 # CONFIG_RCU_TRACE is not set # CONFIG_RCU_EQS_DEBUG is not set # end of RCU Debugging # CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set # CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set CONFIG_LATENCYTOP=y CONFIG_USER_STACKTRACE_SUPPORT=y CONFIG_NOP_TRACER=y CONFIG_HAVE_FUNCTION_TRACER=y CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y CONFIG_HAVE_DYNAMIC_FTRACE=y CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y CONFIG_HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS=y CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y CONFIG_HAVE_SYSCALL_TRACEPOINTS=y CONFIG_HAVE_FENTRY=y CONFIG_HAVE_C_RECORDMCOUNT=y CONFIG_TRACER_MAX_TRACE=y CONFIG_TRACE_CLOCK=y CONFIG_RING_BUFFER=y CONFIG_EVENT_TRACING=y CONFIG_CONTEXT_SWITCH_TRACER=y CONFIG_RING_BUFFER_ALLOW_SWAP=y CONFIG_TRACING=y CONFIG_GENERIC_TRACER=y CONFIG_TRACING_SUPPORT=y CONFIG_FTRACE=y # CONFIG_BOOTTIME_TRACING is not set CONFIG_FUNCTION_TRACER=y CONFIG_FUNCTION_GRAPH_TRACER=y CONFIG_DYNAMIC_FTRACE=y CONFIG_DYNAMIC_FTRACE_WITH_REGS=y CONFIG_DYNAMIC_FTRACE_WITH_DIRECT_CALLS=y CONFIG_FUNCTION_PROFILER=y CONFIG_STACK_TRACER=y # CONFIG_PREEMPTIRQ_EVENTS is not set # CONFIG_IRQSOFF_TRACER is not set CONFIG_SCHED_TRACER=y CONFIG_HWLAT_TRACER=y # CONFIG_MMIOTRACE is not set CONFIG_FTRACE_SYSCALLS=y CONFIG_TRACER_SNAPSHOT=y # CONFIG_TRACER_SNAPSHOT_PER_CPU_SWAP is not set CONFIG_BRANCH_PROFILE_NONE=y # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set # CONFIG_PROFILE_ALL_BRANCHES is not set CONFIG_BLK_DEV_IO_TRACE=y CONFIG_KPROBE_EVENTS=y # CONFIG_KPROBE_EVENTS_ON_NOTRACE is not set CONFIG_UPROBE_EVENTS=y CONFIG_BPF_EVENTS=y CONFIG_DYNAMIC_EVENTS=y CONFIG_PROBE_EVENTS=y # CONFIG_BPF_KPROBE_OVERRIDE is not set CONFIG_FTRACE_MCOUNT_RECORD=y CONFIG_TRACING_MAP=y CONFIG_HIST_TRIGGERS=y # CONFIG_TRACE_EVENT_INJECT is not set # CONFIG_TRACEPOINT_BENCHMARK is not set CONFIG_RING_BUFFER_BENCHMARK=m # CONFIG_TRACE_EVAL_MAP_FILE is not set # CONFIG_FTRACE_STARTUP_TEST is not set # CONFIG_RING_BUFFER_STARTUP_TEST is not set # CONFIG_PREEMPTIRQ_DELAY_TEST is not set # CONFIG_SYNTH_EVENT_GEN_TEST is not set # CONFIG_KPROBE_EVENT_GEN_TEST is not set CONFIG_PROVIDE_OHCI1394_DMA_INIT=y # CONFIG_SAMPLES is not set CONFIG_HAVE_ARCH_KCSAN=y # CONFIG_KCSAN is not set CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y CONFIG_STRICT_DEVMEM=y # CONFIG_IO_STRICT_DEVMEM is not set # # x86 Debugging # CONFIG_TRACE_IRQFLAGS_SUPPORT=y CONFIG_EARLY_PRINTK_USB=y CONFIG_X86_VERBOSE_BOOTUP=y CONFIG_EARLY_PRINTK=y CONFIG_EARLY_PRINTK_DBGP=y # CONFIG_EARLY_PRINTK_USB_XDBC is not set # CONFIG_EFI_PGT_DUMP is not set # CONFIG_DEBUG_WX is not set CONFIG_DOUBLEFAULT=y # CONFIG_DEBUG_TLBFLUSH is not set # CONFIG_IOMMU_DEBUG is not set CONFIG_HAVE_MMIOTRACE_SUPPORT=y CONFIG_X86_DECODER_SELFTEST=y CONFIG_IO_DELAY_0X80=y # CONFIG_IO_DELAY_0XED is not set # CONFIG_IO_DELAY_UDELAY is not set # CONFIG_IO_DELAY_NONE is not set CONFIG_DEBUG_BOOT_PARAMS=y # CONFIG_CPA_DEBUG is not set # CONFIG_DEBUG_ENTRY is not set # CONFIG_DEBUG_NMI_SELFTEST is not set CONFIG_X86_DEBUG_FPU=y # CONFIG_PUNIT_ATOM_DEBUG is not set CONFIG_UNWINDER_ORC=y # CONFIG_UNWINDER_FRAME_POINTER is not set # CONFIG_UNWINDER_GUESS is not set # end of x86 Debugging # # Kernel Testing and Coverage # # CONFIG_KUNIT is not set CONFIG_NOTIFIER_ERROR_INJECTION=m CONFIG_PM_NOTIFIER_ERROR_INJECT=m # CONFIG_NETDEV_NOTIFIER_ERROR_INJECT is not set CONFIG_FUNCTION_ERROR_INJECTION=y CONFIG_FAULT_INJECTION=y # CONFIG_FAILSLAB is not set # CONFIG_FAIL_PAGE_ALLOC is not set CONFIG_FAIL_MAKE_REQUEST=y # CONFIG_FAIL_IO_TIMEOUT is not set # CONFIG_FAIL_FUTEX is not set CONFIG_FAULT_INJECTION_DEBUG_FS=y # CONFIG_FAIL_FUNCTION is not set # CONFIG_FAIL_MMC_REQUEST is not set CONFIG_ARCH_HAS_KCOV=y CONFIG_CC_HAS_SANCOV_TRACE_PC=y # CONFIG_KCOV is not set CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_LKDTM is not set # CONFIG_TEST_LIST_SORT is not set # CONFIG_TEST_SORT is not set # CONFIG_KPROBES_SANITY_TEST is not set # CONFIG_BACKTRACE_SELF_TEST is not set # CONFIG_RBTREE_TEST is not set # CONFIG_REED_SOLOMON_TEST is not set # CONFIG_INTERVAL_TREE_TEST is not set # CONFIG_PERCPU_TEST is not set CONFIG_ATOMIC64_SELFTEST=y # CONFIG_ASYNC_RAID6_TEST is not set # CONFIG_TEST_HEXDUMP is not set # CONFIG_TEST_STRING_HELPERS is not set CONFIG_TEST_STRSCPY=m # CONFIG_TEST_KSTRTOX is not set CONFIG_TEST_PRINTF=m CONFIG_TEST_BITMAP=m # CONFIG_TEST_BITFIELD is not set # CONFIG_TEST_UUID is not set # CONFIG_TEST_XARRAY is not set # CONFIG_TEST_OVERFLOW is not set # CONFIG_TEST_RHASHTABLE is not set # CONFIG_TEST_HASH is not set # CONFIG_TEST_IDA is not set CONFIG_TEST_LKM=m CONFIG_TEST_VMALLOC=m CONFIG_TEST_USER_COPY=m CONFIG_TEST_BPF=m CONFIG_TEST_BLACKHOLE_DEV=m # CONFIG_FIND_BIT_BENCHMARK is not set CONFIG_TEST_FIRMWARE=m CONFIG_TEST_SYSCTL=m # CONFIG_TEST_UDELAY is not set CONFIG_TEST_STATIC_KEYS=m CONFIG_TEST_KMOD=m # CONFIG_TEST_MEMCAT_P is not set CONFIG_TEST_LIVEPATCH=m # CONFIG_TEST_STACKINIT is not set # CONFIG_TEST_MEMINIT is not set # CONFIG_MEMTEST is not set # CONFIG_HYPERV_TESTING is not set # end of Kernel Testing and Coverage # end of Kernel hacking --oIMVlEQ///Q2JYC7 Content-Type: text/plain; charset=us-ascii Content-Disposition: attachment; filename=job-script #!/bin/sh export_top_env() { export suite='will-it-scale' export testcase='will-it-scale' export category='benchmark' export nr_task=288 export job_origin='/lkp/lkp/.src-20200306-153202/allot/cyclic:p1:linux-devel:devel-hourly/lkp-knm01/will-it-scale-100.yaml' export queue_cmdline_keys='branch commit queue_at_least_once' export queue='validate' export testbox='lkp-knm01' export tbox_group='lkp-knm01' export submit_id='5e66c7f74eb5115a2e7c96fe' export job_file='/lkp/jobs/scheduled/lkp-knm01/will-it-scale-performance-process-100%-mmap1-ucode=0x11-debian-x86_64-20191114.cgz-db8e976e4a08f1f194a3503f88dec1319f9ee34f-20200310-23086-zqfs83-3.yaml' export id='e8b105b7d97ca4101ddaaa290de20214e42eca92' export queuer_version='/lkp-src' export model='Knights Mill' export nr_node=1 export nr_cpu=288 export memory='80G' export hdd_partitions= export swap_partitions='LABEL=SWAP' export rootfs_partition='/dev/disk/by-id/ata-WDC_WD30EZRX-00SPEB0_WD-WCC4E4EK5J23-part1' export brand='Intel(R) Xeon Phi(TM) CPU 7295 @ 1.50GHz' export commit='db8e976e4a08f1f194a3503f88dec1319f9ee34f' export need_kconfig_hw='CONFIG_IGB=y CONFIG_SATA_AHCI' export ucode='0x11' export kconfig='x86_64-rhel-7.6' export compiler='gcc-7' export enqueue_time='2020-03-10 06:49:31 +0800' export _id='5e66c7fb4eb5115a2e7c96ff' export _rt='/result/will-it-scale/performance-process-100%-mmap1-ucode=0x11/lkp-knm01/debian-x86_64-20191114.cgz/x86_64-rhel-7.6/gcc-7/db8e976e4a08f1f194a3503f88dec1319f9ee34f' export user='lkp' export head_commit='d4d977a483ac90cd9f039ffd4b5ab02fa28d6881' export base_commit='2c523b344dfa65a3738e7039832044aa133c75fb' export branch='linux-devel/devel-hourly-2020030910' export rootfs='debian-x86_64-20191114.cgz' export result_root='/result/will-it-scale/performance-process-100%-mmap1-ucode=0x11/lkp-knm01/debian-x86_64-20191114.cgz/x86_64-rhel-7.6/gcc-7/db8e976e4a08f1f194a3503f88dec1319f9ee34f/3' export scheduler_version='/lkp/lkp/.src-20200306-153202' export LKP_SERVER='inn' export arch='x86_64' export max_uptime=1500 export initrd='/osimage/debian/debian-x86_64-20191114.cgz' export bootloader_append='root=/dev/ram0 user=lkp job=/lkp/jobs/scheduled/lkp-knm01/will-it-scale-performance-process-100%-mmap1-ucode=0x11-debian-x86_64-20191114.cgz-db8e976e4a08f1f194a3503f88dec1319f9ee34f-20200310-23086-zqfs83-3.yaml ARCH=x86_64 kconfig=x86_64-rhel-7.6 branch=linux-devel/devel-hourly-2020030910 commit=db8e976e4a08f1f194a3503f88dec1319f9ee34f BOOT_IMAGE=/pkg/linux/x86_64-rhel-7.6/gcc-7/db8e976e4a08f1f194a3503f88dec1319f9ee34f/vmlinuz-5.6.0-rc4-00302-gdb8e976e4a08f max_uptime=1500 RESULT_ROOT=/result/will-it-scale/performance-process-100%-mmap1-ucode=0x11/lkp-knm01/debian-x86_64-20191114.cgz/x86_64-rhel-7.6/gcc-7/db8e976e4a08f1f194a3503f88dec1319f9ee34f/3 LKP_SERVER=inn nokaslr selinux=0 debug apic=debug sysrq_always_enabled rcupdate.rcu_cpu_stall_timeout=100 net.ifnames=0 printk.devkmsg=on panic=-1 softlockup_panic=1 nmi_watchdog=panic oops=panic load_ramdisk=2 prompt_ramdisk=0 drbd.minor_count=8 systemd.log_level=err ignore_loglevel console=tty0 earlyprintk=ttyS0,115200 console=ttyS0,115200 vga=normal rw' export modules_initrd='/pkg/linux/x86_64-rhel-7.6/gcc-7/db8e976e4a08f1f194a3503f88dec1319f9ee34f/modules.cgz' export bm_initrd='/osimage/deps/debian-x86_64-20180403.cgz/run-ipconfig_2018-04-03.cgz,/osimage/deps/debian-x86_64-20180403.cgz/lkp_2019-08-05.cgz,/osimage/deps/debian-x86_64-20180403.cgz/rsync-rootfs_2018-04-03.cgz,/osimage/deps/debian-x86_64-20180403.cgz/will-it-scale_2020-01-07.cgz,/osimage/pkg/debian-x86_64-20180403.cgz/will-it-scale-x86_64-1eef89e-1_2020-01-07.cgz,/osimage/deps/debian-x86_64-20180403.cgz/mpstat_2020-01-03.cgz,/osimage/deps/debian-x86_64-20180403.cgz/vmstat_2020-01-07.cgz,/osimage/deps/debian-x86_64-20180403.cgz/perf_2020-01-04.cgz,/osimage/pkg/debian-x86_64-20180403.cgz/perf-x86_64-98d54f81e36b-1_20200302.cgz,/osimage/pkg/debian-x86_64-20180403.cgz/sar-x86_64-e011d97-1_2020-01-03.cgz,/osimage/deps/debian-x86_64-20180403.cgz/hw_2020-01-02.cgz' export lkp_initrd='/osimage/user/lkp/lkp-x86_64.cgz' export site='inn' export LKP_CGI_PORT=80 export LKP_CIFS_PORT=139 export last_kernel='5.6.0-rc5' export repeat_to=4 export schedule_notify_address= export queue_at_least_once=1 export kernel='/pkg/linux/x86_64-rhel-7.6/gcc-7/db8e976e4a08f1f194a3503f88dec1319f9ee34f/vmlinuz-5.6.0-rc4-00302-gdb8e976e4a08f' export dequeue_time='2020-03-10 07:01:50 +0800' export job_initrd='/lkp/jobs/scheduled/lkp-knm01/will-it-scale-performance-process-100%-mmap1-ucode=0x11-debian-x86_64-20191114.cgz-db8e976e4a08f1f194a3503f88dec1319f9ee34f-20200310-23086-zqfs83-3.cgz' [ -n "$LKP_SRC" ] || export LKP_SRC=/lkp/${user:-lkp}/src } run_job() { echo $$ > $TMP/run-job.pid . $LKP_SRC/lib/http.sh . $LKP_SRC/lib/job.sh . $LKP_SRC/lib/env.sh export_top_env run_setup $LKP_SRC/setup/cpufreq_governor 'performance' run_monitor $LKP_SRC/monitors/wrapper kmsg run_monitor $LKP_SRC/monitors/no-stdout/wrapper boot-time run_monitor $LKP_SRC/monitors/wrapper iostat run_monitor $LKP_SRC/monitors/wrapper heartbeat run_monitor $LKP_SRC/monitors/wrapper vmstat run_monitor $LKP_SRC/monitors/wrapper numa-numastat run_monitor $LKP_SRC/monitors/wrapper numa-vmstat run_monitor $LKP_SRC/monitors/wrapper numa-meminfo run_monitor $LKP_SRC/monitors/wrapper proc-vmstat run_monitor $LKP_SRC/monitors/wrapper proc-stat run_monitor $LKP_SRC/monitors/wrapper meminfo run_monitor $LKP_SRC/monitors/wrapper slabinfo run_monitor $LKP_SRC/monitors/wrapper interrupts run_monitor $LKP_SRC/monitors/wrapper lock_stat run_monitor $LKP_SRC/monitors/wrapper latency_stats run_monitor $LKP_SRC/monitors/wrapper softirqs run_monitor $LKP_SRC/monitors/one-shot/wrapper bdi_dev_mapping run_monitor $LKP_SRC/monitors/wrapper diskstats run_monitor $LKP_SRC/monitors/wrapper nfsstat run_monitor $LKP_SRC/monitors/wrapper cpuidle run_monitor $LKP_SRC/monitors/wrapper cpufreq-stats run_monitor $LKP_SRC/monitors/wrapper sched_debug run_monitor $LKP_SRC/monitors/wrapper perf-stat run_monitor $LKP_SRC/monitors/wrapper mpstat run_monitor $LKP_SRC/monitors/no-stdout/wrapper perf-profile run_monitor $LKP_SRC/monitors/wrapper oom-killer run_monitor $LKP_SRC/monitors/plain/watchdog run_test mode='process' test='mmap1' $LKP_SRC/tests/wrapper will-it-scale } extract_stats() { export stats_part_begin= export stats_part_end= $LKP_SRC/stats/wrapper will-it-scale $LKP_SRC/stats/wrapper kmsg $LKP_SRC/stats/wrapper boot-time $LKP_SRC/stats/wrapper iostat $LKP_SRC/stats/wrapper vmstat $LKP_SRC/stats/wrapper numa-numastat $LKP_SRC/stats/wrapper numa-vmstat $LKP_SRC/stats/wrapper numa-meminfo $LKP_SRC/stats/wrapper proc-vmstat $LKP_SRC/stats/wrapper meminfo $LKP_SRC/stats/wrapper slabinfo $LKP_SRC/stats/wrapper interrupts $LKP_SRC/stats/wrapper lock_stat $LKP_SRC/stats/wrapper latency_stats $LKP_SRC/stats/wrapper softirqs $LKP_SRC/stats/wrapper diskstats $LKP_SRC/stats/wrapper nfsstat $LKP_SRC/stats/wrapper cpuidle $LKP_SRC/stats/wrapper sched_debug $LKP_SRC/stats/wrapper perf-stat $LKP_SRC/stats/wrapper mpstat $LKP_SRC/stats/wrapper perf-profile $LKP_SRC/stats/wrapper time will-it-scale.time $LKP_SRC/stats/wrapper dmesg $LKP_SRC/stats/wrapper kmsg $LKP_SRC/stats/wrapper last_state $LKP_SRC/stats/wrapper stderr $LKP_SRC/stats/wrapper time } "$@" --oIMVlEQ///Q2JYC7 Content-Type: text/plain; charset=us-ascii Content-Disposition: attachment; filename="job.yaml" --- #! jobs/will-it-scale-100.yaml suite: will-it-scale testcase: will-it-scale category: benchmark nr_task: 100% will-it-scale: mode: process test: mmap1 job_origin: "/lkp/lkp/.src-20200306-153202/allot/cyclic:p1:linux-devel:devel-hourly/lkp-knm01/will-it-scale-100.yaml" #! queue options queue_cmdline_keys: - branch - commit - queue_at_least_once queue: bisect testbox: lkp-knm01 tbox_group: lkp-knm01 submit_id: 5e6676d24eb51154aa0920b6 job_file: "/lkp/jobs/scheduled/lkp-knm01/will-it-scale-performance-process-100%-mmap1-ucode=0x11-debian-x86_64-20191114.cgz-db8e976e4a08f1f194a3503f88dec1319f9ee34f-20200310-21674-1g8yf9v-0.yaml" id: 45e6a7ccc7b79a7915ef5c7bc66400eed403e5e5 queuer_version: "/lkp-src" #! hosts/lkp-knm01 model: Knights Mill nr_node: 1 nr_cpu: 288 memory: 80G hdd_partitions: swap_partitions: LABEL=SWAP rootfs_partition: "/dev/disk/by-id/ata-WDC_WD30EZRX-00SPEB0_WD-WCC4E4EK5J23-part1" brand: Intel(R) Xeon Phi(TM) CPU 7295 @ 1.50GHz #! include/category/benchmark kmsg: boot-time: iostat: heartbeat: vmstat: numa-numastat: numa-vmstat: numa-meminfo: proc-vmstat: proc-stat: meminfo: slabinfo: interrupts: lock_stat: latency_stats: softirqs: bdi_dev_mapping: diskstats: nfsstat: cpuidle: cpufreq-stats: sched_debug: perf-stat: mpstat: perf-profile: #! include/category/ALL cpufreq_governor: performance #! include/queue/cyclic commit: db8e976e4a08f1f194a3503f88dec1319f9ee34f #! include/testbox/lkp-knm01 need_kconfig_hw: - CONFIG_IGB=y - CONFIG_SATA_AHCI ucode: '0x11' #! default params kconfig: x86_64-rhel-7.6 compiler: gcc-7 enqueue_time: 2020-03-10 01:03:17.895306502 +08:00 _id: 5e6676d24eb51154aa0920b6 _rt: "/result/will-it-scale/performance-process-100%-mmap1-ucode=0x11/lkp-knm01/debian-x86_64-20191114.cgz/x86_64-rhel-7.6/gcc-7/db8e976e4a08f1f194a3503f88dec1319f9ee34f" #! schedule options user: lkp head_commit: d4d977a483ac90cd9f039ffd4b5ab02fa28d6881 base_commit: 2c523b344dfa65a3738e7039832044aa133c75fb branch: linux-devel/devel-hourly-2020030910 rootfs: debian-x86_64-20191114.cgz result_root: "/result/will-it-scale/performance-process-100%-mmap1-ucode=0x11/lkp-knm01/debian-x86_64-20191114.cgz/x86_64-rhel-7.6/gcc-7/db8e976e4a08f1f194a3503f88dec1319f9ee34f/0" scheduler_version: "/lkp/lkp/.src-20200306-153202" LKP_SERVER: inn arch: x86_64 max_uptime: 1500 initrd: "/osimage/debian/debian-x86_64-20191114.cgz" bootloader_append: - root=/dev/ram0 - user=lkp - job=/lkp/jobs/scheduled/lkp-knm01/will-it-scale-performance-process-100%-mmap1-ucode=0x11-debian-x86_64-20191114.cgz-db8e976e4a08f1f194a3503f88dec1319f9ee34f-20200310-21674-1g8yf9v-0.yaml - ARCH=x86_64 - kconfig=x86_64-rhel-7.6 - branch=linux-devel/devel-hourly-2020030910 - commit=db8e976e4a08f1f194a3503f88dec1319f9ee34f - BOOT_IMAGE=/pkg/linux/x86_64-rhel-7.6/gcc-7/db8e976e4a08f1f194a3503f88dec1319f9ee34f/vmlinuz-5.6.0-rc4-00302-gdb8e976e4a08f - max_uptime=1500 - RESULT_ROOT=/result/will-it-scale/performance-process-100%-mmap1-ucode=0x11/lkp-knm01/debian-x86_64-20191114.cgz/x86_64-rhel-7.6/gcc-7/db8e976e4a08f1f194a3503f88dec1319f9ee34f/0 - LKP_SERVER=inn - nokaslr - selinux=0 - debug - apic=debug - sysrq_always_enabled - rcupdate.rcu_cpu_stall_timeout=100 - net.ifnames=0 - printk.devkmsg=on - panic=-1 - softlockup_panic=1 - nmi_watchdog=panic - oops=panic - load_ramdisk=2 - prompt_ramdisk=0 - drbd.minor_count=8 - systemd.log_level=err - ignore_loglevel - console=tty0 - earlyprintk=ttyS0,115200 - console=ttyS0,115200 - vga=normal - rw modules_initrd: "/pkg/linux/x86_64-rhel-7.6/gcc-7/db8e976e4a08f1f194a3503f88dec1319f9ee34f/modules.cgz" bm_initrd: "/osimage/deps/debian-x86_64-20180403.cgz/run-ipconfig_2018-04-03.cgz,/osimage/deps/debian-x86_64-20180403.cgz/lkp_2019-08-05.cgz,/osimage/deps/debian-x86_64-20180403.cgz/rsync-rootfs_2018-04-03.cgz,/osimage/deps/debian-x86_64-20180403.cgz/will-it-scale_2020-01-07.cgz,/osimage/pkg/debian-x86_64-20180403.cgz/will-it-scale-x86_64-1eef89e-1_2020-01-07.cgz,/osimage/deps/debian-x86_64-20180403.cgz/mpstat_2020-01-03.cgz,/osimage/deps/debian-x86_64-20180403.cgz/vmstat_2020-01-07.cgz,/osimage/deps/debian-x86_64-20180403.cgz/perf_2020-01-04.cgz,/osimage/pkg/debian-x86_64-20180403.cgz/perf-x86_64-98d54f81e36b-1_20200302.cgz,/osimage/pkg/debian-x86_64-20180403.cgz/sar-x86_64-e011d97-1_2020-01-03.cgz,/osimage/deps/debian-x86_64-20180403.cgz/hw_2020-01-02.cgz" lkp_initrd: "/osimage/user/lkp/lkp-x86_64.cgz" site: inn #! /lkp/lkp/.src-20200306-153202/include/site/inn LKP_CGI_PORT: 80 LKP_CIFS_PORT: 139 oom-killer: watchdog: #! runtime status last_kernel: 5.6.0-rc5 repeat_to: 2 schedule_notify_address: #! user overrides queue_at_least_once: 0 kernel: "/pkg/linux/x86_64-rhel-7.6/gcc-7/db8e976e4a08f1f194a3503f88dec1319f9ee34f/vmlinuz-5.6.0-rc4-00302-gdb8e976e4a08f" dequeue_time: 2020-03-10 01:08:54.157754959 +08:00 job_state: finished loadavg: 39.57 126.00 72.88 1/1851 11383 start_time: '1583773837' end_time: '1583774145' version: "/lkp/lkp/.src-20200306-153236:967822fc:bda0b99c4" --oIMVlEQ///Q2JYC7 Content-Type: text/plain; charset=us-ascii Content-Disposition: attachment; filename=reproduce for cpu_dir in /sys/devices/system/cpu/cpu[0-9]* do online_file="$cpu_dir"/online [ -f "$online_file" ] && [ "$(cat "$online_file")" -eq 0 ] && continue file="$cpu_dir"/cpufreq/scaling_governor [ -f "$file" ] && echo "performance" > "$file" done "python2" "./runtest.py" "mmap1" "295" "process" "288" --oIMVlEQ///Q2JYC7--