From: Mathias Nyman <mathias.nyman@linux.intel.com>
To: <gregkh@linuxfoundation.org>
Cc: <linux-usb@vger.kernel.org>,
Kai-Heng Feng <kai.heng.feng@canonical.com>,
Mathias Nyman <mathias.nyman@linux.intel.com>
Subject: [PATCH 7/9] xhci: Wait until link state trainsits to U0 after setting USB_SS_PORT_LS_U0
Date: Thu, 12 Mar 2020 16:45:15 +0200 [thread overview]
Message-ID: <20200312144517.1593-8-mathias.nyman@linux.intel.com> (raw)
In-Reply-To: <20200312144517.1593-1-mathias.nyman@linux.intel.com>
From: Kai-Heng Feng <kai.heng.feng@canonical.com>
Like U3 case, xHCI spec doesn't specify the upper bound of U0 transition
time. The 20ms is not enough for some devices.
Intead of polling PLS or PLC, we can facilitate the port change event to
know that the link transits to U0 is completed.
While at it, also separate U0 and U3 case to make the code cleaner.
[variable rename to u3exit, and skip completion for usb2 ports -Mathias ]
Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com>
Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
---
drivers/usb/host/xhci-hub.c | 44 +++++++++++++++++++++++++-----------
drivers/usb/host/xhci-mem.c | 1 +
drivers/usb/host/xhci-ring.c | 1 +
drivers/usb/host/xhci.h | 1 +
4 files changed, 34 insertions(+), 13 deletions(-)
diff --git a/drivers/usb/host/xhci-hub.c b/drivers/usb/host/xhci-hub.c
index 712cd44f05ac..02f52d4f74df 100644
--- a/drivers/usb/host/xhci-hub.c
+++ b/drivers/usb/host/xhci-hub.c
@@ -1306,7 +1306,33 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
wIndex, link_state);
goto error;
}
+
+ if (link_state == USB_SS_PORT_LS_U0) {
+ if ((temp & PORT_PLS_MASK) == XDEV_U0)
+ break;
+
+ if (!((temp & PORT_PLS_MASK) == XDEV_U1 ||
+ (temp & PORT_PLS_MASK) == XDEV_U2 ||
+ (temp & PORT_PLS_MASK) == XDEV_U3)) {
+ xhci_warn(xhci, "Can only set port %d to U0 from U state\n",
+ wIndex);
+ goto error;
+ }
+ reinit_completion(&bus_state->u3exit_done[wIndex]);
+ xhci_set_link_state(xhci, ports[wIndex],
+ USB_SS_PORT_LS_U0);
+ spin_unlock_irqrestore(&xhci->lock, flags);
+ if (!wait_for_completion_timeout(&bus_state->u3exit_done[wIndex],
+ msecs_to_jiffies(100)))
+ xhci_dbg(xhci, "missing U0 port change event for port %d\n",
+ wIndex);
+ spin_lock_irqsave(&xhci->lock, flags);
+ temp = readl(ports[wIndex]->addr);
+ break;
+ }
+
if (link_state == USB_SS_PORT_LS_U3) {
+ int retries = 16;
slot_id = xhci_find_slot_id_by_port(hcd, xhci,
wIndex + 1);
if (slot_id) {
@@ -1317,26 +1343,18 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
xhci_stop_device(xhci, slot_id, 1);
spin_lock_irqsave(&xhci->lock, flags);
}
- }
-
- xhci_set_link_state(xhci, ports[wIndex], link_state);
-
- spin_unlock_irqrestore(&xhci->lock, flags);
- if (link_state == USB_SS_PORT_LS_U3) {
- int retries = 16;
-
+ xhci_set_link_state(xhci, ports[wIndex], USB_SS_PORT_LS_U3);
+ spin_unlock_irqrestore(&xhci->lock, flags);
while (retries--) {
usleep_range(4000, 8000);
temp = readl(ports[wIndex]->addr);
if ((temp & PORT_PLS_MASK) == XDEV_U3)
break;
}
- }
- spin_lock_irqsave(&xhci->lock, flags);
-
- temp = readl(ports[wIndex]->addr);
- if (link_state == USB_SS_PORT_LS_U3)
+ spin_lock_irqsave(&xhci->lock, flags);
+ temp = readl(ports[wIndex]->addr);
bus_state->suspended_ports |= 1 << wIndex;
+ }
break;
case USB_PORT_FEAT_POWER:
/*
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index 884c601bfa15..9764122c9cdf 100644
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -2552,6 +2552,7 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
xhci->usb3_rhub.bus_state.resume_done[i] = 0;
/* Only the USB 2.0 completions will ever be used. */
init_completion(&xhci->usb2_rhub.bus_state.rexit_done[i]);
+ init_completion(&xhci->usb3_rhub.bus_state.u3exit_done[i]);
}
if (scratchpad_alloc(xhci, flags))
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index ba512b25901a..a78787bb5133 100644
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -1681,6 +1681,7 @@ static void handle_port_status(struct xhci_hcd *xhci,
(portsc & PORT_PLS_MASK) == XDEV_U1 ||
(portsc & PORT_PLS_MASK) == XDEV_U2)) {
xhci_dbg(xhci, "resume SS port %d finished\n", port_id);
+ complete(&bus_state->u3exit_done[hcd_portnum]);
/* We've just brought the device into U0/1/2 through either the
* Resume state after a device remote wakeup, or through the
* U3Exit state after a host-initiated resume. If it's a device
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index d74f1be26a58..fbf26b20c1e1 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -1694,6 +1694,7 @@ struct xhci_bus_state {
/* Which ports are waiting on RExit to U0 transition. */
unsigned long rexit_ports;
struct completion rexit_done[USB_MAXCHILDREN];
+ struct completion u3exit_done[USB_MAXCHILDREN];
};
--
2.17.1
next prev parent reply other threads:[~2020-03-12 14:43 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-12 14:45 [PATCH 0/9] xhci features for usb-next Mathias Nyman
2020-03-12 14:45 ` [PATCH 1/9] xhci: bail out early if driver can't accress host in resume Mathias Nyman
2020-03-12 14:45 ` [PATCH 2/9] xhci: Add a separate debug message for split transaction errors Mathias Nyman
2020-03-12 14:45 ` [PATCH 3/9] xhci: Show host status when watchdog triggers and host is assumed dead Mathias Nyman
2020-03-12 14:45 ` [PATCH 4/9] usb: xhci: Enable LPM for VIA LABS VL805 Mathias Nyman
2020-03-12 14:45 ` [PATCH 5/9] usb: host: xhci-tegra: Tegra186/Tegra194 LPM Mathias Nyman
2020-03-12 14:45 ` [PATCH 6/9] xhci: Ensure link state is U3 after setting USB_SS_PORT_LS_U3 Mathias Nyman
2020-03-12 14:45 ` Mathias Nyman [this message]
2020-03-12 14:45 ` [PATCH 8/9] xhci: Finetune host initiated USB3 rootport link suspend and resume Mathias Nyman
2020-03-12 14:45 ` [PATCH 9/9] xhci-pci: Allow host runtime PM as default for Intel Tiger Lake xHCI Mathias Nyman
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