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Peter Anvin" , Jiri Olsa , Mark Rutland , Michael Petlan , Namhyung Kim , Stephane Eranian , linux-kernel@vger.kernel.org, x86@kernel.org Subject: [PATCH 2/3 v2] perf/amd/uncore: Make L3 thread mask code more readable Date: Fri, 13 Mar 2020 18:10:23 -0500 Message-Id: <20200313231024.17601-2-kim.phillips@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200313231024.17601-1-kim.phillips@amd.com> References: <20200313231024.17601-1-kim.phillips@amd.com> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: DM3PR08CA0003.namprd08.prod.outlook.com (2603:10b6:0:52::13) To SN6PR12MB2845.namprd12.prod.outlook.com (2603:10b6:805:75::33) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from fritz.amd.com (165.204.77.1) by DM3PR08CA0003.namprd08.prod.outlook.com (2603:10b6:0:52::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2793.17 via Frontend Transport; Fri, 13 Mar 2020 23:10:47 +0000 X-Mailer: git-send-email 2.25.1 X-Originating-IP: [165.204.77.1] X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: 90b1c137-99ec-4106-8a4a-08d7c7a3c48a X-MS-TrafficTypeDiagnostic: SN6PR12MB2846:|SN6PR12MB2846: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:2043; X-Forefront-PRVS: 034119E4F6 X-Forefront-Antispam-Report: SFV:NSPM;SFS:(10009020)(4636009)(366004)(39860400002)(376002)(136003)(396003)(346002)(199004)(81166006)(81156014)(86362001)(110136005)(6666004)(316002)(7049001)(966005)(186003)(52116002)(66946007)(36756003)(66556008)(54906003)(66476007)(7696005)(4326008)(1076003)(44832011)(2906002)(5660300002)(26005)(2616005)(956004)(8676002)(16526019)(478600001)(8936002)(6486002)(7416002);DIR:OUT;SFP:1101;SCL:1;SRVR:SN6PR12MB2846;H:SN6PR12MB2845.namprd12.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;A:1; Received-SPF: None (protection.outlook.com: amd.com does not designate permitted sender hosts) X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 0EogkjeC3l/MJodwd2imrK0EAJbJ0V2IDuDCnxCxgJ8zq566zyB6VvqnbzupX+VSrOW0dQqHqwU1V7aJPjdQTE+vsBjA9LOCd1kkJhGQdfO2duMwN1Co2kJSrl30taWrE9kBEh80xj1cg1/ZBwhTcQaYVis6ILRqdTzDL8Oh+OIKgltD72hF/fwB7URrrzyqSWCNy7OlOcd5JJtpaf7fieJk0Ip7INfSTVS31+tTmRutgwIBkBfnhEZ/6tE66QFyg7O8UD9kqtCXR04l5qy15wdSV1wAbJKQFxwUs5iUrGC9+F7hieCWyHx3aFWby7DfzuVDP+uspUxgmWblhi4baRLcuOjN990Xc7O44wxWEnCoNU1LaLKqW0jlsIIKXMRypiNxicMSkgvvzkvn1js1U6Pio76rYERkbdGHBHI6DA0b9ltXSTAWvjMooh9XlT/bBuroxP3YEvfILEgxemMOLOEiiiBaDDXvVS3QJfmVULy57JnfaeysAyAoAvOHN37iWkn2rU2PPwH/IZe0KQn73w== X-MS-Exchange-AntiSpam-MessageData: RyQ27qEjAoLm/1nY6gkaKX/KkByg8f9D1PqbJmVZMh6noZVBcuE9Ppn8SENWrFXAlDVhKkBUfrk1SHyhtAMEg8dK/Cv6EqMHJ/xtn5LhcAsGM+8UFO97G+3h45CpdkdBGgjfrysK9hnwwSr4Aisu/A== X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 90b1c137-99ec-4106-8a4a-08d7c7a3c48a X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Mar 2020 23:10:48.9171 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: JX2+Sud4CuZ6f+hD69e4fv5D0D/h3MoP6A2udlqHUkwR2FTx5zYU/92tCTioXBHKGLxjGb+mgN4XyZJpCPu2+w== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN6PR12MB2846 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Convert the l3_thread_slice_mask function to use the more readable topology_* helper functions, more intuitive variable names like shift and thread_mask, and BIT_ULL. Signed-off-by: Kim Phillips Cc: Alexander Shishkin Cc: Arnaldo Carvalho de Melo Cc: Borislav Petkov Cc: "H. Peter Anvin" Cc: Ingo Molnar Cc: Ingo Molnar Cc: Jiri Olsa Cc: Mark Rutland Cc: Michael Petlan Cc: Namhyung Kim Cc: Peter Zijlstra Cc: Stephane Eranian Cc: Thomas Gleixner Cc: linux-kernel@vger.kernel.org Cc: x86@kernel.org --- v2: new this series based on splitting into two parts, this one being the one with the non-move related changes, based on Boris' review comments: https://lkml.org/lkml/2020/3/12/581 arch/x86/events/amd/uncore.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/arch/x86/events/amd/uncore.c b/arch/x86/events/amd/uncore.c index dcdac001431e..b622e59ccdd0 100644 --- a/arch/x86/events/amd/uncore.c +++ b/arch/x86/events/amd/uncore.c @@ -185,13 +185,16 @@ static void amd_uncore_del(struct perf_event *event, int flags) */ static u64 l3_thread_slice_mask(int cpu) { - int thread = 2 * (cpu_data(cpu).cpu_core_id % 4); + unsigned int shift, thread = 0; + u64 thread_mask, core = topology_core_id(cpu); - if (smp_num_siblings > 1) - thread += cpu_data(cpu).apicid & 1; + if (topology_smt_supported() && !topology_is_primary_thread(cpu)) + thread = 1; - return (1ULL << (AMD64_L3_THREAD_SHIFT + thread) & - AMD64_L3_THREAD_MASK) | AMD64_L3_SLICE_MASK; + shift = AMD64_L3_THREAD_SHIFT + 2 * (core % 4) + thread; + thread_mask = BIT_ULL(shift); + + return AMD64_L3_SLICE_MASK | thread_mask; } static int amd_uncore_event_init(struct perf_event *event) -- 2.25.1