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From: Sasha Levin <sashal@kernel.org>
To: Sasha Levin <sashal@kernel.org>
To: linux-tip-commits@vger.kernel.org
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: stable@vger.kernel.org
Cc: stable@vger.kernel.org
Subject: Re: [tip: x86/timers] x86/tsc_msr: Use named struct initializers
Date: Tue, 17 Mar 2020 22:30:26 +0000	[thread overview]
Message-ID: <20200317223027.3623120409@mail.kernel.org> (raw)
In-Reply-To: <158396431730.28353.16602854182721546383.tip-bot2@tip-bot2>

Hi

[This is an automated email]

This commit has been processed because it contains a -stable tag.
The stable tag indicates that it's relevant for the following trees: all

The bot has tested the following trees: v5.5.9, v5.4.25, v4.19.109, v4.14.173, v4.9.216, v4.4.216.

v5.5.9: Build OK!
v5.4.25: Build OK!
v4.19.109: Failed to apply! Possible dependencies:
    0cc5359d8fd4 ("x86/cpu: Update init data for new Airmont CPU model")
    bba10c5cab4d ("x86/cpu: Use constant definitions for CPU models")

v4.14.173: Failed to apply! Possible dependencies:
    0cc5359d8fd4 ("x86/cpu: Update init data for new Airmont CPU model")
    397d3ad18dc4 ("x86/tsc: Convert to use x86_match_cpu() and INTEL_CPU_FAM6()")
    bba10c5cab4d ("x86/cpu: Use constant definitions for CPU models")

v4.9.216: Failed to apply! Possible dependencies:
    0cc5359d8fd4 ("x86/cpu: Update init data for new Airmont CPU model")
    397d3ad18dc4 ("x86/tsc: Convert to use x86_match_cpu() and INTEL_CPU_FAM6()")
    bba10c5cab4d ("x86/cpu: Use constant definitions for CPU models")

v4.4.216: Failed to apply! Possible dependencies:
    05680e7fa8a4 ("x86/tsc_msr: Correct Silvermont reference clock values")
    0cc5359d8fd4 ("x86/cpu: Update init data for new Airmont CPU model")
    397d3ad18dc4 ("x86/tsc: Convert to use x86_match_cpu() and INTEL_CPU_FAM6()")
    6fcb41cdaee5 ("x86/tsc_msr: Add Airmont reference clock values")
    9e0cae9f6227 ("x86/tsc_msr: Update comments, expand definitions")
    ba8268330dc1 ("x86/tsc_msr: Identify Intel-specific code")
    bba10c5cab4d ("x86/cpu: Use constant definitions for CPU models")


NOTE: The patch will not be queued to stable trees until it is upstream.

How should we proceed with this patch?

-- 
Thanks
Sasha

  reply	other threads:[~2020-03-17 22:30 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-23 14:06 [PATCH v4 1/3] x86/tsc_msr: Use named struct initializers Hans de Goede
2020-02-23 14:06 ` [PATCH v4 2/3] x86/tsc_msr: Fix MSR_FSB_FREQ mask for Cherry Trail devices Hans de Goede
2020-03-11 22:05   ` [tip: x86/timers] " tip-bot2 for Hans de Goede
2020-02-23 14:06 ` [PATCH v4 3/3] x86/tsc_msr: Make MSR derived TSC frequency more accurate Hans de Goede
2020-03-11 22:05   ` [tip: x86/timers] " tip-bot2 for Hans de Goede
2020-03-11 18:18 ` [PATCH v4 1/3] x86/tsc_msr: Use named struct initializers Hans de Goede
2020-03-11 21:34   ` Thomas Gleixner
2020-03-11 22:05 ` [tip: x86/timers] " tip-bot2 for Hans de Goede
2020-03-17 22:30   ` Sasha Levin [this message]
2020-03-18  9:01     ` Hans de Goede

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