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From: Manasi Navare <manasi.d.navare@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 05/13] drm/i915: Use REG_FIELD_PREP() & co. for TRANS_DDI_FUNC_CTL2
Date: Wed, 18 Mar 2020 15:53:40 -0700	[thread overview]
Message-ID: <20200318225339.GE6675@intel.com> (raw)
In-Reply-To: <20200313164831.5980-6-ville.syrjala@linux.intel.com>

On Fri, Mar 13, 2020 at 06:48:23PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Clean up the TRANS_DDI_FUNC_CTL2 programming/readout by
> using REG_FIELD_PREP() & co.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>

Manasi

> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c |  6 ++----
>  drivers/gpu/drm/i915/i915_reg.h          | 10 ++++------
>  2 files changed, 6 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 39f3e9452aad..8bb6c583abb8 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -1573,9 +1573,7 @@ void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state)
>  				master_select = master_transcoder + 1;
>  
>  			ctl2 |= PORT_SYNC_MODE_ENABLE |
> -				(PORT_SYNC_MODE_MASTER_SELECT(master_select) &
> -				 PORT_SYNC_MODE_MASTER_SELECT_MASK) <<
> -				PORT_SYNC_MODE_MASTER_SELECT_SHIFT;
> +				PORT_SYNC_MODE_MASTER_SELECT(master_select);
>  		}
>  
>  		intel_de_write(dev_priv,
> @@ -3854,7 +3852,7 @@ static enum transcoder transcoder_master_readout(struct drm_i915_private *dev_pr
>  	if ((ctl2 & PORT_SYNC_MODE_ENABLE) == 0)
>  		return INVALID_TRANSCODER;
>  
> -	master_select = ctl2 & PORT_SYNC_MODE_MASTER_SELECT_MASK;
> +	master_select = REG_FIELD_GET(PORT_SYNC_MODE_MASTER_SELECT_MASK, ctl2);
>  
>  	if (master_select == 0)
>  		return TRANSCODER_EDP;
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 309cb7d96b35..fc5c00bfed87 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -9726,12 +9726,10 @@ enum skl_power_gate {
>  #define _TRANS_DDI_FUNC_CTL2_EDP	0x6f404
>  #define _TRANS_DDI_FUNC_CTL2_DSI0	0x6b404
>  #define _TRANS_DDI_FUNC_CTL2_DSI1	0x6bc04
> -#define TRANS_DDI_FUNC_CTL2(tran)	_MMIO_TRANS2(tran, \
> -						     _TRANS_DDI_FUNC_CTL2_A)
> -#define  PORT_SYNC_MODE_ENABLE			(1 << 4)
> -#define  PORT_SYNC_MODE_MASTER_SELECT(x)	((x) << 0)
> -#define  PORT_SYNC_MODE_MASTER_SELECT_MASK	(0x7 << 0)
> -#define  PORT_SYNC_MODE_MASTER_SELECT_SHIFT	0
> +#define TRANS_DDI_FUNC_CTL2(tran)	_MMIO_TRANS2(tran, _TRANS_DDI_FUNC_CTL2_A)
> +#define  PORT_SYNC_MODE_ENABLE			REG_BIT(4)
> +#define  PORT_SYNC_MODE_MASTER_SELECT_MASK	REG_GENMASK(2, 0)
> +#define  PORT_SYNC_MODE_MASTER_SELECT(x)	REG_FIELD_PREP(PORT_SYNC_MODE_MASTER_SELECT_MASK, (x))
>  
>  /* DisplayPort Transport Control */
>  #define _DP_TP_CTL_A			0x64040
> -- 
> 2.24.1
> 
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  reply	other threads:[~2020-03-18 22:52 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-13 16:48 [Intel-gfx] [PATCH 00/13] drm/i915: Port sync for skl+ Ville Syrjala
2020-03-13 16:48 ` [Intel-gfx] [PATCH 01/13] drm/i915/mst: Use .compute_config_late() to compute master transcoder Ville Syrjala
2020-03-20 23:37   ` Souza, Jose
2020-03-20 23:54     ` Souza, Jose
2020-03-13 16:48 ` [Intel-gfx] [PATCH 02/13] drm/i915: Move TRANS_DDI_FUNC_CTL2 programming where it belongs Ville Syrjala
2020-03-18 22:34   ` Manasi Navare
2020-03-19 13:20     ` Ville Syrjälä
2020-03-20 18:36       ` Manasi Navare
2020-03-13 16:48 ` [Intel-gfx] [PATCH 03/13] drm/i915: Drop usless master_transcoder assignments Ville Syrjala
2020-03-18 22:37   ` Manasi Navare
2020-03-19 13:22     ` Ville Syrjälä
2020-03-20 23:12       ` Manasi Navare
2020-03-13 16:48 ` [Intel-gfx] [PATCH 04/13] drm/i915: Move icl_get_trans_port_sync_config() into the DDI code Ville Syrjala
2020-03-18 22:44   ` Manasi Navare
2020-03-13 16:48 ` [Intel-gfx] [PATCH 05/13] drm/i915: Use REG_FIELD_PREP() & co. for TRANS_DDI_FUNC_CTL2 Ville Syrjala
2020-03-18 22:53   ` Manasi Navare [this message]
2020-03-13 16:48 ` [Intel-gfx] [PATCH 06/13] drm/i915: Include port sync state in the state dump Ville Syrjala
2020-03-18 23:00   ` Manasi Navare
2020-03-27 17:15     ` Ville Syrjälä
2020-03-13 16:48 ` [Intel-gfx] [PATCH 07/13] drm/i915: Store cpu_transcoder_mask in device info Ville Syrjala
2020-03-18 17:02   ` [Intel-gfx] [PATCH v2 " Ville Syrjala
2020-04-02  0:59     ` Souza, Jose
2020-03-13 16:48 ` [Intel-gfx] [PATCH 08/13] drm/i915: Implement port sync for SKL+ Ville Syrjala
2020-03-18 23:32   ` Manasi Navare
2020-03-13 16:48 ` [Intel-gfx] [PATCH 09/13] drm/i915: Eliminate port sync copy pasta Ville Syrjala
2020-04-02  1:25   ` Souza, Jose
2020-03-13 16:48 ` [Intel-gfx] [PATCH 10/13] drm/i915: Fix port sync code to work with >2 pipes Ville Syrjala
2020-04-03  0:32   ` Souza, Jose
2020-04-03 17:25     ` Ville Syrjälä
2020-03-13 16:48 ` [Intel-gfx] [PATCH 11/13] drm/i915: Do pipe updates after enables for everyone Ville Syrjala
2020-04-03  0:44   ` Souza, Jose
2020-03-13 16:48 ` [Intel-gfx] [PATCH 12/13] drm/i915: Pass atomic state to encoder hooks Ville Syrjala
2020-04-02  1:18   ` Souza, Jose
2020-03-13 16:48 ` [Intel-gfx] [PATCH 13/13] drm/i915: Move the port sync DP_TP_CTL stuff to the encoder hook Ville Syrjala
2020-04-03  0:59   ` Souza, Jose
2020-03-16 14:43 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Port sync for skl+ Patchwork
2020-03-18 18:45 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Port sync for skl+ (rev2) Patchwork
2020-03-18 18:57 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2020-03-18 21:39 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Port sync for skl+ (rev3) Patchwork
2020-03-18 22:05 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-03-19  0:19 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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