From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.1 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE, SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BC57CC4332E for ; Thu, 19 Mar 2020 09:26:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 707A820753 for ; Thu, 19 Mar 2020 09:26:01 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b="DDdZRk/e" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726912AbgCSJ0B (ORCPT ); Thu, 19 Mar 2020 05:26:01 -0400 Received: from pandora.armlinux.org.uk ([78.32.30.218]:41600 "EHLO pandora.armlinux.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725767AbgCSJ0A (ORCPT ); Thu, 19 Mar 2020 05:26:00 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=armlinux.org.uk; s=pandora-2019; h=Sender:In-Reply-To: Content-Transfer-Encoding:Content-Type:MIME-Version:References:Message-ID: Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=Yb/xjLK1ui2j4hUNbhZagNJyXnbqQ+joMlyaDUNd3FM=; b=DDdZRk/eS5AQ/lCDPOwBAGNZx rmNqgJZFXL9pV819W/fxoEfzt9A4Tl+xIQRjOmQ1TxKcLh4bqPj137R2jYlNtfJw2ccGPLGwsooM2 zW85Yr7KkEx/jwWJYmcXSnfkxdoXLQrcxvPVs643O1wrGJTkJvGtFR2bX8KiKNkzD0OMATYnrT7uZ A9SbTd3luF5DISAJkO3L3H4uWKzpZ9Smbg5qtb5kcPXU17QzADSAWYIoqmqq1jHyrM/p3MsxTTC8d aJVKexv8S73aD7bWnEl5LnnI8gjpdiskScrcUW3HrhuaUQUYqDAhy5MJveIbIDxDv8lRd+hkKDrKY NLaz6hM5Q==; Received: from shell.armlinux.org.uk ([2001:4d48:ad52:3201:5054:ff:fe00:4ec]:55058) by pandora.armlinux.org.uk with esmtpsa (TLSv1.2:ECDHE-RSA-AES256-GCM-SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jErQt-0001LT-TO; Thu, 19 Mar 2020 09:25:44 +0000 Received: from linux by shell.armlinux.org.uk with local (Exim 4.92) (envelope-from ) id 1jErQl-0004f3-RZ; Thu, 19 Mar 2020 09:25:35 +0000 Date: Thu, 19 Mar 2020 09:25:35 +0000 From: Russell King - ARM Linux admin To: Dmitry Osipenko Cc: Geert Uytterhoeven , Marek Szyprowski , Geert Uytterhoeven , Arnd Bergmann , Nicolas Pitre , Linux-Renesas , Chris Brandt , Uwe =?iso-8859-1?Q?Kleine-K=F6nig?= , Eric Miao , Linux ARM , "linux-tegra@vger.kernel.org" Subject: Re: [PATCH v2] ARM: boot: Obtain start of physical memory from DTB Message-ID: <20200319092535.GB25745@shell.armlinux.org.uk> References: <20200127140716.15673-1-geert+renesas@glider.be> <90c006f2-8c13-2976-008f-37139ca49f37@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <90c006f2-8c13-2976-008f-37139ca49f37@gmail.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org On Thu, Mar 19, 2020 at 04:11:00AM +0300, Dmitry Osipenko wrote: > 25.02.2020 14:40, Geert Uytterhoeven пишет: > > Hi Marek, > > > > On Tue, Feb 25, 2020 at 12:24 PM Marek Szyprowski > > wrote: > >> On 27.01.2020 15:07, Geert Uytterhoeven wrote: > >>> Currently, the start address of physical memory is obtained by masking > >>> the program counter with a fixed mask of 0xf8000000. This mask value > >>> was chosen as a balance between the requirements of different platforms. > >>> However, this does require that the start address of physical memory is > >>> a multiple of 128 MiB, precluding booting Linux on platforms where this > >>> requirement is not fulfilled. > >>> > >>> Fix this limitation by obtaining the start address from the DTB instead, > >>> if available (either explicitly passed, or appended to the kernel). > >>> Fall back to the traditional method when needed. > >>> > >>> This allows to boot Linux on r7s9210/rza2mevb using the 64 MiB of SDRAM > >>> on the RZA2MEVB sub board, which is located at 0x0C000000 (CS3 space), > >>> i.e. not at a multiple of 128 MiB. > >>> > >>> Suggested-by: Nicolas Pitre > >>> Signed-off-by: Geert Uytterhoeven > >>> Reviewed-by: Nicolas Pitre > >>> --- > >>> Against arm/for-next. > >> > >> This patch landed recently in linux-next. It breaks legacy booting from > >> the zImage + appended DT + cmdline/memory info provided via ATAGs. I > >> will debug it further once I find some spare time. What I noticed so > >> far, the cmdline/memory info is not read from the ATAGs, only the values > >> provided via appended DT are used. > > > > Oops, something happening like this was one of my biggest worries when > > posting this patch... Sorry for the breakage. > > > > IIUIC, the kernel still boots, but just doesn't use the info passed by ATAGs? > > > > I'll have a closer look later today. > > In the mean time, I've sent some debug code I used when developing > > this patch, which may be useful, hopefully. > > Hello, > > NVIDIA Tegra is also affected by this patch. A week ago an updated > version of the patch was pushed into linux-next and now machine doesn't > boot at all. > > I couldn't find v3 on the ML, so replying to the v2. Please take a look > and fix the problem, or revert/drop the offending patch, thanks in advance. I'll drop the patch. It's clear that this is going to be difficult, so I would ask you to test the next version, rather than waiting for it to appear in linux-next. Thanks. -- RMK's Patch system: https://www.armlinux.org.uk/developer/patches/ FTTC broadband for 0.8mile line in suburbia: sync at 10.2Mbps down 587kbps up From mboxrd@z Thu Jan 1 00:00:00 1970 From: Russell King - ARM Linux admin Subject: Re: [PATCH v2] ARM: boot: Obtain start of physical memory from DTB Date: Thu, 19 Mar 2020 09:25:35 +0000 Message-ID: <20200319092535.GB25745@shell.armlinux.org.uk> References: <20200127140716.15673-1-geert+renesas@glider.be> <90c006f2-8c13-2976-008f-37139ca49f37@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Return-path: Content-Disposition: inline In-Reply-To: <90c006f2-8c13-2976-008f-37139ca49f37-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Sender: linux-tegra-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Dmitry Osipenko Cc: Geert Uytterhoeven , Marek Szyprowski , Geert Uytterhoeven , Arnd Bergmann , Nicolas Pitre , Linux-Renesas , Chris Brandt , Uwe =?iso-8859-1?Q?Kleine-K=F6nig?= , Eric Miao , Linux ARM , "linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" List-Id: linux-tegra@vger.kernel.org On Thu, Mar 19, 2020 at 04:11:00AM +0300, Dmitry Osipenko wrote: > 25.02.2020 14:40, Geert Uytterhoeven пишет: > > Hi Marek, > > > > On Tue, Feb 25, 2020 at 12:24 PM Marek Szyprowski > > wrote: > >> On 27.01.2020 15:07, Geert Uytterhoeven wrote: > >>> Currently, the start address of physical memory is obtained by masking > >>> the program counter with a fixed mask of 0xf8000000. This mask value > >>> was chosen as a balance between the requirements of different platforms. > >>> However, this does require that the start address of physical memory is > >>> a multiple of 128 MiB, precluding booting Linux on platforms where this > >>> requirement is not fulfilled. > >>> > >>> Fix this limitation by obtaining the start address from the DTB instead, > >>> if available (either explicitly passed, or appended to the kernel). > >>> Fall back to the traditional method when needed. > >>> > >>> This allows to boot Linux on r7s9210/rza2mevb using the 64 MiB of SDRAM > >>> on the RZA2MEVB sub board, which is located at 0x0C000000 (CS3 space), > >>> i.e. not at a multiple of 128 MiB. > >>> > >>> Suggested-by: Nicolas Pitre > >>> Signed-off-by: Geert Uytterhoeven > >>> Reviewed-by: Nicolas Pitre > >>> --- > >>> Against arm/for-next. > >> > >> This patch landed recently in linux-next. It breaks legacy booting from > >> the zImage + appended DT + cmdline/memory info provided via ATAGs. I > >> will debug it further once I find some spare time. What I noticed so > >> far, the cmdline/memory info is not read from the ATAGs, only the values > >> provided via appended DT are used. > > > > Oops, something happening like this was one of my biggest worries when > > posting this patch... Sorry for the breakage. > > > > IIUIC, the kernel still boots, but just doesn't use the info passed by ATAGs? > > > > I'll have a closer look later today. > > In the mean time, I've sent some debug code I used when developing > > this patch, which may be useful, hopefully. > > Hello, > > NVIDIA Tegra is also affected by this patch. A week ago an updated > version of the patch was pushed into linux-next and now machine doesn't > boot at all. > > I couldn't find v3 on the ML, so replying to the v2. Please take a look > and fix the problem, or revert/drop the offending patch, thanks in advance. I'll drop the patch. It's clear that this is going to be difficult, so I would ask you to test the next version, rather than waiting for it to appear in linux-next. Thanks. -- RMK's Patch system: https://www.armlinux.org.uk/developer/patches/ FTTC broadband for 0.8mile line in suburbia: sync at 10.2Mbps down 587kbps up From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.3 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 45A84C4332E for ; Thu, 19 Mar 2020 09:26:24 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1B17320753 for ; Thu, 19 Mar 2020 09:26:24 +0000 (UTC) Authentication-Results: mail.kernel.org; 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charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org T24gVGh1LCBNYXIgMTksIDIwMjAgYXQgMDQ6MTE6MDBBTSArMDMwMCwgRG1pdHJ5IE9zaXBlbmtv IHdyb3RlOgo+IDI1LjAyLjIwMjAgMTQ6NDAsIEdlZXJ0IFV5dHRlcmhvZXZlbiDQv9C40YjQtdGC Ogo+ID4gSGkgTWFyZWssCj4gPiAKPiA+IE9uIFR1ZSwgRmViIDI1LCAyMDIwIGF0IDEyOjI0IFBN IE1hcmVrIFN6eXByb3dza2kKPiA+IDxtLnN6eXByb3dza2lAc2Ftc3VuZy5jb20+IHdyb3RlOgo+ ID4+IE9uIDI3LjAxLjIwMjAgMTU6MDcsIEdlZXJ0IFV5dHRlcmhvZXZlbiB3cm90ZToKPiA+Pj4g Q3VycmVudGx5LCB0aGUgc3RhcnQgYWRkcmVzcyBvZiBwaHlzaWNhbCBtZW1vcnkgaXMgb2J0YWlu ZWQgYnkgbWFza2luZwo+ID4+PiB0aGUgcHJvZ3JhbSBjb3VudGVyIHdpdGggYSBmaXhlZCBtYXNr IG9mIDB4ZjgwMDAwMDAuICBUaGlzIG1hc2sgdmFsdWUKPiA+Pj4gd2FzIGNob3NlbiBhcyBhIGJh bGFuY2UgYmV0d2VlbiB0aGUgcmVxdWlyZW1lbnRzIG9mIGRpZmZlcmVudCBwbGF0Zm9ybXMuCj4g Pj4+IEhvd2V2ZXIsIHRoaXMgZG9lcyByZXF1aXJlIHRoYXQgdGhlIHN0YXJ0IGFkZHJlc3Mgb2Yg cGh5c2ljYWwgbWVtb3J5IGlzCj4gPj4+IGEgbXVsdGlwbGUgb2YgMTI4IE1pQiwgcHJlY2x1ZGlu ZyBib290aW5nIExpbnV4IG9uIHBsYXRmb3JtcyB3aGVyZSB0aGlzCj4gPj4+IHJlcXVpcmVtZW50 IGlzIG5vdCBmdWxmaWxsZWQuCj4gPj4+Cj4gPj4+IEZpeCB0aGlzIGxpbWl0YXRpb24gYnkgb2J0 YWluaW5nIHRoZSBzdGFydCBhZGRyZXNzIGZyb20gdGhlIERUQiBpbnN0ZWFkLAo+ID4+PiBpZiBh dmFpbGFibGUgKGVpdGhlciBleHBsaWNpdGx5IHBhc3NlZCwgb3IgYXBwZW5kZWQgdG8gdGhlIGtl cm5lbCkuCj4gPj4+IEZhbGwgYmFjayB0byB0aGUgdHJhZGl0aW9uYWwgbWV0aG9kIHdoZW4gbmVl ZGVkLgo+ID4+Pgo+ID4+PiBUaGlzIGFsbG93cyB0byBib290IExpbnV4IG9uIHI3czkyMTAvcnph Mm1ldmIgdXNpbmcgdGhlIDY0IE1pQiBvZiBTRFJBTQo+ID4+PiBvbiB0aGUgUlpBMk1FVkIgc3Vi IGJvYXJkLCB3aGljaCBpcyBsb2NhdGVkIGF0IDB4MEMwMDAwMDAgKENTMyBzcGFjZSksCj4gPj4+ IGkuZS4gbm90IGF0IGEgbXVsdGlwbGUgb2YgMTI4IE1pQi4KPiA+Pj4KPiA+Pj4gU3VnZ2VzdGVk LWJ5OiBOaWNvbGFzIFBpdHJlIDxuaWNvQGZsdXhuaWMubmV0Pgo+ID4+PiBTaWduZWQtb2ZmLWJ5 OiBHZWVydCBVeXR0ZXJob2V2ZW4gPGdlZXJ0K3JlbmVzYXNAZ2xpZGVyLmJlPgo+ID4+PiBSZXZp ZXdlZC1ieTogTmljb2xhcyBQaXRyZSA8bmljb0BmbHV4bmljLm5ldD4KPiA+Pj4gLS0tCj4gPj4+ IEFnYWluc3QgYXJtL2Zvci1uZXh0Lgo+ID4+Cj4gPj4gVGhpcyBwYXRjaCBsYW5kZWQgcmVjZW50 bHkgaW4gbGludXgtbmV4dC4gSXQgYnJlYWtzIGxlZ2FjeSBib290aW5nIGZyb20KPiA+PiB0aGUg ekltYWdlICsgYXBwZW5kZWQgRFQgKyBjbWRsaW5lL21lbW9yeSBpbmZvIHByb3ZpZGVkIHZpYSBB VEFHcy4gSQo+ID4+IHdpbGwgZGVidWcgaXQgZnVydGhlciBvbmNlIEkgZmluZCBzb21lIHNwYXJl IHRpbWUuIFdoYXQgSSBub3RpY2VkIHNvCj4gPj4gZmFyLCB0aGUgY21kbGluZS9tZW1vcnkgaW5m byBpcyBub3QgcmVhZCBmcm9tIHRoZSBBVEFHcywgb25seSB0aGUgdmFsdWVzCj4gPj4gcHJvdmlk ZWQgdmlhIGFwcGVuZGVkIERUIGFyZSB1c2VkLgo+ID4gCj4gPiBPb3BzLCBzb21ldGhpbmcgaGFw cGVuaW5nIGxpa2UgdGhpcyB3YXMgb25lIG9mIG15IGJpZ2dlc3Qgd29ycmllcyB3aGVuCj4gPiBw b3N0aW5nIHRoaXMgcGF0Y2guLi4gU29ycnkgZm9yIHRoZSBicmVha2FnZS4KPiA+IAo+ID4gSUlV SUMsIHRoZSBrZXJuZWwgc3RpbGwgYm9vdHMsIGJ1dCBqdXN0IGRvZXNuJ3QgdXNlIHRoZSBpbmZv IHBhc3NlZCBieSBBVEFHcz8KPiA+IAo+ID4gSSdsbCBoYXZlIGEgY2xvc2VyIGxvb2sgbGF0ZXIg dG9kYXkuCj4gPiBJbiB0aGUgbWVhbiB0aW1lLCBJJ3ZlIHNlbnQgc29tZSBkZWJ1ZyBjb2RlIEkg dXNlZCB3aGVuIGRldmVsb3BpbmcKPiA+IHRoaXMgcGF0Y2gsIHdoaWNoIG1heSBiZSB1c2VmdWws IGhvcGVmdWxseS4KPiAKPiBIZWxsbywKPiAKPiBOVklESUEgVGVncmEgaXMgYWxzbyBhZmZlY3Rl ZCBieSB0aGlzIHBhdGNoLiBBIHdlZWsgYWdvIGFuIHVwZGF0ZWQKPiB2ZXJzaW9uIG9mIHRoZSBw YXRjaCB3YXMgcHVzaGVkIGludG8gbGludXgtbmV4dCBhbmQgbm93IG1hY2hpbmUgZG9lc24ndAo+ IGJvb3QgYXQgYWxsLgo+IAo+IEkgY291bGRuJ3QgZmluZCB2MyBvbiB0aGUgTUwsIHNvIHJlcGx5 aW5nIHRvIHRoZSB2Mi4gUGxlYXNlIHRha2UgYSBsb29rCj4gYW5kIGZpeCB0aGUgcHJvYmxlbSwg b3IgcmV2ZXJ0L2Ryb3AgdGhlIG9mZmVuZGluZyBwYXRjaCwgdGhhbmtzIGluIGFkdmFuY2UuCgpJ J2xsIGRyb3AgdGhlIHBhdGNoLiBJdCdzIGNsZWFyIHRoYXQgdGhpcyBpcyBnb2luZyB0byBiZSBk aWZmaWN1bHQsCnNvIEkgd291bGQgYXNrIHlvdSB0byB0ZXN0IHRoZSBuZXh0IHZlcnNpb24sIHJh dGhlciB0aGFuIHdhaXRpbmcgZm9yCml0IHRvIGFwcGVhciBpbiBsaW51eC1uZXh0LgoKVGhhbmtz LgoKLS0gClJNSydzIFBhdGNoIHN5c3RlbTogaHR0cHM6Ly93d3cuYXJtbGludXgub3JnLnVrL2Rl dmVsb3Blci9wYXRjaGVzLwpGVFRDIGJyb2FkYmFuZCBmb3IgMC44bWlsZSBsaW5lIGluIHN1YnVy YmlhOiBzeW5jIGF0IDEwLjJNYnBzIGRvd24gNTg3a2JwcyB1cAoKX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX18KbGludXgtYXJtLWtlcm5lbCBtYWlsaW5nIGxp c3QKbGludXgtYXJtLWtlcm5lbEBsaXN0cy5pbmZyYWRlYWQub3JnCmh0dHA6Ly9saXN0cy5pbmZy YWRlYWQub3JnL21haWxtYW4vbGlzdGluZm8vbGludXgtYXJtLWtlcm5lbAo=