From mboxrd@z Thu Jan 1 00:00:00 1970 From: Peter Zijlstra Subject: Re: Re: [RFC PATCH v4 0/6] arm64: tlb: add support for TTL feature Date: Wed, 25 Mar 2020 14:32:01 +0100 Message-ID: <20200325133201.GI20713@hirez.programming.kicks-ass.net> References: <20200324134534.1570-1-yezhenyu2@huawei.com> <20200324150155.GH20713@hirez.programming.kicks-ass.net> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Content-Disposition: inline In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane-mx.org@lists.infradead.org To: Zhenyu Ye Cc: mark.rutland@arm.com, catalin.marinas@arm.com, linux-mm@kvack.org, guohanjun@huawei.com, will@kernel.org, linux-arch@vger.kernel.org, yuzhao@google.com, maz@kernel.org, steven.price@arm.com, arm@kernel.org, Dave.Martin@arm.com, arnd@arndb.de, suzuki.poulose@arm.com, npiggin@gmail.com, zhangshaokun@hisilicon.com, broonie@kernel.org, rostedt@goodmis.org, prime.zeng@hisilicon.com, tglx@linutronix.de, linux-arm-kernel@lists.infradead.org, xiexiangyou@huawei.com, linux-kernel@vger.kernel.org, aneesh.kumar@linux.ibm.com, akpm@linux-foundation.org List-Id: linux-arch.vger.kernel.org On Wed, Mar 25, 2020 at 12:49:45PM +0800, Zhenyu Ye wrote: > Hi Peter, > > On 2020/3/24 23:01, Peter Zijlstra wrote: > > On Tue, Mar 24, 2020 at 09:45:28PM +0800, Zhenyu Ye wrote: > >> In order to reduce the cost of TLB invalidation, the ARMv8.4 TTL > >> feature allows TLBs to be issued with a level allowing for quicker > >> invalidation. This series provide support for this feature. > >> > >> Patch 1 and Patch 2 was provided by Marc on his NV series[1] patches, > >> which detect the TTL feature and add __tlbi_level interface. > > > > I realy hate how it makes vma->vm_flags more important for tlbi. > > > > Thanks for your review. > > The tlbi interfaces only have two parameters: vma and addr. If we > try to not use vma->vm_flags, we may should have to add a parameter > to some of these interfaces(such as flush_tlb_range), which are > common to all architectures. > > I'm not sure if this is feasible, because this feature is only > supported by ARM64 currently. Power (p9-radix) also has level dependent invalidation instructions, so at the very least you can hook them up as well. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 809D0C43331 for ; Wed, 25 Mar 2020 13:32:12 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 53BB32076A for ; Wed, 25 Mar 2020 13:32:12 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="HGmDJ34d" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 53BB32076A Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=infradead.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=73nYp6Q+KvCFS0wM7U6YFe/FO2GmxyiVwLQqIxwv/Tg=; b=HGmDJ34dfUEhu3 6j9J7CSZOcGhQB3yvZS1kh7fhSdCLMhWBucZre90FrcBz406f4wPWqxuGBZTyaiNPk1Mxzgzr4Rux llhr95+ZOMxckuFseOGJ/PDL2Rwl1kgIZfIkNGqWEXMnl1FNZlpsTAneAnkJd5Xxbw9g+exB+J0rB 5UzkXLN3adkYOolbwXc6KzjYNyzRw+TT/t3mPSa56c717iF5lz6yIAf95Y0kZmVxQvDqtKMKs3Uh1 AXarUH4Ull1Ed4jfstfHmB/8vV9aBY7SzfxXpilhccdtxZHpagbHeBqx2LcO9jPSZqhrDdvuUXJ/e Lpd0mSPidPb2ZB8mgJ9w==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jH68h-0007aQ-MF; Wed, 25 Mar 2020 13:32:11 +0000 Received: from j217100.upc-j.chello.nl ([24.132.217.100] helo=noisy.programming.kicks-ass.net) by bombadil.infradead.org with esmtpsa (Exim 4.92.3 #3 (Red Hat Linux)) id 1jH68b-0007Ze-25; Wed, 25 Mar 2020 13:32:05 +0000 Received: from hirez.programming.kicks-ass.net (hirez.programming.kicks-ass.net [192.168.1.225]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by noisy.programming.kicks-ass.net (Postfix) with ESMTPS id ACE3C3023D1; Wed, 25 Mar 2020 14:32:01 +0100 (CET) Received: by hirez.programming.kicks-ass.net (Postfix, from userid 1000) id 712FA20C0D797; Wed, 25 Mar 2020 14:32:01 +0100 (CET) Date: Wed, 25 Mar 2020 14:32:01 +0100 From: Peter Zijlstra To: Zhenyu Ye Subject: Re: Re: [RFC PATCH v4 0/6] arm64: tlb: add support for TTL feature Message-ID: <20200325133201.GI20713@hirez.programming.kicks-ass.net> References: <20200324134534.1570-1-yezhenyu2@huawei.com> <20200324150155.GH20713@hirez.programming.kicks-ass.net> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, catalin.marinas@arm.com, linux-mm@kvack.org, guohanjun@huawei.com, will@kernel.org, linux-arch@vger.kernel.org, yuzhao@google.com, maz@kernel.org, steven.price@arm.com, arm@kernel.org, Dave.Martin@arm.com, arnd@arndb.de, suzuki.poulose@arm.com, npiggin@gmail.com, zhangshaokun@hisilicon.com, broonie@kernel.org, rostedt@goodmis.org, prime.zeng@hisilicon.com, tglx@linutronix.de, linux-arm-kernel@lists.infradead.org, xiexiangyou@huawei.com, linux-kernel@vger.kernel.org, aneesh.kumar@linux.ibm.com, akpm@linux-foundation.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Mar 25, 2020 at 12:49:45PM +0800, Zhenyu Ye wrote: > Hi Peter, > > On 2020/3/24 23:01, Peter Zijlstra wrote: > > On Tue, Mar 24, 2020 at 09:45:28PM +0800, Zhenyu Ye wrote: > >> In order to reduce the cost of TLB invalidation, the ARMv8.4 TTL > >> feature allows TLBs to be issued with a level allowing for quicker > >> invalidation. This series provide support for this feature. > >> > >> Patch 1 and Patch 2 was provided by Marc on his NV series[1] patches, > >> which detect the TTL feature and add __tlbi_level interface. > > > > I realy hate how it makes vma->vm_flags more important for tlbi. > > > > Thanks for your review. > > The tlbi interfaces only have two parameters: vma and addr. If we > try to not use vma->vm_flags, we may should have to add a parameter > to some of these interfaces(such as flush_tlb_range), which are > common to all architectures. > > I'm not sure if this is feasible, because this feature is only > supported by ARM64 currently. Power (p9-radix) also has level dependent invalidation instructions, so at the very least you can hook them up as well. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel