diff for duplicates of <20200330214721.GA128269@google.com> diff --git a/a/1.txt b/N1/1.txt index 8f534b6..354be8d 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -2,11 +2,11 @@ On Tue, Mar 03, 2020 at 11:40:52PM +0530, Vidya Sagar wrote: > Add support for the endpoint mode of Synopsys DesignWare core based > dual mode PCIe controllers present in Tegra194 SoC. > -> Signed-off-by: Vidya Sagar <vidyas@nvidia.com> -> Acked-by: Thierry Reding <treding@nvidia.com> +> Signed-off-by: Vidya Sagar <vidyas-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> +> Acked-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> > --- > V5: -> * Added Acked-by: Thierry Reding <treding@nvidia.com> +> * Added Acked-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> > * Removed unwanted header file inclusion > > V4: @@ -58,8 +58,8 @@ I don't want to add even more unless there's a good reason. I'm not looking for more reactions like these: -https://lore.kernel.org/r/CAHk-=wiZ24JuVehJ5sEC0UG1Gk2nvB363wO02RRsR1oEht6R9Q@mail.gmail.com -https://lore.kernel.org/r/CA+55aFzPpuHU1Nqd595SEQS=F+kXMzPs0Rba9FUgTodGxmXsgg@mail.gmail.com +https://lore.kernel.org/r/CAHk-=wiZ24JuVehJ5sEC0UG1Gk2nvB363wO02RRsR1oEht6R9Q-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org +https://lore.kernel.org/r/CA+55aFzPpuHU1Nqd595SEQS=F+kXMzPs0Rba9FUgTodGxmXsgg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org Can you please update this patch to either remove the "default y" or add the rationale for keeping it? diff --git a/a/content_digest b/N1/content_digest index 675e53a..011e579 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,34 +1,35 @@ "ref\020200303181052.16134-6-vidyas@nvidia.com\0" - "From\0Bjorn Helgaas <helgaas@kernel.org>\0" + "ref\020200303181052.16134-6-vidyas-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org\0" + "From\0Bjorn Helgaas <helgaas-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>\0" "Subject\0Re: [PATCH V5 5/5] PCI: tegra: Add support for PCIe endpoint mode in Tegra194\0" "Date\0Mon, 30 Mar 2020 16:47:21 -0500\0" - "To\0Vidya Sagar <vidyas@nvidia.com>\0" - "Cc\0lorenzo.pieralisi@arm.com" - robh+dt@kernel.org - thierry.reding@gmail.com - jonathanh@nvidia.com - andrew.murray@arm.com - kishon@ti.com - gustavo.pimentel@synopsys.com - linux-pci@vger.kernel.org - devicetree@vger.kernel.org - linux-tegra@vger.kernel.org - linux-kernel@vger.kernel.org - linux-arm-kernel@lists.infradead.org - kthota@nvidia.com - mmaddireddy@nvidia.com - " sagar.tv@gmail.com\0" + "To\0Vidya Sagar <vidyas-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0" + "Cc\0lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org" + robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org + thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org + jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org + andrew.murray-5wv7dgnIgG8@public.gmane.org + kishon-l0cyMroinI0@public.gmane.org + gustavo.pimentel-HKixBCOQz3hWk0Htik3J/w@public.gmane.org + linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org + kthota-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org + mmaddireddy-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org + " sagar.tv-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org\0" "\00:1\0" "b\0" "On Tue, Mar 03, 2020 at 11:40:52PM +0530, Vidya Sagar wrote:\n" "> Add support for the endpoint mode of Synopsys DesignWare core based\n" "> dual mode PCIe controllers present in Tegra194 SoC.\n" "> \n" - "> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>\n" - "> Acked-by: Thierry Reding <treding@nvidia.com>\n" + "> Signed-off-by: Vidya Sagar <vidyas-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" + "> Acked-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" "> ---\n" "> V5:\n" - "> * Added Acked-by: Thierry Reding <treding@nvidia.com>\n" + "> * Added Acked-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" "> * Removed unwanted header file inclusion\n" "> \n" "> V4:\n" @@ -80,8 +81,8 @@ "\n" "I'm not looking for more reactions like these:\n" "\n" - "https://lore.kernel.org/r/CAHk-=wiZ24JuVehJ5sEC0UG1Gk2nvB363wO02RRsR1oEht6R9Q@mail.gmail.com\n" - "https://lore.kernel.org/r/CA+55aFzPpuHU1Nqd595SEQS=F+kXMzPs0Rba9FUgTodGxmXsgg@mail.gmail.com\n" + "https://lore.kernel.org/r/CAHk-=wiZ24JuVehJ5sEC0UG1Gk2nvB363wO02RRsR1oEht6R9Q-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org\n" + "https://lore.kernel.org/r/CA+55aFzPpuHU1Nqd595SEQS=F+kXMzPs0Rba9FUgTodGxmXsgg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org\n" "\n" "Can you please update this patch to either remove the \"default y\" or\n" "add the rationale for keeping it?\n" @@ -94,4 +95,4 @@ "> +\t in order to enable device-specific features PCIE_TEGRA194_EP must be\n" "> +\t selected. This uses the DesignWare core." -8c34d572c210d9ffd9d04fbff199516f33436b156e1cf29931b1512c944b55b6 +d106eca73512a1c28ea3c7c1143e9780adee141f8a03699c548aa8dbe589f3d2
diff --git a/a/1.txt b/N2/1.txt index 8f534b6..e6dc652 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -71,3 +71,8 @@ add the rationale for keeping it? > + enable host-specific features PCIE_TEGRA194_HOST must be selected and > + in order to enable device-specific features PCIE_TEGRA194_EP must be > + selected. This uses the DesignWare core. + +_______________________________________________ +linux-arm-kernel mailing list +linux-arm-kernel@lists.infradead.org +http://lists.infradead.org/mailman/listinfo/linux-arm-kernel diff --git a/a/content_digest b/N2/content_digest index 675e53a..0b4bd78 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -3,20 +3,20 @@ "Subject\0Re: [PATCH V5 5/5] PCI: tegra: Add support for PCIe endpoint mode in Tegra194\0" "Date\0Mon, 30 Mar 2020 16:47:21 -0500\0" "To\0Vidya Sagar <vidyas@nvidia.com>\0" - "Cc\0lorenzo.pieralisi@arm.com" + "Cc\0devicetree@vger.kernel.org" + lorenzo.pieralisi@arm.com + mmaddireddy@nvidia.com + kthota@nvidia.com + gustavo.pimentel@synopsys.com + linux-kernel@vger.kernel.org robh+dt@kernel.org - thierry.reding@gmail.com - jonathanh@nvidia.com - andrew.murray@arm.com kishon@ti.com - gustavo.pimentel@synopsys.com + thierry.reding@gmail.com linux-pci@vger.kernel.org - devicetree@vger.kernel.org linux-tegra@vger.kernel.org - linux-kernel@vger.kernel.org + andrew.murray@arm.com + jonathanh@nvidia.com linux-arm-kernel@lists.infradead.org - kthota@nvidia.com - mmaddireddy@nvidia.com " sagar.tv@gmail.com\0" "\00:1\0" "b\0" @@ -92,6 +92,11 @@ "> +\t Tegra194. This controller can work either as EP or RC. In order to\n" "> +\t enable host-specific features PCIE_TEGRA194_HOST must be selected and\n" "> +\t in order to enable device-specific features PCIE_TEGRA194_EP must be\n" - "> +\t selected. This uses the DesignWare core." + "> +\t selected. This uses the DesignWare core.\n" + "\n" + "_______________________________________________\n" + "linux-arm-kernel mailing list\n" + "linux-arm-kernel@lists.infradead.org\n" + http://lists.infradead.org/mailman/listinfo/linux-arm-kernel -8c34d572c210d9ffd9d04fbff199516f33436b156e1cf29931b1512c944b55b6 +dc2630199130acda4f5f9a0065348261ce583708484f4858167c24dd0a48641b
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