From: Rob Herring <robh@kernel.org>
To: Ansuel Smith <ansuelsmth@gmail.com>
Cc: Stanimir Varbanov <svarbanov@mm-sol.com>,
Andy Gross <agross@kernel.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Bjorn Helgaas <bhelgaas@google.com>,
Mark Rutland <mark.rutland@arm.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Andrew Murray <amurray@thegoodpenguin.co.uk>,
Philipp Zabel <p.zabel@pengutronix.de>,
linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 11/12] devicetree: bindings: pci: add force_gen1 for qcom,pcie
Date: Tue, 31 Mar 2020 11:33:48 -0600 [thread overview]
Message-ID: <20200331173348.GA28253@bogus> (raw)
In-Reply-To: <20200320183455.21311-11-ansuelsmth@gmail.com>
On Fri, Mar 20, 2020 at 07:34:53PM +0100, Ansuel Smith wrote:
> Document force_gen1 optional definition to limit pcie
> line to GEN1 speed
>
> Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
> ---
> Documentation/devicetree/bindings/pci/qcom,pcie.txt | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.txt b/Documentation/devicetree/bindings/pci/qcom,pcie.txt
> index 8c1d014f37b0..766876465c42 100644
> --- a/Documentation/devicetree/bindings/pci/qcom,pcie.txt
> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.txt
> @@ -260,6 +260,11 @@
> Definition: If not defined is 0. In ipq806x is set to 7. In newer
> revision (v2.0) the offset is zero.
>
> +- force_gen1:
> + Usage: optional
> + Value type: <u32>
> + Definition: Set 1 to force the pcie line to GEN1
> +
I believe we have a standard property 'link-speed' for this purpose.
> * Example for ipq/apq8064
> pcie@1b500000 {
> compatible = "qcom,pcie-apq8064", "qcom,pcie-ipq8064", "snps,dw-pcie";
> --
> 2.25.1
>
next prev parent reply other threads:[~2020-03-31 17:33 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-20 18:34 [PATCH 01/12] pcie: qcom: add missing ipq806x clocks in pcie driver Ansuel Smith
2020-03-20 18:34 ` [PATCH 02/12] devicetree: bindings: pci: add missing clks to qcom,pcie Ansuel Smith
2020-03-31 17:30 ` Rob Herring
2020-03-20 18:34 ` [PATCH 03/12] pcie: qcom: change duplicate pci reset to phy reset Ansuel Smith
2020-03-20 18:34 ` [PATCH 04/12] pcie: qcom: Fixed pcie_phy_clk branch issue Ansuel Smith
2020-03-20 18:34 ` [PATCH 05/12] pcie: qcom: add missing reset for ipq806x Ansuel Smith
2020-03-20 18:51 ` Bjorn Helgaas
2020-03-23 6:06 ` Philipp Zabel
2020-03-20 18:34 ` [PATCH 06/12] devicetree: bindings: pci: add ext reset to qcom,pcie Ansuel Smith
2020-03-31 17:31 ` Rob Herring
2020-03-20 18:34 ` [PATCH 07/12] pcie: qcom: add tx term offset support Ansuel Smith
2020-03-20 19:22 ` Bjorn Helgaas
2020-04-01 20:40 ` Bjorn Andersson
2020-04-01 21:55 ` R: " ansuelsmth
2020-04-01 23:52 ` Bjorn Andersson
2020-03-20 18:34 ` [PATCH 08/12] devicetree: bindings: pci: add phy-tx0-term-offset to qcom,pcie Ansuel Smith
2020-03-31 17:32 ` Rob Herring
2020-04-01 12:09 ` R: " ansuelsmth
2020-04-01 20:41 ` Bjorn Andersson
2020-03-20 18:34 ` [PATCH 09/12] pcie: qcom: Programming the PCIE iATU for IPQ806x Ansuel Smith
2020-03-20 19:26 ` Bjorn Helgaas
2020-04-01 13:21 ` Stanimir Varbanov
2020-03-20 18:34 ` [PATCH 10/12] pcie: qcom: add Force GEN1 support Ansuel Smith
2020-03-20 19:37 ` Bjorn Helgaas
2020-03-20 18:34 ` [PATCH 11/12] devicetree: bindings: pci: add force_gen1 for qcom,pcie Ansuel Smith
2020-03-31 17:33 ` Rob Herring [this message]
2020-04-01 12:09 ` R: " ansuelsmth
2020-04-01 13:17 ` Stanimir Varbanov
2020-03-20 18:34 ` [PATCH 12/12] pcie: qcom: Set PCIE MRRS and MPS to 256B Ansuel Smith
2020-03-20 19:46 ` Bjorn Helgaas
2020-03-20 18:47 ` [PATCH 01/12] pcie: qcom: add missing ipq806x clocks in pcie driver Bjorn Helgaas
2020-04-01 13:01 ` Stanimir Varbanov
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20200331173348.GA28253@bogus \
--to=robh@kernel.org \
--cc=agross@kernel.org \
--cc=amurray@thegoodpenguin.co.uk \
--cc=ansuelsmth@gmail.com \
--cc=bhelgaas@google.com \
--cc=bjorn.andersson@linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lorenzo.pieralisi@arm.com \
--cc=mark.rutland@arm.com \
--cc=p.zabel@pengutronix.de \
--cc=svarbanov@mm-sol.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.