diff for duplicates of <20200407155449.GF20730@hirez.programming.kicks-ass.net>

diff --git a/a/1.txt b/N1/1.txt
index 82df29a..8060e37 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -78,7 +78,3 @@ index ec31f5b60323..e01b76e0a294 100644
  4: XSAVE | ptwrite Ey (F3),(11B)
  5: XRSTOR | lfence (11B) | INCSSPD/Q Ry (F3),(11B)
  6: XSAVEOPT | clwb (66) | mfence (11B) | TPAUSE Rd (66),(11B) | UMONITOR Rv (F3),(11B) | UMWAIT Rd (F2),(11B) | CLRSSBSY Mq (F3)
-_______________________________________________
-amd-gfx mailing list
-amd-gfx@lists.freedesktop.org
-https://lists.freedesktop.org/mailman/listinfo/amd-gfx
diff --git a/a/content_digest b/N1/content_digest
index e83044a..2e33878 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -12,22 +12,22 @@
  "Subject\0Re: AMD DC graphics display code enables -mhard-float, -msse, -msse2 without any visible FPU state protection\0"
  "Date\0Tue, 7 Apr 2020 17:54:49 +0200\0"
  "To\0Masami Hiramatsu <mhiramat@kernel.org>\0"
- "Cc\0David (ChunMing) Zhou <David1.Zhou@amd.com>"
-  Josh Poimboeuf <jpoimboe@redhat.com>
+ "Cc\0Christian K\303\266nig <christian.koenig@amd.com>"
   Jann Horn <jannh@google.com>
+  Harry Wentland <harry.wentland@amd.com>
   Leo Li <sunpeng.li@amd.com>
-  the arch/x86 maintainers <x86@kernel.org>
-  kernel list <linux-kernel@vger.kernel.org>
   amd-gfx@lists.freedesktop.org
+  Alex Deucher <alexander.deucher@amd.com>
+  David (ChunMing) Zhou <David1.Zhou@amd.com>
+  Thomas Gleixner <tglx@linutronix.de>
   Ingo Molnar <mingo@redhat.com>
   Borislav Petkov <bp@alien8.de>
-  Arnaldo Carvalho de Melo <acme@kernel.org>
-  Andy Lutomirski <luto@kernel.org>
   H. Peter Anvin <hpa@zytor.com>
-  Alex Deucher <alexander.deucher@amd.com>
-  Thomas Gleixner <tglx@linutronix.de>
-  Harry Wentland <harry.wentland@amd.com>
- " Christian K\303\266nig <christian.koenig@amd.com>\0"
+  the arch/x86 maintainers <x86@kernel.org>
+  kernel list <linux-kernel@vger.kernel.org>
+  Josh Poimboeuf <jpoimboe@redhat.com>
+  Andy Lutomirski <luto@kernel.org>
+ " Arnaldo Carvalho de Melo <acme@kernel.org>\0"
  "\00:1\0"
  "b\0"
  "On Wed, Apr 08, 2020 at 12:41:11AM +0900, Masami Hiramatsu wrote:\n"
@@ -109,10 +109,6 @@
  "+3: stmxcsr {FPU} | vstmxcsr Md (v1) | WRGSBASE Ry (F3),(11B)\n"
  " 4: XSAVE | ptwrite Ey (F3),(11B)\n"
  " 5: XRSTOR | lfence (11B) | INCSSPD/Q Ry (F3),(11B)\n"
- " 6: XSAVEOPT | clwb (66) | mfence (11B) | TPAUSE Rd (66),(11B) | UMONITOR Rv (F3),(11B) | UMWAIT Rd (F2),(11B) | CLRSSBSY Mq (F3)\n"
- "_______________________________________________\n"
- "amd-gfx mailing list\n"
- "amd-gfx@lists.freedesktop.org\n"
- https://lists.freedesktop.org/mailman/listinfo/amd-gfx
+  6: XSAVEOPT | clwb (66) | mfence (11B) | TPAUSE Rd (66),(11B) | UMONITOR Rv (F3),(11B) | UMWAIT Rd (F2),(11B) | CLRSSBSY Mq (F3)
 
-588f5d0af9557e7a7a7510e47e92a3eead11c2536470445d4a58961659046f71
+e8711b9a9362dcd44476f65e5cd974b24cf518c2061425c2c7e051e52ebffe55
