From: "Roger Pau Monné" <roger.pau@citrix.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: xen-devel@lists.xenproject.org, Tim Deegan <tim@xen.org>,
George Dunlap <george.dunlap@citrix.com>, Wei Liu <wl@xen.org>,
Andrew Cooper <andrew.cooper3@citrix.com>
Subject: Re: [PATCH v9 1/3] x86/tlb: introduce a flush HVM ASIDs flag
Date: Tue, 14 Apr 2020 11:34:03 +0200 [thread overview]
Message-ID: <20200414093403.GG28601@Air-de-Roger> (raw)
In-Reply-To: <106d7363-b341-f4a8-4771-589631c4690d@suse.com>
On Tue, Apr 14, 2020 at 11:09:43AM +0200, Jan Beulich wrote:
> On 14.04.2020 10:01, Roger Pau Monné wrote:
> > On Thu, Apr 09, 2020 at 01:16:57PM +0200, Jan Beulich wrote:
> >> On 08.04.2020 17:10, Roger Pau Monné wrote:
> >>> On Wed, Apr 08, 2020 at 01:25:14PM +0200, Jan Beulich wrote:
> >>>> On 06.04.2020 12:57, Roger Pau Monne wrote:
> >>>>> --- a/xen/arch/x86/mm/paging.c
> >>>>> +++ b/xen/arch/x86/mm/paging.c
> >>>>> @@ -613,7 +613,8 @@ void paging_log_dirty_range(struct domain *d,
> >>>>>
> >>>>> p2m_unlock(p2m);
> >>>>>
> >>>>> - flush_tlb_mask(d->dirty_cpumask);
> >>>>> + flush_mask(d->dirty_cpumask, (!hap_enabled(d) ? FLUSH_TLB : 0) |
> >>>>> + FLUSH_HVM_ASID_CORE);
> >>>>
> >>>> In cases where one case is assumed to be more likely than the other
> >>>> putting the more likely one first can be viewed as a mild hint to
> >>>> the compiler, and hence an extra ! may be warranted in an if() or
> >>>> a conditional expression. Here, however, I don't think we can
> >>>> really consider one case more likely than the other, and hence I'd
> >>>> suggest to avoid the !, flipping the other two expressions
> >>>> accordingly. I may take the liberty to adjust this while committing
> >>>> (if I'm to be the one).
> >>>
> >>> That's fine, thanks. Somehow '!hap -> flush' was clearer in my mind.
> >>
> >> Thinking about it with the other HVM-related changes in v9, shouldn't
> >> this then be
> >>
> >> flush_mask(d->dirty_cpumask, (hap_enabled(d) ? 0 : FLUSH_TLB) |
> >> (is_hvm_domain(d) ? FLUSH_HVM_ASID_CORE : 0));
> >>
> >> Or wait - the only caller lives in hap.c. As a result the FLUSH_TLB
> >> part can be dropped altogether. And I question the need of flushing
> >> guest TLBs - this is purely a p2m operation. I'll go look at the
> >> history of this function, but for now I think the call should be
> >> dropped (albeit then maybe better in a separate patch).
> >
> > The ASID flush needs to stay unless it's moved into p2m_pt_set_entry,
> > as p2m_pt_set_entry itself doesn't perform any ASID flush and won't
> > work correctly.
>
> Just like for said in the other reply sent a few minutes ago - yes
> for NPT, but no for EPT.
It's not strictly wrong for EPT as it won't cause EPT domains to
malfunction, it's just redundant.
> > I think it's safe to remove the TLB flush, as the code is only called
> > from HAP, and hence is not used by shadow (which is what would require
> > a plain TLB flush). The placement of this function seems misleading to
> > me, as it looks like it's used by both shadow and HAP. It might be
> > better to move it to hap.c if it's only to be used by HAP code.
>
> Either placement has its problems, I think. The function is meant to
> be a paging layer one, but is needed by HAP only right now. I'm
> pondering whether to wrap it in #ifdef CONFIG_HVM (plus perhaps a
> respective ASSERT_UNREACHABLE()).
IMO if a TLB flush is not performed here we should add an
ASSERT_UNREACHABLE if called from a shadow mode domain, or else we
risk someone trying to use it in shadow later without realizing it's
missing a TLB flush.
Thanks, Roger.
next prev parent reply other threads:[~2020-04-14 9:34 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-06 10:57 [PATCH v9 0/3] x86/guest: use assisted TLB flush in guest mode Roger Pau Monne
2020-04-06 10:57 ` [PATCH v9 1/3] x86/tlb: introduce a flush HVM ASIDs flag Roger Pau Monne
2020-04-08 11:25 ` Jan Beulich
2020-04-08 15:10 ` Roger Pau Monné
2020-04-09 11:16 ` Jan Beulich
2020-04-14 8:01 ` Roger Pau Monné
2020-04-14 9:09 ` Jan Beulich
2020-04-14 9:34 ` Roger Pau Monné [this message]
2020-04-14 9:52 ` Jan Beulich
2020-04-09 11:54 ` Jan Beulich
2020-04-10 15:48 ` Wei Liu
2020-04-14 6:28 ` Jan Beulich
2020-04-14 7:52 ` Roger Pau Monné
2020-04-14 9:01 ` Jan Beulich
2020-04-14 10:02 ` Roger Pau Monné
2020-04-14 10:13 ` Jan Beulich
2020-04-14 11:19 ` Roger Pau Monné
2020-04-14 13:50 ` Jan Beulich
2020-04-14 14:53 ` Roger Pau Monné
2020-04-14 15:06 ` Jan Beulich
2020-04-15 11:49 ` Roger Pau Monné
2020-04-15 11:51 ` Jan Beulich
2020-04-15 14:49 ` Roger Pau Monné
2020-04-15 15:42 ` Jan Beulich
2020-04-15 15:54 ` Roger Pau Monné
2020-04-15 15:59 ` Jan Beulich
2020-04-06 10:57 ` [PATCH v9 2/3] x86/tlb: allow disabling the TLB clock Roger Pau Monne
2020-04-06 10:57 ` [PATCH v9 3/3] x86/tlb: use Xen L0 assisted TLB flush when available Roger Pau Monne
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