From: "Roger Pau Monné" <roger.pau@citrix.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: xen-devel@lists.xenproject.org, Tim Deegan <tim@xen.org>,
George Dunlap <george.dunlap@citrix.com>, Wei Liu <wl@xen.org>,
Andrew Cooper <andrew.cooper3@citrix.com>
Subject: Re: [PATCH v9 1/3] x86/tlb: introduce a flush HVM ASIDs flag
Date: Tue, 14 Apr 2020 16:53:37 +0200 [thread overview]
Message-ID: <20200414145337.GJ28601@Air-de-Roger> (raw)
In-Reply-To: <073512c9-6500-054c-c72c-1f468da6464c@suse.com>
On Tue, Apr 14, 2020 at 03:50:15PM +0200, Jan Beulich wrote:
> On 14.04.2020 13:19, Roger Pau Monné wrote:
> > On Tue, Apr 14, 2020 at 12:13:04PM +0200, Jan Beulich wrote:
> >> On 14.04.2020 12:02, Roger Pau Monné wrote:
> >>> That seems nice, we would have to be careful however as reducing the
> >>> number of ASID/VPID flushes could uncover issues in the existing code.
> >>> I guess you mean something like:
> >>>
> >>> static inline void guest_flush_tlb_mask(const struct domain *d,
> >>> const cpumask_t *mask)
> >>> {
> >>> flush_mask(mask, (is_pv_domain(d) || shadow_mode_enabled(d) ? FLUSH_TLB
> >>> : 0) |
> >>> (is_hvm_domain(d) && cpu_has_svm ? FLUSH_HVM_ASID_CORE
> >>> : 0));
> >>> }
> >>
> >> Almost - is_hvm_domain(d) && cpu_has_svm seems to wide for me. I'd
> >> rather use hap_enabled() && cpu_has_svm, which effectively means NPT.
> >> Or am I overlooking a need to do ASID flushes also in shadow mode?
> >
> > I think so, I've used is_hvm_domain in order to cover for HVM domains
> > running in shadow mode on AMD hardware, I think those also need the
> > ASID flushes.
>
> I'm unconvinced: The entire section "TLB Management" in the PM gives
> the impression that "ordinary" TLB flushing covers all ASIDs anyway.
> It's not stated anywhere (I could find) explicitly though.
Hm, I don't think so. XenRT found a myriad of issues with NPT when p2m
code wasn't modified to do ASID flushes instead of plain TLB flushes.
Even if it's just to stay on the safe side I would perform ASID
flushes for HVM guests with shadow running on AMD.
> >> Also I'd suggest to calculate the flags up front, to avoid calling
> >> flush_mask() in the first place in case (EPT) neither bit is set.
> >>
> >>> I think this should work, but I would rather do it in a separate
> >>> patch.
> >>
> >> Yes, just like the originally (wrongly, as you validly say) suggested
> >> full removal of them, putting this in a separate patch would indeed
> >> seem better.
> >
> > Would you like me to resend with the requested fix to
> > paging_log_dirty_range (ie: drop the FLUSH_TLB and only call
> > flush_mask for HAP guests running on AMD) then?
>
> Well, ideally I'd see that function also make use of the intended
> new helper function, if at all possible (and suitable).
Oh, OK. Just to make sure I understand what you are asking for, you
would like me to resend introducing the new guest_flush_tlb_mask
helper and use it in the flush_tlb_mask callers modified by this
patch?
Thanks, Roger.
next prev parent reply other threads:[~2020-04-14 14:54 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-06 10:57 [PATCH v9 0/3] x86/guest: use assisted TLB flush in guest mode Roger Pau Monne
2020-04-06 10:57 ` [PATCH v9 1/3] x86/tlb: introduce a flush HVM ASIDs flag Roger Pau Monne
2020-04-08 11:25 ` Jan Beulich
2020-04-08 15:10 ` Roger Pau Monné
2020-04-09 11:16 ` Jan Beulich
2020-04-14 8:01 ` Roger Pau Monné
2020-04-14 9:09 ` Jan Beulich
2020-04-14 9:34 ` Roger Pau Monné
2020-04-14 9:52 ` Jan Beulich
2020-04-09 11:54 ` Jan Beulich
2020-04-10 15:48 ` Wei Liu
2020-04-14 6:28 ` Jan Beulich
2020-04-14 7:52 ` Roger Pau Monné
2020-04-14 9:01 ` Jan Beulich
2020-04-14 10:02 ` Roger Pau Monné
2020-04-14 10:13 ` Jan Beulich
2020-04-14 11:19 ` Roger Pau Monné
2020-04-14 13:50 ` Jan Beulich
2020-04-14 14:53 ` Roger Pau Monné [this message]
2020-04-14 15:06 ` Jan Beulich
2020-04-15 11:49 ` Roger Pau Monné
2020-04-15 11:51 ` Jan Beulich
2020-04-15 14:49 ` Roger Pau Monné
2020-04-15 15:42 ` Jan Beulich
2020-04-15 15:54 ` Roger Pau Monné
2020-04-15 15:59 ` Jan Beulich
2020-04-06 10:57 ` [PATCH v9 2/3] x86/tlb: allow disabling the TLB clock Roger Pau Monne
2020-04-06 10:57 ` [PATCH v9 3/3] x86/tlb: use Xen L0 assisted TLB flush when available Roger Pau Monne
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