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d="scan'208";a="15971574" Date: Tue, 14 Apr 2020 16:53:37 +0200 From: Roger Pau =?utf-8?B?TW9ubsOp?= To: Jan Beulich Subject: Re: [PATCH v9 1/3] x86/tlb: introduce a flush HVM ASIDs flag Message-ID: <20200414145337.GJ28601@Air-de-Roger> References: <20200406105703.79201-1-roger.pau@citrix.com> <20200406105703.79201-2-roger.pau@citrix.com> <30062a0c-6587-a16e-2b31-de0dd6bf4c9a@suse.com> <20200414075245.GC28601@Air-de-Roger> <92a4ff05-9dcf-1d50-b9b2-bde39c4e3e8d@suse.com> <20200414100213.GH28601@Air-de-Roger> <389afe02-1747-1583-e642-6e4025b402aa@suse.com> <20200414111911.GI28601@Air-de-Roger> <073512c9-6500-054c-c72c-1f468da6464c@suse.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <073512c9-6500-054c-c72c-1f468da6464c@suse.com> X-ClientProxiedBy: AMSPEX02CAS02.citrite.net (10.69.22.113) To AMSPEX02CL02.citrite.net (10.69.22.126) X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: xen-devel@lists.xenproject.org, Tim Deegan , George Dunlap , Wei Liu , Andrew Cooper Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" On Tue, Apr 14, 2020 at 03:50:15PM +0200, Jan Beulich wrote: > On 14.04.2020 13:19, Roger Pau Monné wrote: > > On Tue, Apr 14, 2020 at 12:13:04PM +0200, Jan Beulich wrote: > >> On 14.04.2020 12:02, Roger Pau Monné wrote: > >>> That seems nice, we would have to be careful however as reducing the > >>> number of ASID/VPID flushes could uncover issues in the existing code. > >>> I guess you mean something like: > >>> > >>> static inline void guest_flush_tlb_mask(const struct domain *d, > >>> const cpumask_t *mask) > >>> { > >>> flush_mask(mask, (is_pv_domain(d) || shadow_mode_enabled(d) ? FLUSH_TLB > >>> : 0) | > >>> (is_hvm_domain(d) && cpu_has_svm ? FLUSH_HVM_ASID_CORE > >>> : 0)); > >>> } > >> > >> Almost - is_hvm_domain(d) && cpu_has_svm seems to wide for me. I'd > >> rather use hap_enabled() && cpu_has_svm, which effectively means NPT. > >> Or am I overlooking a need to do ASID flushes also in shadow mode? > > > > I think so, I've used is_hvm_domain in order to cover for HVM domains > > running in shadow mode on AMD hardware, I think those also need the > > ASID flushes. > > I'm unconvinced: The entire section "TLB Management" in the PM gives > the impression that "ordinary" TLB flushing covers all ASIDs anyway. > It's not stated anywhere (I could find) explicitly though. Hm, I don't think so. XenRT found a myriad of issues with NPT when p2m code wasn't modified to do ASID flushes instead of plain TLB flushes. Even if it's just to stay on the safe side I would perform ASID flushes for HVM guests with shadow running on AMD. > >> Also I'd suggest to calculate the flags up front, to avoid calling > >> flush_mask() in the first place in case (EPT) neither bit is set. > >> > >>> I think this should work, but I would rather do it in a separate > >>> patch. > >> > >> Yes, just like the originally (wrongly, as you validly say) suggested > >> full removal of them, putting this in a separate patch would indeed > >> seem better. > > > > Would you like me to resend with the requested fix to > > paging_log_dirty_range (ie: drop the FLUSH_TLB and only call > > flush_mask for HAP guests running on AMD) then? > > Well, ideally I'd see that function also make use of the intended > new helper function, if at all possible (and suitable). Oh, OK. Just to make sure I understand what you are asking for, you would like me to resend introducing the new guest_flush_tlb_mask helper and use it in the flush_tlb_mask callers modified by this patch? Thanks, Roger.