From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 43DF0C54FC9 for ; Tue, 21 Apr 2020 14:15:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2AB19206F4 for ; Tue, 21 Apr 2020 14:15:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726018AbgDUOPz (ORCPT ); Tue, 21 Apr 2020 10:15:55 -0400 Received: from muru.com ([72.249.23.125]:50572 "EHLO muru.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728712AbgDUOPz (ORCPT ); Tue, 21 Apr 2020 10:15:55 -0400 Received: from atomide.com (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTPS id CD62F8081; Tue, 21 Apr 2020 14:16:33 +0000 (UTC) Date: Tue, 21 Apr 2020 07:15:43 -0700 From: Tony Lindgren To: Maxime Ripard Cc: Philipp Rossak , "H. Nikolaus Schaller" , David Airlie , Daniel Vetter , Rob Herring , Mark Rutland , =?utf-8?Q?Beno=C3=AEt?= Cousson , Paul Cercueil , Ralf Baechle , Paul Burton , James Hogan , Kukjin Kim , Krzysztof Kozlowski , Chen-Yu Tsai , Thomas Bogendoerfer , "open list:DRM PANEL DRIVERS" , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Linux Kernel Mailing List , linux-omap , OpenPVRSGX Linux Driver Group , Discussions about the Letux Kernel , kernel@pyra-handheld.com, linux-mips@vger.kernel.org, arm-soc , linux-samsung-soc@vger.kernel.org Subject: Re: [PATCH v6 00/12] ARM/MIPS: DTS: add child nodes describing the PVRSGX GPU present in some OMAP SoC and JZ4780 (and many more) Message-ID: <20200421141543.GU37466@atomide.com> References: <20200415101008.zxzxca2vlfsefpdv@gilmour.lan> <2E3401F1-A106-4396-8FE6-51CAB72926A4@goldelico.com> <20200415130233.rgn7xrtwqicptke2@gilmour.lan> <10969e64-fe1f-d692-4984-4ba916bd2161@gmail.com> <20200420073842.nx4xb3zqvu23arkc@gilmour.lan> <20200421112129.zjmkmzo3aftksgka@gilmour.lan> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200421112129.zjmkmzo3aftksgka@gilmour.lan> Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org * Maxime Ripard [200421 11:22]: > On Tue, Apr 21, 2020 at 11:57:33AM +0200, Philipp Rossak wrote: > > I had a look on genpd and I'm not really sure if that fits. > > > > It is basically some bit that verify that the clocks should be enabled or > > disabled. > > No, it can do much more than that. It's a framework to control the SoCs power > domains, so clocks might be a part of it, but most of the time it's going to be > about powering up a particular device. Note that on omaps there are actually SoC module specific registers. And there can be multiple devices within a single target module on omaps. So the extra dts node and device is justified there. For other SoCs, the SGX clocks are probably best handled directly in pvr-drv.c PM runtime functions unless a custom hardware wrapper with SoC specific registers exists. Regards, Tony From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E2CE7C54FCC for ; Tue, 21 Apr 2020 14:15:55 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B5108206F4 for ; Tue, 21 Apr 2020 14:15:55 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="L7pJH354" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B5108206F4 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=atomide.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=cuv5yMx8RDy3CmFiFbL/2KrbPp/Tan9fZHhhxgOZwTs=; b=L7pJH354953Wcm TsDdjL2mQOmBpg6Scg8dl+3UjSvWuyhjKUaKGvay4tv/490J8G3j9cvMeP99KQmEssvxbXpLBWdDA w2kST8dBG6pXtOuq0LVepi9520Q3eSoHrK/dt8fj8MLSvqZFo12ciiFZRr7PCtCjxEWAtIVDxISOu /Kf3Es9a/5ir+oSs5h8f3AYE1zploNCohEzfuh2sXHS+hyyjOBpGERu8GH+TdNlJ6fjrRsnbDAx9N aaQ6Qir06SqiFc8uNHGKyU17usdANC/wKeCg07c+LrdLxEBxPVzirPvp/Y5XGbi3Ht9OSU3Aezjrd RdN76UzM2nDZmBl7UwPQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jQtgo-0008Gb-Fp; Tue, 21 Apr 2020 14:15:54 +0000 Received: from muru.com ([72.249.23.125]) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jQtgk-0008EX-GZ for linux-arm-kernel@lists.infradead.org; Tue, 21 Apr 2020 14:15:52 +0000 Received: from atomide.com (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTPS id CD62F8081; Tue, 21 Apr 2020 14:16:33 +0000 (UTC) Date: Tue, 21 Apr 2020 07:15:43 -0700 From: Tony Lindgren To: Maxime Ripard Subject: Re: [PATCH v6 00/12] ARM/MIPS: DTS: add child nodes describing the PVRSGX GPU present in some OMAP SoC and JZ4780 (and many more) Message-ID: <20200421141543.GU37466@atomide.com> References: <20200415101008.zxzxca2vlfsefpdv@gilmour.lan> <2E3401F1-A106-4396-8FE6-51CAB72926A4@goldelico.com> <20200415130233.rgn7xrtwqicptke2@gilmour.lan> <10969e64-fe1f-d692-4984-4ba916bd2161@gmail.com> <20200420073842.nx4xb3zqvu23arkc@gilmour.lan> <20200421112129.zjmkmzo3aftksgka@gilmour.lan> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200421112129.zjmkmzo3aftksgka@gilmour.lan> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200421_071550_677749_CBA8AE65 X-CRM114-Status: GOOD ( 13.36 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , David Airlie , "H. Nikolaus Schaller" , "open list:DRM PANEL DRIVERS" , linux-mips@vger.kernel.org, Paul Cercueil , Discussions about the Letux Kernel , Paul Burton , Krzysztof Kozlowski , linux-samsung-soc@vger.kernel.org, Chen-Yu Tsai , Kukjin Kim , James Hogan , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Daniel Vetter , Rob Herring , linux-omap , arm-soc , Thomas Bogendoerfer , Philipp Rossak , OpenPVRSGX Linux Driver Group , Linux Kernel Mailing List , Ralf Baechle , =?utf-8?Q?Beno=C3=AEt?= Cousson , kernel@pyra-handheld.com Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org * Maxime Ripard [200421 11:22]: > On Tue, Apr 21, 2020 at 11:57:33AM +0200, Philipp Rossak wrote: > > I had a look on genpd and I'm not really sure if that fits. > > > > It is basically some bit that verify that the clocks should be enabled or > > disabled. > > No, it can do much more than that. It's a framework to control the SoCs power > domains, so clocks might be a part of it, but most of the time it's going to be > about powering up a particular device. Note that on omaps there are actually SoC module specific registers. And there can be multiple devices within a single target module on omaps. So the extra dts node and device is justified there. For other SoCs, the SGX clocks are probably best handled directly in pvr-drv.c PM runtime functions unless a custom hardware wrapper with SoC specific registers exists. Regards, Tony _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3CCA8C38A30 for ; Wed, 22 Apr 2020 06:55:19 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0F41F20706 for ; Wed, 22 Apr 2020 06:55:19 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0F41F20706 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=atomide.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 904366E9A3; Wed, 22 Apr 2020 06:54:44 +0000 (UTC) Received: from muru.com (muru.com [72.249.23.125]) by gabe.freedesktop.org (Postfix) with ESMTP id 8A5CE6E991 for ; Tue, 21 Apr 2020 14:15:48 +0000 (UTC) Received: from atomide.com (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTPS id CD62F8081; Tue, 21 Apr 2020 14:16:33 +0000 (UTC) Date: Tue, 21 Apr 2020 07:15:43 -0700 From: Tony Lindgren To: Maxime Ripard Subject: Re: [PATCH v6 00/12] ARM/MIPS: DTS: add child nodes describing the PVRSGX GPU present in some OMAP SoC and JZ4780 (and many more) Message-ID: <20200421141543.GU37466@atomide.com> References: <20200415101008.zxzxca2vlfsefpdv@gilmour.lan> <2E3401F1-A106-4396-8FE6-51CAB72926A4@goldelico.com> <20200415130233.rgn7xrtwqicptke2@gilmour.lan> <10969e64-fe1f-d692-4984-4ba916bd2161@gmail.com> <20200420073842.nx4xb3zqvu23arkc@gilmour.lan> <20200421112129.zjmkmzo3aftksgka@gilmour.lan> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200421112129.zjmkmzo3aftksgka@gilmour.lan> X-Mailman-Approved-At: Wed, 22 Apr 2020 06:54:41 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , David Airlie , "H. Nikolaus Schaller" , "open list:DRM PANEL DRIVERS" , linux-mips@vger.kernel.org, Paul Cercueil , Discussions about the Letux Kernel , Paul Burton , Krzysztof Kozlowski , linux-samsung-soc@vger.kernel.org, Chen-Yu Tsai , Kukjin Kim , James Hogan , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Rob Herring , linux-omap , arm-soc , Thomas Bogendoerfer , Philipp Rossak , OpenPVRSGX Linux Driver Group , Linux Kernel Mailing List , Ralf Baechle , =?utf-8?Q?Beno=C3=AEt?= Cousson , kernel@pyra-handheld.com Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" * Maxime Ripard [200421 11:22]: > On Tue, Apr 21, 2020 at 11:57:33AM +0200, Philipp Rossak wrote: > > I had a look on genpd and I'm not really sure if that fits. > > > > It is basically some bit that verify that the clocks should be enabled or > > disabled. > > No, it can do much more than that. It's a framework to control the SoCs power > domains, so clocks might be a part of it, but most of the time it's going to be > about powering up a particular device. Note that on omaps there are actually SoC module specific registers. And there can be multiple devices within a single target module on omaps. So the extra dts node and device is justified there. For other SoCs, the SGX clocks are probably best handled directly in pvr-drv.c PM runtime functions unless a custom hardware wrapper with SoC specific registers exists. Regards, Tony _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel