From mboxrd@z Thu Jan 1 00:00:00 1970 From: Peter Geis Subject: [PATCH] arm64: dts: rockchip: fix rk3399 pcie speed Date: Thu, 23 Apr 2020 15:05:10 +0000 Message-ID: <20200423150510.6216-1-pgwipeout@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+glpar-linux-rockchip=m.gmane-mx.org-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org To: Heiko Stuebner , Rob Herring , Robin Murphy Cc: linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, Peter Geis List-Id: linux-rockchip.vger.kernel.org The rk3399 is capable of operating at PCIe gen 2 as per the TRM. The device-tree incorrectly limits us to gen 1. Correctly set the maximum link speed to <2>. Tested on the rockpro64. Signed-off-by: Peter Geis --- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 74f2c3d49095..e9efd330810b 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -248,7 +248,7 @@ <0 0 0 3 &pcie0_intc 2>, <0 0 0 4 &pcie0_intc 3>; linux,pci-domain = <0>; - max-link-speed = <1>; + max-link-speed = <2>; msi-map = <0x0 &its 0x0 0x1000>; phys = <&pcie_phy 0>, <&pcie_phy 1>, <&pcie_phy 2>, <&pcie_phy 3>; -- 2.20.1