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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Imre Deak <imre.deak@intel.com>
Cc: intel-gfx@lists.freedesktop.org, stable@vger.kernel.org
Subject: Re: [Intel-gfx] [PATCH] drm/i915/tgl+: Fix interrupt handling for DP AUX transactions
Date: Mon, 4 May 2020 16:39:01 +0300	[thread overview]
Message-ID: <20200504133901.GZ6112@intel.com> (raw)
In-Reply-To: <20200504075828.20348-1-imre.deak@intel.com>

On Mon, May 04, 2020 at 10:58:28AM +0300, Imre Deak wrote:
> Unmask/enable AUX interrupts on all ports on TGL+. So far the interrupts
> worked only on port A, which meant each transaction on other ports took
> 10ms.
> 
> Cc: <stable@vger.kernel.org> # v5.4+
> Signed-off-by: Imre Deak <imre.deak@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/i915_irq.c | 16 +++-------------
>  1 file changed, 3 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index bd722d0650c8..0b8b0c069ce3 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -3361,7 +3361,7 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
>  	u32 de_pipe_masked = gen8_de_pipe_fault_mask(dev_priv) |
>  		GEN8_PIPE_CDCLK_CRC_DONE;
>  	u32 de_pipe_enables;
> -	u32 de_port_masked = GEN8_AUX_CHANNEL_A;
> +	u32 de_port_masked = gen8_de_port_aux_mask(dev_priv);
>  	u32 de_port_enables;
>  	u32 de_misc_masked = GEN8_DE_EDP_PSR;
>  	enum pipe pipe;
> @@ -3369,18 +3369,8 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
>  	if (INTEL_GEN(dev_priv) <= 10)
>  		de_misc_masked |= GEN8_DE_MISC_GSE;
>  
> -	if (INTEL_GEN(dev_priv) >= 9) {
> -		de_port_masked |= GEN9_AUX_CHANNEL_B | GEN9_AUX_CHANNEL_C |
> -				  GEN9_AUX_CHANNEL_D;
> -		if (IS_GEN9_LP(dev_priv))
> -			de_port_masked |= BXT_DE_PORT_GMBUS;
> -	}
> -
> -	if (INTEL_GEN(dev_priv) >= 11)
> -		de_port_masked |= ICL_AUX_CHANNEL_E;
> -
> -	if (IS_CNL_WITH_PORT_F(dev_priv) || INTEL_GEN(dev_priv) >= 11)
> -		de_port_masked |= CNL_AUX_CHANNEL_F;
> +	if (IS_GEN9_LP(dev_priv))
> +		de_port_masked |= BXT_DE_PORT_GMBUS;
>  
>  	de_pipe_enables = de_pipe_masked | GEN8_PIPE_VBLANK |
>  					   GEN8_PIPE_FIFO_UNDERRUN;
> -- 
> 2.23.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

WARNING: multiple messages have this Message-ID (diff)
From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Imre Deak <imre.deak@intel.com>
Cc: intel-gfx@lists.freedesktop.org, stable@vger.kernel.org
Subject: Re: [Intel-gfx] [PATCH] drm/i915/tgl+: Fix interrupt handling for DP AUX transactions
Date: Mon, 4 May 2020 16:39:01 +0300	[thread overview]
Message-ID: <20200504133901.GZ6112@intel.com> (raw)
In-Reply-To: <20200504075828.20348-1-imre.deak@intel.com>

On Mon, May 04, 2020 at 10:58:28AM +0300, Imre Deak wrote:
> Unmask/enable AUX interrupts on all ports on TGL+. So far the interrupts
> worked only on port A, which meant each transaction on other ports took
> 10ms.
> 
> Cc: <stable@vger.kernel.org> # v5.4+
> Signed-off-by: Imre Deak <imre.deak@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/i915_irq.c | 16 +++-------------
>  1 file changed, 3 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index bd722d0650c8..0b8b0c069ce3 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -3361,7 +3361,7 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
>  	u32 de_pipe_masked = gen8_de_pipe_fault_mask(dev_priv) |
>  		GEN8_PIPE_CDCLK_CRC_DONE;
>  	u32 de_pipe_enables;
> -	u32 de_port_masked = GEN8_AUX_CHANNEL_A;
> +	u32 de_port_masked = gen8_de_port_aux_mask(dev_priv);
>  	u32 de_port_enables;
>  	u32 de_misc_masked = GEN8_DE_EDP_PSR;
>  	enum pipe pipe;
> @@ -3369,18 +3369,8 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
>  	if (INTEL_GEN(dev_priv) <= 10)
>  		de_misc_masked |= GEN8_DE_MISC_GSE;
>  
> -	if (INTEL_GEN(dev_priv) >= 9) {
> -		de_port_masked |= GEN9_AUX_CHANNEL_B | GEN9_AUX_CHANNEL_C |
> -				  GEN9_AUX_CHANNEL_D;
> -		if (IS_GEN9_LP(dev_priv))
> -			de_port_masked |= BXT_DE_PORT_GMBUS;
> -	}
> -
> -	if (INTEL_GEN(dev_priv) >= 11)
> -		de_port_masked |= ICL_AUX_CHANNEL_E;
> -
> -	if (IS_CNL_WITH_PORT_F(dev_priv) || INTEL_GEN(dev_priv) >= 11)
> -		de_port_masked |= CNL_AUX_CHANNEL_F;
> +	if (IS_GEN9_LP(dev_priv))
> +		de_port_masked |= BXT_DE_PORT_GMBUS;
>  
>  	de_pipe_enables = de_pipe_masked | GEN8_PIPE_VBLANK |
>  					   GEN8_PIPE_FIFO_UNDERRUN;
> -- 
> 2.23.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel

  parent reply	other threads:[~2020-05-04 13:39 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-04  7:58 [Intel-gfx] [PATCH] drm/i915/tgl+: Fix interrupt handling for DP AUX transactions Imre Deak
2020-05-04  7:58 ` Imre Deak
2020-05-04 10:02 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2020-05-04 13:39 ` Ville Syrjälä [this message]
2020-05-04 13:39   ` [Intel-gfx] [PATCH] " Ville Syrjälä
2020-05-04 18:31 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for " Patchwork
2020-05-04 19:29   ` Imre Deak
2020-05-04 21:43     ` Vudum, Lakshminarayana
2020-05-04 21:41 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
2020-05-05  9:15   ` Imre Deak

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