Re: OMAP36 AES and SHA addresses and hwmods

[Tony Lindgren <tony@atomide.com>]

* Tero Kristo <t-kristo@ti.com> [200504 06:29]:
> On 03/05/2020 18:48, Adam Ford wrote:
> > According to the dm3730 reference manual, there are supposed to be two
> > AES and SHA engines, but the addresses of their IP doesn't appear in
> > the reference manual.
> > 
> > The AM35xx has references to two memory locations for each:
> > 
> >     AES1 shows it's at 0x480A 6000
> >     AES2 shows is 0x480C 5000 (matches omap3630 entry)
> > 
> >     SHA1MD5 2 shows it's at 480c 3000 (matches omap3630 entry)
> >     SHA2MD5 shows it's at 0x480A 4000
> > 
> > Is it reasonable to think the other IP block addresses for the
> > am3630/dm3730 would match the am35xx?
> > 
> > Currently in the OMAP3630, there are hwmods setup for AES and SHA
> > engines, but the rng uses the newer approach with ti,sysc and
> > sysc-omap2.
> > 
> > I tried to just copy the existing blocks to the other addresses, but I
> > got some errors. I assume it's due to hwmods.  It seems like we should
> > be able to convert the hwmods out, and add the additional addresses
> > for the omap36, but before I go too far, I want to know if it'll even
> > be possible.
> 
> All omap3 family should share identical address space for these IPs.

For configuring the accelerators, the dts entries needed should be
very similar to the other SoCs. AFAIK, there are no "ti,sysc-omap4"
compatible devices for omap3 though, and they should be configured
as "ti,sysc-omap2". I could be wrong though, but this can be seen
from the module revision register.

For omap3, you need to specify both "fck" and "ick" for the ti-sysc
config. Not sure what's up with the multiple addresses or instance,
it's best to check what works.

Regards,

Tony