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Mon, 4 May 2020 20:04:31 +0000 (UTC) Date: Mon, 4 May 2020 22:04:31 +0200 From: Alexandre Belloni To: =?utf-8?B?TWljaGHFgiBNaXJvc8WCYXc=?= Cc: Michael Turquette , Rob Herring , Ludovic Desroches , Nicolas Ferre , Stephen Boyd , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v4 3/3] clk: at91: allow setting all PMC clock parents via DT Message-ID: <20200504200431.GI34497@piout.net> References: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Hi, On 03/05/2020 19:19:26+0200, Michał Mirosław wrote: > diff --git a/include/dt-bindings/clock/at91.h b/include/dt-bindings/clock/at91.h > index c3f4aa6a2d29..adcf608b41fa 100644 > --- a/include/dt-bindings/clock/at91.h > +++ b/include/dt-bindings/clock/at91.h > @@ -21,6 +21,9 @@ > #define PMC_MCK2 4 > #define PMC_I2S0_MUX 5 > #define PMC_I2S1_MUX 6 > +#define PMC_PLLACK 7 > +#define PMC_PLLBCK 8 > +#define PMC_AUDIOPLLCK 8 /* SAMA5D2-only, no PLLB there */ Just use 9 here because we can't know for sure that a future SoC won't have both a PLLB and audio PLL. > > #ifndef AT91_PMC_MOSCS > #define AT91_PMC_MOSCS 0 /* MOSCS Flag */ > -- > 2.20.1 > -- Alexandre Belloni, Bootlin Embedded Linux and Kernel engineering https://bootlin.com From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,UNWANTED_LANGUAGE_BODY autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6E577C3A5A9 for ; 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Mon, 4 May 2020 20:04:31 +0000 (UTC) Date: Mon, 4 May 2020 22:04:31 +0200 From: Alexandre Belloni To: =?utf-8?B?TWljaGHFgiBNaXJvc8WCYXc=?= Subject: Re: [PATCH v4 3/3] clk: at91: allow setting all PMC clock parents via DT Message-ID: <20200504200431.GI34497@piout.net> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200504_130437_558037_1EEAB8F3 X-CRM114-Status: UNSURE ( 8.32 ) X-CRM114-Notice: Please train this message. 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