Re: [PATCH v5 7/7] dt-bindings: spi: dw-apb-ssi: Convert bindings to json-schema

[Rob Herring <robh@kernel.org>]

On Tue, May 05, 2020 at 09:06:18PM +0800, Wan Ahmad Zainie wrote:
> Convert the Synopsis DesignWare dw-apb-ssi binding to DT schema format
> using json-schema.
> 
> Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> Signed-off-by: Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
> ---
>  .../bindings/spi/snps,dw-apb-ssi.txt          | 42 -----------
>  .../bindings/spi/snps,dw-apb-ssi.yaml         | 72 +++++++++++++++++++
>  2 files changed, 72 insertions(+), 42 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt
>  create mode 100644 Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml


> diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
> new file mode 100644
> index 000000000000..edc1e6fb9993
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
> @@ -0,0 +1,72 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/spi/snps,dw-apb-ssi.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: Synopsys DesignWare AMBA 2.0 Synchronous Serial Interface
> +
> +maintainers:
> +  - Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
> +
> +allOf:
> +  - $ref: "spi-controller.yaml#"
> +
> +properties:
> +  compatible:
> +    enum:
> +      - mscc,ocelot-spi
> +      - mscc,jaguar2-spi
> +      - amazon,alpine-dw-apb-ssi
> +      - snps,dw-apb-ssi
> +      - snps,dwc-ssi-1.01a
> +      - intel,keembay-ssi

This doesn't match what's in dts files. You have to list out every 
combination.

> +
> +  reg:
> +    minItems: 1
> +    maxItems: 2
> +    items:
> +      - description: The register base for the controller.
> +      - description: For "mscc,<soc>-spi", a second register set is required.
> +
> +  interrupts:
> +    maxItems: 1
> +
> +  clocks:
> +    minItems: 1
> +    maxItems: 2
> +    items:
> +      - description: The core clock used to generate the external SPI clock.
> +      - description: The interface clock required for register access.
> +
> +  clock-names:
> +    items:
> +      - const: ssi_clk
> +      - const: pclk
> +
> +  reg-io-width:
> +    allOf:
> +      - $ref: /schemas/types.yaml#/definitions/uint32
> +      - enum: [ 2, 4 ]
> +      - default: 4
> +    description: The I/O register width (in bytes) implemented by this device.
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +  - clocks
> +
> +examples:
> +  - |
> +    spi@fff00000 {
> +          compatible = "snps,dw-apb-ssi";
> +          reg = <0xfff00000 0x1000>;
> +          interrupts = <0 154 4>;
> +          #address-cells = <1>;
> +          #size-cells = <0>;
> +          clocks = <&spi_m_clk>;
> +          num-cs = <2>;
> +          cs-gpios = <&gpio0 13 0>,
> +                     <&gpio0 14 0>;
> +    };
> -- 
> 2.17.1
>