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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Lyude Paul <lyude@redhat.com>
Cc: "Chiou, Cooper" <cooper.chiou@intel.com>,
	"20200417212408.19649-1-shawn.c.lee@intel.com"
	<20200417212408.19649-1-shawn.c.lee@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH] drm/i915/mst: filter out the display mode exceed sink's capability
Date: Mon, 11 May 2020 15:45:21 +0300	[thread overview]
Message-ID: <20200511124521.GJ6112@intel.com> (raw)
In-Reply-To: <1a35fc492437f1cd2aefc30690bba52a6b4d8962.camel@redhat.com>

On Thu, May 07, 2020 at 06:46:17PM -0400, Lyude Paul wrote:
> On Thu, 2020-04-30 at 02:37 +0000, Lee, Shawn C wrote:
> > On Sat, 2020-04-25, Lyude Paul wrote:
> > > Hi! Sorry this took me a little while to get back to, I had a couple of
> > > MST regressions that I had to look into
> > > 
> > > On Sat, 2020-04-18 at 05:24 +0800, Lee Shawn C wrote:
> > > > So far, max dot clock rate for MST mode rely on physcial bandwidth 
> > > > limitation. It would caused compatibility issue if source display 
> > > > resolution exceed MST hub output ability.
> > > > 
> > > > For example, source DUT had DP 1.2 output capability.
> > > > And MST docking just support HDMI 1.4 spec. When a HDMI 2.0 monitor 
> > > > connected. Source would retrieve EDID from external and get max 
> > > > resolution 4k@60fps. DP 1.2 can support 4K@60fps because it did not 
> > > > surpass DP physical bandwidth limitation.
> > > > Do modeset to 4k@60fps, source output display data but MST docking 
> > > > can't output HDMI properly due to this resolution already over HDMI 
> > > > 1.4 spec.
> > > > 
> > > > Refer to commit <fcf463807596> ("drm/dp_mst: Use full_pbn instead of 
> > > > available_pbn for bandwidth checks").
> > > > Source driver should refer to full_pbn to evaluate sink output 
> > > > capability. And filter out the resolution surpass sink output 
> > > > limitation.
> > > > 
> > > > Cc: Manasi Navare <manasi.d.navare@intel.com>
> > > > Cc: Jani Nikula <jani.nikula@linux.intel.com>
> > > > Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> > > > Cc: Cooper Chiou <cooper.chiou@intel.com>
> > > > Cc: Lyude Paul <lyude@redhat.com>
> > > > Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com>
> > > > ---
> > > >  drivers/gpu/drm/i915/display/intel_dp_mst.c | 24 
> > > > ++++++++++++++++++++-
> > > >  1 file changed, 23 insertions(+), 1 deletion(-)
> > > > 
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > > > b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > > > index 61605eb8c2af..68697f463dab 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > > > @@ -609,6 +609,26 @@ static int intel_dp_mst_get_modes(struct 
> > > > drm_connector
> > > > *connector)
> > > >  	return intel_dp_mst_get_ddc_modes(connector);
> > > >  }
> > > >  
> > > > +static bool
> > > > +intel_dp_mst_mode_clock_exceed_pbn_bandwidth(struct drm_connector
> > > > *connector, int clock, int bpp)
> > > > +{
> > > > +	struct intel_connector *intel_connector =
> > > > to_intel_connector(connector);
> > > > +	struct intel_dp *intel_dp = intel_connector->mst_port;
> > > > +	struct drm_dp_mst_topology_mgr *mgr = &intel_dp->mst_mgr;
> > > > +	struct drm_dp_mst_port *port = (to_intel_connector(connector))->port;
> > > > +	bool ret = false;
> > > > +
> > > > +	if (!mgr)
> > > > +		return ret;
> > > > +
> > > > +	mutex_lock(&mgr->lock);
> > > 
> > > This isn't the right lock for this - mgr->lock protects the topology
> > > layout (e.g. drm_dp_mst_port.mstb, drm_dp_mst_port.next, and
> > > drm_dp_mst_branch.ports). port->full_pbn is protected under
> > > &drm_dp_mst_topology_mgr.base.lock (not drm_dp_mst_topology_mgr.lock), so
> > > you need to first add a version of .mode_valid() to struct
> > > drm_connector_helper_funcs that accepts a drm_modeset_acquire_ctx so you
> > > can use that to safely grab &drm_dp_mst_topology_mgr.base.lock.
> > > 
> > 
> > Thanks for comments! I will correct the lock to protect port->full_pbn.
> > 
> > > > +	if (port->full_pbn)
> > > 
> > > Also - there's no reason to check if (port->full_pbn) here, so long as
> > > you're holding the right locks this should always be populated by the time
> > > we create the drm_connector for the MST port (if it's not, that's a bug
> > > that needs to be fixed).
> > > 
> > 
> > Just want to make sure full_pbn value is greater than zero. As you mention
> > in another patch, it's hard to predict sink report full or available PBN
> > properly.
> 
> Sorry this took me a little while to respond to, crunch time came up at work…
> Anyway-have you seen issues with full_pbn reporting on hubs? I've seen plenty
> of problems with available_pbn reporting, but the reason we switched over to
> full_pbn in the first place is because that seemed to be the one hubs reported
> reliably. We actually make the assumption full_pbn is always > 0 if
> something's connected in some places in the MST helpers, so if we've got cases
> of full_pbn lying as well on some hubs we might want to fix that.

We have at least one full_pbn==0 issue in ci:
<4>[    5.061345] WARNING: CPU: 0 PID: 376 at drivers/gpu/drm/drm_dp_mst_topology.c:4889 drm_dp_mst_atomic_check_mstb_bw_limit+0x193/0x1c0

https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8460/fi-kbl-7560u/boot0.txt

Dunno if that's the MST device reporting zero or due to some other
bug, but at least CI is currently borked on that machine.

-- 
Ville Syrjälä
Intel
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Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2020-05-11 12:45 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-17 21:24 [Intel-gfx] [PATCH] drm/i915/mst: filter out the display mode exceed sink's capability Lee Shawn C
2020-04-17 17:58 ` [Intel-gfx] ✗ Fi.CI.DOCS: warning for " Patchwork
2020-04-17 18:06 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-04-19  3:54 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-04-24 20:26 ` [Intel-gfx] [PATCH] " Lyude Paul
2020-04-30  2:37   ` Lee, Shawn C
2020-05-07 22:46     ` Lyude Paul
2020-05-11 12:45       ` Ville Syrjälä [this message]
2020-05-11  5:09     ` Lee, Shawn C
2020-05-12  6:17       ` Lee, Shawn C
2020-05-12 16:19         ` Lyude Paul
2020-05-11 18:10 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/mst: filter out the display mode exceed sink's capability (rev2) Patchwork
2020-05-11 22:45 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-05-11 23:19 ` [Intel-gfx] [PATCH v2] drm/i915/mst: filter out the display mode exceed sink's capability Lee Shawn C
2020-05-15 20:53   ` Lyude Paul
2020-05-19  3:56 ` [Intel-gfx] [PATCH v3] " Lee Shawn C
2020-05-22 18:35   ` Lyude Paul
2020-05-22 18:39     ` Lyude Paul
2020-05-25  4:59       ` Lee, Shawn C
2020-05-19  4:28 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/mst: filter out the display mode exceed sink's capability (rev3) Patchwork
2020-05-19  5:28 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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