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Thu, 14 May 2020 06:50:25 -0700 Received: from [10.71.116.176] (helo=localhost) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1jZEFk-0002Jm-OV; Thu, 14 May 2020 06:50:24 -0700 Date: Thu, 14 May 2020 15:50:07 +0200 From: "Edgar E. Iglesias" To: Joe Komlodi Subject: Re: [PATCH V2 3/4] target/microblaze: gdb: Fix incorrect SReg reporting Message-ID: <20200514135007.GS2945@toto> References: <1589393329-223076-1-git-send-email-komlodi@xilinx.com> <1589393329-223076-3-git-send-email-komlodi@xilinx.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1589393329-223076-3-git-send-email-komlodi@xilinx.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:149.199.60.83; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:xsj-pvapsmtpgw01; PTR:unknown-60-83.xilinx.com; CAT:NONE; SFTY:; SFS:(7916004)(346002)(396003)(136003)(39860400002)(376002)(46966005)(6862004)(81166007)(26005)(5660300002)(82310400002)(9786002)(9686003)(70206006)(8676002)(356005)(47076004)(6666004)(336012)(8936002)(478600001)(33716001)(1076003)(82740400003)(6636002)(33656002)(70586007)(2906002)(4326008)(316002)(186003)(426003); DIR:OUT; SFP:1101; X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: a61ce666-241e-450f-f72d-08d7f80dc235 X-MS-TrafficTypeDiagnostic: DM5PR02MB3164: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:5797; X-Forefront-PRVS: 040359335D X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 0aOYLSTTkvzQ64RRXbPqurv5bowOrolSwpP5tDUknWGYk75uepr1s9rDYZJvfUS4HHEpX6eXo3kBn0BIAjVYA7NKHSgMDY+ZYDP7xtoeUH86VNEVxOhJ1rKLDxQUgrw8FyrjQbKKLCMcIuyvYhyoZrN4mWJpBG1ahQGIE6J1gAS+WTWHdHjHjvvKbpN/DpTybQ7J7J2zNdM1x6KQYe4Z3/+HAdoMSBngWqkl0ytdP1gEXPXnVeE27cetqwVNGbKPrrT5mc1zwDT9AFY4fq+Bm/8ZlE0PNMGoHjOc4XQO5muL9exz0y/UamMaIBwYtLobQTDhhqlxsWjnOh+ebUXxR4F+Spl8vfB8Lxq9Y6O27KwUzFYFQ+SptyJuJ59IXyII9OuaInyyiPakF70C6frhvcJKO6pHLH0WFb9//dRIEm9p/pIsuuenssGqDjK3ibfSExr6a7x1ECwWkNXq759yeMNmYU8DNKKBI6wo5xM2lTx+Sve7JMyUGWsLJ7NmcYxxiRC7cHv9fOB4piOWo/AI6w== X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 May 2020 13:50:27.2764 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a61ce666-241e-450f-f72d-08d7f80dc235 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c; Ip=[149.199.60.83]; Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR02MB3164 Received-SPF: pass client-ip=40.107.243.59; envelope-from=edgar@xilinx.com; helo=NAM12-DM6-obe.outbound.protection.outlook.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/14 09:50:28 X-ACL-Warn: Detected OS = Windows NT kernel [generic] [fuzzy] X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_MED=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Wed, May 13, 2020 at 11:08:47AM -0700, Joe Komlodi wrote: > SRegs used to be reported to GDB by iterating over the SRegs array, > however we do not store them in an order that allows them to be > reported to GDB in that way. > > To fix this, a simple map is used to map the register GDB wants to its > location in the SRegs array. Reviewed-by: Edgar E. Iglesias > > Signed-off-by: Joe Komlodi > --- > target/microblaze/gdbstub.c | 59 +++++++++++++++++++++++++++++++++++++-------- > 1 file changed, 49 insertions(+), 10 deletions(-) > > diff --git a/target/microblaze/gdbstub.c b/target/microblaze/gdbstub.c > index af29f00..485b717 100644 > --- a/target/microblaze/gdbstub.c > +++ b/target/microblaze/gdbstub.c > @@ -25,6 +25,21 @@ int mb_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) > { > MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs); > CPUMBState *env = &cpu->env; > + /* > + * GDB expects SREGs in the following order: > + * PC, MSR, EAR, ESR, FSR, BTR, EDR, PID, ZPR, TLBX, TLBSX, TLBLO, TLBHI. > + * They aren't stored in this order, so make a map. > + * PID, ZPR, TLBx, TLBsx, TLBLO, and TLBHI aren't modeled, so we don't > + * map them to anything and return a value of 0 instead. > + */ > + static const uint8_t sreg_map[6] = { > + SR_PC, > + SR_MSR, > + SR_EAR, > + SR_ESR, > + SR_FSR, > + SR_BTR > + }; > > /* > * GDB expects registers to be reported in this order: > @@ -40,15 +55,16 @@ int mb_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) > n -= 32; > switch (n) { > case 0 ... 5: > - return gdb_get_reg32(mem_buf, env->sregs[n]); > + return gdb_get_reg32(mem_buf, env->sregs[sreg_map[n]]); > /* PVR12 is intentionally skipped */ > case 6 ... 17: > n -= 6; > return gdb_get_reg32(mem_buf, env->pvr.regs[n]); > - case 18 ... 24: > - /* Add an offset of 6 to resume where we left off with SRegs */ > - n = n - 18 + 6; > - return gdb_get_reg32(mem_buf, env->sregs[n]); > + case 18: > + return gdb_get_reg32(mem_buf, env->sregs[SR_EDR]); > + /* Other SRegs aren't modeled, so report a value of 0 */ > + case 19 ... 24: > + return gdb_get_reg32(mem_buf, 0); > case 25: > return gdb_get_reg32(mem_buf, env->slr); > case 26: > @@ -66,29 +82,52 @@ int mb_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) > CPUMBState *env = &cpu->env; > uint32_t tmp; > > + /* > + * GDB expects SREGs in the following order: > + * PC, MSR, EAR, ESR, FSR, BTR, EDR, PID, ZPR, TLBX, TLBSX, TLBLO, TLBHI. > + * They aren't stored in this order, so make a map. > + * PID, ZPR, TLBx, TLBsx, TLBLO, and TLBHI aren't modeled, so we don't > + * map them to anything. > + */ > + static const uint8_t sreg_map[6] = { > + SR_PC, > + SR_MSR, > + SR_EAR, > + SR_ESR, > + SR_FSR, > + SR_BTR > + }; > + > if (n > cc->gdb_num_core_regs) { > return 0; > } > > tmp = ldl_p(mem_buf); > > + /* > + * GDB expects registers to be reported in this order: > + * R0-R31 > + * PC-BTR > + * PVR0-PVR11 > + * EDR-TLBHI > + * SLR-SHR > + */ > if (n < 32) { > env->regs[n] = tmp; > } else { > n -= 32; > switch (n) { > case 0 ... 5: > - env->sregs[n] = tmp; > + env->sregs[sreg_map[n]] = tmp; > break; > /* PVR12 is intentionally skipped */ > case 6 ... 17: > n -= 6; > env->pvr.regs[n] = tmp; > break; > - case 18 ... 24: > - /* Add an offset of 6 to resume where we left off with SRegs */ > - n = n - 18 + 6; > - env->sregs[n] = tmp; > + /* Only EDR is modeled in these indeces, so ignore the rest */ > + case 18: > + env->sregs[SR_EDR] = tmp; > break; > case 25: > env->slr = tmp; > -- > 2.7.4 >