From: Greg KH <gregkh@linuxfoundation.org>
To: "Mukesh, Savaliya" <msavaliy@codeaurora.org>
Cc: akashast@codeaurora.org, linux-serial@vger.kernel.org,
saravanak@google.com, sspatil@google.com, tkjos@google.com
Subject: Re: [PATCH V2] serial: msm_geni_serial_console : Add Earlycon support
Date: Thu, 14 May 2020 16:02:03 +0200 [thread overview]
Message-ID: <20200514140203.GA2581983@kroah.com> (raw)
In-Reply-To: <572765da-6dae-3056-3fc2-188b92291777@codeaurora.org>
On Thu, May 14, 2020 at 07:03:18PM +0530, Mukesh, Savaliya wrote:
>
> On 5/6/2020 5:35 PM, Greg KH wrote:
> > On Wed, May 06, 2020 at 05:03:31PM +0530, Mukesh, Savaliya wrote:
> > > + /*
> > > + * If the WM bit never set, then the Tx state machine is not
> > > + * in a valid state, so break, cancel/abort any existing
> > > + * command. Unfortunately the current data being written is
> > > + * lost.
> > > + */
> > > + while (!msm_geni_serial_poll_bit(uport, SE_GENI_M_IRQ_STATUS,
> > > + M_TX_FIFO_WATERMARK_EN, true))
> > > + break;
> > Am I reading this correctly in that if the bit is set properly, you will
> > just loop for forever?
> >
> > That feels wrong, are you sure this is correct?
>
> It seems correct to me. The API returns true if function sees the BIT is set
> else returns false.
>
> Mostly it's true and returns true, hence it shouldn't loop.
What if it always is false, the loop is now stuck and can never break
out of this. You need some sort of "timeout" for when the hardware
breaks :)
thanks,
greg k-h
prev parent reply other threads:[~2020-05-14 14:02 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-06 11:33 [PATCH V2] serial: msm_geni_serial_console : Add Earlycon support Mukesh, Savaliya
2020-05-06 12:02 ` Greg KH
2020-05-06 12:48 ` Will Deacon
2020-05-06 12:59 ` Greg KH
2020-05-14 13:33 ` Mukesh, Savaliya
2020-05-14 13:32 ` Mukesh, Savaliya
2020-05-14 14:02 ` Greg KH
2020-05-06 12:05 ` Greg KH
2020-05-14 13:33 ` Mukesh, Savaliya
2020-05-14 14:02 ` Greg KH [this message]
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