From: Greg KH <gregkh@linuxfoundation.org>
To: Jeffrey Hugo <jhugo@codeaurora.org>
Cc: arnd@arndb.de, manivannan.sadhasivam@linaro.org,
bjorn.andersson@linaro.org, wufan@codeaurora.org,
pratanan@codeaurora.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [RFC PATCH 3/8] qaic: Create char dev
Date: Thu, 14 May 2020 16:12:11 +0200 [thread overview]
Message-ID: <20200514141211.GA2643665@kroah.com> (raw)
In-Reply-To: <1589465266-20056-4-git-send-email-jhugo@codeaurora.org>
On Thu, May 14, 2020 at 08:07:41AM -0600, Jeffrey Hugo wrote:
> /* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. */
>
> +#include <linux/cdev.h>
> +#include <linux/idr.h>
> +#include <linux/list.h>
> +#include <linux/kref.h>
> +#include <linux/mhi.h>
> #include <linux/module.h>
> #include <linux/msi.h>
> +#include <linux/mutex.h>
> #include <linux/pci.h>
> #include <linux/pci_ids.h>
>
> @@ -13,9 +19,242 @@
> #define PCI_DEV_AIC100 0xa100
>
> #define QAIC_NAME "Qualcomm Cloud AI 100"
> +#define QAIC_MAX_MINORS 256
Why have a max?
Why not just use a misc device so you make the logic a lot simple, no
class or chardev logic to mess with at all.
thanks,
greg k-h
next prev parent reply other threads:[~2020-05-14 14:12 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-14 14:07 [RFC PATCH 0/8] Qualcomm Cloud AI 100 driver Jeffrey Hugo
2020-05-14 14:07 ` [RFC PATCH 1/8] qaic: Add skeleton driver Jeffrey Hugo
2020-05-15 0:43 ` Jeffrey Hugo
2020-05-15 6:37 ` Greg KH
2020-05-14 14:07 ` [RFC PATCH 2/8] qaic: Add and init a basic mhi controller Jeffrey Hugo
2020-05-14 17:02 ` kbuild test robot
2020-05-14 14:07 ` [RFC PATCH 3/8] qaic: Create char dev Jeffrey Hugo
2020-05-14 14:12 ` Greg KH [this message]
2020-05-14 15:05 ` Jeffrey Hugo
2020-05-14 15:56 ` Greg KH
2020-05-14 16:24 ` Jeffrey Hugo
2020-05-15 21:08 ` Jeffrey Hugo
2020-05-16 7:01 ` Greg KH
2020-05-16 21:29 ` Jeffrey Hugo
2020-05-17 7:14 ` Greg KH
2020-05-17 19:37 ` Jeffrey Hugo
2020-05-14 14:07 ` [RFC PATCH 4/8] qaic: Implement control path Jeffrey Hugo
2020-05-14 14:07 ` [RFC PATCH 5/8] qaic: Implement data path Jeffrey Hugo
2020-05-14 14:14 ` Greg KH
2020-05-14 15:06 ` Jeffrey Hugo
2020-05-14 15:56 ` Greg KH
2020-05-14 16:12 ` Jeffrey Hugo
2020-05-14 16:37 ` Greg KH
2020-05-14 16:45 ` Jeffrey Hugo
2020-05-14 21:36 ` Arnd Bergmann
2020-05-14 22:06 ` Jeffrey Hugo
2020-05-14 22:20 ` Arnd Bergmann
2020-05-14 14:07 ` [RFC PATCH 6/8] qaic: Implement PCI link status error handlers Jeffrey Hugo
2020-05-14 14:07 ` [RFC PATCH 7/8] qaic: Implement MHI error status handler Jeffrey Hugo
2020-05-14 14:07 ` [RFC PATCH 8/8] MAINTAINERS: Add entry for QAIC driver Jeffrey Hugo
2020-05-19 5:08 ` [RFC PATCH 0/8] Qualcomm Cloud AI 100 driver Dave Airlie
2020-05-19 14:57 ` Jeffrey Hugo
2020-05-19 17:41 ` Greg Kroah-Hartman
2020-05-19 18:07 ` Jeffrey Hugo
2020-05-19 18:12 ` Greg Kroah-Hartman
2020-05-19 18:26 ` Jeffrey Hugo
2020-05-20 5:32 ` Greg Kroah-Hartman
2020-05-19 17:33 ` Greg Kroah-Hartman
2020-05-19 6:57 ` Manivannan Sadhasivam
2020-05-19 14:16 ` Jeffrey Hugo
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