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From: Rob Herring <robh@kernel.org>
To: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>,
	Serge Semin <fancer.lancer@gmail.com>,
	Olof Johansson <olof@lixom.net>,
	Ralf Baechle <ralf@linux-mips.org>,
	Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,
	devicetree@vger.kernel.org, Tony Lindgren <tony@atomide.com>,
	Tero Kristo <t-kristo@ti.com>, Arnd Bergmann <arnd@arndb.de>,
	Jeffrey Hugo <jhugo@codeaurora.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Paul Burton <paulburton@kernel.org>,
	linux-kernel@vger.kernel.org,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	linux-mips@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
	soc@kernel.org, Linus Walleij <linus.walleij@linaro.org>
Subject: Re: [PATCH v2 1/4] dt-bindings: bus: Add Baikal-T1 AXI-bus binding
Date: Thu, 14 May 2020 22:13:11 -0500	[thread overview]
Message-ID: <20200515031311.GA29918@bogus> (raw)
In-Reply-To: <20200507224116.1523-2-Sergey.Semin@baikalelectronics.ru>

On Fri, 8 May 2020 01:41:13 +0300, Serge Semin wrote:
> AXI3-bus is the main communication bus connecting all high-speed
> peripheral IP-cores with RAM controller and with MIPS P5600 cores on
> Baikal-T1 SoC. This binding describes the DW AMBA 3 AXI Inteconnect
> and Errors Handler Block synthesized on top of it, which are
> responsible for the AXI-bus traffic arbitration and errors reporting
> upstream to CPU. Baikal-T1 AXI-bus DT node is supposed to be compatible
> with "be,bt1-axi" and "simple-bus" drivers, should have reg property with
> AXI-bus QOS registers space, syscon phandle reference to the Baikal-T1
> System Controller, IRQ line declared, AXI Interconnect reference clock and
> reset line.
> 
> Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
> Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
> Cc: Paul Burton <paulburton@kernel.org>
> Cc: Ralf Baechle <ralf@linux-mips.org>
> Cc: Tony Lindgren <tony@atomide.com>
> Cc: Tero Kristo <t-kristo@ti.com>
> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> Cc: Jeffrey Hugo <jhugo@codeaurora.org>
> Cc: Linus Walleij <linus.walleij@linaro.org>
> Cc: Olof Johansson <olof@lixom.net>
> Cc: linux-mips@vger.kernel.org
> Cc: soc@kernel.org
> 
> ---
> 
> Rob, I had to remove your Reviewed-by tag, since new changes had been
> introduced.
> 
> Changelog v2:
> - Move driver to the bus subsystem.
> - Use dual GPL/BSD license.
> - Use single lined copyright header.
> - Lowercase the unit-address.
> - Convert a simple EHB block binding to the Baikal-T1 AXI-bus one with
>   interconnect capabilities support.
> - Replace "additionalProperties: false" property with
>   "unevaluatedProperties: false".
> - Add AXI reference clock and reset support.
> - Add syscon phandle reference to the Baikal-T1 System Controller node.
> ---
>  .../bindings/bus/baikal,bt1-axi.yaml          | 95 +++++++++++++++++++
>  1 file changed, 95 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/bus/baikal,bt1-axi.yaml
> 

Reviewed-by: Rob Herring <robh@kernel.org>

  reply	other threads:[~2020-05-15  3:13 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-06 13:07 [PATCH 0/6] soc: Add Baikal-T1 SoC APB/AXI EHB and L2-cache drivers Sergey.Semin
2020-03-06 15:19 ` Arnd Bergmann
2020-03-12 21:25   ` Rob Herring
2020-04-01 15:32     ` Sergey Semin
2020-03-26 14:12   ` Arnd Bergmann
2020-04-01 15:37     ` Sergey Semin
2020-03-12 21:26 ` Rob Herring
     [not found] ` <20200306153246.9373B80307C4@mail.baikalelectronics.ru>
2020-04-01 15:06   ` Sergey Semin
2020-04-01 19:10     ` Arnd Bergmann
2020-04-01 21:52       ` Sergey Semin
2020-05-07 22:41 ` [PATCH v2 0/4] bus: Add Baikal-T1 SoC APB/AXI bus drivers Serge Semin
2020-05-07 22:41   ` [PATCH v2 1/4] dt-bindings: bus: Add Baikal-T1 AXI-bus binding Serge Semin
2020-05-15  3:13     ` Rob Herring [this message]
2020-05-07 22:41   ` [PATCH v2 2/4] dt-bindings: bus: Add Baikal-T1 APB-bus binding Serge Semin
2020-05-15  3:13     ` Rob Herring
2020-05-07 22:41   ` [PATCH v2 3/4] bus: Add Baikal-T1 AXI-bus driver Serge Semin
2020-05-07 22:41   ` [PATCH v2 4/4] bus: Add Baikal-T1 APB-bus driver Serge Semin
2020-05-07 23:07 ` [PATCH v2 0/2] memory: Add Baikal-T1 L2-cache driver Serge Semin
2020-05-07 23:07   ` [PATCH v2 1/2] dt-bindings: memory: Add Baikal-T1 L2-cache Control Block binding Serge Semin
2020-05-11 15:38     ` Rob Herring
2020-05-11 20:25       ` Serge Semin
     [not found]         ` <CAL_JsqJEZF5xkNGGiBy5rgUFfg=hWp6qi=tzFW84cGD9m-p5SA@mail.gmail.com>
2020-05-12 18:31           ` Serge Semin
     [not found]     ` <CAL_Jsq+rka7hXVy46=O3pTrN0DLCAQQ=TSpSqzoB2dxb30h66g@mail.gmail.com>
2020-05-12 18:25       ` Serge Semin
2020-05-19 12:27     ` Serge Semin
2020-05-07 23:07   ` [PATCH v2 2/2] memory: Add Baikal-T1 L2-cache Control Block driver Serge Semin

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