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From: "Lisovskiy, Stanislav" <stanislav.lisovskiy@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 3/4] Revert "drm/i915: Nuke skl_ddb_get_hw_state()"
Date: Mon, 18 May 2020 17:44:25 +0300	[thread overview]
Message-ID: <20200518144425.GB13077@intel.com> (raw)
In-Reply-To: <20200518122303.28083-3-ville.syrjala@linux.intel.com>

On Mon, May 18, 2020 at 03:23:02PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Dbuf slice tracking busted across runtime PM. Back to the
> drawing board.
> 
> This reverts commit 0cde0e0ff5f5ebd27507069250728c763c14ac81.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 7 +++++++
>  drivers/gpu/drm/i915/intel_pm.h | 1 +
>  2 files changed, 8 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index a92d57d9b759..cb57786fdc9f 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4315,6 +4315,12 @@ void skl_pipe_ddb_get_hw_state(struct intel_crtc *crtc,
>  	intel_display_power_put(dev_priv, power_domain, wakeref);
>  }
>  
> +void skl_ddb_get_hw_state(struct drm_i915_private *dev_priv)
> +{
> +	dev_priv->dbuf.enabled_slices =
> +		intel_enabled_dbuf_slices_mask(dev_priv);
> +}
> +

Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>

>  /*
>   * Determines the downscale amount of a plane for the purposes of watermark calculations.
>   * The bspec defines downscale amount as:
> @@ -6175,6 +6181,7 @@ void skl_wm_get_hw_state(struct drm_i915_private *dev_priv)
>  	struct intel_crtc *crtc;
>  	struct intel_crtc_state *crtc_state;
>  
> +	skl_ddb_get_hw_state(dev_priv);
>  	for_each_intel_crtc(&dev_priv->drm, crtc) {
>  		crtc_state = to_intel_crtc_state(crtc->base.state);
>  
> diff --git a/drivers/gpu/drm/i915/intel_pm.h b/drivers/gpu/drm/i915/intel_pm.h
> index 3fcc9b6e2cbf..9f75ac4c2bd1 100644
> --- a/drivers/gpu/drm/i915/intel_pm.h
> +++ b/drivers/gpu/drm/i915/intel_pm.h
> @@ -39,6 +39,7 @@ u8 intel_enabled_dbuf_slices_mask(struct drm_i915_private *dev_priv);
>  void skl_pipe_ddb_get_hw_state(struct intel_crtc *crtc,
>  			       struct skl_ddb_entry *ddb_y,
>  			       struct skl_ddb_entry *ddb_uv);
> +void skl_ddb_get_hw_state(struct drm_i915_private *dev_priv);
>  void skl_pipe_wm_get_hw_state(struct intel_crtc *crtc,
>  			      struct skl_pipe_wm *out);
>  void g4x_wm_sanitize(struct drm_i915_private *dev_priv);
> -- 
> 2.26.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
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  reply	other threads:[~2020-05-18 14:48 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-18 12:23 [Intel-gfx] [PATCH 1/4] Revert "drm/i915: Clean up dbuf debugs during .atomic_check()" Ville Syrjala
2020-05-18 12:23 ` [Intel-gfx] [PATCH 2/4] Revert "drm/i915: Move the dbuf pre/post plane update" Ville Syrjala
2020-05-18 14:42   ` Lisovskiy, Stanislav
2020-05-18 12:23 ` [Intel-gfx] [PATCH 3/4] Revert "drm/i915: Nuke skl_ddb_get_hw_state()" Ville Syrjala
2020-05-18 14:44   ` Lisovskiy, Stanislav [this message]
2020-05-18 12:23 ` [Intel-gfx] [PATCH 4/4] Revert "drm/i915: Introduce proper dbuf state" Ville Syrjala
2020-05-18 14:28   ` Lisovskiy, Stanislav
2020-05-18 13:42 ` [Intel-gfx] [PATCH 1/4] Revert "drm/i915: Clean up dbuf debugs during .atomic_check()" Lisovskiy, Stanislav
2020-05-18 14:59 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] " Patchwork
2020-05-18 15:29 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork

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