From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F285DC433DF for ; Wed, 20 May 2020 20:32:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BF8FF207E8 for ; Wed, 20 May 2020 20:32:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1590006763; bh=cBQJaqL5hdpUynwTPIUnnyHFxgD5XUvMjrGpFvjOll8=; h=Date:From:To:Cc:Subject:References:In-Reply-To:List-ID:From; b=UgelrtFyn7CXpruwmIz7kCvo7wZrznPHFUPz6TJN184KeNaHalbTd5XHm3YgYzkw/ KV9N4nFzL7xI4zh/7KANANilbdeNgrufmsn0HJaU80X44sfY+RPFCCes6ovhDiTDb1 0K5LuF3mpSJyUHygCQLp4Wcg3wCIjnpoeT0BKVDk= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727000AbgETUcn (ORCPT ); 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Wed, 20 May 2020 13:32:41 -0700 (PDT) Received: from xps15 ([64.188.179.252]) by smtp.gmail.com with ESMTPSA id d12sm1884632ill.80.2020.05.20.13.32.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 May 2020 13:32:40 -0700 (PDT) Received: (nullmailer pid 503923 invoked by uid 1000); Wed, 20 May 2020 20:32:39 -0000 Date: Wed, 20 May 2020 14:32:39 -0600 From: Rob Herring To: Xiaowei Bao Cc: roy.zang@nxp.com, robh+dt@kernel.org, linux-kernel@vger.kernel.org, Zhiqiang.Hou@nxp.com, jingoohan1@gmail.com, devicetree@vger.kernel.org, gustavo.pimentel@synopsys.com, Minghuan.Lian@nxp.com, mingkai.hu@nxp.com, linux-arm-kernel@lists.infradead.org, leoyang.li@nxp.com, shawnguo@kernel.org, andrew.murray@arm.com, linux-pci@vger.kernel.org, bhelgaas@google.com, lorenzo.pieralisi@arm.com, kishon@ti.com, linuxppc-dev@lists.ozlabs.org, amurray@thegoodpenguin.co.uk Subject: Re: [PATCH v6 01/11] PCI: designware-ep: Add multiple PFs support for DWC Message-ID: <20200520203239.GA503864@bogus> References: <20200314033038.24844-1-xiaowei.bao@nxp.com> <20200314033038.24844-2-xiaowei.bao@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200314033038.24844-2-xiaowei.bao@nxp.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On Sat, 14 Mar 2020 11:30:28 +0800, Xiaowei Bao wrote: > Add multiple PFs support for DWC, due to different PF have different > config space, we use func_conf_select callback function to access > the different PF's config space, the different chip company need to > implement this callback function when use the DWC IP core and intend > to support multiple PFs feature. > > Signed-off-by: Xiaowei Bao > Acked-by: Gustavo Pimentel > --- > v2: > - Remove duplicate redundant code. > - Reimplement the PF config space access way. > v3: > - Integrate duplicate code for func_select. > - Move PCIE_ATU_FUNC_NUM(pf) (pf << 20) to ((pf) << 20). > - Add the comments for func_conf_select function. > v4: > - Correct the commit message. > v5: > - No change. > v6: > - No change. > > drivers/pci/controller/dwc/pcie-designware-ep.c | 123 ++++++++++++++++-------- > drivers/pci/controller/dwc/pcie-designware.c | 59 ++++++++---- > drivers/pci/controller/dwc/pcie-designware.h | 18 +++- > 3 files changed, 142 insertions(+), 58 deletions(-) > Reviewed-by: Rob Herring From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.0 required=3.0 tests=MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8BE88C433E0 for ; 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Wed, 20 May 2020 13:32:41 -0700 (PDT) Received: from xps15 ([64.188.179.252]) by smtp.gmail.com with ESMTPSA id d12sm1884632ill.80.2020.05.20.13.32.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 May 2020 13:32:40 -0700 (PDT) Received: (nullmailer pid 503923 invoked by uid 1000); Wed, 20 May 2020 20:32:39 -0000 Date: Wed, 20 May 2020 14:32:39 -0600 From: Rob Herring To: Xiaowei Bao Subject: Re: [PATCH v6 01/11] PCI: designware-ep: Add multiple PFs support for DWC Message-ID: <20200520203239.GA503864@bogus> References: <20200314033038.24844-1-xiaowei.bao@nxp.com> <20200314033038.24844-2-xiaowei.bao@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200314033038.24844-2-xiaowei.bao@nxp.com> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: roy.zang@nxp.com, lorenzo.pieralisi@arm.com, devicetree@vger.kernel.org, jingoohan1@gmail.com, Zhiqiang.Hou@nxp.com, linuxppc-dev@lists.ozlabs.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, leoyang.li@nxp.com, Minghuan.Lian@nxp.com, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, gustavo.pimentel@synopsys.com, bhelgaas@google.com, andrew.murray@arm.com, kishon@ti.com, shawnguo@kernel.org, mingkai.hu@nxp.com, amurray@thegoodpenguin.co.uk Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Sat, 14 Mar 2020 11:30:28 +0800, Xiaowei Bao wrote: > Add multiple PFs support for DWC, due to different PF have different > config space, we use func_conf_select callback function to access > the different PF's config space, the different chip company need to > implement this callback function when use the DWC IP core and intend > to support multiple PFs feature. > > Signed-off-by: Xiaowei Bao > Acked-by: Gustavo Pimentel > --- > v2: > - Remove duplicate redundant code. > - Reimplement the PF config space access way. > v3: > - Integrate duplicate code for func_select. > - Move PCIE_ATU_FUNC_NUM(pf) (pf << 20) to ((pf) << 20). > - Add the comments for func_conf_select function. > v4: > - Correct the commit message. > v5: > - No change. > v6: > - No change. > > drivers/pci/controller/dwc/pcie-designware-ep.c | 123 ++++++++++++++++-------- > drivers/pci/controller/dwc/pcie-designware.c | 59 ++++++++---- > drivers/pci/controller/dwc/pcie-designware.h | 18 +++- > 3 files changed, 142 insertions(+), 58 deletions(-) > Reviewed-by: Rob Herring From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.0 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BDE95C433E0 for ; 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Wed, 20 May 2020 13:32:40 -0700 (PDT) Received: (nullmailer pid 503923 invoked by uid 1000); Wed, 20 May 2020 20:32:39 -0000 Date: Wed, 20 May 2020 14:32:39 -0600 From: Rob Herring To: Xiaowei Bao Subject: Re: [PATCH v6 01/11] PCI: designware-ep: Add multiple PFs support for DWC Message-ID: <20200520203239.GA503864@bogus> References: <20200314033038.24844-1-xiaowei.bao@nxp.com> <20200314033038.24844-2-xiaowei.bao@nxp.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200314033038.24844-2-xiaowei.bao@nxp.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200520_133243_127148_108C5540 X-CRM114-Status: GOOD ( 11.90 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: roy.zang@nxp.com, lorenzo.pieralisi@arm.com, devicetree@vger.kernel.org, jingoohan1@gmail.com, Zhiqiang.Hou@nxp.com, linuxppc-dev@lists.ozlabs.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, leoyang.li@nxp.com, Minghuan.Lian@nxp.com, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, gustavo.pimentel@synopsys.com, bhelgaas@google.com, andrew.murray@arm.com, kishon@ti.com, shawnguo@kernel.org, mingkai.hu@nxp.com, amurray@thegoodpenguin.co.uk Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Sat, 14 Mar 2020 11:30:28 +0800, Xiaowei Bao wrote: > Add multiple PFs support for DWC, due to different PF have different > config space, we use func_conf_select callback function to access > the different PF's config space, the different chip company need to > implement this callback function when use the DWC IP core and intend > to support multiple PFs feature. > > Signed-off-by: Xiaowei Bao > Acked-by: Gustavo Pimentel > --- > v2: > - Remove duplicate redundant code. > - Reimplement the PF config space access way. > v3: > - Integrate duplicate code for func_select. > - Move PCIE_ATU_FUNC_NUM(pf) (pf << 20) to ((pf) << 20). > - Add the comments for func_conf_select function. > v4: > - Correct the commit message. > v5: > - No change. > v6: > - No change. > > drivers/pci/controller/dwc/pcie-designware-ep.c | 123 ++++++++++++++++-------- > drivers/pci/controller/dwc/pcie-designware.c | 59 ++++++++---- > drivers/pci/controller/dwc/pcie-designware.h | 18 +++- > 3 files changed, 142 insertions(+), 58 deletions(-) > Reviewed-by: Rob Herring _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel