From: kbuild test robot <lkp@intel.com>
To: kbuild-all@lists.01.org
Subject: Re: [PATCH v4 4/7] clocksource: dw_apb_timer: Set clockevent any-possible-CPU mask
Date: Thu, 21 May 2020 13:09:55 +0800 [thread overview]
Message-ID: <202005211330.2153YxPi%lkp@intel.com> (raw)
In-Reply-To: <20200521005321.12129-5-Sergey.Semin@baikalelectronics.ru>
[-- Attachment #1: Type: text/plain, Size: 10836 bytes --]
Hi Serge,
I love your patch! Perhaps something to improve:
[auto build test WARNING on tip/timers/core]
[also build test WARNING on abelloni/rtc-next tip/irq/core linus/master v5.7-rc6 next-20200519]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
url: https://github.com/0day-ci/linux/commits/Serge-Semin/clocksource-Fix-MIPS-GIC-and-DW-APB-Timer-for-Baikal-T1-SoC-support/20200521-085612
base: https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git 4479730e9263befbb9ce9563a09563db2acb8f7c
config: x86_64-allmodconfig (attached as .config)
compiler: gcc-7 (Ubuntu 7.5.0-6ubuntu2) 7.5.0
reproduce:
# apt-get install sparse
# sparse version: v0.6.1-193-gb8fad4bc-dirty
# save the attached .config to linux build tree
make W=1 C=1 ARCH=x86_64 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__'
If you fix the issue, kindly add following tag as appropriate
Reported-by: kbuild test robot <lkp@intel.com>
sparse warnings: (new ones prefixed by >>)
>> arch/x86/kernel/apb_timer.c:147:46: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected char const *name @@ got intchar const *name @@
>> arch/x86/kernel/apb_timer.c:147:46: sparse: expected char const *name
>> arch/x86/kernel/apb_timer.c:147:46: sparse: got int [assigned] pscr_ret__
>> arch/x86/kernel/apb_timer.c:147:66: sparse: sparse: incorrect type in argument 2 (different base types) @@ expected unsigned int rating @@ got d int rating @@
>> arch/x86/kernel/apb_timer.c:147:66: sparse: expected unsigned int rating
>> arch/x86/kernel/apb_timer.c:147:66: sparse: got char *
>> arch/x86/kernel/apb_timer.c:148:71: sparse: sparse: incorrect type in argument 3 (different base types) @@ expected void [noderef] <asn:2> *base @@ got > *base @@
>> arch/x86/kernel/apb_timer.c:148:71: sparse: expected void [noderef] <asn:2> *base
>> arch/x86/kernel/apb_timer.c:148:71: sparse: got int
>> arch/x86/kernel/apb_timer.c:150:31: sparse: sparse: incorrect type in argument 4 (different base types) @@ expected int irq @@ got void [noderef] <asn:int irq @@
>> arch/x86/kernel/apb_timer.c:150:31: sparse: expected int irq
>> arch/x86/kernel/apb_timer.c:150:31: sparse: got void [noderef] <asn:2> *
>> arch/x86/kernel/apb_timer.c:147:45: sparse: sparse: too many arguments for function dw_apb_clockevent_init
arch/x86/kernel/apb_timer.c:187:54: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected char const *name @@ got intchar const *name @@
arch/x86/kernel/apb_timer.c:187:54: sparse: expected char const *name
>> arch/x86/kernel/apb_timer.c:187:54: sparse: got int [assigned] cpu
arch/x86/kernel/apb_timer.c:187:59: sparse: sparse: incorrect type in argument 2 (different base types) @@ expected unsigned int rating @@ got d int rating @@
arch/x86/kernel/apb_timer.c:187:59: sparse: expected unsigned int rating
arch/x86/kernel/apb_timer.c:187:59: sparse: got char *
arch/x86/kernel/apb_timer.c:188:25: sparse: sparse: incorrect type in argument 3 (different base types) @@ expected void [noderef] <asn:2> *base @@ got > *base @@
arch/x86/kernel/apb_timer.c:188:25: sparse: expected void [noderef] <asn:2> *base
arch/x86/kernel/apb_timer.c:188:25: sparse: got int
arch/x86/kernel/apb_timer.c:188:63: sparse: sparse: incorrect type in argument 4 (different base types) @@ expected int irq @@ got void [noderef] <asn:int irq @@
arch/x86/kernel/apb_timer.c:188:63: sparse: expected int irq
arch/x86/kernel/apb_timer.c:188:63: sparse: got void [noderef] <asn:2> *
arch/x86/kernel/apb_timer.c:187:53: sparse: sparse: too many arguments for function dw_apb_clockevent_init
>> arch/x86/kernel/apb_timer.c:147:46: sparse: sparse: non size-preserving integer to pointer cast
>> arch/x86/kernel/apb_timer.c:147:66: sparse: sparse: non size-preserving pointer to integer cast
arch/x86/kernel/apb_timer.c:187:54: sparse: sparse: non size-preserving integer to pointer cast
arch/x86/kernel/apb_timer.c:187:59: sparse: sparse: non size-preserving pointer to integer cast
vim +147 arch/x86/kernel/apb_timer.c
bb24c4716185f6 Jacob Pan 2009-09-02 133
bb24c4716185f6 Jacob Pan 2009-09-02 134 static int __init apbt_clockevent_register(void)
bb24c4716185f6 Jacob Pan 2009-09-02 135 {
bb24c4716185f6 Jacob Pan 2009-09-02 136 struct sfi_timer_table_entry *mtmr;
89cbc76768c2fa Christoph Lameter 2014-08-17 137 struct apbt_dev *adev = this_cpu_ptr(&cpu_apbt_dev);
bb24c4716185f6 Jacob Pan 2009-09-02 138
bb24c4716185f6 Jacob Pan 2009-09-02 139 mtmr = sfi_get_mtmr(APBT_CLOCKEVENT0_NUM);
bb24c4716185f6 Jacob Pan 2009-09-02 140 if (mtmr == NULL) {
bb24c4716185f6 Jacob Pan 2009-09-02 141 printk(KERN_ERR "Failed to get MTMR %d from SFI\n",
bb24c4716185f6 Jacob Pan 2009-09-02 142 APBT_CLOCKEVENT0_NUM);
bb24c4716185f6 Jacob Pan 2009-09-02 143 return -ENODEV;
bb24c4716185f6 Jacob Pan 2009-09-02 144 }
bb24c4716185f6 Jacob Pan 2009-09-02 145
3010673ef5f7be Jacob Pan 2010-03-02 146 adev->num = smp_processor_id();
06c3df49521c1b Jamie Iles 2011-06-06 @147 adev->timer = dw_apb_clockevent_init(smp_processor_id(), "apbt0",
712b6aa8731a7e Kuppuswamy Sathyanarayanan 2013-10-17 @148 intel_mid_timer_options == INTEL_MID_TIMER_LAPIC_APBT ?
06c3df49521c1b Jamie Iles 2011-06-06 149 APBT_CLOCKEVENT_RATING - 100 : APBT_CLOCKEVENT_RATING,
06c3df49521c1b Jamie Iles 2011-06-06 @150 adev_virt_addr(adev), 0, apbt_freq);
06c3df49521c1b Jamie Iles 2011-06-06 151 /* Firmware does EOI handling for us. */
06c3df49521c1b Jamie Iles 2011-06-06 152 adev->timer->eoi = NULL;
bb24c4716185f6 Jacob Pan 2009-09-02 153
712b6aa8731a7e Kuppuswamy Sathyanarayanan 2013-10-17 154 if (intel_mid_timer_options == INTEL_MID_TIMER_LAPIC_APBT) {
06c3df49521c1b Jamie Iles 2011-06-06 155 global_clock_event = &adev->timer->ced;
bb24c4716185f6 Jacob Pan 2009-09-02 156 printk(KERN_DEBUG "%s clockevent registered as global\n",
bb24c4716185f6 Jacob Pan 2009-09-02 157 global_clock_event->name);
bb24c4716185f6 Jacob Pan 2009-09-02 158 }
bb24c4716185f6 Jacob Pan 2009-09-02 159
06c3df49521c1b Jamie Iles 2011-06-06 160 dw_apb_clockevent_register(adev->timer);
bb24c4716185f6 Jacob Pan 2009-09-02 161
bb24c4716185f6 Jacob Pan 2009-09-02 162 sfi_free_mtmr(mtmr);
bb24c4716185f6 Jacob Pan 2009-09-02 163 return 0;
bb24c4716185f6 Jacob Pan 2009-09-02 164 }
bb24c4716185f6 Jacob Pan 2009-09-02 165
bb24c4716185f6 Jacob Pan 2009-09-02 166 #ifdef CONFIG_SMP
a5ef2e70405c8a Thomas Gleixner 2010-09-28 167
a5ef2e70405c8a Thomas Gleixner 2010-09-28 168 static void apbt_setup_irq(struct apbt_dev *adev)
a5ef2e70405c8a Thomas Gleixner 2010-09-28 169 {
a5ef2e70405c8a Thomas Gleixner 2010-09-28 170 irq_modify_status(adev->irq, 0, IRQ_MOVE_PCNTXT);
e4d2ebcab11b30 Feng Tang 2010-12-03 171 irq_set_affinity(adev->irq, cpumask_of(adev->cpu));
a5ef2e70405c8a Thomas Gleixner 2010-09-28 172 }
a5ef2e70405c8a Thomas Gleixner 2010-09-28 173
bb24c4716185f6 Jacob Pan 2009-09-02 174 /* Should be called with per cpu */
bb24c4716185f6 Jacob Pan 2009-09-02 175 void apbt_setup_secondary_clock(void)
bb24c4716185f6 Jacob Pan 2009-09-02 176 {
bb24c4716185f6 Jacob Pan 2009-09-02 177 struct apbt_dev *adev;
bb24c4716185f6 Jacob Pan 2009-09-02 178 int cpu;
bb24c4716185f6 Jacob Pan 2009-09-02 179
bb24c4716185f6 Jacob Pan 2009-09-02 180 /* Don't register boot CPU clockevent */
bb24c4716185f6 Jacob Pan 2009-09-02 181 cpu = smp_processor_id();
f6e9456c9272bb Robert Richter 2010-07-21 182 if (!cpu)
bb24c4716185f6 Jacob Pan 2009-09-02 183 return;
bb24c4716185f6 Jacob Pan 2009-09-02 184
89cbc76768c2fa Christoph Lameter 2014-08-17 185 adev = this_cpu_ptr(&cpu_apbt_dev);
06c3df49521c1b Jamie Iles 2011-06-06 186 if (!adev->timer) {
06c3df49521c1b Jamie Iles 2011-06-06 @187 adev->timer = dw_apb_clockevent_init(cpu, adev->name,
06c3df49521c1b Jamie Iles 2011-06-06 188 APBT_CLOCKEVENT_RATING, adev_virt_addr(adev),
06c3df49521c1b Jamie Iles 2011-06-06 189 adev->irq, apbt_freq);
06c3df49521c1b Jamie Iles 2011-06-06 190 adev->timer->eoi = NULL;
06c3df49521c1b Jamie Iles 2011-06-06 191 } else {
06c3df49521c1b Jamie Iles 2011-06-06 192 dw_apb_clockevent_resume(adev->timer);
06c3df49521c1b Jamie Iles 2011-06-06 193 }
bb24c4716185f6 Jacob Pan 2009-09-02 194
06c3df49521c1b Jamie Iles 2011-06-06 195 printk(KERN_INFO "Registering CPU %d clockevent device %s, cpu %08x\n",
06c3df49521c1b Jamie Iles 2011-06-06 196 cpu, adev->name, adev->cpu);
bb24c4716185f6 Jacob Pan 2009-09-02 197
bb24c4716185f6 Jacob Pan 2009-09-02 198 apbt_setup_irq(adev);
06c3df49521c1b Jamie Iles 2011-06-06 199 dw_apb_clockevent_register(adev->timer);
bb24c4716185f6 Jacob Pan 2009-09-02 200
bb24c4716185f6 Jacob Pan 2009-09-02 201 return;
bb24c4716185f6 Jacob Pan 2009-09-02 202 }
bb24c4716185f6 Jacob Pan 2009-09-02 203
:::::: The code at line 147 was first introduced by commit
:::::: 06c3df49521c1b112b777cc4946e5de057c814ba clocksource: apb: Share APB timer code with other platforms
:::::: TO: Jamie Iles <jamie@jamieiles.com>
:::::: CC: John Stultz <john.stultz@linaro.org>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 73135 bytes --]
next prev parent reply other threads:[~2020-05-21 5:09 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-21 0:53 [PATCH v4 0/7] clocksource: Fix MIPS GIC and DW APB Timer for Baikal-T1 SoC support Serge Semin
2020-05-21 0:53 ` [PATCH v4 1/7] dt-bindings: rtc: Convert snps,dw-apb-timer to DT schema Serge Semin
2020-05-21 0:53 ` [PATCH v4 2/7] dt-bindings: timer: Move snps,dw-apb-timer DT schema from rtc Serge Semin
2020-05-21 0:53 ` [PATCH v4 3/7] dt-bindings: interrupt-controller: Convert mti,gic to DT schema Serge Semin
2020-05-21 0:53 ` [PATCH v4 4/7] clocksource: dw_apb_timer: Set clockevent any-possible-CPU mask Serge Semin
2020-05-21 4:14 ` kbuild test robot
2020-05-21 5:09 ` kbuild test robot [this message]
2020-05-21 15:04 ` Serge Semin
2020-05-21 0:53 ` [PATCH v4 5/7] clocksource: dw_apb_timer_of: Fix missing clockevent timers Serge Semin
2020-05-21 0:53 ` [PATCH v4 6/7] clocksource: mips-gic-timer: Register as sched_clock Serge Semin
2020-05-21 0:53 ` [PATCH v4 7/7] clocksource: mips-gic-timer: Mark GIC timer as unstable if ref clock changes Serge Semin
2020-05-21 9:09 ` Geert Uytterhoeven
2020-05-21 14:22 ` Serge Semin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=202005211330.2153YxPi%lkp@intel.com \
--to=lkp@intel.com \
--cc=kbuild-all@lists.01.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.