From: kbuild test robot <lkp@intel.com>
To: kbuild-all@lists.01.org
Subject: [lpieralisi-pci:pci/mips 2/3] drivers/pci/controller/pci-loongson.c:120:15: warning: no previous prototype for function 'pci_loongson_map_bus'
Date: Sun, 24 May 2020 22:16:35 +0800 [thread overview]
Message-ID: <202005242231.UnMB2STC%lkp@intel.com> (raw)
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tree: https://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/pci.git pci/mips
head: 783399b028bd386a2969d3d0a292afc48260ab70
commit: b73ad3d4e22e3466ebc8af1f2e04b307b729eb05 [2/3] PCI: Add Loongson PCI Controller support
config: x86_64-allyesconfig (attached as .config)
compiler: clang version 11.0.0 (https://github.com/llvm/llvm-project 3393cc4cebf9969db94dc424b7a2b6195589c33b)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install x86_64 cross compiling tool for clang build
# apt-get install binutils-x86-64-linux-gnu
git checkout b73ad3d4e22e3466ebc8af1f2e04b307b729eb05
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kbuild test robot <lkp@intel.com>
All warnings (new ones prefixed by >>, old ones prefixed by <<):
drivers/pci/controller/pci-loongson.c:49:6: warning: unused variable 'tmp' [-Wunused-variable]
u16 tmp;
^
>> drivers/pci/controller/pci-loongson.c:120:15: warning: no previous prototype for function 'pci_loongson_map_bus' [-Wmissing-prototypes]
void __iomem *pci_loongson_map_bus(struct pci_bus *bus, unsigned int devfn,
^
drivers/pci/controller/pci-loongson.c:120:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
void __iomem *pci_loongson_map_bus(struct pci_bus *bus, unsigned int devfn,
^
static
2 warnings generated.
vim +/pci_loongson_map_bus +120 drivers/pci/controller/pci-loongson.c
119
> 120 void __iomem *pci_loongson_map_bus(struct pci_bus *bus, unsigned int devfn,
121 int where)
122 {
123 unsigned char busnum = bus->number;
124 struct pci_host_bridge *bridge = pci_find_host_bridge(bus);
125 struct loongson_pci *priv = pci_host_bridge_priv(bridge);
126
127 /*
128 * Do not read more than one device on the bus other than
129 * the host bus. For our hardware the root bus is always bus 0.
130 */
131 if (priv->flags & FLAG_DEV_FIX && busnum != 0 &&
132 PCI_SLOT(devfn) > 0)
133 return NULL;
134
135 /* CFG0 can only access standard space */
136 if (where < PCI_CFG_SPACE_SIZE && priv->cfg0_base)
137 return cfg0_map(priv, busnum, devfn, where);
138
139 /* CFG1 can access extended space */
140 if (where < PCI_CFG_SPACE_EXP_SIZE && priv->cfg1_base)
141 return cfg1_map(priv, busnum, devfn, where);
142
143 return NULL;
144 }
145
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
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reply other threads:[~2020-05-24 14:16 UTC|newest]
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