From: Kees Cook <keescook@chromium.org>
To: Andi Kleen <ak@linux.intel.com>
Cc: Greg KH <gregkh@linuxfoundation.org>,
Andi Kleen <andi@firstfloor.org>,
x86@kernel.org, linux-kernel@vger.kernel.org, sashal@kernel.org,
stable@vger.kernel.org
Subject: Re: [PATCH v1] x86: Pin cr4 FSGSBASE
Date: Tue, 26 May 2020 09:20:31 -0700 [thread overview]
Message-ID: <202005260918.72DE289@keescook> (raw)
In-Reply-To: <20200526154835.GW499505@tassilo.jf.intel.com>
On Tue, May 26, 2020 at 08:48:35AM -0700, Andi Kleen wrote:
> On Tue, May 26, 2020 at 08:56:18AM +0200, Greg KH wrote:
> > On Mon, May 25, 2020 at 10:28:48PM -0700, Andi Kleen wrote:
> > > + if (val & X86_CR4_FSGSBASE) {
> > > + WARN_ONCE(1, "CR4 unexpectedly set FSGSBASE!?\n");
> >
> > What about those systems that panic-on-warn?
>
> I assume they're ok with "panic on root hole"
Exactly. :) The pinning infrastructure is pretty small; will that just
get backported? (Also, we can probably rework the pinning to avoid the
special-casing and use a mask/value pair to notice a bit getting turned
_on_ as well...)
--
Kees Cook
next prev parent reply other threads:[~2020-05-26 16:20 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-26 5:28 [PATCH v1] x86: Pin cr4 FSGSBASE Andi Kleen
2020-05-26 6:56 ` Greg KH
2020-05-26 7:57 ` Peter Zijlstra
2020-05-26 8:17 ` Greg KH
2020-05-26 9:17 ` Peter Zijlstra
2020-05-26 10:16 ` Greg KH
2020-05-26 15:48 ` Andi Kleen
2020-05-26 16:20 ` Kees Cook [this message]
2020-05-26 16:32 ` Greg KH
2020-05-26 17:24 ` Wojtek Porczyk
2020-05-27 7:07 ` Greg KH
2020-05-27 10:58 ` Wojtek Porczyk
2020-05-26 16:15 ` Kees Cook
2020-05-26 21:16 ` Greg KH
2020-05-26 16:38 ` Kees Cook
2020-05-26 23:14 ` Andi Kleen
2020-05-27 10:31 ` Peter Zijlstra
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