From: Boris Brezillon <boris.brezillon@collabora.com>
To: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Michal Simek <monstr@monstr.eu>,
Vignesh Raghavendra <vigneshr@ti.com>,
Tudor Ambarus <Tudor.Ambarus@microchip.com>,
Richard Weinberger <richard@nod.at>,
Naga Sureshkumar Relli <nagasure@xilinx.com>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
linux-mtd@lists.infradead.org
Subject: Re: [PATCH v7 18/28] mtd: rawnand: Hide the chip->data_interface indirection
Date: Fri, 29 May 2020 13:26:31 +0200 [thread overview]
Message-ID: <20200529132631.38e802cc@collabora.com> (raw)
In-Reply-To: <20200529111322.7184-19-miquel.raynal@bootlin.com>
On Fri, 29 May 2020 13:13:12 +0200
Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> As a preparation for allocating the data interface structure
> dynamically (and rename it), let's avoid accessing
> chip->data_interface directly.
>
> Instead, we introduce a helper, nand_get_interface_config(), and use
> it to retrieve the current data interface configuration out of a
> nand_chip object.
>
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
> ---
> drivers/mtd/nand/raw/marvell_nand.c | 9 ++++---
> drivers/mtd/nand/raw/meson_nand.c | 8 +++---
> drivers/mtd/nand/raw/nand_base.c | 34 +++++++++++++-------------
> drivers/mtd/nand/raw/nand_legacy.c | 5 +++-
> drivers/mtd/nand/raw/nand_toshiba.c | 2 +-
> drivers/mtd/nand/raw/stm32_fmc2_nand.c | 2 +-
> include/linux/mtd/rawnand.h | 11 +++++++++
> 7 files changed, 44 insertions(+), 27 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/marvell_nand.c b/drivers/mtd/nand/raw/marvell_nand.c
> index 260a0430313e..df859889e4eb 100644
> --- a/drivers/mtd/nand/raw/marvell_nand.c
> +++ b/drivers/mtd/nand/raw/marvell_nand.c
> @@ -1096,6 +1096,8 @@ static int marvell_nfc_hw_ecc_hmg_do_write_page(struct nand_chip *chip,
> const u8 *oob_buf, bool raw,
> int page)
> {
> + const struct nand_sdr_timings *sdr =
> + nand_get_sdr_timings(nand_get_interface_config(chip));
> struct marvell_nand_chip *marvell_nand = to_marvell_nand(chip);
> struct marvell_nfc *nfc = to_marvell_nfc(chip->controller);
> const struct marvell_hw_ecc_layout *lt = to_marvell_nand(chip)->layout;
> @@ -1141,7 +1143,7 @@ static int marvell_nfc_hw_ecc_hmg_do_write_page(struct nand_chip *chip,
> return ret;
>
> ret = marvell_nfc_wait_op(chip,
> - PSEC_TO_MSEC(chip->data_interface.timings.sdr.tPROG_max));
> + PSEC_TO_MSEC(sdr->tPROG_max));
> return ret;
> }
>
> @@ -1562,6 +1564,8 @@ static int marvell_nfc_hw_ecc_bch_write_page(struct nand_chip *chip,
> const u8 *buf,
> int oob_required, int page)
> {
> + const struct nand_sdr_timings *sdr =
> + nand_get_sdr_timings(nand_get_interface_config(chip));
> struct mtd_info *mtd = nand_to_mtd(chip);
> const struct marvell_hw_ecc_layout *lt = to_marvell_nand(chip)->layout;
> const u8 *data = buf;
> @@ -1598,8 +1602,7 @@ static int marvell_nfc_hw_ecc_bch_write_page(struct nand_chip *chip,
> marvell_nfc_wait_ndrun(chip);
> }
>
> - ret = marvell_nfc_wait_op(chip,
> - PSEC_TO_MSEC(chip->data_interface.timings.sdr.tPROG_max));
> + ret = marvell_nfc_wait_op(chip, PSEC_TO_MSEC(sdr->tPROG_max));
>
> marvell_nfc_disable_hw_ecc(chip);
>
> diff --git a/drivers/mtd/nand/raw/meson_nand.c b/drivers/mtd/nand/raw/meson_nand.c
> index 3f376471f3f7..580b7be0719f 100644
> --- a/drivers/mtd/nand/raw/meson_nand.c
> +++ b/drivers/mtd/nand/raw/meson_nand.c
> @@ -573,10 +573,10 @@ static int meson_nfc_write_buf(struct nand_chip *nand, u8 *buf, int len)
> static int meson_nfc_rw_cmd_prepare_and_execute(struct nand_chip *nand,
> int page, bool in)
> {
> + const struct nand_sdr_timings *sdr =
> + nand_get_sdr_timings(nand_get_interface_config(nand));
> struct mtd_info *mtd = nand_to_mtd(nand);
> struct meson_nfc *nfc = nand_get_controller_data(nand);
> - const struct nand_sdr_timings *sdr =
> - nand_get_sdr_timings(&nand->data_interface);
> u32 *addrs = nfc->cmdfifo.rw.addrs;
> u32 cs = nfc->param.chip_select;
> u32 cmd0, cmd_num, row_start;
> @@ -626,9 +626,9 @@ static int meson_nfc_rw_cmd_prepare_and_execute(struct nand_chip *nand,
> static int meson_nfc_write_page_sub(struct nand_chip *nand,
> int page, int raw)
> {
> - struct mtd_info *mtd = nand_to_mtd(nand);
> const struct nand_sdr_timings *sdr =
> - nand_get_sdr_timings(&nand->data_interface);
> + nand_get_sdr_timings(nand_get_interface_config(nand));
> + struct mtd_info *mtd = nand_to_mtd(nand);
> struct meson_nfc_nand_chip *meson_chip = to_meson_nand(nand);
> struct meson_nfc *nfc = nand_get_controller_data(nand);
> int data_len, info_len;
> diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
> index b4de85794e07..7d393e1d0252 100644
> --- a/drivers/mtd/nand/raw/nand_base.c
> +++ b/drivers/mtd/nand/raw/nand_base.c
> @@ -773,7 +773,7 @@ int nand_soft_waitrdy(struct nand_chip *chip, unsigned long timeout_ms)
> return -ENOTSUPP;
>
> /* Wait tWB before polling the STATUS reg. */
> - timings = nand_get_sdr_timings(&chip->data_interface);
> + timings = nand_get_sdr_timings(nand_get_interface_config(chip));
> ndelay(PSEC_TO_NSEC(timings->tWB_max));
>
> ret = nand_status_op(chip, NULL);
> @@ -1119,9 +1119,9 @@ static int nand_sp_exec_read_page_op(struct nand_chip *chip, unsigned int page,
> unsigned int offset_in_page, void *buf,
> unsigned int len)
> {
> - struct mtd_info *mtd = nand_to_mtd(chip);
> const struct nand_sdr_timings *sdr =
> - nand_get_sdr_timings(&chip->data_interface);
> + nand_get_sdr_timings(nand_get_interface_config(chip));
> + struct mtd_info *mtd = nand_to_mtd(chip);
> u8 addrs[4];
> struct nand_op_instr instrs[] = {
> NAND_OP_CMD(NAND_CMD_READ0, 0),
> @@ -1163,7 +1163,7 @@ static int nand_lp_exec_read_page_op(struct nand_chip *chip, unsigned int page,
> unsigned int len)
> {
> const struct nand_sdr_timings *sdr =
> - nand_get_sdr_timings(&chip->data_interface);
> + nand_get_sdr_timings(nand_get_interface_config(chip));
> u8 addrs[5];
> struct nand_op_instr instrs[] = {
> NAND_OP_CMD(NAND_CMD_READ0, 0),
> @@ -1260,7 +1260,7 @@ int nand_read_param_page_op(struct nand_chip *chip, u8 page, void *buf,
>
> if (nand_has_exec_op(chip)) {
> const struct nand_sdr_timings *sdr =
> - nand_get_sdr_timings(&chip->data_interface);
> + nand_get_sdr_timings(nand_get_interface_config(chip));
> struct nand_op_instr instrs[] = {
> NAND_OP_CMD(NAND_CMD_PARAM, 0),
> NAND_OP_ADDR(1, &page, PSEC_TO_NSEC(sdr->tWB_max)),
> @@ -1315,7 +1315,7 @@ int nand_change_read_column_op(struct nand_chip *chip,
>
> if (nand_has_exec_op(chip)) {
> const struct nand_sdr_timings *sdr =
> - nand_get_sdr_timings(&chip->data_interface);
> + nand_get_sdr_timings(nand_get_interface_config(chip));
> u8 addrs[2] = {};
> struct nand_op_instr instrs[] = {
> NAND_OP_CMD(NAND_CMD_RNDOUT, 0),
> @@ -1389,9 +1389,9 @@ static int nand_exec_prog_page_op(struct nand_chip *chip, unsigned int page,
> unsigned int offset_in_page, const void *buf,
> unsigned int len, bool prog)
> {
> - struct mtd_info *mtd = nand_to_mtd(chip);
> const struct nand_sdr_timings *sdr =
> - nand_get_sdr_timings(&chip->data_interface);
> + nand_get_sdr_timings(nand_get_interface_config(chip));
> + struct mtd_info *mtd = nand_to_mtd(chip);
> u8 addrs[5] = {};
> struct nand_op_instr instrs[] = {
> /*
> @@ -1514,7 +1514,7 @@ int nand_prog_page_end_op(struct nand_chip *chip)
>
> if (nand_has_exec_op(chip)) {
> const struct nand_sdr_timings *sdr =
> - nand_get_sdr_timings(&chip->data_interface);
> + nand_get_sdr_timings(nand_get_interface_config(chip));
> struct nand_op_instr instrs[] = {
> NAND_OP_CMD(NAND_CMD_PAGEPROG,
> PSEC_TO_NSEC(sdr->tWB_max)),
> @@ -1621,7 +1621,7 @@ int nand_change_write_column_op(struct nand_chip *chip,
>
> if (nand_has_exec_op(chip)) {
> const struct nand_sdr_timings *sdr =
> - nand_get_sdr_timings(&chip->data_interface);
> + nand_get_sdr_timings(nand_get_interface_config(chip));
> u8 addrs[2];
> struct nand_op_instr instrs[] = {
> NAND_OP_CMD(NAND_CMD_RNDIN, 0),
> @@ -1676,7 +1676,7 @@ int nand_readid_op(struct nand_chip *chip, u8 addr, void *buf,
>
> if (nand_has_exec_op(chip)) {
> const struct nand_sdr_timings *sdr =
> - nand_get_sdr_timings(&chip->data_interface);
> + nand_get_sdr_timings(nand_get_interface_config(chip));
> struct nand_op_instr instrs[] = {
> NAND_OP_CMD(NAND_CMD_READID, 0),
> NAND_OP_ADDR(1, &addr, PSEC_TO_NSEC(sdr->tADL_min)),
> @@ -1715,7 +1715,7 @@ int nand_status_op(struct nand_chip *chip, u8 *status)
> {
> if (nand_has_exec_op(chip)) {
> const struct nand_sdr_timings *sdr =
> - nand_get_sdr_timings(&chip->data_interface);
> + nand_get_sdr_timings(nand_get_interface_config(chip));
> struct nand_op_instr instrs[] = {
> NAND_OP_CMD(NAND_CMD_STATUS,
> PSEC_TO_NSEC(sdr->tADL_min)),
> @@ -1784,7 +1784,7 @@ int nand_erase_op(struct nand_chip *chip, unsigned int eraseblock)
>
> if (nand_has_exec_op(chip)) {
> const struct nand_sdr_timings *sdr =
> - nand_get_sdr_timings(&chip->data_interface);
> + nand_get_sdr_timings(nand_get_interface_config(chip));
> u8 addrs[3] = { page, page >> 8, page >> 16 };
> struct nand_op_instr instrs[] = {
> NAND_OP_CMD(NAND_CMD_ERASE1, 0),
> @@ -1843,7 +1843,7 @@ static int nand_set_features_op(struct nand_chip *chip, u8 feature,
>
> if (nand_has_exec_op(chip)) {
> const struct nand_sdr_timings *sdr =
> - nand_get_sdr_timings(&chip->data_interface);
> + nand_get_sdr_timings(nand_get_interface_config(chip));
> struct nand_op_instr instrs[] = {
> NAND_OP_CMD(NAND_CMD_SET_FEATURES, 0),
> NAND_OP_ADDR(1, &feature, PSEC_TO_NSEC(sdr->tADL_min)),
> @@ -1890,7 +1890,7 @@ static int nand_get_features_op(struct nand_chip *chip, u8 feature,
>
> if (nand_has_exec_op(chip)) {
> const struct nand_sdr_timings *sdr =
> - nand_get_sdr_timings(&chip->data_interface);
> + nand_get_sdr_timings(nand_get_interface_config(chip));
> struct nand_op_instr instrs[] = {
> NAND_OP_CMD(NAND_CMD_GET_FEATURES, 0),
> NAND_OP_ADDR(1, &feature, PSEC_TO_NSEC(sdr->tWB_max)),
> @@ -1947,7 +1947,7 @@ int nand_reset_op(struct nand_chip *chip)
> {
> if (nand_has_exec_op(chip)) {
> const struct nand_sdr_timings *sdr =
> - nand_get_sdr_timings(&chip->data_interface);
> + nand_get_sdr_timings(nand_get_interface_config(chip));
> struct nand_op_instr instrs[] = {
> NAND_OP_CMD(NAND_CMD_RESET, PSEC_TO_NSEC(sdr->tWB_max)),
> NAND_OP_WAIT_RDY(PSEC_TO_MSEC(sdr->tRST_max), 0),
> @@ -3226,7 +3226,7 @@ static void nand_wait_readrdy(struct nand_chip *chip)
> if (!(chip->options & NAND_NEED_READRDY))
> return;
>
> - sdr = nand_get_sdr_timings(&chip->data_interface);
> + sdr = nand_get_sdr_timings(nand_get_interface_config(chip));
> WARN_ON(nand_wait_rdy_op(chip, PSEC_TO_MSEC(sdr->tR_max), 0));
> }
>
> diff --git a/drivers/mtd/nand/raw/nand_legacy.c b/drivers/mtd/nand/raw/nand_legacy.c
> index 848403dcae03..fe769762e1d8 100644
> --- a/drivers/mtd/nand/raw/nand_legacy.c
> +++ b/drivers/mtd/nand/raw/nand_legacy.c
> @@ -354,6 +354,9 @@ static void nand_command(struct nand_chip *chip, unsigned int command,
>
> static void nand_ccs_delay(struct nand_chip *chip)
> {
> + const struct nand_sdr_timings *sdr =
> + nand_get_sdr_timings(nand_get_interface_config(chip));
> +
> /*
> * The controller already takes care of waiting for tCCS when the RNDIN
> * or RNDOUT command is sent, return directly.
> @@ -366,7 +369,7 @@ static void nand_ccs_delay(struct nand_chip *chip)
> * (which should be safe for all NANDs).
> */
> if (nand_controller_can_setup_data_iface(chip))
> - ndelay(chip->data_interface.timings.sdr.tCCS_min / 1000);
> + ndelay(sdr->tCCS_min / 1000);
> else
> ndelay(500);
> }
> diff --git a/drivers/mtd/nand/raw/nand_toshiba.c b/drivers/mtd/nand/raw/nand_toshiba.c
> index ae069905d7e4..333037bdca41 100644
> --- a/drivers/mtd/nand/raw/nand_toshiba.c
> +++ b/drivers/mtd/nand/raw/nand_toshiba.c
> @@ -33,7 +33,7 @@ static int toshiba_nand_benand_read_eccstatus_op(struct nand_chip *chip,
>
> if (nand_has_exec_op(chip)) {
> const struct nand_sdr_timings *sdr =
> - nand_get_sdr_timings(&chip->data_interface);
> + nand_get_sdr_timings(nand_get_interface_config(chip));
> struct nand_op_instr instrs[] = {
> NAND_OP_CMD(TOSHIBA_NAND_CMD_ECC_STATUS_READ,
> PSEC_TO_NSEC(sdr->tADL_min)),
> diff --git a/drivers/mtd/nand/raw/stm32_fmc2_nand.c b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
> index 65c9d17b25a3..7320c0fc19ec 100644
> --- a/drivers/mtd/nand/raw/stm32_fmc2_nand.c
> +++ b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
> @@ -1308,7 +1308,7 @@ static int stm32_fmc2_nfc_waitrdy(struct nand_chip *chip,
> dev_warn(nfc->dev, "Waitrdy timeout\n");
>
> /* Wait tWB before R/B# signal is low */
> - timings = nand_get_sdr_timings(&chip->data_interface);
> + timings = nand_get_sdr_timings(nand_get_interface_config(chip));
> ndelay(PSEC_TO_NSEC(timings->tWB_max));
>
> /* R/B# signal is low, clear high level flag */
> diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
> index 544ec8736793..0852df941130 100644
> --- a/include/linux/mtd/rawnand.h
> +++ b/include/linux/mtd/rawnand.h
> @@ -1203,6 +1203,17 @@ static inline struct device_node *nand_get_flash_node(struct nand_chip *chip)
> return mtd_get_of_node(nand_to_mtd(chip));
> }
>
> +/**
> + * nand_get_interface_config - Retrieve the current interface configuration
> + * of a NAND chip
> + * @chip: The NAND chip
> + */
> +static inline const struct nand_data_interface *
> +nand_get_interface_config(struct nand_chip *chip)
> +{
> + return &chip->data_interface;
> +}
> +
> /*
> * A helper for defining older NAND chips where the second ID byte fully
> * defined the chip, including the geometry (chip size, eraseblock size, page
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next prev parent reply other threads:[~2020-05-29 11:26 UTC|newest]
Thread overview: 69+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-29 11:12 [PATCH v7 00/28] Allow vendor drivers to propose their own timings Miquel Raynal
2020-05-29 11:12 ` [PATCH v7 01/28] mtd: rawnand: Use unsigned types for nand_chip unsigned values Miquel Raynal
2020-06-15 9:07 ` Miquel Raynal
2020-05-29 11:12 ` [PATCH v7 02/28] mtd: rawnand: Only use u8 instead of uint8_t in nand_chip structure Miquel Raynal
2020-06-15 9:07 ` Miquel Raynal
2020-05-29 11:12 ` [PATCH v7 03/28] mtd: rawnand: Create a nand_chip operations structure Miquel Raynal
2020-06-15 9:07 ` Miquel Raynal
2020-05-29 11:12 ` [PATCH v7 04/28] mtd: rawnand: Rename the manufacturer structure Miquel Raynal
2020-06-15 9:06 ` Miquel Raynal
2020-05-29 11:12 ` [PATCH v7 05/28] mtd: rawnand: Declare the nand_manufacturer structure out of nand_chip Miquel Raynal
2020-06-15 9:06 ` Miquel Raynal
2020-05-29 11:13 ` [PATCH v7 06/28] mtd: rawnand: Reorganize the nand_chip structure Miquel Raynal
2020-06-15 9:06 ` Miquel Raynal
2020-05-29 11:13 ` [PATCH v7 07/28] mtd: rawnand: Compare the actual timing values Miquel Raynal
2020-06-15 9:06 ` Miquel Raynal
2020-05-29 11:13 ` [PATCH v7 08/28] mtd: rawnand: Use the data interface mode entry when relevant Miquel Raynal
2020-06-15 9:06 ` Miquel Raynal
2020-05-29 11:13 ` [PATCH v7 09/28] mtd: rawnand: Rename nand_has_setup_data_iface() Miquel Raynal
2020-06-15 9:05 ` Miquel Raynal
2020-05-29 11:13 ` [PATCH v7 10/28] mtd: rawnand: Fix nand_setup_data_interface() description Miquel Raynal
2020-06-15 9:05 ` Miquel Raynal
2020-05-29 11:13 ` [PATCH v7 11/28] mtd: rawnand: Rename nand_init_data_interface() Miquel Raynal
2020-06-15 9:05 ` Miquel Raynal
2020-05-29 11:13 ` [PATCH v7 12/28] mtd: rawnand: timings: Update onfi_fill_data_interface() kernel doc Miquel Raynal
2020-06-15 9:05 ` Miquel Raynal
2020-05-29 11:13 ` [PATCH v7 13/28] mtd: rawnand: timings: Provide onfi_fill_data_interface() with a data interface Miquel Raynal
2020-06-15 9:05 ` Miquel Raynal
2020-05-29 11:13 ` [PATCH v7 14/28] mtd: rawnand: timings: onfi_fill_data_interface timing mode is unsigned Miquel Raynal
2020-05-29 11:28 ` Boris Brezillon
2020-06-15 9:05 ` Miquel Raynal
2020-05-29 11:13 ` [PATCH v7 15/28] mtd: rawnand: timings: Add a helper to find the closest ONFI mode Miquel Raynal
2020-06-15 9:04 ` Miquel Raynal
2020-05-29 11:13 ` [PATCH v7 16/28] mtd: rawnand: timings: Avoid redefining tR_max and tCCS_min Miquel Raynal
2020-05-29 11:25 ` Boris Brezillon
2020-06-15 9:04 ` Miquel Raynal
2020-05-29 11:13 ` [PATCH v7 17/28] mtd: rawnand: timings: Use default values for tPROG_max and tBERS_max Miquel Raynal
2020-06-15 9:04 ` Miquel Raynal
2020-05-29 11:13 ` [PATCH v7 18/28] mtd: rawnand: Hide the chip->data_interface indirection Miquel Raynal
2020-05-29 11:26 ` Boris Brezillon [this message]
2020-06-15 9:04 ` Miquel Raynal
2020-05-29 11:13 ` [PATCH v7 19/28] mtd: rawnand: s/data_interface/interface_config/ Miquel Raynal
2020-05-29 11:13 ` [PATCH v7 20/28] mtd: rawnand: timings: Make onfi_fill_interface_config() a void helper Miquel Raynal
2020-05-29 11:29 ` Boris Brezillon
2020-06-15 9:04 ` Miquel Raynal
2020-05-29 11:13 ` [PATCH v7 21/28] mtd: rawnand: Introduce nand_choose_best_sdr_timings() Miquel Raynal
2020-05-29 11:30 ` Boris Brezillon
2020-06-15 9:04 ` Miquel Raynal
2020-05-29 11:13 ` [PATCH v7 22/28] mtd: rawnand: Add the ->choose_interface_config() hook Miquel Raynal
2020-05-29 11:31 ` Boris Brezillon
2020-05-29 11:32 ` Miquel Raynal
2020-06-15 9:03 ` Miquel Raynal
2020-05-29 11:13 ` [PATCH v7 23/28] mtd: rawnand: toshiba: Implement ->choose_interface_config() for TC58TEG5DCLTA00 Miquel Raynal
2020-06-15 9:03 ` Miquel Raynal
2020-05-29 11:13 ` [PATCH v7 24/28] mtd: rawnand: toshiba: Implement ->choose_interface_config() for TC58NVG0S3E Miquel Raynal
2020-06-15 9:03 ` Miquel Raynal
2020-05-29 11:13 ` [PATCH v7 25/28] mtd: rawnand: hynix: Implement ->choose_interface_config() for H27UCG8T2ATR-BC Miquel Raynal
2020-06-15 9:03 ` Miquel Raynal
2020-05-29 11:13 ` [PATCH v7 26/28] mtd: rawnand: toshiba: Choose the interface configuration for TH58NVG2S3HBAI4 Miquel Raynal
2020-05-29 11:33 ` Boris Brezillon
2020-06-15 9:03 ` Miquel Raynal
2020-05-29 11:13 ` [PATCH v7 27/28] mtd: rawnand: Get rid of the default ONFI timing mode Miquel Raynal
2020-06-15 9:02 ` Miquel Raynal
2020-05-29 11:13 ` [PATCH v7 28/28] mtd: rawnand: Allocate the interface configurations dynamically Miquel Raynal
2020-05-29 11:37 ` Boris Brezillon
2020-05-29 11:41 ` Boris Brezillon
2020-05-29 11:43 ` Miquel Raynal
2020-05-29 11:49 ` Boris Brezillon
2020-05-29 11:52 ` Miquel Raynal
2020-06-15 9:02 ` Miquel Raynal
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