From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Cc: Mark Brown <broonie@kernel.org>,
Serge Semin <fancer.lancer@gmail.com>,
Ekaterina Skachko <Ekaterina.Skachko@baikalelectronics.ru>,
Feng Tang <feng.tang@intel.com>,
devicetree@vger.kernel.org,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Georgy Vlasov <Georgy.Vlasov@baikalelectronics.ru>,
Pavel Parkhomenko <Pavel.Parkhomenko@baikalelectronics.ru>,
Alexey Kolotnikov <Alexey.Kolotnikov@baikalelectronics.ru>,
linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org,
Vadim Vlasov <V.Vlasov@baikalelectronics.ru>,
Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,
linux-mips@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
Ramil Zaripov <Ramil.Zaripov@baikalelectronics.ru>,
Arnd Bergmann <arnd@arndb.de>,
Maxim Kaurkin <Maxim.Kaurkin@baikalelectronics.ru>
Subject: Re: [PATCH v6 00/16] spi: dw: Add generic DW DMA controller support
Date: Fri, 29 May 2020 20:43:12 +0300 [thread overview]
Message-ID: <20200529174312.GU1634618@smile.fi.intel.com> (raw)
In-Reply-To: <20200529172642.hcnvyzv2ocizsvpy@mobilestation>
On Fri, May 29, 2020 at 08:26:42PM +0300, Serge Semin wrote:
> On Fri, May 29, 2020 at 06:18:32PM +0100, Mark Brown wrote:
> > On Fri, 29 May 2020 16:11:49 +0300, Serge Semin wrote:
> > > Baikal-T1 SoC provides a DW DMA controller to perform low-speed peripherals
> > > Mem-to-Dev and Dev-to-Mem transaction. This is also applicable to the DW
> > > APB SSI devices embedded into the SoC. Currently the DMA-based transfers
> > > are supported by the DW APB SPI driver only as a middle layer code for
> > > Intel MID/Elkhart PCI devices. Seeing the same code can be used for normal
> > > platform DMAC device we introduced a set of patches to fix it within this
> > > series.
> As you can see it has been acked by Rob. So you can also merge it into your
> repo. Though It has to be rebased first due to the Dinh Nguyen patches
> recently merged in. Do you want me to do the rebasing?
I guess now you need to rebase it, because as I see the Dinh's patches are in
the tree as well as yours.
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2020-05-29 17:43 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-29 13:11 [PATCH v6 00/16] spi: dw: Add generic DW DMA controller support Serge Semin
2020-05-29 13:11 ` [PATCH v6 01/16] spi: dw: Set xfer effective_speed_hz Serge Semin
2020-05-29 13:11 ` [PATCH v6 02/16] spi: dw: Return any value retrieved from the dma_transfer callback Serge Semin
2020-05-29 13:11 ` [PATCH v6 03/16] spi: dw: Locally wait for the DMA transfers completion Serge Semin
2020-05-29 13:11 ` [PATCH v6 04/16] spi: dw: Add SPI Tx-done wait method to DMA-based transfer Serge Semin
2020-05-29 13:11 ` [PATCH v6 05/16] spi: dw: Add SPI Rx-done " Serge Semin
2020-05-29 13:11 ` [PATCH v6 06/16] spi: dw: Parameterize the DMA Rx/Tx burst length Serge Semin
2020-05-29 13:11 ` [PATCH v6 07/16] spi: dw: Use DMA max burst to set the request thresholds Serge Semin
2020-05-29 13:11 ` [PATCH v6 08/16] spi: dw: Fix Rx-only DMA transfers Serge Semin
2020-05-29 13:11 ` [PATCH v6 09/16] spi: dw: Add core suffix to the DW APB SSI core source file Serge Semin
2020-05-29 13:11 ` [PATCH v6 10/16] spi: dw: Move Non-DMA code to the DW PCIe-SPI driver Serge Semin
2020-05-29 13:12 ` [PATCH v6 11/16] spi: dw: Remove DW DMA code dependency from DW_DMAC_PCI Serge Semin
2020-05-29 13:12 ` [PATCH v6 12/16] spi: dw: Add DW SPI DMA/PCI/MMIO dependency on the DW SPI core Serge Semin
2020-05-29 13:12 ` [PATCH v6 13/16] spi: dw: Cleanup generic DW DMA code namings Serge Semin
2020-05-29 13:12 ` [PATCH v6 14/16] spi: dw: Add DMA support to the DW SPI MMIO driver Serge Semin
2020-05-29 13:12 ` [PATCH v6 15/16] spi: dw: Use regset32 DebugFS method to create regdump file Serge Semin
2020-05-29 13:12 ` [PATCH v6 16/16] dt-bindings: spi: Convert DW SPI binding to DT schema Serge Semin
2020-05-29 13:27 ` [PATCH v6 00/16] spi: dw: Add generic DW DMA controller support Andy Shevchenko
2020-05-29 17:18 ` Mark Brown
2020-05-29 17:26 ` Serge Semin
2020-05-29 17:33 ` Mark Brown
2020-05-29 17:35 ` Serge Semin
2020-05-29 21:22 ` Rob Herring
2020-05-29 22:21 ` Mark Brown
2020-05-29 17:43 ` Andy Shevchenko [this message]
2020-05-29 17:47 ` Serge Semin
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