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Mon, 08 Jun 2020 23:47:37 -0700 (PDT) Date: Tue, 9 Jun 2020 07:47:35 +0100 From: Lee Jones To: Michael Walle Cc: Andy Shevchenko , Ranjani Sridharan , david.m.ertman@intel.com, shiraz.saleem@intel.com, Rob Herring , Mark Brown , "open list:GPIO SUBSYSTEM" , devicetree , Linux Kernel Mailing List , linux-hwmon@vger.kernel.org, linux-pwm@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-arm Mailing List , Linus Walleij , Bartosz Golaszewski , Jean Delvare , Guenter Roeck , Thierry Reding , Uwe =?iso-8859-1?Q?Kleine-K=F6nig?= , Wim Van Sebroeck , Shawn Guo , Li Yang , Thomas Gleixner , Jason Cooper , Marc Zyngier , Greg Kroah-Hartman , Andy Shevchenko Subject: Re: [PATCH v4 02/11] mfd: Add support for Kontron sl28cpld management controller Message-ID: <20200609064735.GH4106@dell> References: <20200605065709.GD3714@dell> <20200605105026.GC5413@sirena.org.uk> <20200606114645.GB2055@sirena.org.uk> <20200608082827.GB3567@dell> <7d7feb374cbf5a587dc1ce65fc3ad672@walle.cc> <20200608185651.GD4106@dell> <32231f26f7028d62aeda8fdb3364faf1@walle.cc> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <32231f26f7028d62aeda8fdb3364faf1@walle.cc> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org On Mon, 08 Jun 2020, Michael Walle wrote: > Am 2020-06-08 20:56, schrieb Lee Jones: > > On Mon, 08 Jun 2020, Michael Walle wrote: > > > > > Am 2020-06-08 12:02, schrieb Andy Shevchenko: > > > > +Cc: some Intel people WRT our internal discussion about similar > > > > problem and solutions. > > > > > > > > On Mon, Jun 8, 2020 at 11:30 AM Lee Jones wrote: > > > > > On Sat, 06 Jun 2020, Michael Walle wrote: > > > > > > Am 2020-06-06 13:46, schrieb Mark Brown: > > > > > > > On Fri, Jun 05, 2020 at 10:07:36PM +0200, Michael Walle wrote: > > > > > > > > Am 2020-06-05 12:50, schrieb Mark Brown: > > > > > > > > ... > > > > > > > > > Right. I'm suggesting a means to extrapolate complex shared and > > > > > sometimes intertwined batches of register sets to be consumed by > > > > > multiple (sub-)devices spanning different subsystems. > > > > > > > > > > Actually scrap that. The most common case I see is a single Regmap > > > > > covering all child-devices. > > > > > > > > Yes, because often we need a synchronization across the entire address > > > > space of the (parent) device in question. > > > > > > > > > It would be great if there was a way in > > > > > which we could make an assumption that the entire register address > > > > > space for a 'tagged' (MFD) device is to be shared (via Regmap) between > > > > > each of the devices described by its child-nodes. Probably by picking > > > > > up on the 'simple-mfd' compatible string in the first instance. > > > > > > > > > > Rob, is the above something you would contemplate? > > > > > > > > > > Michael, do your register addresses overlap i.e. are they intermingled > > > > > with one another? Do multiple child devices need access to the same > > > > > registers i.e. are they shared? > > > > > > No they don't overlap, expect for maybe the version register, which is > > > just there once and not per function block. > > > > Then what's stopping you having each device Regmap their own space? > > Because its just one I2C device, AFAIK thats not possible, right? Not sure what (if any) the restrictions are. I can't think of any reasons why not, off the top of my head. Does Regmap only deal with shared accesses from multiple devices accessing a single register map, or can it also handle multiple devices communicating over a single I2C channel? One for Mark perhaps. > > The issues I wish to resolve using 'simple-mfd' are when sub-devices > > register maps overlap and intertwine. [...] > > > > > What do these bits configure? > > > > > > - hardware strappings which have to be there before the board powers > > > up, > > > like clocking mode for different SerDes settings > > > - "keep-in-reset" bits for onboard peripherals if you want to save > > > power > > > - disable watchdog bits (there is a watchdog which is active right > > > from > > > the start and supervises the bootloader start and switches to > > > failsafe > > > mode if it wasn't successfully started) > > > - special boot modes, like eMMC, etc. > > > > > > Think of it as a 16bit configuration word. > > > > And you wish for users to be able to view these at run-time? > > And esp. change them. > > > Can they adapt any of them on-the-fly or will the be RO? > > They are R/W but only will only affect the board behavior after a reset. I see. Makes sense. This is board controller territory. Perhaps suitable for inclusion into drivers/soc or drivers/platform. -- Lee Jones [李琼斯] Senior Technical Lead - Developer Services Linaro.org │ Open source software for Arm SoCs Follow Linaro: Facebook | Twitter | Blog From mboxrd@z Thu Jan 1 00:00:00 1970 From: Lee Jones Subject: Re: [PATCH v4 02/11] mfd: Add support for Kontron sl28cpld management controller Date: Tue, 9 Jun 2020 07:47:35 +0100 Message-ID: <20200609064735.GH4106@dell> References: <20200605065709.GD3714@dell> <20200605105026.GC5413@sirena.org.uk> <20200606114645.GB2055@sirena.org.uk> <20200608082827.GB3567@dell> <7d7feb374cbf5a587dc1ce65fc3ad672@walle.cc> <20200608185651.GD4106@dell> <32231f26f7028d62aeda8fdb3364faf1@walle.cc> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Return-path: Content-Disposition: inline In-Reply-To: <32231f26f7028d62aeda8fdb3364faf1-QKn5cuLxLXY@public.gmane.org> Sender: linux-watchdog-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Michael Walle Cc: Andy Shevchenko , Ranjani Sridharan , david.m.ertman-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org, shiraz.saleem-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org, Rob Herring , Mark Brown , "open list:GPIO SUBSYSTEM" , devicetree , Linux Kernel Mailing List , linux-hwmon-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-pwm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-watchdog-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm Mailing List , Linus Walleij , Bartosz Golaszewski , Jean Delvare , Guenter Roeck , Thierry Reding , Uwe List-Id: linux-pwm@vger.kernel.org On Mon, 08 Jun 2020, Michael Walle wrote: > Am 2020-06-08 20:56, schrieb Lee Jones: > > On Mon, 08 Jun 2020, Michael Walle wrote: > > > > > Am 2020-06-08 12:02, schrieb Andy Shevchenko: > > > > +Cc: some Intel people WRT our internal discussion about similar > > > > problem and solutions. > > > > > > > > On Mon, Jun 8, 2020 at 11:30 AM Lee Jones wrote: > > > > > On Sat, 06 Jun 2020, Michael Walle wrote: > > > > > > Am 2020-06-06 13:46, schrieb Mark Brown: > > > > > > > On Fri, Jun 05, 2020 at 10:07:36PM +0200, Michael Walle wrote: > > > > > > > > Am 2020-06-05 12:50, schrieb Mark Brown: > > > > > > > > ... > > > > > > > > > Right. I'm suggesting a means to extrapolate complex shared and > > > > > sometimes intertwined batches of register sets to be consumed by > > > > > multiple (sub-)devices spanning different subsystems. > > > > > > > > > > Actually scrap that. The most common case I see is a single Regmap > > > > > covering all child-devices. > > > > > > > > Yes, because often we need a synchronization across the entire address > > > > space of the (parent) device in question. > > > > > > > > > It would be great if there was a way in > > > > > which we could make an assumption that the entire register address > > > > > space for a 'tagged' (MFD) device is to be shared (via Regmap) between > > > > > each of the devices described by its child-nodes. Probably by picking > > > > > up on the 'simple-mfd' compatible string in the first instance. > > > > > > > > > > Rob, is the above something you would contemplate? > > > > > > > > > > Michael, do your register addresses overlap i.e. are they intermingled > > > > > with one another? Do multiple child devices need access to the same > > > > > registers i.e. are they shared? > > > > > > No they don't overlap, expect for maybe the version register, which is > > > just there once and not per function block. > > > > Then what's stopping you having each device Regmap their own space? > > Because its just one I2C device, AFAIK thats not possible, right? Not sure what (if any) the restrictions are. I can't think of any reasons why not, off the top of my head. Does Regmap only deal with shared accesses from multiple devices accessing a single register map, or can it also handle multiple devices communicating over a single I2C channel? One for Mark perhaps. > > The issues I wish to resolve using 'simple-mfd' are when sub-devices > > register maps overlap and intertwine. [...] > > > > > What do these bits configure? > > > > > > - hardware strappings which have to be there before the board powers > > > up, > > > like clocking mode for different SerDes settings > > > - "keep-in-reset" bits for onboard peripherals if you want to save > > > power > > > - disable watchdog bits (there is a watchdog which is active right > > > from > > > the start and supervises the bootloader start and switches to > > > failsafe > > > mode if it wasn't successfully started) > > > - special boot modes, like eMMC, etc. > > > > > > Think of it as a 16bit configuration word. > > > > And you wish for users to be able to view these at run-time? > > And esp. change them. > > > Can they adapt any of them on-the-fly or will the be RO? > > They are R/W but only will only affect the board behavior after a reset. I see. Makes sense. This is board controller territory. Perhaps suitable for inclusion into drivers/soc or drivers/platform. -- Lee Jones [李琼斯] Senior Technical Lead - Developer Services Linaro.org │ Open source software for Arm SoCs Follow Linaro: Facebook | Twitter | Blog From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 257D2C433E0 for ; Tue, 9 Jun 2020 06:47:54 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with 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<20200609064735.GH4106@dell> References: <20200605065709.GD3714@dell> <20200605105026.GC5413@sirena.org.uk> <20200606114645.GB2055@sirena.org.uk> <20200608082827.GB3567@dell> <7d7feb374cbf5a587dc1ce65fc3ad672@walle.cc> <20200608185651.GD4106@dell> <32231f26f7028d62aeda8fdb3364faf1@walle.cc> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <32231f26f7028d62aeda8fdb3364faf1@walle.cc> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200608_234741_984133_4AB2101F X-CRM114-Status: GOOD ( 27.05 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-pwm@vger.kernel.org, Linus Walleij , Thierry Reding , Jason Cooper , Andy Shevchenko , Marc Zyngier , Ranjani Sridharan , Bartosz Golaszewski , Andy Shevchenko , Uwe =?iso-8859-1?Q?Kleine-K=F6nig?= , david.m.ertman@intel.com, Guenter Roeck , devicetree , Jean Delvare , linux-watchdog@vger.kernel.org, "open list:GPIO SUBSYSTEM" , Mark Brown , Thomas Gleixner , Wim Van Sebroeck , shiraz.saleem@intel.com, linux-arm Mailing List , linux-hwmon@vger.kernel.org, Greg Kroah-Hartman , Linux Kernel Mailing List , Li Yang , Rob Herring , Shawn Guo Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org T24gTW9uLCAwOCBKdW4gMjAyMCwgTWljaGFlbCBXYWxsZSB3cm90ZToKCj4gQW0gMjAyMC0wNi0w OCAyMDo1Niwgc2NocmllYiBMZWUgSm9uZXM6Cj4gPiBPbiBNb24sIDA4IEp1biAyMDIwLCBNaWNo YWVsIFdhbGxlIHdyb3RlOgo+ID4gCj4gPiA+IEFtIDIwMjAtMDYtMDggMTI6MDIsIHNjaHJpZWIg QW5keSBTaGV2Y2hlbmtvOgo+ID4gPiA+ICtDYzogc29tZSBJbnRlbCBwZW9wbGUgV1JUIG91ciBp bnRlcm5hbCBkaXNjdXNzaW9uIGFib3V0IHNpbWlsYXIKPiA+ID4gPiBwcm9ibGVtIGFuZCBzb2x1 dGlvbnMuCj4gPiA+ID4KPiA+ID4gPiBPbiBNb24sIEp1biA4LCAyMDIwIGF0IDExOjMwIEFNIExl ZSBKb25lcyA8bGVlLmpvbmVzQGxpbmFyby5vcmc+IHdyb3RlOgo+ID4gPiA+ID4gT24gU2F0LCAw NiBKdW4gMjAyMCwgTWljaGFlbCBXYWxsZSB3cm90ZToKPiA+ID4gPiA+ID4gQW0gMjAyMC0wNi0w NiAxMzo0Niwgc2NocmllYiBNYXJrIEJyb3duOgo+ID4gPiA+ID4gPiA+IE9uIEZyaSwgSnVuIDA1 LCAyMDIwIGF0IDEwOjA3OjM2UE0gKzAyMDAsIE1pY2hhZWwgV2FsbGUgd3JvdGU6Cj4gPiA+ID4g PiA+ID4gPiBBbSAyMDIwLTA2LTA1IDEyOjUwLCBzY2hyaWViIE1hcmsgQnJvd246Cj4gPiA+ID4K PiA+ID4gPiAuLi4KPiA+ID4gPgo+ID4gPiA+ID4gUmlnaHQuICBJJ20gc3VnZ2VzdGluZyBhIG1l YW5zIHRvIGV4dHJhcG9sYXRlIGNvbXBsZXggc2hhcmVkIGFuZAo+ID4gPiA+ID4gc29tZXRpbWVz IGludGVydHdpbmVkIGJhdGNoZXMgb2YgcmVnaXN0ZXIgc2V0cyB0byBiZSBjb25zdW1lZCBieQo+ ID4gPiA+ID4gbXVsdGlwbGUgKHN1Yi0pZGV2aWNlcyBzcGFubmluZyBkaWZmZXJlbnQgc3Vic3lz dGVtcy4KPiA+ID4gPiA+Cj4gPiA+ID4gPiBBY3R1YWxseSBzY3JhcCB0aGF0LiAgVGhlIG1vc3Qg Y29tbW9uIGNhc2UgSSBzZWUgaXMgYSBzaW5nbGUgUmVnbWFwCj4gPiA+ID4gPiBjb3ZlcmluZyBh bGwgY2hpbGQtZGV2aWNlcy4KPiA+ID4gPgo+ID4gPiA+IFllcywgYmVjYXVzZSBvZnRlbiB3ZSBu ZWVkIGEgc3luY2hyb25pemF0aW9uIGFjcm9zcyB0aGUgZW50aXJlIGFkZHJlc3MKPiA+ID4gPiBz cGFjZSBvZiB0aGUgKHBhcmVudCkgZGV2aWNlIGluIHF1ZXN0aW9uLgo+ID4gPiA+Cj4gPiA+ID4g PiAgSXQgd291bGQgYmUgZ3JlYXQgaWYgdGhlcmUgd2FzIGEgd2F5IGluCj4gPiA+ID4gPiB3aGlj aCB3ZSBjb3VsZCBtYWtlIGFuIGFzc3VtcHRpb24gdGhhdCB0aGUgZW50aXJlIHJlZ2lzdGVyIGFk ZHJlc3MKPiA+ID4gPiA+IHNwYWNlIGZvciBhICd0YWdnZWQnIChNRkQpIGRldmljZSBpcyB0byBi ZSBzaGFyZWQgKHZpYSBSZWdtYXApIGJldHdlZW4KPiA+ID4gPiA+IGVhY2ggb2YgdGhlIGRldmlj ZXMgZGVzY3JpYmVkIGJ5IGl0cyBjaGlsZC1ub2Rlcy4gIFByb2JhYmx5IGJ5IHBpY2tpbmcKPiA+ ID4gPiA+IHVwIG9uIHRoZSAnc2ltcGxlLW1mZCcgY29tcGF0aWJsZSBzdHJpbmcgaW4gdGhlIGZp cnN0IGluc3RhbmNlLgo+ID4gPiA+ID4KPiA+ID4gPiA+IFJvYiwgaXMgdGhlIGFib3ZlIHNvbWV0 aGluZyB5b3Ugd291bGQgY29udGVtcGxhdGU/Cj4gPiA+ID4gPgo+ID4gPiA+ID4gTWljaGFlbCwg ZG8geW91ciByZWdpc3RlciBhZGRyZXNzZXMgb3ZlcmxhcCBpLmUuIGFyZSB0aGV5IGludGVybWlu Z2xlZAo+ID4gPiA+ID4gd2l0aCBvbmUgYW5vdGhlcj8gIERvIG11bHRpcGxlIGNoaWxkIGRldmlj ZXMgbmVlZCBhY2Nlc3MgdG8gdGhlIHNhbWUKPiA+ID4gPiA+IHJlZ2lzdGVycyBpLmUuIGFyZSB0 aGV5IHNoYXJlZD8KPiA+ID4gCj4gPiA+IE5vIHRoZXkgZG9uJ3Qgb3ZlcmxhcCwgZXhwZWN0IGZv ciBtYXliZSB0aGUgdmVyc2lvbiByZWdpc3Rlciwgd2hpY2ggaXMKPiA+ID4ganVzdCB0aGVyZSBv bmNlIGFuZCBub3QgcGVyIGZ1bmN0aW9uIGJsb2NrLgo+ID4gCj4gPiBUaGVuIHdoYXQncyBzdG9w cGluZyB5b3UgaGF2aW5nIGVhY2ggZGV2aWNlIFJlZ21hcCB0aGVpciBvd24gc3BhY2U/Cj4gCj4g QmVjYXVzZSBpdHMganVzdCBvbmUgSTJDIGRldmljZSwgQUZBSUsgdGhhdHMgbm90IHBvc3NpYmxl LCByaWdodD8KCk5vdCBzdXJlIHdoYXQgKGlmIGFueSkgdGhlIHJlc3RyaWN0aW9ucyBhcmUuCgpJ IGNhbid0IHRoaW5rIG9mIGFueSByZWFzb25zIHdoeSBub3QsIG9mZiB0aGUgdG9wIG9mIG15IGhl YWQuCgpEb2VzIFJlZ21hcCBvbmx5IGRlYWwgd2l0aCBzaGFyZWQgYWNjZXNzZXMgZnJvbSBtdWx0 aXBsZSBkZXZpY2VzCmFjY2Vzc2luZyBhIHNpbmdsZSByZWdpc3RlciBtYXAsIG9yIGNhbiBpdCBh bHNvIGhhbmRsZSBtdWx0aXBsZQpkZXZpY2VzIGNvbW11bmljYXRpbmcgb3ZlciBhIHNpbmdsZSBJ MkMgY2hhbm5lbD8KCk9uZSBmb3IgTWFyayBwZXJoYXBzLgoKPiA+IFRoZSBpc3N1ZXMgSSB3aXNo IHRvIHJlc29sdmUgdXNpbmcgJ3NpbXBsZS1tZmQnIGFyZSB3aGVuIHN1Yi1kZXZpY2VzCj4gPiBy ZWdpc3RlciBtYXBzIG92ZXJsYXAgYW5kIGludGVydHdpbmUuCgpbLi4uXQoKPiA+ID4gPiA+IFdo YXQgZG8gdGhlc2UgYml0cyBjb25maWd1cmU/Cj4gPiA+IAo+ID4gPiAtIGhhcmR3YXJlIHN0cmFw cGluZ3Mgd2hpY2ggaGF2ZSB0byBiZSB0aGVyZSBiZWZvcmUgdGhlIGJvYXJkIHBvd2Vycwo+ID4g PiB1cCwKPiA+ID4gICBsaWtlIGNsb2NraW5nIG1vZGUgZm9yIGRpZmZlcmVudCBTZXJEZXMgc2V0 dGluZ3MKPiA+ID4gLSAia2VlcC1pbi1yZXNldCIgYml0cyBmb3Igb25ib2FyZCBwZXJpcGhlcmFs cyBpZiB5b3Ugd2FudCB0byBzYXZlCj4gPiA+IHBvd2VyCj4gPiA+IC0gZGlzYWJsZSB3YXRjaGRv ZyBiaXRzICh0aGVyZSBpcyBhIHdhdGNoZG9nIHdoaWNoIGlzIGFjdGl2ZSByaWdodAo+ID4gPiBm cm9tCj4gPiA+ICAgdGhlIHN0YXJ0IGFuZCBzdXBlcnZpc2VzIHRoZSBib290bG9hZGVyIHN0YXJ0 IGFuZCBzd2l0Y2hlcyB0bwo+ID4gPiBmYWlsc2FmZQo+ID4gPiAgIG1vZGUgaWYgaXQgd2Fzbid0 IHN1Y2Nlc3NmdWxseSBzdGFydGVkKQo+ID4gPiAtIHNwZWNpYWwgYm9vdCBtb2RlcywgbGlrZSBl TU1DLCBldGMuCj4gPiA+IAo+ID4gPiBUaGluayBvZiBpdCBhcyBhIDE2Yml0IGNvbmZpZ3VyYXRp b24gd29yZC4KPiA+IAo+ID4gQW5kIHlvdSB3aXNoIGZvciB1c2VycyB0byBiZSBhYmxlIHRvIHZp ZXcgdGhlc2UgYXQgcnVuLXRpbWU/Cj4gCj4gQW5kIGVzcC4gY2hhbmdlIHRoZW0uCj4gCj4gPiBD YW4gdGhleSBhZGFwdCBhbnkgb2YgdGhlbSBvbi10aGUtZmx5IG9yIHdpbGwgdGhlIGJlIFJPPwo+ IAo+IFRoZXkgYXJlIFIvVyBidXQgb25seSB3aWxsIG9ubHkgYWZmZWN0IHRoZSBib2FyZCBiZWhh dmlvciBhZnRlciBhIHJlc2V0LgoKSSBzZWUuICBNYWtlcyBzZW5zZS4gIFRoaXMgaXMgYm9hcmQg Y29udHJvbGxlciB0ZXJyaXRvcnkuICBQZXJoYXBzCnN1aXRhYmxlIGZvciBpbmNsdXNpb24gaW50 byBkcml2ZXJzL3NvYyBvciBkcml2ZXJzL3BsYXRmb3JtLgoKLS0gCkxlZSBKb25lcyBb5p2O55C8 5pavXQpTZW5pb3IgVGVjaG5pY2FsIExlYWQgLSBEZXZlbG9wZXIgU2VydmljZXMKTGluYXJvLm9y ZyDilIIgT3BlbiBzb3VyY2Ugc29mdHdhcmUgZm9yIEFybSBTb0NzCkZvbGxvdyBMaW5hcm86IEZh Y2Vib29rIHwgVHdpdHRlciB8IEJsb2cKCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fCmxpbnV4LWFybS1rZXJuZWwgbWFpbGluZyBsaXN0CmxpbnV4LWFybS1r ZXJuZWxAbGlzdHMuaW5mcmFkZWFkLm9yZwpodHRwOi8vbGlzdHMuaW5mcmFkZWFkLm9yZy9tYWls bWFuL2xpc3RpbmZvL2xpbnV4LWFybS1rZXJuZWwK