From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marc Zyngier Subject: Re: [PATCH v2] mmc: sdhci: Fix HISPD bit handling Date: Wed, 10 Jun 2020 11:37:52 +0100 Message-ID: <20200610113752.65d6f537@why> References: <20200609140135.131887-1-jagan@amarulasolutions.com> <097786ed-37ca-cf20-35f4-20a57e6c3b63@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+glpar-linux-rockchip=m.gmane-mx.org-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org To: Jaehoon Chung Cc: Peng Fan , u-boot-0aAXYlwwYIKGBzrmiIFOJg@public.gmane.org, linux-amarula-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org, Kever Yang , linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, Jagan Teki , sunil-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org, Robin Murphy List-Id: linux-rockchip.vger.kernel.org T24gV2VkLCAxMCBKdW4gMjAyMCAxMjo0NTozMyArMDkwMApKYWVob29uIENodW5nIDxqaDgwLmNo dW5nQHNhbXN1bmcuY29tPiB3cm90ZToKCj4gT24gNi85LzIwIDExOjM4IFBNLCBSb2JpbiBNdXJw aHkgd3JvdGU6Cj4gPiBPbiAyMDIwLTA2LTA5IDE1OjAxLCBKYWdhbiBUZWtpIHdyb3RlOiAgCj4g Pj4gU0RIQ0kgSElTUEQgYml0cyBuZWVkIHRvIGJlIGNvbmZpZ3VyZWQgYmFzZWQgb24gZGVzaXJl ZCBtbWMKPiA+PiB0aW1pbmdzIG1vZGUgYW5kIHNvbWUgSElTUEQgcXVpcmtzLgo+ID4+Cj4gPj4g U28sIGhhbmRsZSB0aGUgSElTUEQgYml0IGJhc2VkIG9uIHRoZSBtbWMgY29tcHV0ZWQgc2VsZWN0 ZWQKPiA+PiBtb2RlKHRpbWluZyBwYXJhbWV0ZXIpIHJhdGhlciB0aGFuIGZpeGVkIG1tYyBjYXJk IGNsb2NrCj4gPj4gZnJlcXVlbmN5Lgo+ID4+Cj4gPj4gTGludXggaGFuZGxlIHRoZSBISVNQRCBz aW1pbGFyIGxpa2UgdGhpcyBpbiBiZWxvdyBjb21taXQsCj4gPj4KPiA+PiBjb21taXQgPDUwMTYz OWJmMjE3Mz4gKCJtbWM6IHNkaGNpOiBmaXggU0RIQ0lfUVVJUktfTk9fSElTUERfQklUIGhhbmRs aW5nIikKPiA+Pgo+ID4+IFRoaXMgZXZlbnR1YWxseSBmaXhlZCB0aGUgbW1jIHdyaXRlIGlzc3Vl IG9ic2VydmVkIGluCj4gPj4gcmszMzk5IHNkaGNpIGNvbnRyb2xsZXIuCj4gPj4KPiA+PiBCdWcg bG9nIGZvciByZWZlcm5lY2UsICAKPiA+PiA9PiBncHQgd3JpdGUgbW1jIDAgJHBhcnRpdGlvbnMg IAo+ID4+IFdyaXRpbmcgR1BUOiBtbWMgd3JpdGUgZmFpbGVkCj4gPj4gKiogQ2FuJ3Qgd3JpdGUg dG8gZGV2aWNlIDAgKioKPiA+PiAqKiBDYW4ndCB3cml0ZSB0byBkZXZpY2UgMCAqKgo+ID4+IGVy cm9yIQo+ID4+Cj4gPj4gQ2M6IEtldmVyIFlhbmcgPGtldmVyLnlhbmdAcm9jay1jaGlwcy5jb20+ Cj4gPj4gQ2M6IFBlbmcgRmFuIDxwZW5nLmZhbkBueHAuY29tPgo+ID4+IFJldmlld2VkLWJ5OiBK YWVob29uIENodW5nIDxqaDgwLmNodW5nQHNhbXN1bmcuY29tPgo+ID4+IFNpZ25lZC1vZmYtYnk6 IEphZ2FuIFRla2kgPGphZ2FuQGFtYXJ1bGFzb2x1dGlvbnMuY29tPgo+ID4+IC0tLQo+ID4+IENo YW5nZXMgZm9yIHYyOgo+ID4+IC0gY29sbGVjdCBKYWVob29uIFItYgo+ID4+Cj4gPj4gwqAgZHJp dmVycy9tbWMvc2RoY2kuYyB8IDIzICsrKysrKysrKysrKysrKy0tLS0tLS0tCj4gPj4gwqAgMSBm aWxlIGNoYW5nZWQsIDE1IGluc2VydGlvbnMoKyksIDggZGVsZXRpb25zKC0pCj4gPj4KPiA+PiBk aWZmIC0tZ2l0IGEvZHJpdmVycy9tbWMvc2RoY2kuYyBiL2RyaXZlcnMvbW1jL3NkaGNpLmMKPiA+ PiBpbmRleCA5MmNjODQzNGFmLi4yODBiOGM4OGViIDEwMDY0NAo+ID4+IC0tLSBhL2RyaXZlcnMv bW1jL3NkaGNpLmMKPiA+PiArKysgYi9kcml2ZXJzL21tYy9zZGhjaS5jCj4gPj4gQEAgLTU5NCwx NCArNTk0LDIxIEBAIHN0YXRpYyBpbnQgc2RoY2lfc2V0X2lvcyhzdHJ1Y3QgbW1jICptbWMpCj4g Pj4gwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqAgY3RybCAmPSB+U0RIQ0lfQ1RSTF80QklUQlVT Owo+ID4+IMKgwqDCoMKgwqAgfQo+ID4+IMKgIC3CoMKgwqAgaWYgKG1tYy0+Y2xvY2sgPiAyNjAw MDAwMCkKPiA+PiAtwqDCoMKgwqDCoMKgwqAgY3RybCB8PSBTREhDSV9DVFJMX0hJU1BEOwo+ID4+ IC3CoMKgwqAgZWxzZQo+ID4+IC3CoMKgwqDCoMKgwqDCoCBjdHJsICY9IH5TREhDSV9DVFJMX0hJ U1BEOwo+ID4+IC0KPiA+PiAtwqDCoMKgIGlmICgoaG9zdC0+cXVpcmtzICYgU0RIQ0lfUVVJUktf Tk9fSElTUERfQklUKSB8fAo+ID4+IC3CoMKgwqDCoMKgwqDCoCAoaG9zdC0+cXVpcmtzICYgU0RI Q0lfUVVJUktfQlJPS0VOX0hJU1BEX01PREUpKQo+ID4+IC3CoMKgwqDCoMKgwqDCoCBjdHJsICY9 IH5TREhDSV9DVFJMX0hJU1BEOwo+ID4+ICvCoMKgwqAgaWYgKCEoaG9zdC0+cXVpcmtzICYgU0RI Q0lfUVVJUktfTk9fSElTUERfQklUKSB8fCAgCj4gPiAKPiA+IFNob3VsZCB0aGF0IGJlICImJiIg cmF0aGVyIHRoYW4gInx8Ij8gT3RoZXJ3aXNlIHRoaXMgd2lsbCBhbHdheXMKPiA+IGV2YWx1YXRl IHRvIHRydWUgdW5sZXNzICpib3RoKiBxdWlya3MgYXJlIHNldCwgd2hpY2ggaXNuJ3QKPiA+IGVx dWl2YWxlbnQgdG8gdGhlIGNoZWNrIGJlaW5nIHJlbW92ZWQgYWJvdmUuICAKPiAKPiAKPiBZb3Un cmUgcmlnaHQuCgpJdCdkIGJlIGdyZWF0IGlmIHlvdSBjb3VsZCByZXNwaW4gdGhpcyBwYXRjaCBx dWlja2x5IGFuZCBnZXQgaXQgbWVyZ2VkLAphcyBpdCBqdXN0IGhlbHBlZCBtZSBnZXR0aW5nIG15 IE5hbm9QQy1UNCB1cCBhbmQgcnVubmluZy4KCkZXSVc6CgpUZXN0ZWQtYnk6IE1hcmMgWnluZ2ll ciA8bWF6QGtlcm5lbC5vcmc+CgoJTS4KLS0gCkphenogaXMgbm90IGRlYWQuIEl0IGp1c3Qgc21l bGxzIGZ1bm55Li4uCgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fXwpMaW51eC1yb2NrY2hpcCBtYWlsaW5nIGxpc3QKTGludXgtcm9ja2NoaXBAbGlzdHMuaW5m cmFkZWFkLm9yZwpodHRwOi8vbGlzdHMuaW5mcmFkZWFkLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2xp bnV4LXJvY2tjaGlwCg== From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marc Zyngier Date: Wed, 10 Jun 2020 11:37:52 +0100 Subject: [PATCH v2] mmc: sdhci: Fix HISPD bit handling In-Reply-To: References: <20200609140135.131887-1-jagan@amarulasolutions.com> <097786ed-37ca-cf20-35f4-20a57e6c3b63@arm.com> Message-ID: <20200610113752.65d6f537@why> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Wed, 10 Jun 2020 12:45:33 +0900 Jaehoon Chung wrote: > On 6/9/20 11:38 PM, Robin Murphy wrote: > > On 2020-06-09 15:01, Jagan Teki wrote: > >> SDHCI HISPD bits need to be configured based on desired mmc > >> timings mode and some HISPD quirks. > >> > >> So, handle the HISPD bit based on the mmc computed selected > >> mode(timing parameter) rather than fixed mmc card clock > >> frequency. > >> > >> Linux handle the HISPD similar like this in below commit, > >> > >> commit <501639bf2173> ("mmc: sdhci: fix SDHCI_QUIRK_NO_HISPD_BIT handling") > >> > >> This eventually fixed the mmc write issue observed in > >> rk3399 sdhci controller. > >> > >> Bug log for refernece, > >> => gpt write mmc 0 $partitions > >> Writing GPT: mmc write failed > >> ** Can't write to device 0 ** > >> ** Can't write to device 0 ** > >> error! > >> > >> Cc: Kever Yang > >> Cc: Peng Fan > >> Reviewed-by: Jaehoon Chung > >> Signed-off-by: Jagan Teki > >> --- > >> Changes for v2: > >> - collect Jaehoon R-b > >> > >> ? drivers/mmc/sdhci.c | 23 +++++++++++++++-------- > >> ? 1 file changed, 15 insertions(+), 8 deletions(-) > >> > >> diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c > >> index 92cc8434af..280b8c88eb 100644 > >> --- a/drivers/mmc/sdhci.c > >> +++ b/drivers/mmc/sdhci.c > >> @@ -594,14 +594,21 @@ static int sdhci_set_ios(struct mmc *mmc) > >> ????????????? ctrl &= ~SDHCI_CTRL_4BITBUS; > >> ????? } > >> ? -??? if (mmc->clock > 26000000) > >> -??????? ctrl |= SDHCI_CTRL_HISPD; > >> -??? else > >> -??????? ctrl &= ~SDHCI_CTRL_HISPD; > >> - > >> -??? if ((host->quirks & SDHCI_QUIRK_NO_HISPD_BIT) || > >> -??????? (host->quirks & SDHCI_QUIRK_BROKEN_HISPD_MODE)) > >> -??????? ctrl &= ~SDHCI_CTRL_HISPD; > >> +??? if (!(host->quirks & SDHCI_QUIRK_NO_HISPD_BIT) || > > > > Should that be "&&" rather than "||"? Otherwise this will always > > evaluate to true unless *both* quirks are set, which isn't > > equivalent to the check being removed above. > > > You're right. It'd be great if you could respin this patch quickly and get it merged, as it just helped me getting my NanoPC-T4 up and running. FWIW: Tested-by: Marc Zyngier M. -- Jazz is not dead. It just smells funny...