From: Fabio Estevam <festevam@gmail.com>
To: shawnguo@kernel.org
Cc: linux-arm-kernel@lists.infradead.org,
Fabio Estevam <festevam@gmail.com>,
linux-imx@nxp.com, kernel@pengutronix.de
Subject: [PATCH 1/2] ARM: dts: imx6qdl-sabresd: Pass phy-reset-duration
Date: Wed, 17 Jun 2020 20:22:48 -0300 [thread overview]
Message-ID: <20200617232249.7201-1-festevam@gmail.com> (raw)
According to the AR8031 datasheet:
"When using crystal, clock is generated internally after the power is
stable. In order to get reliable power-on-reset, it is recommended to
keep asserting the reset low signal long enough (10 ms) to ensure the
clock is stable and clock-to-reset (1 ms) requirement is satisfied."
Pass the 'phy-reset-duration' property to meet such requirement.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
---
arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
index 28b35ccb3757..9697211b7693 100644
--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
@@ -204,6 +204,7 @@
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii-id";
phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
+ phy-reset-duration = <10>;
fsl,magic-packet;
status = "okay";
};
--
2.17.1
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next reply other threads:[~2020-06-17 23:23 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-17 23:22 Fabio Estevam [this message]
2020-06-17 23:22 ` [PATCH 2/2] ARM: dts: imx6qdl-sabresd: Add an mdio node Fabio Estevam
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